Classifications

• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06G—ANALOGUE COMPUTERS
  • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
  • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
  • G06G7/19—Arrangements for performing computing operations, e.g. operational amplifiers for forming integrals of products, e.g. Fourier integrals, Laplace integrals, correlation integrals; for analysis or synthesis of functions using orthogonal functions
  • G06G7/1928—Arrangements for performing computing operations, e.g. operational amplifiers for forming integrals of products, e.g. Fourier integrals, Laplace integrals, correlation integrals; for analysis or synthesis of functions using orthogonal functions for forming correlation integrals; for forming convolution integrals
  • G06G7/1935—Arrangements for performing computing operations, e.g. operational amplifiers for forming integrals of products, e.g. Fourier integrals, Laplace integrals, correlation integrals; for analysis or synthesis of functions using orthogonal functions for forming correlation integrals; for forming convolution integrals by converting at least one the input signals into a two level signal, e.g. polarity correlators
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01F—MEASURING VOLUME, VOLUME FLOW, MASS FLOW OR LIQUID LEVEL; METERING BY VOLUME
  • G01F1/00—Measuring the volume flow or mass flow of fluid or fluent solid material wherein the fluid passes through a meter in a continuous flow
  • G01F1/704—Measuring the volume flow or mass flow of fluid or fluent solid material wherein the fluid passes through a meter in a continuous flow using marked regions or existing inhomogeneities within the fluid stream, e.g. statistically occurring variations in a fluid parameter
  • G01F1/708—Measuring the time taken to traverse a fixed distance
  • G01F1/712—Measuring the time taken to traverse a fixed distance using auto-correlation or cross-correlation detection means
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
  • G06F17/10—Complex mathematical operations
  • G06F17/15—Correlation function computation including computation of convolution operations

Definitions

• the present invention relates to data processing apparatus and more particularly to apparatus for tracking the peak of a correlation function between two signals.
• it is necessary to monitor a correlation function between two signals and to determine when the coar-relation function reaches a maximum value.
• One such application arises in connection with a met,hod of measuring flow in which the flow velocity is determined by identifying the time delay between two related signals, one signal being derived downstream of the flow with respect to the other signal. If the distance between the points of derivation of the two signals is constant, the flow velocity will then be inversely proportional to the identified time delay.
• the present invention provides apparatus for tracking the peak of a correlation function between two signals, said apparatus comprising in comlination first correlator means responsive to said signals for providing a coarse measure of the position of said peak, and second correlator means responsive to said signals for tracking said position when said coarse measure corresponds to the tracking range of said second correlator means, said first correlator means being connected to said second correlator means for causing said tracking range to correspond to said coarse measure.
• Figure la is a schematic diagram showing the relationship between two internal variables of a transport process and their external measureable signals
• Figure lb is a block diagram showing one form of correlation function peak tracking apparatus
• Figure 2 is a graphical representation of a coirelation function and its differential with respect to delay time
• Figure 3 is a block diagram showing one embodiment of correlation function peak tracking apparatus incorporating coarse-fine resolution
• Figure 4 is a block diagram showing a modification to the peak tracking apparatus of Figure
• Figure 5 is a. schematic diagram showing one example of a word-controlled shift register which may be used in the apparatus oi Figure 3 or 4;
• FIG 6 is a diagram of a flow control system incorporating the apparatus of Figure 3 or 4.
• a transport process T(S) and external, measurable signals x and y
• Laplace transforms L 1 (S) and L 2 (S) act as transfer functions between x' and x, and y' and y respectively.
• a pipe or conduit 10 contains a flowing medium represented by the arrow 11.
• Transducers and associated circuits 12 and 13 having transfer functions represented by the Laplace transforms L 1 (S) and L 2 (S) produce respective signals x and y derived from flow signals x' and y'.
• R xx (S) L 1 (S). L 1 (-S). R x , x , (S) and
• R yy (S) L 2 (S). T(S). L 2 (-S).T(-S).R x , x ,(S)
• a second input signal y(t) is fed through a differentiating circuit 17 to the second input of the multiplier 16.
• the output of the multiplier 16 is fed through a smoothing circuit l8 which may comprise an RC circuit having a suitable time constant, to an integrator 19 whose output is fed to a voltage controlled oscillator (VCO) 20.
• VCO voltage controlled oscillator
• the voltage controlled oscillator 20 provides the clock frequency setting the shift register delay .
• the differentiated function illustrated by a broken line, is bipolar and hence the stable operating point of the closed loop negative feedback system will be obtained when the differentiated function equals zero. This point corresponds to the peak of the correlation function R yx .
• a signal representative of the differentiated function is received at the input of the integrator 19. If this input is at zero, i.e. representative of the peak of the function, the integrator output will be constant; therefore the clock frequency derived from the VCO 20 will also be constant and the negative feedback system will be at its stable operating point.
• a positive or negative input to the integrator 19 will be integrated in time, thus leading to a progressively increasing or decreasing clock frequency to the shift register 15.
• the preferred embodiment of the present invention therefore provides a coarse-fine system approach.
• a digital correlator with a relatively smalJ number of delay increments will provide a coarse indication of the peak position. This may be used to constrain the peak tracking range of a delay-locked loop to the immediate vicinity of the most significant peak thereby removing the need for a search mode of operation.
• correlation function peak tracking apparatus e.g. for use in a correlation flowmeter, having a virtually continuous output resolution.
• Figure 3 shows a block diagram of a complete constxained peak tracking apparatus. Parts of the circuit common to those shown in Figure lb are denoted by like reference numerals.
• the circuit of Figure 3 includes that of Figure lb with the exception that the shift register 15 is replaced by a word controlled shift register 25 whose delay time is set both by the frequency of tho clock pulses from the VCO 20 as with the shift register 15, and also by having a variable length, or number of stages which is controlled by a signal such as a digital word N fed to a control input of the shift register
• a coarse peak detector 26, such as a digital correlator having a relatively small number of delay increments, is arranged to receive the signals x(t) and y(t) and to provide a signal indicative of a coarsely detected peak position.
• the signal is shown in Figure 3 as taking the form of the digital word N , and this signal is fed to the control input of the shift register 25.
• the length and hence the delay time of the register is controlled in accordance with this signal, and the preferred arrangement is that the signal controls the length of the shift register to be proportional to the detected coarse peak position.
• the coarse peak detector 26 Any one of a variety of conventional correlators which produce a coarse measure of the function peak may be used as the coarse peak detector 26.
• the clock frequency F of the shift register 25 is set by the VCO 20 forming part of the delay-lock loop in a similar fashion to that of Figure lb.
• the integrator 19 provides a signal V 2 representative of the integral of the smoothed signal V 1 , and this integral signal V 2 contols the VCO 20 and hence the clock frequency F c .
• This function may he implemented as shown in Figure 3 by using suitable processing means such as a variable modulus counter circuit 27 having its modulus controlled by the coarse peak indication
• Np with the clock frequency F c as an input.
• the output frequency is then proportional to flow and this is fed to a frequency to voltage converter (FVC) 28 which produces a voltage V 0 proportional to flow.
• FVC frequency to voltage converter
• the voltage V 0 can be arranged to activate conventional indicating means such as a panel meter, pen recorder or digital read out. Alternatively, if a digital output is required, this may be derived directlyfrom the output of the counter 27.
• a further output circuit may be formed as follows.
• the output from the voltage controlled oscillator 20 is given by
• variable modulus counter 27 and the frequency to voltage converter 28 are replaced by a digital to analogue converter (DAC) circuit 29.
• DAC digital to analogue converter
• the DAC circuit 29 receives the output V 2 of the integrator and effectively divides the varying part V c by the coarse peak indication N p . Since the flow rate is proportional to F c divided by N p , and V c is proportional to F c as shown above, the output V 0 of circuit 29 will bo proportional to the flow rate.
• Figure 5 shows one example of a word controlled shift register 25 which may be used in the apparatus of Figure 3 or 4.
• the binary word Np applied in this case in parallel form, controls logic switches 42, 44, 46 connecting stages 4l, 43, 4-5 respectively of the shift register.
• a binary bit of the word N p is one
• a shift register stage proportional in length to the binary weighting of the bit is connected into the chain of shift register stages whereas when the bit is zero the stage is by-passed by a short circuit. Therefore, the control input of the logic switch 42 controls the shift register stage (SRS) 4l having unit length
• the switches 44 and 46 respectively control stages 43 and 45 having respectively double and quadruple the lengths of the stage 4l.
• the logic switch 42 is shown in greater detail as including AND-gates 47,48, an OR-gate 49 and an inverter 50. Switches 44 and 46 may be constructed in a similar fashion. Upon receipt of a logic one at the control input, AND-gate 47 allows serial data from the stage 41 to pass therethrough and via OR-gate 49 to the subsequent stage 43- The inverter 50 inhibits the AND-gate 48 from providing a by-pass path around the stage 4l. When a logic zero is received at the control input, the states of the AND-gates 47 and 48 are reversed, and the serial data by-passes the stage 4l, thereby shortening the total length of the shift register 25. The total length of the register upon receipt of a control binary word N p is then equal to the product of the maximum obtainable length of the register and the decimal number corresponding to the binary N p .
• any desired number may be provided corresponding to the number of bits in the control word N p prodnco.d by the coarse detector 26.
• the tracking apparatus When used for flow measurement applications, the tracking apparatus may be arranged to provide an indication or read-out of flow rate or other derived flow parameter. Alternatively, it may be used in a feedback system as shown in Figure 6 to control the flow.
• the pipe or conduit 10 contains a flowing medium such as a liquid represented by the arrow 11, and is provided with transducers 12 and 13.
• the peak tracking apparatus 60 such as shown in Figures 3 or 4, receives flow related signals from the transducers 12, 13 and provides an indication of flow to a control circuit 61.
• the control circuit 61 The control circuit
• 61 is arranged to be responsive to the flow indication from apparatus 60 to activate a flow control mechanism
• the flow control mechanism 62 may comprise a valve and/or a pump, and the control circuit 6l may comprise any conventional arrangement such as a comparator which compares the flow indicatio signal with a reference signal and activates the contr mechanism 62 accordingly.

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• Computer Hardware Design (AREA)
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Publications (1)

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Cited By (9)

Citations (6)

• 1979
  • 1979-05-24 JP JP50079179A patent/JPS55500512A/ja active Pending
  • 1979-05-24 WO PCT/GB1979/000076 patent/WO1979001119A1/en unknown
  • 1979-05-24 DE DE792952812A patent/DE2952812A1/de active Pending
  • 1979-05-24 CA CA328,224A patent/CA1114511A/en not_active Expired
  • 1979-05-24 GB GB8002114A patent/GB2039110B/en not_active Expired
  • 1979-05-25 IT IT7922990A patent/IT7922990A0/it unknown
• 1980
  • 1980-01-03 EP EP79900522A patent/EP0019618A1/en not_active Withdrawn
  • 1980-12-05 FR FR8026167A patent/FR2476351A1/fr not_active Withdrawn

Patent Citations (6)

Non-Patent Citations (1)

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