UST102502I4 - Gap elimination in memory data accession - Google Patents

Gap elimination in memory data accession Download PDF

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Publication number
UST102502I4
UST102502I4 US06/260,620 US26062081A UST102502I4 US T102502 I4 UST102502 I4 US T102502I4 US 26062081 A US26062081 A US 26062081A US T102502 I4 UST102502 I4 US T102502I4
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United States
Prior art keywords
data
loop
storage
communicating
synchronously
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Pending
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US06/260,620
Inventor
Clifton D. Cullum, Jr.
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Individual
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Individual
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Priority to US06/260,620 priority Critical patent/UST102502I4/en
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Publication of UST102502I4 publication Critical patent/UST102502I4/en
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure

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  • Communication Control (AREA)

Abstract

This invention relates to the reduction of gaps in the flow of data accessed in a synchronous serial storage serial communicating data processing memory by the provision of access storage capability at each storage location. The problem to which the invention is directed is the fact that in a synchronously driven array of the type having a number of data storage locations that are accessed by a communicating channel linking all the storage locations in series, the information flow in the communication channel will be limited by the time required for the proper point to be moved around each storage location and the resulting gaps in the data will effect the speed of response. The invention takes the bits to be transferred as they are synchronously propagated around one loop and holds them as the data is synchronously propagated around the other loop until the insertion point arrives. The invention provides a specific size buffer or intermediate storage loop that can hold the amount of data being transferred until the timing is accommodated. The intermediate loop buffer must be big enough for the transferring data but it should not be much larger or there will still be a gap in the data in the communicating loop in proportion to the amount the intermediate loop is oversize.
US06/260,620 1976-07-21 1981-05-05 Gap elimination in memory data accession Pending UST102502I4 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US06/260,620 UST102502I4 (en) 1976-07-21 1981-05-05 Gap elimination in memory data accession

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US70739476A 1976-07-21 1976-07-21
US87764678A 1978-02-14 1978-02-14
US4489479A 1979-06-04 1979-06-04
US06/260,620 UST102502I4 (en) 1976-07-21 1981-05-05 Gap elimination in memory data accession

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US4489479A Continuation 1976-07-21 1979-06-04

Publications (1)

Publication Number Publication Date
UST102502I4 true UST102502I4 (en) 1982-12-07

Family

ID=27366576

Family Applications (1)

Application Number Title Priority Date Filing Date
US06/260,620 Pending UST102502I4 (en) 1976-07-21 1981-05-05 Gap elimination in memory data accession

Country Status (1)

Country Link
US (1) UST102502I4 (en)

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