USD821337S1 - Contact field for a printed circuit board - Google Patents

Contact field for a printed circuit board Download PDF

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Publication number
USD821337S1
USD821337S1 US29/515,098 US201529515098F USD821337S US D821337 S1 USD821337 S1 US D821337S1 US 201529515098 F US201529515098 F US 201529515098F US D821337 S USD821337 S US D821337S
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US
United States
Prior art keywords
circuit board
printed circuit
contact field
view
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
US29/515,098
Inventor
Lynwood Dale Adams
Jack Lewis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Modus Test LLC
Original Assignee
Modus Test Automation LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Modus Test Automation LLC filed Critical Modus Test Automation LLC
Priority to US29/515,098 priority Critical patent/USD821337S1/en
Assigned to Modus Test Automation, LLC reassignment Modus Test Automation, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ADAMS, LYNDON DALE, LEWIS, JACK
Application granted granted Critical
Publication of USD821337S1 publication Critical patent/USD821337S1/en
Assigned to MODUS TEST, LLC reassignment MODUS TEST, LLC ASSIGNMENT OF ASSIGNOR'S INTEREST Assignors: Modus Test Automation, LLC
Assigned to ROGERS, BRUCE D reassignment ROGERS, BRUCE D SECURITY INTEREST Assignors: MODUS TEST, LLC
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Description

FIG. 1 is a top perspective view of a contact field for a printed circuit board;
FIG. 2 is a bottom perspective view thereof;
FIG. 3 is a right side elevation view thereof;
FIG. 4 is a left side elevation view thereof;
FIG. 5 is a front elevation view thereof;
FIG. 6 is a rear elevation view thereof;
FIG. 7 is a top plan view thereof;
FIG. 8 is a bottom plan view thereof;
FIG. 9 is a first close up bottom plan view thereof; and,
FIG. 10 is a second close up bottom plan view thereof.
The broken lines shown represent portions of the contact field for a printed circuit board that form no part of the claimed design.

Claims (1)

    CLAIM
  1. The ornamental design for a contact field for a printed circuit board, substantially as shown and described.
US29/515,098 2015-01-20 2015-01-20 Contact field for a printed circuit board Active USD821337S1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US29/515,098 USD821337S1 (en) 2015-01-20 2015-01-20 Contact field for a printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29/515,098 USD821337S1 (en) 2015-01-20 2015-01-20 Contact field for a printed circuit board

Publications (1)

Publication Number Publication Date
USD821337S1 true USD821337S1 (en) 2018-06-26

Family

ID=62623537

Family Applications (1)

Application Number Title Priority Date Filing Date
US29/515,098 Active USD821337S1 (en) 2015-01-20 2015-01-20 Contact field for a printed circuit board

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US (1) USD821337S1 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD872032S1 (en) * 2018-09-14 2020-01-07 Telit Communications S.P.A. Connection module
USD872033S1 (en) * 2018-09-14 2020-01-07 Telit Communications S.P.A. Connection module
USD937233S1 (en) * 2019-10-24 2021-11-30 Nuvoton Technology Corporation Japan Semiconductor device
USD937232S1 (en) * 2019-10-24 2021-11-30 Nuvoton Technology Corporation Japan Semiconductor device
USD1087928S1 (en) 2022-08-16 2025-08-12 Modus Test, Llc Contact field for a printed circuit board
USD1098054S1 (en) * 2022-08-16 2025-10-14 Modus Test, Llc Contact field for a motherboard for an electronic testing system

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4330684A (en) * 1977-12-27 1982-05-18 Hayward C Michael Matrix board
USD319629S (en) * 1988-04-13 1991-09-03 Ibiden Co., Ltd. Semiconductor substrate with conducting pattern
US5159536A (en) * 1988-05-13 1992-10-27 Mupac Corporation Panel board
USD334175S (en) * 1991-04-12 1993-03-23 Oz Technologies, Inc. Probe interface test board
US5296652A (en) * 1991-05-03 1994-03-22 Loral Vought Systems Corporation Apparatus for attaching a circuit component to a printed circuit board
US6255600B1 (en) * 1993-03-01 2001-07-03 The Board Of Trustees Of The University Of Arkansas Electronic interconnection medium having offset electrical mesh plane
USD457146S1 (en) * 2000-11-29 2002-05-14 Kabushiki Kaisha Toshiba Substrate for a semiconductor element
USD465772S1 (en) * 2001-04-20 2002-11-19 3Com Corporation Printed circuit board
US7012196B2 (en) * 2002-06-05 2006-03-14 Swetland Paul A Apparatus, method and system for interfacing electronic circuits

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4330684A (en) * 1977-12-27 1982-05-18 Hayward C Michael Matrix board
USD319629S (en) * 1988-04-13 1991-09-03 Ibiden Co., Ltd. Semiconductor substrate with conducting pattern
US5159536A (en) * 1988-05-13 1992-10-27 Mupac Corporation Panel board
USD334175S (en) * 1991-04-12 1993-03-23 Oz Technologies, Inc. Probe interface test board
US5296652A (en) * 1991-05-03 1994-03-22 Loral Vought Systems Corporation Apparatus for attaching a circuit component to a printed circuit board
US6255600B1 (en) * 1993-03-01 2001-07-03 The Board Of Trustees Of The University Of Arkansas Electronic interconnection medium having offset electrical mesh plane
USD457146S1 (en) * 2000-11-29 2002-05-14 Kabushiki Kaisha Toshiba Substrate for a semiconductor element
USD465772S1 (en) * 2001-04-20 2002-11-19 3Com Corporation Printed circuit board
US7012196B2 (en) * 2002-06-05 2006-03-14 Swetland Paul A Apparatus, method and system for interfacing electronic circuits

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD872032S1 (en) * 2018-09-14 2020-01-07 Telit Communications S.P.A. Connection module
USD872033S1 (en) * 2018-09-14 2020-01-07 Telit Communications S.P.A. Connection module
USD937233S1 (en) * 2019-10-24 2021-11-30 Nuvoton Technology Corporation Japan Semiconductor device
USD937232S1 (en) * 2019-10-24 2021-11-30 Nuvoton Technology Corporation Japan Semiconductor device
USD938925S1 (en) 2019-10-24 2021-12-21 Nuvoton Technology Corporation Japan Semiconductor device
USD1087928S1 (en) 2022-08-16 2025-08-12 Modus Test, Llc Contact field for a printed circuit board
USD1098054S1 (en) * 2022-08-16 2025-10-14 Modus Test, Llc Contact field for a motherboard for an electronic testing system

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