USD502151S1 - Semiconductor package - Google Patents

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Publication number
USD502151S1
USD502151S1 US29/189,285 US18928503F USD502151S US D502151 S1 USD502151 S1 US D502151S1 US 18928503 F US18928503 F US 18928503F US D502151 S USD502151 S US D502151S
Authority
US
United States
Prior art keywords
semiconductor package
elevational view
ornamental design
package
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US29/189,285
Inventor
Martin Standing
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies Americas Corp
Original Assignee
International Rectifier Corp USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Rectifier Corp USA filed Critical International Rectifier Corp USA
Priority to US29/189,285 priority Critical patent/USD502151S1/en
Assigned to INTERNATIONAL RECTIFIER CORPORATION reassignment INTERNATIONAL RECTIFIER CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: STANDING, MARTIN
Application granted granted Critical
Publication of USD502151S1 publication Critical patent/USD502151S1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

FIG. 1 is a front elevational view of a semiconductor package, showing our design;
FIG. 2 is a left side elevational view thereof;
FIG. 3 is a top plan view thereof; and,
FIG. 4 is a rear elevational view thereof.
The broken lines shown in the figures are for illustrative purposes only and form no part of the claimed design.

Claims (1)

  1. The ornamental design for a semiconductor package, as shown and described.
US29/189,285 2003-09-02 2003-09-02 Semiconductor package Expired - Lifetime USD502151S1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US29/189,285 USD502151S1 (en) 2003-09-02 2003-09-02 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29/189,285 USD502151S1 (en) 2003-09-02 2003-09-02 Semiconductor package

Publications (1)

Publication Number Publication Date
USD502151S1 true USD502151S1 (en) 2005-02-22

Family

ID=34134721

Family Applications (1)

Application Number Title Priority Date Filing Date
US29/189,285 Expired - Lifetime USD502151S1 (en) 2003-09-02 2003-09-02 Semiconductor package

Country Status (1)

Country Link
US (1) USD502151S1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD822629S1 (en) * 2017-01-26 2018-07-10 Kyocera Corporation Semiconductor package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD822629S1 (en) * 2017-01-26 2018-07-10 Kyocera Corporation Semiconductor package

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