USB392136I5 - - Google Patents
Info
- Publication number
- USB392136I5 USB392136I5 US392136DD USB392136I5 US B392136 I5 USB392136 I5 US B392136I5 US 392136D D US392136D D US 392136DD US B392136 I5 USB392136 I5 US B392136I5
- Authority
- US
- United States
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/142—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/288—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thin film techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49099—Coating resistive material on a base
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US392136A US3345210A (en) | 1964-08-26 | 1964-08-26 | Method of applying an ohmic contact to thin film passivated resistors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| USB392136I5 true USB392136I5 (en) |
Family
ID=23549384
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US392136D Pending USB392136I5 (en) | 1964-08-26 | ||
| US392136A Expired - Lifetime US3345210A (en) | 1964-08-26 | 1964-08-26 | Method of applying an ohmic contact to thin film passivated resistors |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US392136A Expired - Lifetime US3345210A (en) | 1964-08-26 | 1964-08-26 | Method of applying an ohmic contact to thin film passivated resistors |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US3345210A (en) |
| CH (1) | CH432628A (en) |
| DE (1) | DE1540175B2 (en) |
| GB (1) | GB1038609A (en) |
| NL (1) | NL6510206A (en) |
| NO (1) | NO120943B (en) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3411048A (en) * | 1965-05-19 | 1968-11-12 | Bell Telephone Labor Inc | Semiconductor integrated circuitry with improved isolation between active and passive elements |
| US3523038A (en) * | 1965-06-02 | 1970-08-04 | Texas Instruments Inc | Process for making ohmic contact to planar germanium semiconductor devices |
| US3462658A (en) * | 1965-10-12 | 1969-08-19 | Bendix Corp | Multi-emitter semiconductor device |
| US3462723A (en) * | 1966-03-23 | 1969-08-19 | Mallory & Co Inc P R | Metal-alloy film resistor and method of making same |
| US3505134A (en) * | 1966-04-13 | 1970-04-07 | Du Pont | Metalizing compositions whose fired-on coatings can be subjected to acid bath treatment and the method of using such metalizing compositions |
| US3501829A (en) * | 1966-07-18 | 1970-03-24 | United Aircraft Corp | Method of applying contacts to a microcircuit |
| US3513022A (en) * | 1967-04-26 | 1970-05-19 | Rca Corp | Method of fabricating semiconductor devices |
| US3623961A (en) * | 1968-01-12 | 1971-11-30 | Philips Corp | Method of providing an electric connection to a surface of an electronic device and device obtained by said method |
| US3636619A (en) * | 1969-06-19 | 1972-01-25 | Teledyne Inc | Flip chip integrated circuit and method therefor |
| US3663279A (en) * | 1969-11-19 | 1972-05-16 | Bell Telephone Labor Inc | Passivated semiconductor devices |
| US3765937A (en) * | 1970-11-06 | 1973-10-16 | Western Electric Co | Method of making thin film devices |
| US4050053A (en) * | 1976-04-22 | 1977-09-20 | North American Philips Corporation | Resistor end terminations |
| DE2822011B2 (en) * | 1978-05-19 | 1980-06-04 | Fujitsu Ltd., Kawasaki, Kanagawa (Japan) | Semiconductor device and method for the production thereof |
| US4217570A (en) * | 1978-05-30 | 1980-08-12 | Tektronix, Inc. | Thin-film microcircuits adapted for laser trimming |
| US4394678A (en) * | 1979-09-19 | 1983-07-19 | Motorola, Inc. | Elevated edge-protected bonding pedestals for semiconductor devices |
| DE3161228D1 (en) * | 1980-04-17 | 1983-11-24 | Post Office | Gold metallisation in semiconductor devices |
| US4392992A (en) * | 1981-06-30 | 1983-07-12 | Motorola, Inc. | Chromium-silicon-nitrogen resistor material |
| US4591821A (en) * | 1981-06-30 | 1986-05-27 | Motorola, Inc. | Chromium-silicon-nitrogen thin film resistor and apparatus |
| US7659475B2 (en) * | 2003-06-20 | 2010-02-09 | Imec | Method for backside surface passivation of solar cells and solar cells with such passivation |
| US20050255410A1 (en) * | 2004-04-29 | 2005-11-17 | Guerrero Douglas J | Anti-reflective coatings using vinyl ether crosslinkers |
| US7914974B2 (en) | 2006-08-18 | 2011-03-29 | Brewer Science Inc. | Anti-reflective imaging layer for multiple patterning process |
| KR101647158B1 (en) * | 2008-01-29 | 2016-08-09 | 브레우어 사이언스 인코포레이션 | On-track process for patterning hardmask by multiple dark field exposures |
| US9640396B2 (en) * | 2009-01-07 | 2017-05-02 | Brewer Science Inc. | Spin-on spacer materials for double- and triple-patterning lithography |
-
0
- US US392136D patent/USB392136I5/en active Pending
-
1964
- 1964-08-26 US US392136A patent/US3345210A/en not_active Expired - Lifetime
-
1965
- 1965-07-12 GB GB29490/65A patent/GB1038609A/en not_active Expired
- 1965-07-22 DE DE19651540175 patent/DE1540175B2/en active Pending
- 1965-07-26 NO NO159099A patent/NO120943B/no unknown
- 1965-08-05 NL NL6510206A patent/NL6510206A/xx unknown
- 1965-08-26 CH CH1203965A patent/CH432628A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DE1540175A1 (en) | 1970-01-02 |
| NL6510206A (en) | 1966-02-28 |
| GB1038609A (en) | 1966-08-10 |
| DE1540175B2 (en) | 1971-10-07 |
| NO120943B (en) | 1970-12-28 |
| CH432628A (en) | 1967-03-31 |
| US3345210A (en) | 1967-10-03 |