USB316014I5 - - Google Patents

Info

Publication number
USB316014I5
USB316014I5 US31601472A USB316014I5 US B316014 I5 USB316014 I5 US B316014I5 US 31601472 A US31601472 A US 31601472A US B316014 I5 USB316014 I5 US B316014I5
Authority
US
United States
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to US316014A priority Critical patent/US3920861A/en
Publication of USB316014I5 publication Critical patent/USB316014I5/en
Application granted granted Critical
Publication of US3920861A publication Critical patent/US3920861A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
US316014A 1972-12-18 1972-12-18 Method of making a semiconductor device Expired - Lifetime US3920861A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US316014A US3920861A (en) 1972-12-18 1972-12-18 Method of making a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US316014A US3920861A (en) 1972-12-18 1972-12-18 Method of making a semiconductor device

Publications (2)

Publication Number Publication Date
USB316014I5 true USB316014I5 (fr) 1975-01-28
US3920861A US3920861A (en) 1975-11-18

Family

ID=23227090

Family Applications (1)

Application Number Title Priority Date Filing Date
US316014A Expired - Lifetime US3920861A (en) 1972-12-18 1972-12-18 Method of making a semiconductor device

Country Status (1)

Country Link
US (1) US3920861A (fr)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3994758A (en) * 1973-03-19 1976-11-30 Nippon Electric Company, Ltd. Method of manufacturing a semiconductor device having closely spaced electrodes by perpendicular projection
US4212022A (en) * 1973-04-30 1980-07-08 Licentia Patent-Verwaltungs-G.M.B.H. Field effect transistor with gate and drain electrodes on the side surface of a mesa
JPS5131186A (fr) * 1974-09-11 1976-03-17 Hitachi Ltd
US4063992A (en) * 1975-05-27 1977-12-20 Fairchild Camera And Instrument Corporation Edge etch method for producing narrow openings to the surface of materials
GB1563913A (en) * 1975-12-12 1980-04-02 Hughes Aircraft Co Method of making schottky-barrier gallium arsenide field effect devices
US4045594A (en) * 1975-12-31 1977-08-30 Ibm Corporation Planar insulation of conductive patterns by chemical vapor deposition and sputtering
US3999281A (en) * 1976-01-16 1976-12-28 The United States Of America As Represented By The Secretary Of The Air Force Method for fabricating a gridded Schottky barrier field effect transistor
US4061530A (en) * 1976-07-19 1977-12-06 Fairchild Camera And Instrument Corporation Process for producing successive stages of a charge coupled device
JPS5370688A (en) * 1976-12-06 1978-06-23 Toshiba Corp Production of semoconductor device
US4145459A (en) * 1978-02-02 1979-03-20 Rca Corporation Method of making a short gate field effect transistor
US4194285A (en) * 1978-06-15 1980-03-25 Rca Corporation Method of making a field effect transistor
US4334348A (en) * 1980-07-21 1982-06-15 Data General Corporation Retro-etch process for forming gate electrodes of MOS integrated circuits
US4441931A (en) * 1981-10-28 1984-04-10 Bell Telephone Laboratories, Incorporated Method of making self-aligned guard regions for semiconductor device elements
US4525919A (en) * 1982-06-16 1985-07-02 Raytheon Company Forming sub-micron electrodes by oblique deposition
FR2558647B1 (fr) * 1984-01-23 1986-05-09 Labo Electronique Physique Transistor a effet de champ de type schottky pour applications hyperfrequences et procede de realisation permettant d'obtenir un tel transistor
US4618510A (en) * 1984-09-05 1986-10-21 Hewlett Packard Company Pre-passivated sub-micrometer gate electrodes for MESFET devices
KR970000538B1 (ko) * 1993-04-27 1997-01-13 엘지전자 주식회사 게이트 리세스 구조를 갖는 전계효과트랜지스터의 제조방법
RU2484550C1 (ru) * 2011-11-09 2013-06-10 Открытое акционерное общество "ОКБ-Планета" (ОАО "ОКБ-Планета") Способ стабилизации электрических параметров полупроводниковых приборов, загерметизированных в пластмассу

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3490943A (en) * 1964-04-21 1970-01-20 Philips Corp Method of forming juxtaposed metal layers separated by a narrow gap on a substrate and objects manufactured by the use of such methods
US3675313A (en) * 1970-10-01 1972-07-11 Westinghouse Electric Corp Process for producing self aligned gate field effect transistor
US3678573A (en) * 1970-03-10 1972-07-25 Westinghouse Electric Corp Self-aligned gate field effect transistor and method of preparing
US3716429A (en) * 1970-06-18 1973-02-13 Rca Corp Method of making semiconductor devices
US3752702A (en) * 1968-10-04 1973-08-14 M Iizuka Method of making a schottky barrier device
US3764865A (en) * 1970-03-17 1973-10-09 Rca Corp Semiconductor devices having closely spaced contacts
US3769109A (en) * 1972-04-19 1973-10-30 Bell Telephone Labor Inc PRODUCTION OF SiO{11 {11 TAPERED FILMS

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3490943A (en) * 1964-04-21 1970-01-20 Philips Corp Method of forming juxtaposed metal layers separated by a narrow gap on a substrate and objects manufactured by the use of such methods
US3752702A (en) * 1968-10-04 1973-08-14 M Iizuka Method of making a schottky barrier device
US3678573A (en) * 1970-03-10 1972-07-25 Westinghouse Electric Corp Self-aligned gate field effect transistor and method of preparing
US3764865A (en) * 1970-03-17 1973-10-09 Rca Corp Semiconductor devices having closely spaced contacts
US3716429A (en) * 1970-06-18 1973-02-13 Rca Corp Method of making semiconductor devices
US3675313A (en) * 1970-10-01 1972-07-11 Westinghouse Electric Corp Process for producing self aligned gate field effect transistor
US3769109A (en) * 1972-04-19 1973-10-30 Bell Telephone Labor Inc PRODUCTION OF SiO{11 {11 TAPERED FILMS

Also Published As

Publication number Publication date
US3920861A (en) 1975-11-18

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