US9570345B1 - Cobalt resistance recovery by hydrogen anneal - Google Patents

Cobalt resistance recovery by hydrogen anneal Download PDF

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US9570345B1
US9570345B1 US15/075,039 US201615075039A US9570345B1 US 9570345 B1 US9570345 B1 US 9570345B1 US 201615075039 A US201615075039 A US 201615075039A US 9570345 B1 US9570345 B1 US 9570345B1
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conductive interconnect
nitrogen
interlayer conductive
layer
cobalt
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Nikolaos Bekiaris
Mehul Naik
Zhiyuan Wu
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Applied Materials Inc
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Applied Materials Inc
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Assigned to APPLIED MATERIALS, INC. reassignment APPLIED MATERIALS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BEKIARIS, NIKOLAOS, NAIK, MEHUL, Wu, Zhiyuan
Priority to US15/140,955 priority patent/US9711397B1/en
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Publication of US9570345B1 publication Critical patent/US9570345B1/en
Priority to KR1020187026548A priority patent/KR102327446B1/en
Priority to PCT/US2017/022758 priority patent/WO2017161147A1/en
Priority to CN201780017732.3A priority patent/CN108886017B/en
Priority to JP2018548335A priority patent/JP6981991B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02074—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a planarization of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76832—Multiple layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides

Definitions

  • the disclosure concerns a method of forming layered structures having conductive Cobalt interconnects for interlayer connectivity in an integrated circuit such as a complementary metal oxide semiconductor (CMOS) structure.
  • CMOS complementary metal oxide semiconductor
  • the conductive interconnects are typically Copper.
  • the conductive interconnects may be formed of Cobalt instead of Copper.
  • Cobalt oxide layer Following chemical mechanical polishing (CMP), exposed surfaces of the Cobalt interconnects tend to form an overlying thin Cobalt oxide layer, which must be removed.
  • CMP chemical mechanical polishing
  • One method for removing the thin Cobalt oxide layer is to treat the structure with an ammonia plasma (a plasma formed of NH3). This treatment can enhance time dependent dielectric breakdown (TDDB) behavior of the structure. It is a challenge for one to remove the Cobalt oxide layer without damaging the under layer.
  • TDDB time dependent dielectric breakdown
  • a method of processing a workpiece comprises forming on the workpiece a dielectric layer and an interlayer interconnect extending through the dielectric layer, removing oxide from an exposed surface of the interlayer interconnect by treating the workpiece in a plasma formed of a Nitrogen-containing gas, and depositing on the interlayer interconnect a dielectric barrier layer of a thickness less than a threshold thickness.
  • the method further comprises reducing resistance of the interlayer interconnect by removing Nitrogen from the interlayer interconnect through the dielectric barrier layer and increasing thickness of the dielectric barrier layer above the threshold thickness.
  • the Nitrogen-containing gas comprises ammonia.
  • the interlayer interconnect comprises Cobalt.
  • the threshold thickness does not exceed 50 Angstroms, and may be about 20 Angstroms.
  • the removing Nitrogen from the interlayer interconnect comprises exposing the workpiece to a Hydrogen plasma, radicals or Hydrogen thermal anneal.
  • the dielectric barrier layer comprises Silicon and one or more of the following: Carbon, Oxygen, Nitrogen.
  • the threshold thickness is sufficiently small to permit removal of Nitrogen through the dielectric barrier layer by a Hydrogen plasma, radicals or Hydrogen thermal anneal.
  • a method of processing a workpiece comprises forming on the workpiece a dielectric layer and an interlayer interconnect extending through the dielectric layer and removing oxide from an exposed surface of the interlayer interconnect by treating the workpiece in a plasma formed from a Nitrogen-containing gas or Hydrogen plasma, radicals or thermal anneal.
  • the method further comprises depositing on the interlayer interconnect an etch stop layer of a thickness less than a threshold thickness, reducing resistance of the interlayer interconnect by removing Nitrogen from the interlayer interconnect through the etch stop layer, and increasing thickness of the etch stop layer above the threshold thickness.
  • the interlayer interconnect comprises Cobalt.
  • the threshold thickness is less than 50 Angstroms or may be about 20 Angstroms.
  • the removing Nitrogen from the interlayer interconnect comprises exposing the workpiece to a Hydrogen plasma, radicals or Hydrogen thermal anneal.
  • the etch stop layer comprises a Nitrogen-containing material such as AlN.
  • the Nitrogen-containing gas comprises ammonia.
  • the threshold thickness is sufficiently small to permit removal of Nitrogen through the etch stop layer by a Hydrogen plasma, radicals or Hydrogen thermal anneal.
  • FIGS. 1A, 1B, 1C, 1D and 1E depict successive side views of an integrated circuit structure, the successive side views corresponding to a sequence of process operations.
  • FIG. 2 is a block flow diagram of the sequence of process operations corresponding to the succession of FIG. 1A through FIG. 1E .
  • FIGS. 3A, 3B, 3C, 3D and 3E depict successive side views of an integrated circuit structure, the successive side views corresponding to a sequence of process operations.
  • FIG. 4 is a block flow diagram of the sequence of process operations corresponding to the succession of FIG. 3A through FIG. 3E .
  • Cobalt interconnects As previously mentioned, removing the Cobalt oxide layer without damaging an under layer is challenging.
  • One problem we have discovered with Cobalt interconnects is that exposure to Nitrogen or Nitrogen-containing substances, such as an ammonia plasma, causes the resistance of the Cobalt interconnect to increase. We believe this is due to nitridation of the Cobalt interconnects. This increase can be significant, e.g., about 5% to 25%, depending upon structure size and device density. Therefore, one problem is how to avoid increased resistance due to nitridation.
  • a dielectric barrier layer is deposited on the Cobalt interconnects after Cobalt oxide removal.
  • a dielectric barrier layer contains Silicon in combination with other materials such as Carbon, Oxygen and/or Nitrogen.
  • Contact of the Cobalt interconnect with the Silicon-containing barrier layer causes silicidation of the Cobalt interconnect.
  • Such silicidation increases the line resistance of the Cobalt interconnect. Therefore, a second problem is how to provide a Silicon-containing barrier layer on top of the Cobalt interconnect without causing a resistance increase due to silicidation of the Cobalt interconnect by Silicon from the etch stop layer.
  • an etch stop layer is deposited over the Cobalt interconnects after Cobalt oxide removal.
  • the etch stop layer is typically a Nitrogen-containing material such as Aluminum nitride (AlN) and is left in place at least until completion of a subsequent etch operation in the process.
  • a non-ammonia process e.g. Hydrogen plasma, radicals or gas anneal
  • contact of the nitrogen-containing etch stop layer with the Cobalt interconnect leads to nitridation of the Cobalt interconnect, which increases line resistance of the Cobalt interconnects. Therefore, a third problem is how to provide a Nitrogen-containing etch stop layer on top of the Cobalt interconnect without causing a resistance increase due to nitridation of the Cobalt interconnect by Nitrogen from the etch stop layer.
  • a dielectric layer 90 is one of plural layers of a multilayer semiconductor structure formed on a workpiece 92 such as a semiconductor wafer.
  • the dielectric layer 90 may include a bottom dielectric layer 100 of a material having a low dielectric constant.
  • a Cobalt interconnect 104 extends from the bottom dielectric layer 100 through the dielectric layer 90 to top surface 90 a of the dielectric layer 90 .
  • the structure includes a large number of Cobalt interconnects, only one of which is illustrated in the drawings.
  • the Cobalt interconnect 104 is one of plural interconnects extending through the dielectric layer 90 .
  • the workpiece 92 is treated by chemical mechanical polishing, which leaves top surface 104 a of the Cobalt interconnect 104 exposed.
  • the top surface 104 a oxidizes upon exposure to form a Cobalt oxide layer 106 .
  • the workpiece 92 is placed in a plasma reactor chamber 107 (indicated in dashed line) where it may remain during the rest of the process of FIG. 2 . Alternatively, different operations of the process can be done in different chambers, not necessarily in one chamber.
  • the Cobalt oxide layer 106 is removed by an oxide reduction process that employs an ammonia plasma (block 205 of FIG. 2 ).
  • Some Nitrogen from the ammonia plasma accumulates below the top surface 104 a and forms a Nitrogen-containing zone 108 in the Cobalt interconnect 104 . This may be referred to as nitridation.
  • the presence of the Nitrogen in the Cobalt interconnect 104 increases the electrical resistance of the Cobalt interconnect.
  • the Nitrogen-containing zone 108 is resistant or immune to silicidation, and is left in place temporarily to prevent silicidation during subsequent deposition of a Silicon-containing dielectric barrier layer, as will now be described.
  • a dielectric barrier layer 110 is deposited (block 210 of FIG. 2 ). This deposition may be performed using a plasma enhanced chemical vapor deposition (PECVD) process or using a physical vapor deposition (PVD) process, for example.
  • PECVD plasma enhanced chemical vapor deposition
  • PVD physical vapor deposition
  • the dielectric barrier layer 110 is thin (about 20 Angstroms).
  • the dielectric barrier layer 110 may be a Silicon-containing material including other materials such as Carbon, Oxygen and/or Nitrogen and/or may be characterized by a low dielectric constant.
  • the Nitrogen in the Cobalt interconnect 104 is removed by Hydrogen plasma, radicals or Hydrogen thermal anneal that employs Hydrogen in the chamber (block 215 of FIG. 2 ).
  • the dielectric barrier layer 110 is sufficiently thin (e.g., 20 Angstroms, or less than 50 Angstroms) for the Nitrogen to be removed through the dielectric barrier layer 110 from the Cobalt interconnect 104 by Hydrogen plasma, radicals or Hydrogen thermal anneal.
  • Such removal of the Nitrogen undoes nitridation that would otherwise increase resistance of the Cobalt interconnect 104 .
  • this treatment by Hydrogen returns the resistance of the Cobalt interconnects to the original (lesser) value that it had prior to the exposure of the Cobalt interconnects to the ammonia plasma.
  • the thickness of the dielectric barrier layer 110 may be increased to a desired thickness (e.g., 100 Angstroms) by deposition of additional dielectric barrier layer material 112 (block 220 of FIG. 2 ).
  • This deposition may be performed using a plasma enhanced chemical vapor deposition (PECVD) process or using a physical vapor deposition (PVD) process, for example.
  • PECVD plasma enhanced chemical vapor deposition
  • PVD physical vapor deposition
  • a dielectric layer 190 is one of plural layers of a multilayer semiconductor structure formed on a workpiece 192 such as a semiconductor wafer.
  • the dielectric layer 190 may include a bottom dielectric layer 300 of low dielectric constant.
  • a Cobalt interconnect 304 extends from the bottom dielectric layer 300 through the dielectric layer 190 to top surface 190 a of the dielectric layer 190 .
  • the structure includes a large number of Cobalt interconnects, only one of which is illustrated in the drawings.
  • the Cobalt interconnect 304 is one of plural interconnects extending through the dielectric layer 190 .
  • the workpiece 192 is treated by chemical mechanical polishing, which leaves top surface 304 a of the Cobalt interconnect 304 exposed.
  • the top surface 304 a oxidizes upon exposure to form a Cobalt oxide layer 306 .
  • the workpiece 192 is placed in a plasma reactor chamber 307 (indicated in dashed line) and may remain there during the rest of the process of FIG. 4 . Alternatively, different operations of the process may be performed in different chambers.
  • the Cobalt oxide layer 306 is removed by generating an ammonia plasma in the reactor chamber (block 405 of FIG. 4 ).
  • the Cobalt oxide removal may be performed in an active pre-clean process that employs active species such as (but not limited to) Hydrogen radicals. If the Cobalt oxide is removed using an ammonia plasma, then Nitrogen from the ammonia plasma accumulates below the top surface 304 a to form a nitrogen-containing zone 308 in the Cobalt interconnect 304 . The presence of the Nitrogen in the Cobalt interconnect 304 increases the electrical resistance of the Cobalt interconnect.
  • an etch stop layer 310 is deposited (block 410 of FIG. 4 ).
  • the etch stop layer 310 is thin (about 20 Angstroms).
  • the etch stop layer 310 may be a Nitrogen-containing material such as Aluminum nitride (AlN), and therefore its deposition contributes to nitridation of the Cobalt interconnect 304 .
  • AlN Aluminum nitride
  • Deposition of the AlN etch stop layer 310 may be performed in a CVD process or in a PECVD process or in a physical vapor deposition (PVD) process, for example.
  • Nitrogen in the Cobalt interconnect (e.g., in the Nitrogen-containing zone 308 ) is removed by Hydrogen plasma, radicals or Hydrogen thermal anneal in the chamber (block 415 of FIG. 4 ) using a Hydrogen gas (H2).
  • the etch stop layer 310 is sufficiently thin (e.g., 20 Angstroms, or less than 50 Angstroms) for the Nitrogen to be removed from the Cobalt interconnect 304 by the Hydrogen plasma, radicals or Hydrogen thermal anneal through the etch stop layer 310 . This removal of the Nitrogen undoes nitridation that would otherwise increase electrical resistance of the Cobalt interconnect 304 .
  • the thickness of the etch stop layer 310 may be increased to a desired thickness (e.g., 100 Angstroms) by deposition of additional etch stop material 312 (block 420 of FIG. 4 ) on the thin etch stop layer 310 .
  • the thin etch stop layer 310 protects the Cobalt interconnect from Nitrogen in the additional etch stop material 312 .
  • This deposition may be performed by CVD or PECVD or PVD process, for example.
  • Embodiments described above solve the problem of resistance increase in Cobalt interconnects by nitridation and silicidation.
  • Nitridation occurs during removal of surface oxide from the Cobalt interconnects by an ammonia plasma.
  • Nitridation is removed by a Hydrogen treatment through a dielectric layer, and silicidation is prevented.
  • the nitridation of the Cobalt interconnects is exploited by temporarily leaving the nitride in place while depositing a Silicon-containing layer. The nitride blocks silicidation of the Cobalt interconnects during deposition of the Silicon-containing layer.
  • the Nitrogen is removed through the initial Silicon-containing layer, which is sufficiently thin to enable Hydrogen to draw out the Nitrogen in the Cobalt interconnects through the initial Silicon-containing layer. Thereafter, the thickness of the Silicon-containing layer may be increased by further deposition of the Silicon-containing material without silicidation of the Cobalt interconnects, because the initial thin layer of Silicon-containing material protects the Cobalt interconnects.
  • the plasma reactor chamber 107 may be an integrated tool capable of performing each one of the processes or operations referred to above without removing the workpiece from the integrated tool 107 . In one embodiment, an integrated tool performs the foregoing operations in the same chamber. In another embodiment, an integrated tool performs different operations in different chambers. In a further embodiment, different operations are performed in different tools.
  • Embodiments described above solve the problem of resistance increase in Cobalt interconnects by nitridation from a Nitrogen-containing etch stop layer (e.g., AlN).
  • nitridation occurs by the exposure of Cobalt to a Nitrogen-containing film.
  • Nitridation is removed by a Hydrogen treatment through an initial AlN layer.
  • the initial AlN layer is sufficiently thin to enable the Hydrogen to draw out the Nitrogen in the Cobalt interconnects through the initial AlN layer.
  • the thickness of the AlN layer may be increased by further deposition of AlN material without nitridation of the Cobalt interconnects, because the initial thin AlN layer protects the Cobalt interconnects.
  • the plasma reactor chamber 107 may be an integrated tool capable of performing each one of the processes or operations referred to above without removing the workpiece from the integrated tool 107 .
  • an integrated tool performs the foregoing operations in the same chamber.
  • an integrated tool performs different operations in different chambers.
  • different operations are performed in different tools.

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Abstract

Resistance increase in Cobalt interconnects due to nitridation occurring during removal of surface oxide from Cobalt interconnects and deposition of Nitrogen-containing film on Cobalt interconnects is solved by a Hydrogen thermal anneal or plasma treatment. Removal of the Nitrogen is through a thin overlying layer which may be a dielectric barrier layer or an etch stop layer.

Description

BACKGROUND
Technical Field
The disclosure concerns a method of forming layered structures having conductive Cobalt interconnects for interlayer connectivity in an integrated circuit such as a complementary metal oxide semiconductor (CMOS) structure.
Background Discussion
As critical dimension (CD) is reduced for CMOS devices, line resistance of the conductive interconnects increases. The conductive interconnects are typically Copper. In order to address the problem of increasing line resistance, the conductive interconnects may be formed of Cobalt instead of Copper.
Following chemical mechanical polishing (CMP), exposed surfaces of the Cobalt interconnects tend to form an overlying thin Cobalt oxide layer, which must be removed. One method for removing the thin Cobalt oxide layer is to treat the structure with an ammonia plasma (a plasma formed of NH3). This treatment can enhance time dependent dielectric breakdown (TDDB) behavior of the structure. It is a challenge for one to remove the Cobalt oxide layer without damaging the under layer.
SUMMARY
In accordance with a first aspect, a method of processing a workpiece comprises forming on the workpiece a dielectric layer and an interlayer interconnect extending through the dielectric layer, removing oxide from an exposed surface of the interlayer interconnect by treating the workpiece in a plasma formed of a Nitrogen-containing gas, and depositing on the interlayer interconnect a dielectric barrier layer of a thickness less than a threshold thickness. The method further comprises reducing resistance of the interlayer interconnect by removing Nitrogen from the interlayer interconnect through the dielectric barrier layer and increasing thickness of the dielectric barrier layer above the threshold thickness.
In one embodiment, the Nitrogen-containing gas comprises ammonia. In one embodiment, the interlayer interconnect comprises Cobalt.
In one embodiment, the threshold thickness does not exceed 50 Angstroms, and may be about 20 Angstroms.
In one embodiment, the removing Nitrogen from the interlayer interconnect comprises exposing the workpiece to a Hydrogen plasma, radicals or Hydrogen thermal anneal.
In one embodiment, the dielectric barrier layer comprises Silicon and one or more of the following: Carbon, Oxygen, Nitrogen.
In one embodiment, the threshold thickness is sufficiently small to permit removal of Nitrogen through the dielectric barrier layer by a Hydrogen plasma, radicals or Hydrogen thermal anneal.
In accordance with a second aspect, a method of processing a workpiece comprises forming on the workpiece a dielectric layer and an interlayer interconnect extending through the dielectric layer and removing oxide from an exposed surface of the interlayer interconnect by treating the workpiece in a plasma formed from a Nitrogen-containing gas or Hydrogen plasma, radicals or thermal anneal. The method further comprises depositing on the interlayer interconnect an etch stop layer of a thickness less than a threshold thickness, reducing resistance of the interlayer interconnect by removing Nitrogen from the interlayer interconnect through the etch stop layer, and increasing thickness of the etch stop layer above the threshold thickness.
In one embodiment, the interlayer interconnect comprises Cobalt.
In one embodiment, the threshold thickness is less than 50 Angstroms or may be about 20 Angstroms.
In one embodiment, the removing Nitrogen from the interlayer interconnect comprises exposing the workpiece to a Hydrogen plasma, radicals or Hydrogen thermal anneal.
In one embodiment, the etch stop layer comprises a Nitrogen-containing material such as AlN.
In one embodiment, the Nitrogen-containing gas comprises ammonia.
In one embodiment, the threshold thickness is sufficiently small to permit removal of Nitrogen through the etch stop layer by a Hydrogen plasma, radicals or Hydrogen thermal anneal.
BRIEF DESCRIPTION OF THE DRAWINGS
So that the manner in which the exemplary embodiments of the present invention are attained can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. It is to be appreciated that certain well known processes are not discussed herein in order to not obscure the invention.
FIGS. 1A, 1B, 1C, 1D and 1E depict successive side views of an integrated circuit structure, the successive side views corresponding to a sequence of process operations.
FIG. 2 is a block flow diagram of the sequence of process operations corresponding to the succession of FIG. 1A through FIG. 1E.
FIGS. 3A, 3B, 3C, 3D and 3E depict successive side views of an integrated circuit structure, the successive side views corresponding to a sequence of process operations.
FIG. 4 is a block flow diagram of the sequence of process operations corresponding to the succession of FIG. 3A through FIG. 3E.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
DETAILED DESCRIPTION
As previously mentioned, removing the Cobalt oxide layer without damaging an under layer is challenging. One problem we have discovered with Cobalt interconnects is that exposure to Nitrogen or Nitrogen-containing substances, such as an ammonia plasma, causes the resistance of the Cobalt interconnect to increase. We believe this is due to nitridation of the Cobalt interconnects. This increase can be significant, e.g., about 5% to 25%, depending upon structure size and device density. Therefore, one problem is how to avoid increased resistance due to nitridation.
In some cases, a dielectric barrier layer is deposited on the Cobalt interconnects after Cobalt oxide removal. Such a dielectric barrier layer contains Silicon in combination with other materials such as Carbon, Oxygen and/or Nitrogen. Contact of the Cobalt interconnect with the Silicon-containing barrier layer causes silicidation of the Cobalt interconnect. Such silicidation increases the line resistance of the Cobalt interconnect. Therefore, a second problem is how to provide a Silicon-containing barrier layer on top of the Cobalt interconnect without causing a resistance increase due to silicidation of the Cobalt interconnect by Silicon from the etch stop layer.
In other cases, an etch stop layer is deposited over the Cobalt interconnects after Cobalt oxide removal. The etch stop layer is typically a Nitrogen-containing material such as Aluminum nitride (AlN) and is left in place at least until completion of a subsequent etch operation in the process. Even if a non-ammonia process is used for Cobalt oxide removal (e.g. Hydrogen plasma, radicals or gas anneal), contact of the nitrogen-containing etch stop layer with the Cobalt interconnect leads to nitridation of the Cobalt interconnect, which increases line resistance of the Cobalt interconnects. Therefore, a third problem is how to provide a Nitrogen-containing etch stop layer on top of the Cobalt interconnect without causing a resistance increase due to nitridation of the Cobalt interconnect by Nitrogen from the etch stop layer.
Referring to FIG. 1A and block 200 of FIG. 2, a dielectric layer 90 is one of plural layers of a multilayer semiconductor structure formed on a workpiece 92 such as a semiconductor wafer. The dielectric layer 90 may include a bottom dielectric layer 100 of a material having a low dielectric constant. A Cobalt interconnect 104 extends from the bottom dielectric layer 100 through the dielectric layer 90 to top surface 90 a of the dielectric layer 90. The structure includes a large number of Cobalt interconnects, only one of which is illustrated in the drawings. Thus, the Cobalt interconnect 104 is one of plural interconnects extending through the dielectric layer 90. The workpiece 92 is treated by chemical mechanical polishing, which leaves top surface 104 a of the Cobalt interconnect 104 exposed. The top surface 104 a oxidizes upon exposure to form a Cobalt oxide layer 106. The workpiece 92 is placed in a plasma reactor chamber 107 (indicated in dashed line) where it may remain during the rest of the process of FIG. 2. Alternatively, different operations of the process can be done in different chambers, not necessarily in one chamber.
As depicted in FIG. 1B, the Cobalt oxide layer 106 is removed by an oxide reduction process that employs an ammonia plasma (block 205 of FIG. 2). Some Nitrogen from the ammonia plasma accumulates below the top surface 104 a and forms a Nitrogen-containing zone 108 in the Cobalt interconnect 104. This may be referred to as nitridation. The presence of the Nitrogen in the Cobalt interconnect 104 increases the electrical resistance of the Cobalt interconnect.
The Nitrogen-containing zone 108 is resistant or immune to silicidation, and is left in place temporarily to prevent silicidation during subsequent deposition of a Silicon-containing dielectric barrier layer, as will now be described.
As shown in FIG. 1C, a dielectric barrier layer 110 is deposited (block 210 of FIG. 2). This deposition may be performed using a plasma enhanced chemical vapor deposition (PECVD) process or using a physical vapor deposition (PVD) process, for example. The dielectric barrier layer 110 is thin (about 20 Angstroms). The dielectric barrier layer 110 may be a Silicon-containing material including other materials such as Carbon, Oxygen and/or Nitrogen and/or may be characterized by a low dielectric constant.
As shown in FIG. 1D, the Nitrogen in the Cobalt interconnect 104 is removed by Hydrogen plasma, radicals or Hydrogen thermal anneal that employs Hydrogen in the chamber (block 215 of FIG. 2). The dielectric barrier layer 110 is sufficiently thin (e.g., 20 Angstroms, or less than 50 Angstroms) for the Nitrogen to be removed through the dielectric barrier layer 110 from the Cobalt interconnect 104 by Hydrogen plasma, radicals or Hydrogen thermal anneal. Such removal of the Nitrogen undoes nitridation that would otherwise increase resistance of the Cobalt interconnect 104. We have found that this treatment by Hydrogen returns the resistance of the Cobalt interconnects to the original (lesser) value that it had prior to the exposure of the Cobalt interconnects to the ammonia plasma.
Thereafter, as shown in FIG. 1E, the thickness of the dielectric barrier layer 110 may be increased to a desired thickness (e.g., 100 Angstroms) by deposition of additional dielectric barrier layer material 112 (block 220 of FIG. 2). This deposition may be performed using a plasma enhanced chemical vapor deposition (PECVD) process or using a physical vapor deposition (PVD) process, for example.
A second embodiment will now be described. Referring to FIG. 3A and to block 400 of FIG. 4, a dielectric layer 190 is one of plural layers of a multilayer semiconductor structure formed on a workpiece 192 such as a semiconductor wafer. The dielectric layer 190 may include a bottom dielectric layer 300 of low dielectric constant. A Cobalt interconnect 304 extends from the bottom dielectric layer 300 through the dielectric layer 190 to top surface 190 a of the dielectric layer 190. The structure includes a large number of Cobalt interconnects, only one of which is illustrated in the drawings. Thus, the Cobalt interconnect 304 is one of plural interconnects extending through the dielectric layer 190. The workpiece 192 is treated by chemical mechanical polishing, which leaves top surface 304 a of the Cobalt interconnect 304 exposed. The top surface 304 a oxidizes upon exposure to form a Cobalt oxide layer 306. The workpiece 192 is placed in a plasma reactor chamber 307 (indicated in dashed line) and may remain there during the rest of the process of FIG. 4. Alternatively, different operations of the process may be performed in different chambers.
As depicted in FIG. 3B, the Cobalt oxide layer 306 is removed by generating an ammonia plasma in the reactor chamber (block 405 of FIG. 4). Alternatively, the Cobalt oxide removal may be performed in an active pre-clean process that employs active species such as (but not limited to) Hydrogen radicals. If the Cobalt oxide is removed using an ammonia plasma, then Nitrogen from the ammonia plasma accumulates below the top surface 304 a to form a nitrogen-containing zone 308 in the Cobalt interconnect 304. The presence of the Nitrogen in the Cobalt interconnect 304 increases the electrical resistance of the Cobalt interconnect.
As shown in FIG. 3C, an etch stop layer 310 is deposited (block 410 of FIG. 4). The etch stop layer 310 is thin (about 20 Angstroms). The etch stop layer 310 may be a Nitrogen-containing material such as Aluminum nitride (AlN), and therefore its deposition contributes to nitridation of the Cobalt interconnect 304. This is a significant feature where an active pre-clean process was used to perform the Cobalt oxide removal, because the active pre-clean process does not provide nitridation of the Cobalt interconnect. In such a case, nitridation is provided by the AlN etch stop layer deposition. Deposition of the AlN etch stop layer 310 may be performed in a CVD process or in a PECVD process or in a physical vapor deposition (PVD) process, for example.
As shown in FIG. 3D, Nitrogen in the Cobalt interconnect (e.g., in the Nitrogen-containing zone 308) is removed by Hydrogen plasma, radicals or Hydrogen thermal anneal in the chamber (block 415 of FIG. 4) using a Hydrogen gas (H2). The etch stop layer 310 is sufficiently thin (e.g., 20 Angstroms, or less than 50 Angstroms) for the Nitrogen to be removed from the Cobalt interconnect 304 by the Hydrogen plasma, radicals or Hydrogen thermal anneal through the etch stop layer 310. This removal of the Nitrogen undoes nitridation that would otherwise increase electrical resistance of the Cobalt interconnect 304. We have found that this treatment by Hydrogen returns the resistance of the Cobalt interconnects to the original (lower) value that it had prior to the exposure of the Cobalt interconnects to Cobalt nitridation by ammonia plasma or Nitrogen-containing etch stop.
Thereafter, as shown in FIG. 3E, the thickness of the etch stop layer 310 may be increased to a desired thickness (e.g., 100 Angstroms) by deposition of additional etch stop material 312 (block 420 of FIG. 4) on the thin etch stop layer 310. The thin etch stop layer 310 protects the Cobalt interconnect from Nitrogen in the additional etch stop material 312. This deposition may be performed by CVD or PECVD or PVD process, for example.
Advantages:
Embodiments described above solve the problem of resistance increase in Cobalt interconnects by nitridation and silicidation. Nitridation occurs during removal of surface oxide from the Cobalt interconnects by an ammonia plasma. Nitridation is removed by a Hydrogen treatment through a dielectric layer, and silicidation is prevented. The nitridation of the Cobalt interconnects is exploited by temporarily leaving the nitride in place while depositing a Silicon-containing layer. The nitride blocks silicidation of the Cobalt interconnects during deposition of the Silicon-containing layer. The Nitrogen is removed through the initial Silicon-containing layer, which is sufficiently thin to enable Hydrogen to draw out the Nitrogen in the Cobalt interconnects through the initial Silicon-containing layer. Thereafter, the thickness of the Silicon-containing layer may be increased by further deposition of the Silicon-containing material without silicidation of the Cobalt interconnects, because the initial thin layer of Silicon-containing material protects the Cobalt interconnects. The plasma reactor chamber 107 may be an integrated tool capable of performing each one of the processes or operations referred to above without removing the workpiece from the integrated tool 107. In one embodiment, an integrated tool performs the foregoing operations in the same chamber. In another embodiment, an integrated tool performs different operations in different chambers. In a further embodiment, different operations are performed in different tools.
Embodiments described above solve the problem of resistance increase in Cobalt interconnects by nitridation from a Nitrogen-containing etch stop layer (e.g., AlN). In this case, nitridation occurs by the exposure of Cobalt to a Nitrogen-containing film. Nitridation is removed by a Hydrogen treatment through an initial AlN layer. The initial AlN layer is sufficiently thin to enable the Hydrogen to draw out the Nitrogen in the Cobalt interconnects through the initial AlN layer. Thereafter, the thickness of the AlN layer may be increased by further deposition of AlN material without nitridation of the Cobalt interconnects, because the initial thin AlN layer protects the Cobalt interconnects. The plasma reactor chamber 107 may be an integrated tool capable of performing each one of the processes or operations referred to above without removing the workpiece from the integrated tool 107. In one embodiment, an integrated tool performs the foregoing operations in the same chamber. In another embodiment, an integrated tool performs different operations in different chambers. In a further embodiment, different operations are performed in different tools.
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims (18)

What is claimed is:
1. A method of processing a workpiece, comprising:
forming on the workpiece a dielectric layer and an interlayer conductive interconnect extending through said dielectric layer;
removing oxide from an exposed surface of said interlayer conductive interconnect by treating said workpiece in a plasma formed of a Nitrogen-containing gas, to form a Nitrogen-containing surface zone in said interlayer conductive interconnect and leaving in place said Nitrogen-containing surface zone as a silicidation-preventing layer;
depositing on said interlayer conductive interconnect a Silicon-containing dielectric barrier layer of a thickness less than a threshold thickness;
reducing electrical resistance of said interlayer conductive interconnect by removing Nitrogen from said interlayer conductive interconnect through said dielectric barrier layer; and
increasing thickness of said dielectric barrier layer above said threshold thickness.
2. The method of claim 1 wherein said Nitrogen-containing gas comprises ammonia.
3. The method of claim 1 wherein said interlayer conductive interconnect comprises Cobalt.
4. The method of claim 1 wherein said threshold thickness is about 20 Angstroms.
5. The method of claim 1 wherein said removing Nitrogen from said interlayer conductive interconnect comprises exposing said workpiece to a Hydrogen plasma, radicals or Hydrogen thermal anneal.
6. The method of claim 5 wherein said dielectric barrier layer further comprises one or more of the following: Carbon, Oxygen, Nitrogen.
7. The method of claim 1 wherein said threshold thickness is sufficiently small to permit removal of Nitrogen through said dielectric barrier layer by a Hydrogen plasma, radicals or Hydrogen thermal anneal.
8. A method of processing a workpiece, comprising:
forming on the workpiece a dielectric layer and an interlayer conductive interconnect extending through said dielectric layer;
removing oxide from an exposed surface of said interlayer conductive interconnect;
depositing on said interlayer conductive interconnect an etch stop layer of a thickness less than a threshold thickness;
reducing electrical resistance of said interlayer conductive interconnect by removing Nitrogen from said interlayer conductive interconnect through said etch stop layer; and
increasing thickness of said etch stop layer above said threshold thickness.
9. The method of claim 8 wherein said interlayer conductive interconnect comprises Cobalt.
10. The method of claim 8 wherein said threshold thickness is about 20 Angstroms.
11. The method of claim 8 wherein said threshold thickness is sufficiently small to permit removal of Nitrogen through said etch stop layer by a Hydrogen plasma, radicals or Hydrogen thermal anneal.
12. The method of claim 8 wherein said etch stop layer comprises a Nitrogen-containing material.
13. The method of claim 12 wherein said etch stop layer comprises AlN.
14. The method of claim 8 wherein said removing Nitrogen from said interlayer conductive interconnect comprises treating said interlayer conductive interconnect with one of a Hydrogen plasma, radicals or Hydrogen thermal anneal.
15. A method of processing a workpiece, comprising:
forming on the workpiece a dielectric layer and an interlayer conductive interconnect extending through said dielectric layer;
removing oxide from an exposed surface of said interlayer conductive interconnect;
depositing on said interlayer conductive interconnect a deposition layer of a thickness less than a threshold thickness, said deposition layer comprising one of a dielectric barrier layer or an etch stop layer;
reducing electrical resistance of said interlayer conductive interconnect by removing Nitrogen from said interlayer conductive interconnect through said deposition layer; and
increasing thickness of said deposition layer above said threshold thickness.
16. The method of claim 15 wherein said interlayer conductive interconnect comprises Cobalt.
17. The method of claim 15 wherein said removing Nitrogen from said interlayer conductive interconnect comprises treating said interlayer conductive interconnect with one of a Hydrogen plasma, radicals or Hydrogen thermal anneal.
18. The method of claim 15 wherein said threshold thickness is sufficiently small to permit removal of Nitrogen through said deposition layer by a Hydrogen plasma, radicals or Hydrogen thermal anneal.
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KR1020187026548A KR102327446B1 (en) 2016-03-18 2017-03-16 Recovery of cobalt resistance by hydrogen annealing
PCT/US2017/022758 WO2017161147A1 (en) 2016-03-18 2017-03-16 Cobalt resistance recovery by hydrogen anneal
CN201780017732.3A CN108886017B (en) 2016-03-18 2017-03-16 Recovery of cobalt resistance by hydrogen annealing
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