US8484415B2 - Hybrid storage system for a multi-level raid architecture - Google Patents

Hybrid storage system for a multi-level raid architecture Download PDF

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Publication number
US8484415B2
US8484415B2 US12/838,553 US83855310A US8484415B2 US 8484415 B2 US8484415 B2 US 8484415B2 US 83855310 A US83855310 A US 83855310A US 8484415 B2 US8484415 B2 US 8484415B2
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raid
coupled
hdd
ssd
level
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US20120017036A1 (en
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Byungcheol Cho
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Taejin Infotech Co Ltd
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Taejin Infotech Co Ltd
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Assigned to Taejin Info Tech Co., Ltd reassignment Taejin Info Tech Co., Ltd ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHO, BYUNGCHEOL
Priority to KR1020110070904A priority patent/KR101134069B1/ko
Priority to PCT/KR2011/005278 priority patent/WO2012011709A2/fr
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • G06F3/0688Non-volatile semiconductor memory arrays

Definitions

  • the present invention generally relates to semiconductor storage devices (SSDs). Specifically, the present invention relates to a switch-based hybrid storage system.
  • the present invention relates to semiconductor storage systems (SSDs). Specifically, the present invention relates to a switch-based hybrid storage system.
  • a set of double data rate semiconductor storage device (DDR SSD) RAID controllers is coupled to a system control board, and a set of DDR SSD modules to the set of DDR SSD RAID controllers.
  • the set of DDR SSD modules typically comprises a set of DDR SSD units.
  • a set of HDD/Flash SSD RAID controllers is also coupled to the system control board, and a set of hard disk drive (HDD) modules is coupled to the set of HDD/Flash SSD RAID controllers.
  • the set of HDD modules typically comprises a set of HDD/Flash SDD units.
  • a first aspect of the present invention provides a hybrid storage system for a multi-level RAID architecture, comprising: a system control board; a set of double data rate semiconductor storage device (DDR SSD) RAID controllers coupled to the system control board; a set of DDR SSD modules coupled to the set of DDR SSD RAID controllers, the set of DDR SSD modules comprising a set of DDR SSD units; a set of HDD/Flash SSD RAID controllers coupled to the system control board; and a set of hard disk drive (HDD) modules coupled to the set of HDD/Flash SSD RAID controllers, the set of HDD modules comprising a set of HDD/Flash SDD units.
  • DDR SSD double data rate semiconductor storage device
  • HDD hard disk drive
  • a second aspect of the present invention provides a hybrid storage system for a multi-level RAID architecture, comprising: a first double data rate semiconductor storage device (DDR SSD) RAID controller coupled to a system control board; a first DDR SSD module coupled to the first DDR SSD RAID controller, the first DDR SSD module comprising a first set of DDR SSD units; a second DDR SSD RAID controller coupled to the system control board; a second DDR SSD module coupled to the second DDR RAID controller, the second DDR SSD module comprising a second set of DDR SSD units; a first HDD/Flash SSD RAID controller coupled to the system control board; a first hard disk drive (HDD) module coupled to the first HDD/Flash SSD controllers the first HDD module comprising a first set of HDD/Flash SDD units; a second HDD/Flash SSD RAID controller coupled to the system control board; and a second set of hard disk drive (HDD) modules coupled to the second HDD/Flash SSD controllers, the second HDD module comprising
  • a third aspect of the present invention provides a method for providing a hybrid storage system, comprising: coupling a set of double data rate semiconductor storage device (DDR SSD) RAID controllers to a system control board; coupling a set of DDR SSD modules to the set of DDR SSD RAID controllers, the DDR SSD module comprising a set of DDR SSD units; coupling a set of HDD/Flash SSD RAID controllers to the system control board; and coupling a set of hard disk drive (HDD) modules to the set of HDD/Flash SSD RAID controllers, the HDD module comprising a set of HDD/Flash SDD units.
  • DDR SSD double data rate semiconductor storage device
  • HDD hard disk drive
  • FIG. 1 is a diagram schematically illustrating a configuration of a RAID controlled storage device of a PCI-Express (PCI-e) type according to an embodiment of the present invention.
  • PCI-e PCI-Express
  • FIG. 2 is a more specific diagram of a RAID controller coupled to a set of SSDs.
  • FIG. 3 is a diagram schematically illustrating a configuration of the high-speed SSD of FIG. 1 .
  • FIG. 4 is a diagram schematically illustrating a hybrid storage system for a multi-level RAID architecture according to an embodiment of the present invention.
  • FIG. 5 is a diagram schematically illustrating the RAID controllers shown in FIG. 4 according to an embodiment of the present invention.
  • RAID means redundant array of independent disks (originally redundant array of inexpensive disks).
  • RAID technology is a way of storing the same data in different places (thus, redundantly) on multiple hard disks. By placing data on multiple disks, I/O (input/output) operations can overlap in a balanced way, improving performance. Since multiple disks increase the mean time between failures (MTBF), storing data redundantly also increases fault tolerance.
  • SSD means semiconductor storage device.
  • DDR means double data rate.
  • HDD means hard disk drive.
  • the present invention relates to semiconductor storage systems (SSDs). Specifically, the present invention relates to a switch-based hybrid storage system.
  • a set of double data rate semiconductor storage device (DDR SSD) RAID controllers is coupled to a system control board, and a set of DDR SSD modules to the set of DDR SSD RAID controllers.
  • the set of DDR SSD modules typically comprises a set of DDR SSD units.
  • a set of HDD/Flash SSD RAID controllers is also coupled to the system control board, and a set of hard disk drive (HDD) modules is coupled to the set of HDD/Flash SSD RAID controllers.
  • the set of HDD modules typically comprises a set of HDD/Flash SDD units.
  • the storage device of a serial attached small computer system interface/serial advanced technology attachment (PCI-Express) type supports a low-speed data processing speed for a host by adjusting synchronization of a data signal transmitted/received between the host and a memory disk during data communications between the host and the memory disk through a PCI-Express interface, and simultaneously supports a high-speed data processing speed for the memory disk, thereby supporting the performance of the memory to enable high-speed data processing in an existing interface environment at the maximum.
  • PCI-Express technology will be utilized in a typical embodiment, other alternatives are possible.
  • the present invention could utilize SAS/SATA technology in which a SAS/SATA type storage device is provided that utilizes a SAS/SATA interface.
  • FIG. 1 a diagram schematically illustrating a configuration of a PCI-Express type, RAID controlled storage device (e.g., for providing storage for a serially attached computer device) according to an embodiment of the invention is shown. As depicted, FIG. 1
  • FIG. 1 shows a RAID controlled PCI-Express type storage device according to an embodiment of the invention which includes a memory disk unit 100 comprising: a plurality of memory disks having a plurality of volatile semiconductor memories (also referred to herein as high-speed SSDs 100 ); a RAID controller 800 coupled to SSDs 100 ; an interface unit 200 (e.g., PCI-Express host) which interfaces between the memory disk unit and a host; a controller unit 300 ; an auxiliary power source unit 400 that is charged to maintain a predetermined power using the power transferred from the host through the PCI-Express host interface unit; a power source control unit 500 that supplies the power transferred from the host through the PCI-Express host interface unit to the controller unit, the memory disk unit, the backup storage unit, and the backup control unit which, when the power transferred from the host through the PCI-Express host interface unit is blocked or an error occurs in the power transferred from the host, receives power from the auxiliary power source unit and supplies the power to the memory disk unit through the controller unit
  • the memory disk unit 100 includes a plurality of memory disks provided with a plurality of volatile semiconductor memories for high-speed data input/output (for example, DDR, DDR2, DDR3, SDRAM, and the like), and inputs and outputs data according to the control of the controller 300 .
  • the memory disk unit 100 may have a configuration in which the memory disks are arrayed in parallel.
  • the PCI-Express host interface unit 200 interfaces between a host and the memory disk unit 100 .
  • the host may be a computer system or the like, which is provided with a PCI-Express interface and a power source supply device.
  • the controller unit 300 adjusts synchronization of data signals transmitted/received between the PCI-Express host interface unit 200 and the memory disk unit 100 to control a data transmission/reception speed between the PCI-Express host interface unit 200 and the memory disk unit 100 .
  • FIG. 1 a more detailed diagram of a RAID controlled SSD 810 is shown.
  • a PCI-e type RAID controller 800 can be directly coupled to any quantity of SSDs 100 . Among other things, this allows for optimum control of SSDs 100 . Among other things, the use of a RAID controller 800 :
  • SSD/memory disk unit 100 comprises: a host interface 202 (e.g., PCI-Express host) (which can be interface 200 of FIG. 1 , or a separate interface as shown); a DMA controller 302 interfacing with a backup control module 700 ; an ECC controller; and a memory controller 306 for controlling one or more blocks 604 of memory 602 that are used as high-speed storage.
  • a host interface 202 e.g., PCI-Express host
  • DMA controller 302 interfacing with a backup control module 700
  • ECC controller ECC controller
  • memory controller 306 for controlling one or more blocks 604 of memory 602 that are used as high-speed storage.
  • the controller unit 300 includes: a memory control module 310 which controls data input/output of the memory disk unit 100 ; a DMA (Direct Memory Access) control module 320 which controls the memory control module 310 to store the data in the memory disk unit 100 , or reads data from the memory disk unit 100 to provide the data to the host, according to an instruction from the host received through the PCI-Express host interface unit 200 ; a buffer 330 which buffers data according to the control of the DMA control module 320 ; a synchronization control module 340 which, when receiving a data signal corresponding to the data read from the memory disk unit 100 by the control of the DMA control module 320 through the DMA control module 320 and the memory control module 310 , adjusts synchronization of a data signal so as to have a communication speed corresponding to a PCI
  • the high-speed interface module 350 includes a buffer having a double buffer structure and a buffer having a circular queue structure, and processes the data transmitted/received between the synchronization control module 340 and the DMA control module 320 without loss at high speed by buffering the data transmitted/received between the synchronization control module 340 and the DMA control module 320 using the buffers and adjusting data clocks.
  • the system of the present invention includes (among other things): a system control board 106 ; a set of double data rate semiconductor storage device (DDR SSD) RAID controllers 108 A-N coupled to system control board 106 ; and a set of DDR SSD modules 110 A-N coupled to the set of DDR SSD RAID controllers 108 A-N.
  • DDR SSD double data rate semiconductor storage device
  • each of the set of DDR SSD modules 110 -N comprises a set of DDR SSD units 122 A-N.
  • a set of HDD/Flash SSD RAID controllers 109 A- n are also coupled to system control board 106 , and a set of hard disk drive (HDD) modules 112 A-N is coupled to the set of HDD/Flash SSD RAID controllers.
  • Each of the set of HDD modules 112 A-N typically comprises a set of HDD/Flash SDD units 124 A-N.
  • the set of DDR SSD RAID controllers and the set of HDD/Flash SSD RAID controllers are typically PCI-Express (PCI-E) based RAID controllers.
  • system control board 106 comprises a first chip coupled 132 A (e.g., IOH) to a first processor 130 A (e.g., Intel Xenon Quad-Core 5520 series); and a second chip 132 N (e.g., IOH) coupled to a second processor 130 N (e.g., Intel Xenon Quad-Core 5520 series.
  • DDR SSD memory units 138 A-N can be coupled to one or both processors 130 A-N.
  • chips 132 A-B can have multiple PCI-E Gen.2 ⁇ 16 interconnects. Coupled to chip 132 A is a DDR SSD RAID controller 140 and a HDD/Flash SSD RAID controller 142 .
  • PCI-E switches 144 A- n and PCI-E clots 146 A-N which provide the connectivity/coupling to RAID controllers 108 A-N and 109 A-N.
  • PCi-E switch extension 148 Coupled to chip 132 A and/or 132 N is a PCi-E switch extension 148 , which itself is coupled to PCI-E slots 150 A-N, which are configured to receive cards 152 A-N.
  • RAID controllers 108 A-N will be depicted in greater detail.
  • RAID controller 108 A-N typically comprise: a RAID controller CPU 802 ; a chip 804 coupled to the RAID controller CPU 802 ; and a set of input/output (I/O) connectors (e.g., MOLEX) 806 A-N coupled to the chip 804 .
  • I/O input/output
  • a parity and cache control module 808 can be coupled to CPU 802
  • a battery module 810 can be coupled to parity and cache control module 808 .
  • memory modules 812 A-N can be coupled to CPU 802 as depicted.
  • auxiliary power source unit 400 may be configured as a rechargeable battery or the like, so that it is normally charged to maintain a predetermined power using power transferred from the host through the PCI-Express host interface unit 200 and supplies the charged power to the power source control unit 500 according to the control of the power source control unit 500 .
  • the power source control unit 500 supplies the power transferred from the host through the PCI-Express host interface unit 200 to the controller unit 300 , the memory disk unit 100 , the backup storage unit 600 , and the backup control unit 700 .
  • the power source control unit 500 receives power from the auxiliary power source unit 400 and supplies the power to the memory disk unit 100 through the controller unit 300 .
  • the backup storage unit 600 is configured as a low-speed non-volatile storage device such as a hard disk and stores data of the memory disk unit 100 .
  • the backup control unit 700 backs up data stored in the memory disk unit 100 in the backup storage unit 600 by controlling the data input/output of the backup storage unit 600 and backs up the data stored in the memory disk unit 100 in the backup storage unit 600 according to an instruction from the host, or when an error occurs in the power source of the host due to a deviation of the power transmitted from the host deviates from the threshold value.
  • the present invention supports a low-speed data processing speed for a host by adjusting synchronization of a data signal transmitted/received between the host and a memory disk during data communications between the host and the memory disk through a PCI-Express interface and simultaneously supports a high-speed data processing speed for the memory disk, thereby supporting the performance of the memory to enable high-speed data processing in an existing interface environment at the maximum.

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  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
US12/838,553 2010-07-19 2010-07-19 Hybrid storage system for a multi-level raid architecture Active 2031-07-14 US8484415B2 (en)

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US12/838,553 US8484415B2 (en) 2010-07-19 2010-07-19 Hybrid storage system for a multi-level raid architecture
KR1020110070904A KR101134069B1 (ko) 2010-07-19 2011-07-18 멀티 레벨 raid 구조를 위한 하이브리드 저장 시스템
PCT/KR2011/005278 WO2012011709A2 (fr) 2010-07-19 2011-07-19 Système de stockage hybride pour architecture raid multi-niveaux

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US9626111B1 (en) 2016-01-07 2017-04-18 International Business Machines Corporation Sequential write of random workload in mirrored performance pool environments
US9812224B2 (en) 2014-10-15 2017-11-07 Samsung Electronics Co., Ltd. Data storage system, data storage device and RAID controller
US9933980B2 (en) 2014-02-24 2018-04-03 Toshiba Memory Corporation NAND raid controller for connection between an SSD controller and multiple non-volatile storage units
US20190163566A1 (en) * 2017-11-30 2019-05-30 Western Digital Technologies, Inc. Updating write-in-place storage devices
US10521387B2 (en) 2014-02-07 2019-12-31 Toshiba Memory Corporation NAND switch
US11669470B2 (en) 2020-06-24 2023-06-06 Samsung Electronics Co., Ltd. Storage system with capacity scalability and method of operating the same

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WO2013176305A1 (fr) * 2012-05-23 2013-11-28 Taejin Info Tech Co., Ltd. Architecture de système basée sur une mémoire ddr
US10910025B2 (en) * 2012-12-20 2021-02-02 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Flexible utilization of block storage in a computing system
US20150199152A1 (en) * 2014-01-16 2015-07-16 Avalanche Technology, Inc. Method of managing redundant array of independent disks (raid) groups in a solid state disk array
CN107678690A (zh) * 2017-09-29 2018-02-09 山东超越数控电子有限公司 一种固态硬盘及其冗余独立磁盘阵列的实现方法
CN116627880B (zh) * 2023-05-23 2024-01-30 无锡众星微系统技术有限公司 一种支持RAID加速的PCIe Switch及其RAID加速方法

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US10521387B2 (en) 2014-02-07 2019-12-31 Toshiba Memory Corporation NAND switch
US11113222B2 (en) 2014-02-07 2021-09-07 Kioxia Corporation NAND switch
US11693802B2 (en) 2014-02-07 2023-07-04 Kioxia Corporation NAND switch
US9933980B2 (en) 2014-02-24 2018-04-03 Toshiba Memory Corporation NAND raid controller for connection between an SSD controller and multiple non-volatile storage units
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US10942685B2 (en) 2014-02-24 2021-03-09 Toshiba Memory Corporation NAND raid controller
US11435959B2 (en) 2014-02-24 2022-09-06 Kioxia Corporation NAND raid controller
US9812224B2 (en) 2014-10-15 2017-11-07 Samsung Electronics Co., Ltd. Data storage system, data storage device and RAID controller
US9626111B1 (en) 2016-01-07 2017-04-18 International Business Machines Corporation Sequential write of random workload in mirrored performance pool environments
US20190163566A1 (en) * 2017-11-30 2019-05-30 Western Digital Technologies, Inc. Updating write-in-place storage devices
US10379950B2 (en) * 2017-11-30 2019-08-13 Western Digital Technologies, Inc. Updating write-in-place storage devices
US11669470B2 (en) 2020-06-24 2023-06-06 Samsung Electronics Co., Ltd. Storage system with capacity scalability and method of operating the same

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US20120017036A1 (en) 2012-01-19
KR20120010150A (ko) 2012-02-02
KR101134069B1 (ko) 2012-04-13
WO2012011709A3 (fr) 2012-04-19
WO2012011709A2 (fr) 2012-01-26

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