US8421490B2 - Loading card for measuring voltages - Google Patents

Loading card for measuring voltages Download PDF

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Publication number
US8421490B2
US8421490B2 US12/835,708 US83570810A US8421490B2 US 8421490 B2 US8421490 B2 US 8421490B2 US 83570810 A US83570810 A US 83570810A US 8421490 B2 US8421490 B2 US 8421490B2
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US
United States
Prior art keywords
pin
connection portion
voltage
ground
signal test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related, expires
Application number
US12/835,708
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US20110316573A1 (en
Inventor
Chun-Po Chen
Chia-Ming Yeh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hon Hai Precision Industry Co Ltd
Original Assignee
Hon Hai Precision Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hon Hai Precision Industry Co Ltd filed Critical Hon Hai Precision Industry Co Ltd
Assigned to HON HAI PRECISION INDUSTRY CO., LTD. reassignment HON HAI PRECISION INDUSTRY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, CHUN-PO, YEH, CHIA-MING
Publication of US20110316573A1 publication Critical patent/US20110316573A1/en
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Publication of US8421490B2 publication Critical patent/US8421490B2/en
Expired - Fee Related legal-status Critical Current
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards

Definitions

  • the present disclosure relates to a loading card.
  • VRM voltage regulate module
  • the drawing is a schematic diagram of an exemplary embodiment of a loading card.
  • an exemplary embodiment of a loading card 100 includes a printed circuit board (PCB) 10 , a first connection portion 20 extending from a first end of the PCB 10 , and a second connection portion 30 extending from a second end opposite to the first end of the PCB 10 .
  • the first connection portion 20 is used to engage in a first dual inline memory module (DIMM) slot of a motherboard.
  • DIMM slot is used to receive a first memory.
  • the first connection portion 20 has a plurality of first golden fingers.
  • the second connection portion 30 is used to engage in a second DIMM slot of the motherboard.
  • the second DIMM is used to receive a second memory.
  • the second connection portion 30 has a plurality of second golden fingers.
  • the plurality of first golden fingers include a first voltage pin 21 , a second voltage pin 22 , and a first ground pin 23 .
  • the plurality of second golden fingers includes a third voltage pin 31 , a fourth voltage pin 32 , and a second ground pin 33 .
  • the first DIMM slot includes a first voltage signal pin corresponding to the first voltage pin 21 , a second voltage signal pin corresponding to the second voltage pin 22 , and a first ground signal pin corresponding to the first ground pin 23 .
  • the second DIMM slot includes a third voltage signal pin corresponding to the third voltage pin 31 , a fourth voltage signal pin corresponding to the fourth voltage pin 32 , and a second ground signal pin corresponding to the second ground pin 33 .
  • the PCB 10 includes a first voltage signal test point 11 , a second voltage signal test point 12 , a first ground signal test point 13 corresponding to the first voltage signal test point 11 , and a second ground signal test point 14 corresponding to the second voltage signal test point 12 .
  • the first voltage signal test point 11 , the second voltage signal test point 12 , the first ground signal test point 13 , and the second ground signal test point 14 are soldering points.
  • the first voltage signal test point 11 is electrically connected to the first voltage pin 21 of the first connection portion 20 and the third voltage pin 31 of the second connection portion 30 .
  • the second voltage signal test point 12 is electrically connected to the second voltage pin 22 of the first connection portion 20 and the fourth voltage pin 32 of the second connection portion 30 .
  • the first ground signal test point 13 is electrically connected to the first ground pin 23 of the first connection portion 20 and the second ground pin 33 of the second connection portion 30 .
  • the second ground signal test point 14 is electrically connected to the first ground pin 23 of the first connection portion 20 and the second ground pin 33 of the second connection portion 30 .
  • the first connection portion 20 of the loading card 100 is inserted into the first DIMM slot.
  • the first voltage signal test point 11 is connected to the first voltage signal pin of the first DIMM slot via the first voltage pin 21 of the first connection portion 20 .
  • the second voltage signal test point 12 is connected to the second voltage signal pin of the first DIMM slot via the second voltage pin 22 of the first connection portion 20 .
  • the first ground signal test point 13 is connected to the first ground signal pin of the first DIMM slot via the first ground pin 23 of the first connection portion 20 .
  • the second ground signal test point 14 is connected to the first ground signal pin of the first DIMM slot via the first ground pin 23 of the first connection portion 20 .
  • the first and second voltage signal test points 11 and 12 , and the first and second ground signal test points 13 and 14 are connected to corresponding signal test terminals of a signal tester.
  • the signal tester displays first and second voltages of the loading card 100 .
  • the first and second voltages of the first memory are substantially equal to the first and second voltages of the loading card 100 .
  • the second connection portion 30 of the loading card 100 is inserted into the second DIMM slot.
  • the first voltage signal test point 11 is connected to the third voltage signal pin of the second DIMM slot via the third voltage pin 31 of the second connection portion 30 .
  • the second voltage signal test point 12 is connected to the fourth voltage signal pin of the second DIMM slot via the fourth voltage pin 32 of the second connection portion 30 .
  • the first ground signal test point 13 is connected to the second ground signal pin of the second DIMM slot via the second ground pin 33 of the second connection portion 30 .
  • the second ground signal test point 14 is connected to the second ground signal pin of the second DIMM slot via the second ground pin 33 of the second connection portion 30 .
  • the first and second voltage signal test points 11 and 12 , and the first and second ground signal test points 13 and 14 are connected to corresponding signal test terminals of a signal tester.
  • the signal tester displays third and fourth voltages of the loading card 100 .
  • the third and fourth voltages of the second memory are substantially equal to the third and fourth voltages of the loading card 100 .
  • the first golden fingers of the first connection portion 20 correspond to the golden fingers of a double data rate 2(DDR2) memory
  • the second golden fingers of the second connection portion 30 correspond to the golden fingers of a double data rate 3(DDR3) memory.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Power Sources (AREA)

Abstract

A loading card includes a printed circuit board, first and second connection portions. The first connection portion includes first and second voltage pins, and a first ground pin. The second connection portion includes third and fourth voltage pins, and a second ground pin. The loading card also includes a first voltage signal test point connected to the first and third voltage pins, a second voltage signal test point connected to the second and fourth voltage pins, a first ground signal test point connected to the first and second ground signal test points, and a second ground signal test point connected to the first and second ground signal test points.

Description

BACKGROUND
1. Technical Field
The present disclosure relates to a loading card.
2. Description of Related Art
Presently, voltages of a memory of a motherboard are supplied by a voltage regulate module (VRM). A special tool is needed when measuring voltages obtained by the memory from the VRM. However, the special tool generally has a maximum current limitation or a maximum power limitation. In addition, when the special tool is used, a signal generator is needed to be used with it, which is inconvenient.
BRIEF DESCRIPTION OF THE DRAWING
Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
The drawing is a schematic diagram of an exemplary embodiment of a loading card.
 DETAILED DESCRIPTION
The disclosure, including the accompanying drawings, is illustrated by way of examples and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.
Referring to the drawing, an exemplary embodiment of a loading card 100 includes a printed circuit board (PCB) 10, a first connection portion 20 extending from a first end of the PCB 10, and a second connection portion 30 extending from a second end opposite to the first end of the PCB 10. The first connection portion 20 is used to engage in a first dual inline memory module (DIMM) slot of a motherboard. The first DIMM slot is used to receive a first memory. The first connection portion 20 has a plurality of first golden fingers. The second connection portion 30 is used to engage in a second DIMM slot of the motherboard. The second DIMM is used to receive a second memory. The second connection portion 30 has a plurality of second golden fingers. The plurality of first golden fingers include a first voltage pin 21, a second voltage pin 22, and a first ground pin 23. The plurality of second golden fingers includes a third voltage pin 31, a fourth voltage pin 32, and a second ground pin 33. The first DIMM slot includes a first voltage signal pin corresponding to the first voltage pin 21, a second voltage signal pin corresponding to the second voltage pin 22, and a first ground signal pin corresponding to the first ground pin 23. The second DIMM slot includes a third voltage signal pin corresponding to the third voltage pin 31, a fourth voltage signal pin corresponding to the fourth voltage pin 32, and a second ground signal pin corresponding to the second ground pin 33.
The PCB 10 includes a first voltage signal test point 11, a second voltage signal test point 12, a first ground signal test point 13 corresponding to the first voltage signal test point 11, and a second ground signal test point 14 corresponding to the second voltage signal test point 12. In the embodiment, the first voltage signal test point 11, the second voltage signal test point 12, the first ground signal test point 13, and the second ground signal test point 14 are soldering points. The first voltage signal test point 11 is electrically connected to the first voltage pin 21 of the first connection portion 20 and the third voltage pin 31 of the second connection portion 30. The second voltage signal test point 12 is electrically connected to the second voltage pin 22 of the first connection portion 20 and the fourth voltage pin 32 of the second connection portion 30. The first ground signal test point 13 is electrically connected to the first ground pin 23 of the first connection portion 20 and the second ground pin 33 of the second connection portion 30. The second ground signal test point 14 is electrically connected to the first ground pin 23 of the first connection portion 20 and the second ground pin 33 of the second connection portion 30.
To measure the first and second voltages obtained by the first memory from the first DIMM slot, the first connection portion 20 of the loading card 100 is inserted into the first DIMM slot. The first voltage signal test point 11 is connected to the first voltage signal pin of the first DIMM slot via the first voltage pin 21 of the first connection portion 20. The second voltage signal test point 12 is connected to the second voltage signal pin of the first DIMM slot via the second voltage pin 22 of the first connection portion 20. The first ground signal test point 13 is connected to the first ground signal pin of the first DIMM slot via the first ground pin 23 of the first connection portion 20. The second ground signal test point 14 is connected to the first ground signal pin of the first DIMM slot via the first ground pin 23 of the first connection portion 20. The first and second voltage signal test points 11 and 12, and the first and second ground signal test points 13 and 14 are connected to corresponding signal test terminals of a signal tester. The signal tester displays first and second voltages of the loading card 100. The first and second voltages of the first memory are substantially equal to the first and second voltages of the loading card 100.
To measure the third and fourth voltages obtained by the second memory from the second DIMM slot, the second connection portion 30 of the loading card 100 is inserted into the second DIMM slot. The first voltage signal test point 11 is connected to the third voltage signal pin of the second DIMM slot via the third voltage pin 31 of the second connection portion 30. The second voltage signal test point 12 is connected to the fourth voltage signal pin of the second DIMM slot via the fourth voltage pin 32 of the second connection portion 30. The first ground signal test point 13 is connected to the second ground signal pin of the second DIMM slot via the second ground pin 33 of the second connection portion 30. The second ground signal test point 14 is connected to the second ground signal pin of the second DIMM slot via the second ground pin 33 of the second connection portion 30. The first and second voltage signal test points 11 and 12, and the first and second ground signal test points 13 and 14 are connected to corresponding signal test terminals of a signal tester. The signal tester displays third and fourth voltages of the loading card 100. The third and fourth voltages of the second memory are substantially equal to the third and fourth voltages of the loading card 100.
In one embodiment, the first golden fingers of the first connection portion 20 correspond to the golden fingers of a double data rate 2(DDR2) memory, and the second golden fingers of the second connection portion 30 correspond to the golden fingers of a double data rate 3(DDR3) memory.
It is to be understood, however, that even though numerous characteristics and advantages of the present disclosure have been set forth in the foregoing description, together with details of the structure and function of the disclosure, the disclosure is illustrative only, and changes may be made in details, especially in matters of shape, size, and arrangement of parts within the principles of the disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.

Claims (3)

What is claimed is:
1. A loading card for measuring voltages from a first slot or a second slot, the loading card comprising:
a printed circuit board (PCB);
a first connection portion extending from a first end of the PCB, the first connection portion comprising:
a first voltage pin corresponding to a first voltage signal pin of the first slot;
a second voltage pin corresponding to a second voltage signal pin of the first slot; and
a first ground pin corresponding to a first ground signal pin of the first slot;
a second connection portion extending from a second end of the PCB, the second connection portion comprising:
a third voltage pin corresponding to a third voltage signal pin of the second slot;
a fourth voltage pin corresponding to a fourth voltage signal pin of the second slot; and
second ground pin corresponding to a second ground signal pin of the second slot;
a first voltage signal test point formed on the PCB and electrically connected to the first voltage pin of the first connection portion and the third voltage pin of the second connection portion;
a second voltage signal test point formed on the PCB and electrically connected to the second voltage pin of the first connection portion and the fourth voltage pin of the second connection portion;
a first ground signal test point formed on the PCB and electrically connected to the first ground pin of the first connection portion and the second ground pin of the second connection portion; and
a second ground signal test point formed on the PCB and electrically connected to the first ground pin of the first connection portion and the second ground pin of the second connection portion.
2. The loading card of claim 1, wherein the first to fourth voltage pins are golden fingers, the first and second ground pins are golden fingers.
3. The loading card of claim 1, wherein the first connection portion supports a double data rate 2 memory slot, the second connection portion supports a double data rate 3 memory slot.
US12/835,708 2010-06-23 2010-07-13 Loading card for measuring voltages Expired - Fee Related US8421490B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
TW99120366A 2010-06-23
TW099120366A TW201201638A (en) 2010-06-23 2010-06-23 Load board
TW99120366 2010-06-23

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US20110316573A1 US20110316573A1 (en) 2011-12-29
US8421490B2 true US8421490B2 (en) 2013-04-16

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9576682B2 (en) * 2014-03-20 2017-02-21 International Business Machines Corporation Traffic and temperature based memory testing

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4978912A (en) * 1989-10-23 1990-12-18 Ag Communication Systems Corporation Chip carrier socket test probe
US5283605A (en) * 1991-05-21 1994-02-01 Lang Dahlke Helmut Device for testing contacting and/or wiring of sockets on a circuit board
US5436570A (en) * 1991-05-21 1995-07-25 Tan; Yin L. Burn-in test probe for fine-pitch packages with side contacts
US6357022B1 (en) * 1998-04-08 2002-03-12 Kingston Technology Co. Testing memory modules on a solder-side adaptor board attached to a PC motherboard
US20030101391A1 (en) * 2001-11-27 2003-05-29 Albert Man System for testing multiple devices on a single system and method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4978912A (en) * 1989-10-23 1990-12-18 Ag Communication Systems Corporation Chip carrier socket test probe
US5283605A (en) * 1991-05-21 1994-02-01 Lang Dahlke Helmut Device for testing contacting and/or wiring of sockets on a circuit board
US5436570A (en) * 1991-05-21 1995-07-25 Tan; Yin L. Burn-in test probe for fine-pitch packages with side contacts
US6357022B1 (en) * 1998-04-08 2002-03-12 Kingston Technology Co. Testing memory modules on a solder-side adaptor board attached to a PC motherboard
US20030101391A1 (en) * 2001-11-27 2003-05-29 Albert Man System for testing multiple devices on a single system and method thereof

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US20110316573A1 (en) 2011-12-29
TW201201638A (en) 2012-01-01

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AS Assignment

Owner name: HON HAI PRECISION INDUSTRY CO., LTD., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHEN, CHUN-PO;YEH, CHIA-MING;REEL/FRAME:024679/0361

Effective date: 20100705

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Expired due to failure to pay maintenance fee

Effective date: 20170416