US8357976B2 - Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device - Google Patents

Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device Download PDF

Info

Publication number
US8357976B2
US8357976B2 US12/974,599 US97459910A US8357976B2 US 8357976 B2 US8357976 B2 US 8357976B2 US 97459910 A US97459910 A US 97459910A US 8357976 B2 US8357976 B2 US 8357976B2
Authority
US
United States
Prior art keywords
wide bandgap
diode
doped
electrical device
pnp transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US12/974,599
Other versions
US20110089432A1 (en
Inventor
Joseph A. Yedinak
Richard L. Woodin
Christopher L. Rexer
Praveen Muralheedaran Shenoy
Kwanghoon Oh
Chongman Yun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Components Industries LLC
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Priority to US12/974,599 priority Critical patent/US8357976B2/en
Publication of US20110089432A1 publication Critical patent/US20110089432A1/en
Application granted granted Critical
Publication of US8357976B2 publication Critical patent/US8357976B2/en
Assigned to DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT reassignment DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT PATENT SECURITY AGREEMENT Assignors: FAIRCHILD SEMICONDUCTOR CORPORATION
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC reassignment SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FAIRCHILD SEMICONDUCTOR CORPORATION
Assigned to FAIRCHILD SEMICONDUCTOR CORPORATION reassignment FAIRCHILD SEMICONDUCTOR CORPORATION RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: DEUTSCHE BANK AG NEW YORK BRANCH
Assigned to DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT reassignment DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Assigned to FAIRCHILD SEMICONDUCTOR CORPORATION, SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC reassignment FAIRCHILD SEMICONDUCTOR CORPORATION RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Assignors: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Assigned to FAIRCHILD SEMICONDUCTOR CORPORATION, SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC reassignment FAIRCHILD SEMICONDUCTOR CORPORATION RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Assignors: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Assigned to JPMORGAN CHASE BANK, N.A. reassignment JPMORGAN CHASE BANK, N.A. SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: GTAT CORPORATION, SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8618—Diodes with bulk potential barrier, e.g. Camel diodes, Planar Doped Barrier diodes, Graded bandgap diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/87—Thyristor diodes, e.g. Shockley diodes, break-over diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0312—Inorganic materials including, apart from doping materials or other impurities, only AIVBIV compounds, e.g. SiC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide

Definitions

  • This invention relates to semiconductor devices, and more specifically, to a method and device for protecting wide bandgap diodes from failing during suppression of voltage transients.
  • WBG Wide bandgap
  • SiC Silicon Carbide
  • Avalanche breakdown is a form of electric current multiplication that can allow very large currents to flow within materials which are otherwise good insulators. Avalanche breakdown can occur within solids, liquids, or gases when the voltage applied across the insulating material is great enough to accelerate free electrons to the point that, when they strike atoms in the material, they can knock other electrons free.
  • a common avalanche diode application is protecting electronic circuits against damaging high voltages.
  • the avalanche diode is connected to the circuit so that it is reverse-biased. In other words, its cathode is positive with respect to its anode. In this configuration, the diode is non-conducting and does not interfere with the circuit. If the voltage increases beyond the design limit, the diode undergoes avalanche breakdown, limiting the harmful voltage. When used in this fashion they are often referred to as clamp diodes because they “clamp” the voltage to a predetermined maximum level.
  • Avalanche diodes are normally specified for this role by their clamping voltage V BR and the maximum size of transient they can absorb, specified by either energy (in joules) or I 2 t. Avalanche breakdown is not destructive, as long as the diode is not allowed to overheat.
  • One solution has been to place a Schottky diode in parallel with and oriented in the direction of the body diode to provide a faster path for the flow of transient currents.
  • the Schottky diode has a forward voltage drop of about 0.4 V, whereas the body diode typically has a forward voltage drop of 0.7 V.
  • the Schottky diode thus prevents the body diode from conducting because the Schottky diode generally has a lower forward voltage drop than the body diode.
  • Davis requires at least two wirebond connections and a third connection
  • Fisher requires a transistor.
  • clamp protection that is easy to implement monolithically and provides uniform field distribution for good wide bandgap device termination edge breakdown voltage (“BV”) is desired.
  • BV wide bandgap device termination edge breakdown voltage
  • clamp protection that has offsetting temperature coefficients of forward and reverse junctions to provide minimal BV temperature coefficients is desired.
  • the invention comprises, in one form thereof, a wide bandgap device with improved avalanche capability created by placing a multiple series of diodes across the blocking junction of a wideband gap device.
  • the invention includes a monolithic combination of back to back polysilicon diodes across a part or the entire perimeter of the termination of a wide bandgap diode.
  • the invention in another form, includes a silicon vertical PNP transistor disposed in parallel with a wide bandgap device.
  • the invention includes a method for protecting wide bandgap devices from failing during suppression of voltage transients.
  • the method comprises the steps of paralleling a clamping device with a wide bandgap device so that the reverse transient energy is absorbed by the clamping device.
  • the clamping device maintains a BV during avalanche less than the wide bandgap device.
  • the clamping device has a higher forward voltage drop Vf than the wide bandgap device preventing forward conduction through the clamping device.
  • An advantage of one or more embodiments of the present invention is that the wide bandgap device can be rated for avalanche over the rated operating temperature.
  • a further advantage of one or more embodiments of the present invention is that the clamping device provides a lower avalanching junction that maintains a lower BV than the wide bandgap device during avalanche or UIS.
  • a further advantage of one or more embodiments of the present invention is to reduce the degradation of switching speed by providing a higher forward voltage drop in the clamping device that prevents the injection of minority carriers in the clamping device during forward bias.
  • a further advantage of the present invention is that one or more embodiments thereof uses a simple vertical open base transistor used in Insulated Gate Bipolar Transistors (“IGBTs”).
  • IGBTs Insulated Gate Bipolar Transistors
  • An even further advantage of one or more embodiments of the present invention is that PNP gain is optimized by controlling the peak buffer concentration and charge, to thus minimize the temperature coefficient of collector-to-emitter breakdown (“BVceo”).
  • BVceo temperature coefficient of collector-to-emitter breakdown
  • FIG. 1 is a cutaway side view of back to back polysilicon diode clamping placed across the edge termination of a wide bandgap device;
  • FIG. 2A is a schematic of vertical PNP BVceo clamping for a wide bandgap device
  • FIG. 2B is a schematic diagram of the devices shown in FIG. 2A ;
  • FIG. 3A is a graph of the simulated voltage, current and temperature rise in the clamping device shown in FIG. 2 when the current through the Schottky diode in FIG. 2 flowing into an inductor is removed;
  • FIG. 3B is a graph of the measured voltage and current under the same conditions as the simulation of FIG. 3A ;
  • FIG. 3 is a graph of the current through, and the voltage across, the device shown in FIG. 2 and the Schottky diode by itself when the Schottky diode transitions from forward biased to reverse biased.
  • Multi-die semiconductor packages are well known in the art, and are generally described in U.S. Pat. Nos. 6,404,050; 6,297,55; 6,113,632; and 5,814,884; all issued to Davis et. al., and which are each incorporated herein by reference.
  • the method of the present invention is accomplished by paralleling a clamping device having a lower reverse breakdown voltage BV with a wide bandgap device, such that reverse transient energy is absorbed by the clamping device.
  • the clamping device must maintain a BV during avalanche less than the wide bandgap diode.
  • the clamping device To prevent conduction through the clamping device when the wide bandgap device is forward biased, the clamping device must have a higher voltage drop than the wide bandgap device.
  • FIG. 1 there is shown one embodiment 100 of a wide bandgap device consisting of a SiC Schottky diode 120 and a clamping device 110 according to the present invention.
  • the improvement in wide bandgap avalanche capability is achieved by placing a multiple series or “chain” of polysilicon diodes 110 , consisting of alternating P doped regions 114 and N doped regions 118 , across the blocking junction of the Schottky diode 120 .
  • the polysilicon diodes 110 can be placed back to back or in a series stack, where the voltage drop of the polysilicon diodes 110 is greater than the Schottky diode Vf.
  • One example is a monolithic combination of back to back polysilicon diodes 110 across part or the entirety of the perimeter of the edge termination of the Schottky diode 120 .
  • the Schottky diode 120 further comprises a Schottky metal anode 130 .
  • the polysilicon diodes 110 are connected between anode metal 140 and cathode metal 150 , and are built upon an oxide layer 160 situated above a junction termination extension (JTE) 170 and the silicon carbide n-type substrate 180 .
  • JTE junction termination extension
  • the polysilicon diodes are situated below a dielectric region 190 .
  • the polysilicon diodes are a separately bonded device and are not situated across the termination of the WBG device (not shown).
  • this clamping is implemented monolithically across the WBG device edge termination and can by itself provide uniform field distribution for good edge BV.
  • the advantage to this method is that the temperature coefficient of the clamp voltage is near zero due to the offsetting of reverse and forward junctions.
  • the current level of the unclamped inductive switching (“UIS”) or avalanche protection depends on the area of the polysilicon diodes, and is limited by the diodes' parasitic resistance in avalanche.
  • FIG. 2A an alternative embodiment 200 of the present invention is shown.
  • An open base silicon vertical PNP transistor 205 is placed in parallel with a silicon carbide wide bandgap, high voltage (e.g., rated 600V or above) Schottky diode 210 .
  • a traditional PNP transistor is formed by introducing a thin region of N-type semiconductor material between two regions of P-type material.
  • the PNP transistor 205 has a P doped collector region 215 , an N-doped base layer 220 , an N doped buffer layer 225 , and a P doped emitter layer 230 .
  • Metallization 235 contacts the collector region 215 .
  • the Schottky diode 210 has a Schottky junction metal layer 230 which contacts metallization 236 .
  • the substrate 240 of the Schottky diode is N doped SiC.
  • FIG. 2B is a schematic representation of the structure shown in FIG. 2A .
  • Diode 250 represents the Schottky diode 210
  • diode 255 represents the PN junction between the collector region 215 and the N-layer 220
  • diode 260 represents the PN junction between the buffer layer 225 and the emitter layer 230 .
  • the PNP transistor 205 and Schottky diode 210 can be bond connected with separate wires or leads 270 and 275 internal or external to the package.
  • the devices can be packaged by methods including, but not limited to: (1) externally connecting the PNP transistor 205 and Schottky diode 210 by wire bonds; (2) mounting the PNP transistor 205 and Schottky diode 210 on the same header, and connecting the top metalizations together; or (3) connecting the PNP transistor 205 and Schottky diode 210 by a single wire bond to the lead frame or external circuit.
  • the silicon PNP transistor 205 is operated in the BVceo mode when protecting the Schottky diode 210 .
  • the buffer layer 225 causes the device to have asymmetrical blocking.
  • the PNP transistor 205 remains off and all the current flows through the Schottky diode 210 .
  • the PNP transistor 205 breaks down before the Schottky diode 210 , and all the current flows through the PNP transistor 205 .
  • the reverse junction buffer layer 225 should contain sufficient charge to minimize BVceo snapback.
  • the buffer layer 225 is optimized such that the BVceo is maintained in an acceptable range to meet the required minimum blocking voltage and the maximum clamp voltage over temperature. With increasing temperature during UIS, the positive temperature coefficient of BVceo remains lower than a PN diode because of the positive temperature coefficient of the gain.
  • the thickness of the N-layer 220 should be made such that the electric field does not punch through to the N buffer layer 225 during avalanche.
  • the reverse blocking voltage of the PNP transistor 205 should be designed high enough such that all the forward bias current flows through the wide bandgap Schottky diode 210 . Absent this, injected minority carriers from the forward biased top junction and avalanching back junction in the PNP transistor 205 will have to be removed by depletion spread and by minority carrier recombination. This will reduce the advantage of a low Qrr and trr that can be achieved by the present invention.
  • FIG. 3 illustrates a measured reverse recovery showing minimal impact on trr of the SiC Schottky diode 210 with and without the PNP transistor 205 in parallel.
  • the Schottky diode 210 had an I d of 6 A, a V DD of 400V, a T J of 25° C., and a 500 A/ ⁇ sec trr.
  • the line 420 shows the current through and the line 410 the voltage across the Schottky diode 210 when the Schottky diode 210 is in parallel with the PNP transistor 205 as shown in FIG. 2 (the voltage is shown as line 410 in FIG. 3 , and the current is shown as line 420 ), and when the Schottky diode 210 is not connected to the PNP transistor 205 (the voltage is shown as line 430 , and the current is shown as line 440 ).
  • the reverse recovery characteristics of the Schottky diode 210 are essentially unaffected by the presence of the PNP transistor 205 .
  • the variation shown is attributable to the capacitance of the PNP transistor 205 which was about 15 picofarads for the PNP transistor 205 used to generate the waveforms shown in FIG. 3 .
  • PNP gain can be tailored to minimize the BV ceo temperature coefficient by optimizing the depths of the N and N-layers. Additionally, only a small area die is required, and avalanche capability can be independently scaled by varying the horizontal cross-sectional area of the PNP transistor 205 .

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Electromagnetism (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

An electrical device on a single semiconductor substrate includes: an open base vertical PNP transistor placed in parallel with a wide bandgap, high voltage diode wherein the PNP transistor has a P doped collector region, an N-doped base layer, an N doped buffer layer, and a P doped emitter layer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a continuation of U.S. patent application Ser. No. 12/536,618 filed Aug. 6, 2009, now U.S. Pat. No. 7,859,057 which is a divisional of U.S. patent application Ser. No. 11/828,283 filed Jul. 25, 2007, now U.S. Pat. No. 7,586,156, issued Sep. 8, 2009, which claims priority from U.S. Provisional Patent Application Ser. No. 60/833,362, filed on Jul. 26, 2006, which applications are hereby incorporated by reference.
FIELD OF THE INVENTION
This invention relates to semiconductor devices, and more specifically, to a method and device for protecting wide bandgap diodes from failing during suppression of voltage transients.
BACKGROUND OF THE INVENTION
Wide bandgap (“WBG”) semiconductors are emerging as materials capable of driving continued device performance enhancements for many years to come. These materials are typically defined as exhibiting an electronic bandgap greater than 2 eV. Silicon Carbide (SiC) has been studied for decades, but recent developments have firmly established SiC commercial products in optical, RF, and power components. With extremely high thermal and chemical stability, and electrical performance, WBG devices are used for high frequency, high temperature, and high power applications. Examples of WBG semiconductors are gallium nitride (GaN, EG=3.4 eV), aluminum nitride (AlN, EG=6.2 eV), and silicon carbide (SiC, EG between 2.2 to 3.25 eV depending on polytype).
Wide bandgap devices afford significant performance advantages compared to silicon semiconductor devices. Silicon carbide Schottky diodes are finding widespread use because of their fast switching speed (low trr), low stored charge (Qrr) and low forward conduction loss. However, wide bandgap devices (e.g., silicon carbide) have poor and erratic avalanche capability due to starting substrate quality. Avalanche breakdown is a form of electric current multiplication that can allow very large currents to flow within materials which are otherwise good insulators. Avalanche breakdown can occur within solids, liquids, or gases when the voltage applied across the insulating material is great enough to accelerate free electrons to the point that, when they strike atoms in the material, they can knock other electrons free. This phenomenon can be quite useful in semiconductor diodes such as the avalanche diode and avalanche photodiode, but in other situations, such as in MOSFET transistors, avalanche breakdown can destroy the device. When avalanche breakdown occurs within a solid insulating material it is almost always destructive. However, improvements in wide bandgap avalanche capability is desired,
A common avalanche diode application is protecting electronic circuits against damaging high voltages. The avalanche diode is connected to the circuit so that it is reverse-biased. In other words, its cathode is positive with respect to its anode. In this configuration, the diode is non-conducting and does not interfere with the circuit. If the voltage increases beyond the design limit, the diode undergoes avalanche breakdown, limiting the harmful voltage. When used in this fashion they are often referred to as clamp diodes because they “clamp” the voltage to a predetermined maximum level. Avalanche diodes are normally specified for this role by their clamping voltage VBR and the maximum size of transient they can absorb, specified by either energy (in joules) or I2t. Avalanche breakdown is not destructive, as long as the diode is not allowed to overheat.
Paralleling a simple zener diode with the wide bandgap device can result in the injection of minority carriers in the wide bandgap device, thus degrading the switching performance of the wide bandgap device. As discussed in U.S. Pat. Nos. 6,144,093 issued to Davis et. al. (“Davis”), and U.S. Pat. No. 5,544,038, issued to Fisher et. al. (“Fisher”), when a MOSFET or other MOS gated semiconductor device is used in switching applications in which the gate of the device is repeatedly turned on and off, transient currents can flow through the body diode of the device when the device is turned off, increasing the turnoff time of the device. One solution has been to place a Schottky diode in parallel with and oriented in the direction of the body diode to provide a faster path for the flow of transient currents. Typically, the Schottky diode has a forward voltage drop of about 0.4 V, whereas the body diode typically has a forward voltage drop of 0.7 V. The Schottky diode thus prevents the body diode from conducting because the Schottky diode generally has a lower forward voltage drop than the body diode. However, unlike one embodiment of the present invention, Davis requires at least two wirebond connections and a third connection, and Fisher requires a transistor.
Clamp protection for wideband gap devices that prevents injection of minority carriers in the clamping device which results in degrading the switching speed advantage is desired.
Further, clamp protection that is easy to implement monolithically and provides uniform field distribution for good wide bandgap device termination edge breakdown voltage (“BV”) is desired.
Further, clamp protection that has offsetting temperature coefficients of forward and reverse junctions to provide minimal BV temperature coefficients is desired.
Even further, clamp protection that allows avalanche capability to be independently scaled is desired.
SUMMARY OF THE INVENTION
The invention comprises, in one form thereof, a wide bandgap device with improved avalanche capability created by placing a multiple series of diodes across the blocking junction of a wideband gap device.
More particularly, the invention includes a monolithic combination of back to back polysilicon diodes across a part or the entire perimeter of the termination of a wide bandgap diode.
In another form, the invention includes a silicon vertical PNP transistor disposed in parallel with a wide bandgap device.
In another form, the invention includes a method for protecting wide bandgap devices from failing during suppression of voltage transients. The method comprises the steps of paralleling a clamping device with a wide bandgap device so that the reverse transient energy is absorbed by the clamping device. Wherein, the clamping device maintains a BV during avalanche less than the wide bandgap device. Further the clamping device has a higher forward voltage drop Vf than the wide bandgap device preventing forward conduction through the clamping device.
An advantage of one or more embodiments of the present invention is that the wide bandgap device can be rated for avalanche over the rated operating temperature.
A further advantage of one or more embodiments of the present invention is that the clamping device provides a lower avalanching junction that maintains a lower BV than the wide bandgap device during avalanche or UIS.
A further advantage of one or more embodiments of the present invention is to reduce the degradation of switching speed by providing a higher forward voltage drop in the clamping device that prevents the injection of minority carriers in the clamping device during forward bias.
A further advantage of the present invention is that one or more embodiments thereof uses a simple vertical open base transistor used in Insulated Gate Bipolar Transistors (“IGBTs”).
An even further advantage of one or more embodiments of the present invention is that PNP gain is optimized by controlling the peak buffer concentration and charge, to thus minimize the temperature coefficient of collector-to-emitter breakdown (“BVceo”).
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention is disclosed with reference to the accompanying drawings, wherein:
FIG. 1 is a cutaway side view of back to back polysilicon diode clamping placed across the edge termination of a wide bandgap device; and
FIG. 2A is a schematic of vertical PNP BVceo clamping for a wide bandgap device;
FIG. 2B is a schematic diagram of the devices shown in FIG. 2A;
FIG. 3A is a graph of the simulated voltage, current and temperature rise in the clamping device shown in FIG. 2 when the current through the Schottky diode in FIG. 2 flowing into an inductor is removed;
FIG. 3B is a graph of the measured voltage and current under the same conditions as the simulation of FIG. 3A; and
FIG. 3 is a graph of the current through, and the voltage across, the device shown in FIG. 2 and the Schottky diode by itself when the Schottky diode transitions from forward biased to reverse biased.
Corresponding reference characters indicate corresponding parts throughout the several views. The examples set out herein illustrates several embodiments of the invention but should not be construed as limiting the scope of the invention in any manner.
DETAILED DESCRIPTION
Multi-die semiconductor packages are well known in the art, and are generally described in U.S. Pat. Nos. 6,404,050; 6,297,55; 6,113,632; and 5,814,884; all issued to Davis et. al., and which are each incorporated herein by reference.
The method of the present invention is accomplished by paralleling a clamping device having a lower reverse breakdown voltage BV with a wide bandgap device, such that reverse transient energy is absorbed by the clamping device. The clamping device must maintain a BV during avalanche less than the wide bandgap diode. To prevent conduction through the clamping device when the wide bandgap device is forward biased, the clamping device must have a higher voltage drop than the wide bandgap device.
Referring to FIG. 1, there is shown one embodiment 100 of a wide bandgap device consisting of a SiC Schottky diode 120 and a clamping device 110 according to the present invention. The improvement in wide bandgap avalanche capability is achieved by placing a multiple series or “chain” of polysilicon diodes 110, consisting of alternating P doped regions 114 and N doped regions 118, across the blocking junction of the Schottky diode 120. The polysilicon diodes 110 can be placed back to back or in a series stack, where the voltage drop of the polysilicon diodes 110 is greater than the Schottky diode Vf. One example is a monolithic combination of back to back polysilicon diodes 110 across part or the entirety of the perimeter of the edge termination of the Schottky diode 120. The Schottky diode 120 further comprises a Schottky metal anode 130. The polysilicon diodes 110 are connected between anode metal 140 and cathode metal 150, and are built upon an oxide layer 160 situated above a junction termination extension (JTE) 170 and the silicon carbide n-type substrate 180. The polysilicon diodes are situated below a dielectric region 190. In another embodiment, the polysilicon diodes are a separately bonded device and are not situated across the termination of the WBG device (not shown).
In use, this clamping is implemented monolithically across the WBG device edge termination and can by itself provide uniform field distribution for good edge BV. The advantage to this method is that the temperature coefficient of the clamp voltage is near zero due to the offsetting of reverse and forward junctions. However, the current level of the unclamped inductive switching (“UIS”) or avalanche protection depends on the area of the polysilicon diodes, and is limited by the diodes' parasitic resistance in avalanche.
Turning to FIG. 2A, an alternative embodiment 200 of the present invention is shown. An open base silicon vertical PNP transistor 205 is placed in parallel with a silicon carbide wide bandgap, high voltage (e.g., rated 600V or above) Schottky diode 210. As well known in the art, a traditional PNP transistor is formed by introducing a thin region of N-type semiconductor material between two regions of P-type material. In this embodiment, the PNP transistor 205 has a P doped collector region 215, an N-doped base layer 220, an N doped buffer layer 225, and a P doped emitter layer 230. Metallization 235 contacts the collector region 215. The Schottky diode 210 has a Schottky junction metal layer 230 which contacts metallization 236. The substrate 240 of the Schottky diode is N doped SiC.
FIG. 2B is a schematic representation of the structure shown in FIG. 2A. Diode 250 represents the Schottky diode 210, diode 255 represents the PN junction between the collector region 215 and the N-layer 220, and diode 260 represents the PN junction between the buffer layer 225 and the emitter layer 230.
The PNP transistor 205 and Schottky diode 210 can be bond connected with separate wires or leads 270 and 275 internal or external to the package. For example, the devices can be packaged by methods including, but not limited to: (1) externally connecting the PNP transistor 205 and Schottky diode 210 by wire bonds; (2) mounting the PNP transistor 205 and Schottky diode 210 on the same header, and connecting the top metalizations together; or (3) connecting the PNP transistor 205 and Schottky diode 210 by a single wire bond to the lead frame or external circuit.
In use, the silicon PNP transistor 205 is operated in the BVceo mode when protecting the Schottky diode 210. The buffer layer 225 causes the device to have asymmetrical blocking. When the circuit is forward biased, the PNP transistor 205 remains off and all the current flows through the Schottky diode 210. When reverse biased, the PNP transistor 205 breaks down before the Schottky diode 210, and all the current flows through the PNP transistor 205.
The reverse junction buffer layer 225 should contain sufficient charge to minimize BVceo snapback. The buffer layer 225 is optimized such that the BVceo is maintained in an acceptable range to meet the required minimum blocking voltage and the maximum clamp voltage over temperature. With increasing temperature during UIS, the positive temperature coefficient of BVceo remains lower than a PN diode because of the positive temperature coefficient of the gain.
The thickness of the N-layer 220 should be made such that the electric field does not punch through to the N buffer layer 225 during avalanche.
The reverse blocking voltage of the PNP transistor 205 should be designed high enough such that all the forward bias current flows through the wide bandgap Schottky diode 210. Absent this, injected minority carriers from the forward biased top junction and avalanching back junction in the PNP transistor 205 will have to be removed by depletion spread and by minority carrier recombination. This will reduce the advantage of a low Qrr and trr that can be achieved by the present invention. FIG. 3 illustrates a measured reverse recovery showing minimal impact on trr of the SiC Schottky diode 210 with and without the PNP transistor 205 in parallel. The Schottky diode 210 had an Id of 6 A, a VDD of 400V, a TJ of 25° C., and a 500 A/μsec trr. The line 420 shows the current through and the line 410 the voltage across the Schottky diode 210 when the Schottky diode 210 is in parallel with the PNP transistor 205 as shown in FIG. 2 (the voltage is shown as line 410 in FIG. 3, and the current is shown as line 420), and when the Schottky diode 210 is not connected to the PNP transistor 205 (the voltage is shown as line 430, and the current is shown as line 440). As can be seen the reverse recovery characteristics of the Schottky diode 210 are essentially unaffected by the presence of the PNP transistor 205. The variation shown is attributable to the capacitance of the PNP transistor 205 which was about 15 picofarads for the PNP transistor 205 used to generate the waveforms shown in FIG. 3.
It should be particularly noted that in this embodiment, PNP gain can be tailored to minimize the BVceo temperature coefficient by optimizing the depths of the N and N-layers. Additionally, only a small area die is required, and avalanche capability can be independently scaled by varying the horizontal cross-sectional area of the PNP transistor 205.
While the invention has been described with reference to preferred embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof to adapt to particular situations without departing from the scope of the invention. Therefore, it is intended that the invention not be limited to the particular embodiments disclosed as the best mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope and spirit of the appended claims.

Claims (8)

1. An electrical device on a single semiconductor substrate comprising:
an open base vertical PNP transistor placed in parallel with a wide bandgap, high voltage diode wherein the PNP transistor has a P doped collector region, an N-doped base layer, an N doped buffer layer, and a P doped emitter layer.
2. An electrical device in accordance with claim 1, wherein metallization contacts the collector region.
3. An electrical device in accordance with claim 1, wherein the wide bandgap, high voltage diode is a Schottky diode.
4. An electrical device in accordance with claim 3, wherein the Schottky diode has a Schottky junction metal layer which contacts metallization.
5. An electrical device in accordance with claim 3, wherein the substrate of the Schottky diode is N doped SiC.
6. An electrical device in accordance with claim 1, wherein the open base vertical PNP transistor comprises silicon.
7. An electrical device in accordance with claim 1, wherein the wide bandgap, high voltage diode comprises silicon carbide.
8. An electrical device in accordance with claim 1, wherein the wide bandgap, high voltage diode is a Schottky diode rated for 600V.
US12/974,599 2006-07-26 2010-12-21 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device Active 2027-11-02 US8357976B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/974,599 US8357976B2 (en) 2006-07-26 2010-12-21 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US83336206P 2006-07-26 2006-07-26
US11/828,283 US7586156B2 (en) 2006-07-26 2007-07-25 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device
US12/536,618 US7859057B2 (en) 2006-07-26 2009-08-06 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device
US12/974,599 US8357976B2 (en) 2006-07-26 2010-12-21 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US12/536,618 Continuation US7859057B2 (en) 2006-07-26 2009-08-06 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device

Publications (2)

Publication Number Publication Date
US20110089432A1 US20110089432A1 (en) 2011-04-21
US8357976B2 true US8357976B2 (en) 2013-01-22

Family

ID=38982337

Family Applications (3)

Application Number Title Priority Date Filing Date
US11/828,283 Active US7586156B2 (en) 2006-07-26 2007-07-25 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device
US12/536,618 Active US7859057B2 (en) 2006-07-26 2009-08-06 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device
US12/974,599 Active 2027-11-02 US8357976B2 (en) 2006-07-26 2010-12-21 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device

Family Applications Before (2)

Application Number Title Priority Date Filing Date
US11/828,283 Active US7586156B2 (en) 2006-07-26 2007-07-25 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device
US12/536,618 Active US7859057B2 (en) 2006-07-26 2009-08-06 Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device

Country Status (8)

Country Link
US (3) US7586156B2 (en)
JP (1) JP5513112B2 (en)
KR (1) KR101247067B1 (en)
CN (1) CN101647107B (en)
AT (1) AT506145A2 (en)
DE (1) DE112007001762T5 (en)
TW (1) TWI492375B (en)
WO (1) WO2008014391A2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9620598B2 (en) 2014-08-05 2017-04-11 Semiconductor Components Industries, Llc Electronic device including a channel layer including gallium nitride
US9741711B2 (en) 2014-10-28 2017-08-22 Semiconductor Components Industries, Llc Cascode semiconductor device structure and method therefor
US10062756B2 (en) 2014-10-30 2018-08-28 Semiconductor Components Industries, Llc Semiconductor structure including a doped buffer layer and a channel layer and a process of forming the same

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102010044723A1 (en) * 2010-09-08 2012-03-08 Volkswagen Ag Method for automatically actuating e.g. opening sliding roof of motor car, involves actuating sliding roof in automatic manner dependent upon movement profiles when detected movement corresponds to movement profiles
US8530902B2 (en) 2011-10-26 2013-09-10 General Electric Company System for transient voltage suppressors
DE102012207501B4 (en) 2012-05-07 2017-03-02 Forschungsverbund Berlin E.V. Semiconductor layer structure
US20140264434A1 (en) * 2013-03-15 2014-09-18 Fairchild Semiconductor Corporation Monolithic ignition insulated-gate bipolar transistor
US20140284659A1 (en) * 2013-03-21 2014-09-25 Bourns, Inc. Transient Voltage Suppressor, Design and Process
US9111750B2 (en) * 2013-06-28 2015-08-18 General Electric Company Over-voltage protection of gallium nitride semiconductor devices
US9997507B2 (en) 2013-07-25 2018-06-12 General Electric Company Semiconductor assembly and method of manufacture
EP2908415A1 (en) 2014-02-13 2015-08-19 Nxp B.V. Diode circuit and power factor correction boost converter using the same
US10840798B1 (en) 2018-09-28 2020-11-17 Dialog Semiconductor (Uk) Limited Bidirectional signaling method for high-voltage floating circuits

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904609A (en) 1988-05-06 1990-02-27 General Electric Company Method of making symmetrical blocking high voltage breakdown semiconductor device
US4927772A (en) 1989-05-30 1990-05-22 General Electric Company Method of making high breakdown voltage semiconductor device
US5170231A (en) 1990-05-24 1992-12-08 Sharp Kabushiki Kaisha Silicon carbide field-effect transistor with improved breakdown voltage and low leakage current
US5270223A (en) 1991-06-28 1993-12-14 Texas Instruments Incorporated Multiple layer wide bandgap collector structure for bipolar transistors
US5544038A (en) 1992-09-21 1996-08-06 General Electric Company Synchronous rectifier package for high-efficiency operation
US5814884A (en) 1996-10-24 1998-09-29 International Rectifier Corporation Commonly housed diverse semiconductor die
US5962876A (en) * 1998-04-06 1999-10-05 Winbond Electronics Corporation Low voltage triggering electrostatic discharge protection circuit
US6113632A (en) 1997-09-03 2000-09-05 Republic Medical Products Inc. Suture ring for heart valve prosthesis
US6144093A (en) 1998-04-27 2000-11-07 International Rectifier Corp. Commonly housed diverse semiconductor die with reduced inductance
US6316793B1 (en) * 1998-06-12 2001-11-13 Cree, Inc. Nitride based transistors on semi-insulating silicon carbide substrates
US6353236B1 (en) 1998-09-17 2002-03-05 Hitachi, Ltd. Semiconductor surge absorber, electrical-electronic apparatus, and power module using the same
US20050161743A1 (en) * 2004-01-28 2005-07-28 International Business Machines Corporation Electrostatic discharge input and power clamp circuit for high cutoff frequency technology radio frequency (rf) applications

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US640050A (en) 1899-01-16 1899-12-26 Christian Von Thal Suspension-railway and car or carriage therefor.
US629755A (en) 1899-04-15 1899-07-25 Arthur R Steed Knob attachment.
JP2002535839A (en) 1999-01-15 2002-10-22 インフィネオン テクノロジース アクチエンゲゼルシャフト Edge termination for semiconductor device, Schottky diode having edge termination, and method of manufacturing Schottky diode
DE10004983C1 (en) * 2000-02-04 2001-09-13 Infineon Technologies Ag Protection arrangement for Schottky diode
JP4821086B2 (en) * 2003-10-31 2011-11-24 富士電機株式会社 Semiconductor device

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904609A (en) 1988-05-06 1990-02-27 General Electric Company Method of making symmetrical blocking high voltage breakdown semiconductor device
US4927772A (en) 1989-05-30 1990-05-22 General Electric Company Method of making high breakdown voltage semiconductor device
US5170231A (en) 1990-05-24 1992-12-08 Sharp Kabushiki Kaisha Silicon carbide field-effect transistor with improved breakdown voltage and low leakage current
US5270223A (en) 1991-06-28 1993-12-14 Texas Instruments Incorporated Multiple layer wide bandgap collector structure for bipolar transistors
US5544038A (en) 1992-09-21 1996-08-06 General Electric Company Synchronous rectifier package for high-efficiency operation
US6297552B1 (en) 1996-10-24 2001-10-02 International Rectifier Corp. Commonly housed diverse semiconductor die
US5814884A (en) 1996-10-24 1998-09-29 International Rectifier Corporation Commonly housed diverse semiconductor die
US5814884C1 (en) 1996-10-24 2002-01-29 Int Rectifier Corp Commonly housed diverse semiconductor die
US6404050B2 (en) 1996-10-24 2002-06-11 International Rectifier Corporation Commonly housed diverse semiconductor
US6113632A (en) 1997-09-03 2000-09-05 Republic Medical Products Inc. Suture ring for heart valve prosthesis
US5962876A (en) * 1998-04-06 1999-10-05 Winbond Electronics Corporation Low voltage triggering electrostatic discharge protection circuit
US6144093A (en) 1998-04-27 2000-11-07 International Rectifier Corp. Commonly housed diverse semiconductor die with reduced inductance
US6316793B1 (en) * 1998-06-12 2001-11-13 Cree, Inc. Nitride based transistors on semi-insulating silicon carbide substrates
US6353236B1 (en) 1998-09-17 2002-03-05 Hitachi, Ltd. Semiconductor surge absorber, electrical-electronic apparatus, and power module using the same
US20050161743A1 (en) * 2004-01-28 2005-07-28 International Business Machines Corporation Electrostatic discharge input and power clamp circuit for high cutoff frequency technology radio frequency (rf) applications

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9620598B2 (en) 2014-08-05 2017-04-11 Semiconductor Components Industries, Llc Electronic device including a channel layer including gallium nitride
US9741711B2 (en) 2014-10-28 2017-08-22 Semiconductor Components Industries, Llc Cascode semiconductor device structure and method therefor
US9748224B2 (en) 2014-10-28 2017-08-29 Semiconductor Components Industries, Llc Heterojunction semiconductor device having integrated clamping device
US10199373B2 (en) 2014-10-28 2019-02-05 Semiconductor Components Industries, Llc Method of forming a heterojunction semiconductor device having integrated clamping device
US10217737B2 (en) 2014-10-28 2019-02-26 Semiconductor Components Industries, Llc Cascode semiconductor device structure and method therefor
US10593666B2 (en) 2014-10-28 2020-03-17 Semiconductor Components Industries, Llc Method of forming a heterojunction semiconductor device having integrated clamping device
US10707203B2 (en) 2014-10-28 2020-07-07 Semiconductor Components Industries, Llc Cascode semiconductor device structure and method therefor
US10062756B2 (en) 2014-10-30 2018-08-28 Semiconductor Components Industries, Llc Semiconductor structure including a doped buffer layer and a channel layer and a process of forming the same

Also Published As

Publication number Publication date
CN101647107A (en) 2010-02-10
KR101247067B1 (en) 2013-03-25
US20110089432A1 (en) 2011-04-21
TW200816472A (en) 2008-04-01
TWI492375B (en) 2015-07-11
DE112007001762T5 (en) 2009-05-28
US20080042143A1 (en) 2008-02-21
US20090315040A1 (en) 2009-12-24
AT506145A2 (en) 2009-06-15
JP2009545179A (en) 2009-12-17
JP5513112B2 (en) 2014-06-04
WO2008014391A2 (en) 2008-01-31
KR20090045206A (en) 2009-05-07
WO2008014391A3 (en) 2009-04-02
US7859057B2 (en) 2010-12-28
US7586156B2 (en) 2009-09-08
CN101647107B (en) 2012-06-13

Similar Documents

Publication Publication Date Title
US8357976B2 (en) Wide bandgap device in parallel with a device that has a lower avalanche breakdown voltage and a higher forward voltage drop than the wide bandgap device
KR101534106B1 (en) Semiconductor device
JP4980126B2 (en) Circuit device having freewheeling diode
US10651165B2 (en) Semiconductor device having overload current carrying capability
US7629626B1 (en) Semiconductor device having insulated gate bipolar transistor
US9070571B2 (en) Power switching module with reduced oscillation
US20150187678A1 (en) Power semiconductor device
US20040070029A1 (en) Low voltage transient voltage suppressor and method of making
US10404250B2 (en) Transistor device
Gejo et al. High switching speed trench diode for 1200V RC-IGBT based on the concept of Schottky Controlled injection (SC)
US20100078755A1 (en) Semiconductor structure with an electric field stop layer for improved edge termination capability
JPH03155677A (en) Mosfet of conductivity modulation type
Chen et al. Design and application of high-voltage SiC JFET and its power modules
US10340264B2 (en) Semiconductor device comprising a clamping structure
US10950690B2 (en) Power electronic arrangement
US5455442A (en) COMFET switch and method
Xu et al. 1000-W resistive energy dissipating capability against inductive transients demonstrated in non-avalanche AlGaN/GaN Schottky diode
Matthias et al. The 62Pak IGBT module range employing the 3rd Generation 1700V SPT++ chip set for 175° C operation
Hobart et al. Transient analysis of 3.3 kV double-side double-gate IGBTs
Kwon et al. TCAD simulation of electrical characteristics dependence on metal work function for Schottky Contact-Super Barrier Rectifier (SC-SBR)
US11437471B2 (en) Power semiconductor device
Agarwal et al. SiC BJT’s for high power switching and RF applications
Matthias et al. The 62Pak IGBT modules employing 1700V SPT++ chip set for 175° C operation
Westmoreland et al. Introduction of a hybrid MOSFET-IGBT power switching device utilising a novel Schottky biased minority carrier injector
Canales et al. Cross Switch XS-Silicon and Silicon Carbide Hybrid

Legal Events

Date Code Title Description
STCF Information on status: patent grant

Free format text: PATENTED CASE

CC Certificate of correction
FPAY Fee payment

Year of fee payment: 4

AS Assignment

Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT, NEW YORK

Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:FAIRCHILD SEMICONDUCTOR CORPORATION;REEL/FRAME:040075/0644

Effective date: 20160916

Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AG

Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:FAIRCHILD SEMICONDUCTOR CORPORATION;REEL/FRAME:040075/0644

Effective date: 20160916

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 8

AS Assignment

Owner name: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, ARIZONA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:FAIRCHILD SEMICONDUCTOR CORPORATION;REEL/FRAME:057694/0374

Effective date: 20210722

AS Assignment

Owner name: FAIRCHILD SEMICONDUCTOR CORPORATION, ARIZONA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH;REEL/FRAME:057969/0206

Effective date: 20211027

AS Assignment

Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT, NEW YORK

Free format text: SECURITY INTEREST;ASSIGNOR:SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;REEL/FRAME:058871/0799

Effective date: 20211028

AS Assignment

Owner name: FAIRCHILD SEMICONDUCTOR CORPORATION, ARIZONA

Free format text: RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644;ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:064070/0536

Effective date: 20230622

Owner name: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, ARIZONA

Free format text: RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644;ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:064070/0536

Effective date: 20230622

AS Assignment

Owner name: FAIRCHILD SEMICONDUCTOR CORPORATION, ARIZONA

Free format text: RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799;ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:065653/0001

Effective date: 20230622

Owner name: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, ARIZONA

Free format text: RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799;ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:065653/0001

Effective date: 20230622

AS Assignment

Owner name: JPMORGAN CHASE BANK, N.A., NEW YORK

Free format text: SECURITY INTEREST;ASSIGNORS:SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;GTAT CORPORATION;REEL/FRAME:064271/0971

Effective date: 20230706

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 12TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1553); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 12