US7847834B2 - Light source frequency detection circuit using bipolar transistor - Google Patents

Light source frequency detection circuit using bipolar transistor Download PDF

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US7847834B2
US7847834B2 US11/942,604 US94260407A US7847834B2 US 7847834 B2 US7847834 B2 US 7847834B2 US 94260407 A US94260407 A US 94260407A US 7847834 B2 US7847834 B2 US 7847834B2
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coupled
photo
comparator
summation
logic
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US20090128660A1 (en
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Tiejun Dai
Sohei Manabe
Hongtao Yao
Jingzhou Zhang
Liping Deng
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Omnivision Technologies Inc
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Omnivision Technologies Inc
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Assigned to OMNIVISION TECHNOLOGIES, INC. reassignment OMNIVISION TECHNOLOGIES, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ZHANG, JINGZHOU, DAI, TIEJUN, DENG, LIPING, MANABE, SOHEI, YAO, HONGTAO
Priority to PCT/US2008/082533 priority patent/WO2009067335A1/en
Priority to CN2008801166929A priority patent/CN101868968B/zh
Priority to EP08853122.3A priority patent/EP2215830B1/de
Priority to TW097143944A priority patent/TWI401946B/zh
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/57—Control of the dynamic range
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/7795—Circuitry for generating timing or clock signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H04N23/745—Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/144—Movement detection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/24—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only two potential barriers, e.g. bipolar phototransistors
    • H10F30/245—Bipolar phototransistors

Definitions

  • This disclosure relates generally to electronic circuits, and in particular but not exclusively, relates to a light source frequency detection circuit to compensate for light source flicker.
  • Light source flicker is the repetitious fading, pulsing, or flickering of a light source due to the alternating current (“AC”) frequency of the power driving the light source.
  • AC alternating current
  • Two power source frequencies predominate throughout the developed world—60 Hz (predominant in North America) and 50 Hz (predominant in Europe).
  • Modern imaging devices e.g., still cameras or video cameras
  • pixel arrays e.g., CCD arrays or CMOS arrays
  • the pixel arrays may be calibrated or tuned to compensate for one of the predominant power source frequencies. Such calibration may include synchronized image acquisition, auto-gain compensation, exposure time, or otherwise.
  • imaging devices may be designed for a particular regional market (e.g., Europe, North America) to automatically compensate for a particular power frequency (e.g., 50 Hz or 60 Hz).
  • Some electronic devices may even include complicated and expensive circuitry to analyze the acquired image data to determine the light source power frequency.
  • For devices that dynamically determine the light source power frequency it is desirable to be able to detect the 50 Hz or 60 Hz power frequency in both high luminance and low luminance environments.
  • FIG. 1 is a functional block diagram illustrating an imaging system, in accordance with an embodiment of the invention.
  • FIG. 2 is a functional block diagram illustrating a light source frequency detection circuit, in accordance with an embodiment of the invention.
  • FIG. 3A illustrates a simplified structure of a pnp bipolar junction transistor (“BJT”) including its corresponding circuit symbol for use with embodiments of the invention.
  • BJT bipolar junction transistor
  • FIG. 3B is a block diagram illustrating an example of a pnp BJT formed in a semiconductor substrate for use with embodiments of the invention.
  • FIG. 3C illustrates a simplified structure of an npn BJT including its corresponding circuit symbol for use with embodiments of the invention.
  • FIG. 4 is a flow chart illustrating operation of a modulation circuit of a light source frequency detection circuit, in accordance with an embodiment of the invention.
  • FIG. 5 is a flow chart illustrating operation of a logic unit of a light source frequency detection circuit, in accordance with an embodiment of the invention.
  • FIG. 6A is a graph illustrating sampling blocks of a modulation signal corresponding to a 50 Hz light source, in accordance with an embodiment of the invention.
  • FIG. 6B is a graph illustrating sampling blocks of a modulation signal corresponding to a 60 Hz light source, in accordance with an embodiment of the invention.
  • Embodiments of an apparatus and technique for light source power frequency detection are described herein.
  • numerous specific details are set forth to provide a thorough understanding of the embodiments.
  • One skilled in the relevant art will recognize, however, that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc.
  • well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.
  • FIG. 1 is a functional block diagram illustrating an imaging system 100 , in accordance with an embodiment of the invention.
  • the illustrated embodiment of imaging system 100 includes a light source frequency detection circuit 105 , a photo-sensor 110 , an imaging pixel array 115 , and pixel control logic 120 .
  • Imaging system 100 may be included within any number of electronic devices, such as video cameras, still image cameras, optical scanners, or other light sensing devices.
  • Imaging pixel array 115 may be implemented with a variety of different imaging technologies, such as charged-coupled device (“CCDs”) arrays, complementary metal-oxide-semiconductor (“CMOS”) arrays, or other semiconductor or non-semiconductor imaging arrays.
  • Pixel control logic 120 is coupled to imaging pixel array 115 to control and manage imaging pixel array 115 during operation. For example, pixel control logic 120 may configure operating parameters of imaging pixel array 115 , reset the individual pixels, shift acquired images out of imaging pixel array 115 , or otherwise. Some of the operating parameters controlled by pixel control logic 120 may include setting an exposure time, synchronizing image acquisition, setting image gain, or otherwise.
  • photo-sensor 110 is a standalone sensor distinct from imaging pixel array 115 .
  • photo-sensor 110 may represent one or more pixel elements from within imaging pixel array 115 .
  • photo-sensor 110 is implemented with a photo-sensitive bipolar junction transistor (“BJT”).
  • BJT provides broad range luminance operation due to the current gain characteristic of a BJT. Photo generated current is created when electrons are liberated at a P-N junction of the BJT by an incident photon. The one-to-one relationship between an incident photon and the liberated electrons of the photo generated current is greatly multiplied by the gain factor of a BJT. This gain factor provides BJT's with improved low luminance photo sensitive operation compared to a simple diode P-N junction.
  • photo-sensor 110 and light source frequency detection circuit 105 operate to determine the power frequency of external light 125 .
  • Light 125 may be light from the object person being imaged or ambient light.
  • FREQ SEL frequency select
  • pixel control logic 120 configures operational parameters of imaging pixel array 115 to compensate for the power frequency of light 125 .
  • light 125 will typically be generated by a light source having one of two power frequencies; 50 Hz (predominant in Europe) or 60 Hz (predominant in North America).
  • FIG. 2 is a functional block diagram illustrating a light source frequency detection circuit 200 , in accordance with an embodiment of the invention.
  • Light source frequency detection circuit 200 is one possible embodiment of light source frequency detection circuit 105 illustrated in FIG. 1 .
  • the illustrated embodiment light source frequency detection circuit 200 includes a modulator circuit 205 , a logic unit 210 , a clock source 215 , clock logic 220 , and charging logic 225 .
  • the illustrated embodiment of modulator circuit 205 includes a comparator 230 , a latch 235 , a charging source 240 , and a switch 245 .
  • the illustrated embodiment of logic unit 210 includes sum-50 logic 250 , sum-60 logic 255 , and comparator logic 260 .
  • modulator circuit 205 operates as a sigma delta modulator that converts a variable electrical signal 270 (e.g., variable current flowing into the emitter terminal of photo-sensitive BJT 201 ) output by photo-sensitive BJT 201 into a modulated signal 275 output by comparator 230 .
  • Modulated signal 275 is then synchronized to the clock signal CLK by latch 235 and output on sample output Q as modulated signal 277 .
  • Modulated signal 277 is fed back to a control terminal of switch 245 (e.g., transistor switch) to selectively enable/disable switch 245 .
  • switch 245 e.g., transistor switch
  • Comparator 230 may be implemented with an analog comparator for comparing the voltage at node N 1 with a reference voltage VREF.
  • Latch 235 may be implemented as a flip-flop, such as a D flip-flop having a sample input D, a sample output Q, and a clock input CLK. The operation of modulator circuit 205 is discussed in detail below in connection with FIG. 4 .
  • charging source 240 is a current source. In one embodiment, charging source 240 is a variable charging source capable of charging node N 1 at a variable rate selected by charging logic 225 . Charging logic 225 may be coupled to photo-sensitive BJT 201 or another photo-sensitive element to determine the intensity of light 125 and adjust the charging rate of charging source 240 appropriately. By adjusting the charging rate of charging source 240 , the luminance range of light source frequency detection circuit 200 may be adjusted to compensate for a stronger/weaker electrical signal 270 when light 125 incident on photo-sensitive BJT 201 is more/less intense.
  • clock source 215 can generate an adjustable clock signal CLK under control of clock logic 220 .
  • Clock logic 220 may vary the frequency of the clock signal CLK to increase or decrease the dynamic range of light source frequency detection circuit 200 . For example, by increasing the clock frequency low light performance is improved. However, the low light improvements derived by increasing the clock frequency are limited by charge injection and clock feed through from switch 245 .
  • the clock signal CLK is approximately 3 MHz. Other frequencies may be used.
  • Logic unit 210 is coupled to receive modulated signal 277 and the clock signal CLK. Based upon modulated signal 277 and the clock signal CLK, logic unit 210 is capable of determining the toggle frequency of modulated signal 277 , which is substantially proportional (e.g., 2 times) to the power frequency of incident light 125 .
  • logic unit 210 is implemented in hardware using digital signal processing (“DSP”) techniques.
  • DSP digital signal processing
  • logic unit 210 may be implemented by software executing on a general purpose processor, an application specific integrated circuit (“ASIC”), a combination thereof, or otherwise. The operation of logic unit 210 is described in detail below in connection with FIGS. 5 , 6 A, and 6 B.
  • FIGS. 3A , 3 B, and 3 C illustrate example embodiments of photo-sensitive BJT 201 , in accordance with embodiments of the invention.
  • Photo-sensitive BJT 201 may be implemented as either a pnp-type BJT (illustrated in FIG. 3A ) or an npn-type BJT (illustrated in FIG. 3C ).
  • FIG. 3A illustrates a simplified structure of a pnp-type BJT 305 along with its corresponding circuit symbol 310 .
  • FIG. 3B is a block diagram illustrating an example implementation of a pnp-type BJT 315 formed in a semiconductor substrate 320 (e.g., silicon substrate).
  • FIG. 3C illustrates a simplified structure of an npn-type BJT 325 along with its corresponding circuit symbol 330 .
  • Equation 1 The gain factor ⁇ for a BJT fabricated in a CMOS process is approximately 30.
  • a typical BJT formed in a bipolar or biCMOS process can have a ⁇ of up to several hundred and some special processes can even produce a BJT with a ⁇ of approximately 1000.
  • to produce a BJT with a ⁇ significantly higher than 30 in a CMOS process involves additional mask work, and thus, a higher fabrication cost.
  • photo-sensitive BJT 201 provides significant low noise amplification to enable light source frequency detection circuit 200 to operate in low luminous environments.
  • BJT 315 is formed in substrate layer 320 having p-type dopant profile for the collector, an n-type dopant implant for the base, and a p-type dopant implant for the emitter.
  • BJT 315 may optionally also include a pinning layer 340 formed on the surface of the base region.
  • FIG. 4 is a flow chart illustrating a process 400 for operation of modulator circuit 200 , in accordance with an embodiment of the invention.
  • the order in which some or all of the process blocks appear in process 400 should not be deemed limiting. Rather, one of ordinary skill in the art having the benefit of the present disclosure will understand that some of the process blocks may be executed in a variety of orders not illustrated.
  • light source frequency detection circuit 200 is powered on and photo-sensitive BJT 201 exposed to a light source emitting light 125 .
  • incident light 125 causes photo-sensitive BJT 201 to generate electrical signal 270 .
  • electrical signal 270 has the effect of pulling down node N 1 coupled to the positive input of comparator 230 towards ground (GND). It should be appreciated that the circuit of FIG. 2 may be modified to pull node N 1 up towards the high supply voltage VCC instead.
  • modulated signal 275 is toggled low to ‘0’ (process block 420 ).
  • Modulated signal 275 output by comparator 230 is synchronized to the clock signal CLK by latch 235 .
  • latch 235 latches the ‘0’ value on its sample input D to its sample output Q.
  • Modulated signal 277 (synchronized version of modulated signal 275 ) is fed back to control switch 245 and selectively enable/disable charging of node N 1 .
  • the ‘0’ value of modulated signal 277 causes switch 245 to close circuit, thereby coupling charging source 240 to node N 1 .
  • charging source 240 commences charging node N 1 until voltage (VN 1 ) on node N 1 is pulled above VREF (decision block 440 ). Once VN 1 is greater than VREF, comparator 230 toggles its output high ‘1’ (process block 445 ), which is then latched by latch 235 from its sample input D to its sample output Q (process block 450 ).
  • latch 235 operates to generate a ‘0’ pulse or a ‘1’ pulse according to the voltage VN 1 on node N 1 .
  • the pulses have a pulse width determined by the width of the clock signal CLK.
  • switch 245 is open circuited under control of modulated signal 277 .
  • Process 400 then returns to process block 410 and repeats to generate 277 .
  • the photocurrent generated by photo-sensitive BJT 201 varies in magnitude with the varying intensity of incident light 125 . Accordingly, if incident light 125 is flickering due to a 50 Hz or 60 Hz power source, then the magnitude of electrical signal 270 will also oscillate with a corresponding 50 Hz or 60 Hz frequency (or multiple thereof). Accordingly, modulated signal 277 toggles at a rate proportional (e.g., 2 times) to the power frequency of incident light 125 .
  • FIG. 5 is a flow chart illustrating a process 500 for operation of logic unit 210 for determining the toggling frequency of modulated signal 277 , in accordance with an embodiment of the invention.
  • the order in which some or all of the process blocks appear in process 500 should not be deemed limiting. Rather, one of ordinary skill in the art having the benefit of the present disclosure will understand that some of the process blocks may be executed in a variety of orders not illustrated.
  • Logic unit 210 operates to determine the frequency of modulated signal 277 by generating two summation values and then comparing these summations values to generate the frequency select signal.
  • Modulated signal 277 is coupled into both sum-50 logic 250 and sum-60 logic 255 .
  • b i represents an area under a curve per sampling block i of modulated signal 277 .
  • FIG. 6A a 50 Hz sampling plot 605 of intensity versus time is illustrated. The flickering nature of a light 125 due to its AC power source generates a sine curve 610 in modulated signal 277 .
  • Modulated signal 277 may be sampled at a rate determined by the clock signal CLK (e.g., 3 MHz).
  • each sample block i may include 5000 sample points, depending upon the frequency of the clock signal CLK.
  • the coefficients b 0 , b 1 , b 2 , . . . b N represent the summation or integration of these sample points within the associated sampling block i, which also represents the area under sine curve 610 within the associated sampling block i.
  • the summation sum50 may be accumulated by sum-50 logic 250 for a fixed period of time (e.g., 1 second) or a fixed number clock cycles, and then repeated.
  • b i represents an area under a curve per sampling block i of modulated signal 277 .
  • FIG. 6B a 60 Hz sampling plot 615 of intensity versus time is illustrated.
  • the flickering nature of light 125 due to its AC power source generates a sine curve 620 in modulated signal 277 .
  • modulated signal 277 is sampled at a rate determined by the clock signal CLK (e.g., 3 MHz).
  • CLK e.g. 3 MHz
  • each sample block i may include 5000 sample points, depending upon the frequency of the clock signal CLK.
  • the coefficients b 0 , b 1 , b 2 , . . . b N represent the summation or integration of these sample points within the associated sampling block i, which also represents the area under sine curve 620 within the associated sampling block i.
  • the summation sum60 may be accumulated by sum-60 logic 255 for a fixed period of time (e.g., 1 second) or a fixed number clock cycles, and then repeated. Since sum50 and sum60 are both generated based on modulated signal 277 , process blocks 505 and 510 may be performed sequentially in any order, or in parallel.
  • comparator logic 260 compares the two summation values to determine which is greater (decision block 515 ). If comparator logic 260 determines that sum50 is less than sum60, then the power frequency of light 125 is determined to be 50 Hz and comparator logic 260 outputs the frequency select signal indicating such (process block 520 ). If comparator logic 260 determines that sum50 is greater than sum60, then the power frequency of light 125 is determined to be 60 Hz and comparator logic 260 outputs the frequency select signal indicating such (process block 525 ).
  • the frequency select signal may be provided to pixel control logic 120 to adjust operational parameters of imaging pixel array 115 and improve image acquisition.
  • a machine-accessible medium includes any mechanism that provides (i.e., stores) information in a form accessible by a machine (e.g., a computer, network device, personal digital assistant, manufacturing tool, any device with a set of one or more processors, etc.).
  • a machine-accessible medium includes recordable/non-recordable media (e.g., read only memory (ROM), random access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, etc.)

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)
US11/942,604 2007-11-19 2007-11-19 Light source frequency detection circuit using bipolar transistor Active 2029-01-27 US7847834B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US11/942,604 US7847834B2 (en) 2007-11-19 2007-11-19 Light source frequency detection circuit using bipolar transistor
PCT/US2008/082533 WO2009067335A1 (en) 2007-11-19 2008-11-05 Light source frequency detection circuit using bipolar transistor
CN2008801166929A CN101868968B (zh) 2007-11-19 2008-11-05 使用双极晶体管的光源频率检测电路
EP08853122.3A EP2215830B1 (de) 2007-11-19 2008-11-05 Lichtquellenfrequenz-detektionsschaltung mit einem bipolartransistor
TW097143944A TWI401946B (zh) 2007-11-19 2008-11-13 使用雙極性電晶體之光源頻率偵測電路

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US11/942,604 US7847834B2 (en) 2007-11-19 2007-11-19 Light source frequency detection circuit using bipolar transistor

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US7847834B2 true US7847834B2 (en) 2010-12-07

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EP (1) EP2215830B1 (de)
CN (1) CN101868968B (de)
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NO331527B1 (no) * 2009-12-23 2012-01-23 Cisco Systems Int Sarl Metode for a fjerne flimring i videoopptak
US8330829B2 (en) 2009-12-31 2012-12-11 Microsoft Corporation Photographic flicker detection and compensation
CZ2010805A3 (cs) * 2010-11-08 2012-07-11 Vysoké ucení technické Zpusob regulace doby spuštení uzáverky fotoaparátu a zarízení pro provádení tohoto zpusobu
TWI479888B (zh) * 2011-05-20 2015-04-01 Microtek Int Inc 影像感測裝置與影像感測方法
CN105158684A (zh) * 2015-06-04 2015-12-16 常熟开关制造有限公司(原常熟开关厂） 智能断路器故障显示方法、智能断路器、故障识别终端
CN105785121A (zh) * 2016-03-24 2016-07-20 航天科技控股集团股份有限公司 频率信号采集两种模式复用电路
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EP2215830B1 (de) 2018-06-27
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