US7790625B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor device Download PDFInfo
- Publication number
- US7790625B2 US7790625B2 US12/043,165 US4316508A US7790625B2 US 7790625 B2 US7790625 B2 US 7790625B2 US 4316508 A US4316508 A US 4316508A US 7790625 B2 US7790625 B2 US 7790625B2
- Authority
- US
- United States
- Prior art keywords
- semiconductor wafer
- semiconductor
- manufacturing
- forming
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related, expires
Links
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00841—Cleaning during or after manufacture
- B81C1/00849—Cleaning during or after manufacture during manufacture
Definitions
- the present invention relates to a method for manufacturing a semiconductor device and, in particular, to a technique to remove a residue generated during a heating process.
- SC1 aqueous ammonia solution (NH 4 OH) and hydrogen peroxide solution (H 2 O 2 )
- SC2 hydrochloric acid
- SC1 is effective for removing the particles
- SC2 is effective for removing the metallic impurities.
- a drying process of the semiconductor wafer is performed.
- a spin drying process is the most common technique.
- This technique however has several drawbacks such as generation of dust from a spin drying apparatus, buildup of an electrostatic charge due to high-speed rotation of the apparatus, and generation of a stain called a ‘watermark’ on a surface of the semiconductor wafer.
- the clearance between a movable center weight and a proximal section therefrom is merely an order of several microns. Therefore, a drying process using a temperature-controlled bath may cause an operation problem due to sticking of the center weight and the proximal section.
- Japanese Patent Application Kokai (Laid open) No. H9-069509
- another drying technique which has the steps of, after cleaning the semiconductor wafer by pure water, spraying isopropyl alcohol vapor onto a surface of the semiconductor wafer in order to absorb moisture on the surface of the semiconductor wafer, and then drying the semiconductor wafer at a temperature of 100° C. while blowing nitrogen onto the semiconductor wafer.
- the drying technique of Japanese Patent Application Kokai No. H9-069509 thus remarkably reduces generation of stains because the surface of the semiconductor wafer is dried under the nitrogen atmosphere.
- the drying of the semiconductor wafer by using the isopropyl alcohol vapor may generate a residue of the isopropyl alcohol vapor on the surface of the semiconductor wafer. It has been found that an additional cleaning step after drying the semiconductor wafer under the isopropyl alcohol vapor atmosphere may cause a reaction between the residue of isopropyl alcohol vapor, cleaning solution and a conducting layer formed on the semiconductor wafer. This reaction leads to a problem of dissolution of the conducting layer. Specifically, it has been found that a reaction between the residue of isopropyl alcohol vapor, fuming nitric acid and an aluminum or aluminum alloy (Al—Si—Cu) conducting layer dissolves the conducting layer. Dissolution of the conducting layer may deteriorate characteristics of the semiconductor device and may lead to an operation problem of the semiconductor device.
- Al—Si—Cu aluminum or aluminum alloy
- One object of the present invention is to provide a method for manufacturing a semiconductor device which prevents a cleaning and a drying process of the semiconductor wafer from adversely affecting the product quality of the semiconductor device.
- a method of manufacturing a semiconductor device which includes preparing a semiconductor wafer, forming a semiconductor function element on the semiconductor wafer, drying the semiconductor wafer after forming the semiconductor function element by using an isopropyl alcohol vapor, heating the semiconductor wafer after drying the semiconductor wafer, and performing a cleaning on the semiconductor wafer after heating the semiconductor wafer by using a fuming nitric acid.
- FIG. 1 is a perspective view of a piezoresistance type three-axis acceleration sensor
- FIG. 2A is a plan view showing the piezoresistance type three-axis acceleration sensor
- FIG. 2B is a cross-sectional view of the acceleration sensor along the dashed-dotted line 2 B- 2 B in FIG. 2A ;
- FIG. 3 is a cross-sectional view of the acceleration sensor along the dashed-dotted line 3 - 3 in FIG. 2A ;
- FIG. 4 is a flow diagram showing a manufacturing method of the piezoresistance type three-axis acceleration sensor according to an embodiment of the present invention
- FIGS. 5A to 5D are cross-sectional views of the piezoresistance type three-axis acceleration sensor showing a series of the manufacturing steps
- FIGS. 6A to 6D are cross-sectional views of the piezoresistance type three-axis acceleration sensor showing a series of the manufacturing steps.
- FIG. 7 is a schematic block diagram of a heating chamber for a heating process in a manufacturing method of the semiconductor device according to an embodiment of the present invention.
- a piezoresistance type three-axis acceleration sensor 10 includes a first silicon wafer 20 having a thin square shape.
- the first silicon wafer 20 has four L-shaped openings 11 near its four corners such that the first silicon wafer 20 is provided with a peripheral fixed portion 12 , a central square-shaped weight-fixing portion 13 , and four beam sections 14 .
- the peripheral fixed portion 12 is connected with the central square-shaped weight-fixing portion 13 via the four beam sections 14 .
- Each of the four beam sections 14 has at least one pair of piezoresistance elements 15 a , 15 b , 15 c which have features that their electric resistances vary depending on a mechanical stress applied thereto.
- a main surface of the first silicon wafer 20 having the piezoresistance elements 15 a , 15 b , 15 c is covered with an intermediate layer (not shown in FIGS. 1 , 2 A and 2 B) having an electrical isolation property.
- a metal interconnection not shown in FIGS. 1 , 2 A and 2 B
- a plurality of bonding pads 16 are formed which output signals indicating changes of electric resistances from the piezoresistance elements to an external circuit.
- the metal interconnection and the bonding pads 16 may be formed, for example, by sputtering aluminum and aluminum alloy, respectively.
- the bonding pads 16 are electrically connected to the piezoresistance elements 15 a , 15 b , 15 c via the metal interconnection which passing through a contact hole (not shown) formed in the intermediate layer.
- the acceleration sensor 10 includes a pedestal 18 having a rectangular cylinder shape with a through hole 17 formed therein.
- the pedestal 18 is configured to correspond to the peripheral fixed portion 12 of the first silicon wafer 20 .
- a weight section 19 Positioned in a center of the through hole 17 is a weight section 19 having a cubic shape. The height of the weight section 19 is smaller than that of the pedestal 18 .
- An upper surface of the pedestal 18 is attached to a lower surface of the peripheral fixed portion 12 via a joining layer 40 .
- An upper surface of the weight section 19 is attached to a lower surface of the weight-fixing portion 13 via the joining layer 40 .
- a lower surface of the pedestal 18 is attached on a sensor mounting section 21 which is made of, for example, glass.
- the weight section 19 is supported by the four beam sections 14 such that the weight section 19 is movable in directions of an X, Y and Z axes. Acceleration is detected based on a principle that a force proportional to the acceleration and applied to the weight section 19 displaces the weight section 19 relative to the pedestal 18 and thus bends the beam section 14 in an X, Y and/or Z directions, which changes the resistance values of the piezoresistance elements 15 a , 15 b , 15 c . Accordingly, the acceleration in three-axis directions can be measured by detecting the change of the resistance values via the interconnection and the bonding pads 16 .
- the main surface of the first silicon wafer 20 is covered with the intermediate layer 22 having an electrical isolation property.
- an aluminum layer 23 as an underlying layer is formed by sputtering aluminum.
- an aluminum alloy layer 24 is provided so as to cover the aluminum layer 23 .
- the aluminum alloy layer 24 is formed by sputtering aluminum alloy such as Al—Si—Cu.
- a protection layer 25 made of, for example, silicon nitride film is formed so as to cover a part of the aluminum layer 23 and aluminum alloy layer 24 and to cover whole of the intermediate layer 22 .
- a part of the protection layer 25 is removed by a photolithographic and etching technique so as to expose a part of the aluminum alloy layer 24 .
- the bonding pads 16 are allowed to electrically contact with the external circuit. That is to say, a signal indicating change of the electrical resistance of the piezoresistance elements 15 a , 15 b , 15 c is output to the external circuit via the bonding pads 16 characterized by the aluminum alloy layer 24 and the interconnection characterized by the aluminum layer 23 .
- a method for manufacturing the piezoresistance type three-axis acceleration sensor 10 will be hereinafter described with reference to FIGS. 4 , 5 A- 5 D and 6 A- 6 D.
- an SOI (Silicon on Insulator) wafer of a three-layered structure including a first silicon wafer 20 , a second silicon wafer 30 and a joining layer 40 is prepared (step S 1 ).
- a cross-sectional view of the SOI wafer is shown in FIG. 5A .
- an intermediate layer 22 is formed under a thermal oxidation condition using a humid atmosphere at a temperature around 1000° C. (step S 2 ).
- a cross-sectional view of the SOI wafer after forming the intermediate layer 22 is shown in FIG. 5B .
- An opening 31 is formed in the intermediate layer 22 by a photolithographic and etching technique.
- a P-type diffusion layer 32 that plays a role of the piezoresistance elements 15 a , 15 b , 15 c is formed on the first silicon wafer 20 by a boron diffusion process.
- an intermediate oxidized film 33 is formed by a CVD (Chemical Vapor Deposition) process (step S 3 ).
- a cross-sectional view of the SOI wafer after forming the intermediate oxidized film 33 is shown in FIG. 5C .
- a hole for an electrode is formed in the intermediate oxidized film 33 by a photolithographic and etching technique.
- Aluminum is then deposited on the intermediate layer 22 by a sputtering process.
- Aluminum alloy (Al—Si—Cu) is further deposited to cover the aluminum by a sputtering process.
- the deposited aluminum and aluminum alloy are etched by a photolithographic and etching technique to form the interconnection 34 and the bonding pad (not shown) (step S 4 ).
- a cross-sectional view of the SOI wafer after forming the interconnection 34 and the bonding pad is shown in FIG. 5D .
- a silicon nitride film 35 as a protection layer is formed by a PRD (Plasma Reactive Deposition) process.
- PRD Physical Reactive Deposition
- step S 5 A cross-sectional view of the SOI wafer after forming the silicon nitride film 35 is shown in FIG. 6A .
- a photoresist is applied on the silicon nitride film 35 .
- a through hole 11 is then formed by a photolithographic and etching technique (step S 6 ).
- an oxidized film 36 is formed by a CVD technique.
- a central portion of the oxidized film 36 is removed by the photolithographic and etching technique so as to form an opening 37 (step S 7 ). Consequently, a peripheral portion of the oxidized film 36 is left at peripheral area of the bottom surface of the SOI wafer which corresponds to an area where a pedestal 18 will be formed in the subsequent step. Formation of the opening 37 also allows forming a weight section 19 in the subsequent step such that the height of the weight section 19 is shorter than that of the pedestal 18 .
- a cross-sectional view of the SOI wafer after forming the opening 37 is shown in FIG. 6B .
- a photoresist (not shown) is applied at a central area of the opening 37 so as to correspond to an area where the weight section 19 will be formed.
- the second silicon wafer 30 is etched so as to form a through hole 17 in the second silicon wafer 30 (step S 8 ).
- a Gas Chopping Etching Technique (GCET) or a so-called Bosch process is used.
- GCET Gas Chopping Etching Technique
- Bosch process A cross-sectional view of the SOI wafer after forming the through hole 17 is shown in FIG. 6C .
- step S 9 A cross-sectional view of the SOI wafer after the removal of the part of the joining layer 40 is shown in FIG. 6D .
- the SOI wafer after completion of the step S 9 i.e., the SOI wafer having a function of a semiconductor element, is then dried for about 15 minutes by using the isopropyl alcohol vapor (step S 10 ). Since this drying process uses the isopropyl alcohol vapor having a lower surface tension, sticking between the weight section 19 and the proximal section can be prevented.
- the SOI wafer is heated in a heating chamber (step S 11 ).
- the heating chamber may be controlled at, for example, pressure of 700 mTorr and temperature of 130° C. with continuous supply of oxygen at a rate of 500 SCCM. This condition may be kept for sixty minutes during this heating process. Since the residue of the isopropyl alcohol is removed by this heating process, none of the bonding pad dissolves even though a cleaning is performed in the following step.
- step S 8 After the heating process of step S 8 , a cleaning is performed for five minutes by using fuming nitric acid. After the cleaning, a pure water cleaning is performed. Further, in order to remove the pure water, a drying process using isopropyl alcohol vapor is performed (step S 12 ).
- the SOI wafer is then cut to produce a plurality of chips in a manner similar to the conventional dicing method for manufacturing the semiconductor device.
- Each of the chips is fixed on a sensor mounting section 31 or installed in a housing, and then an electrical connection is installed (step S 13 ).
- the drying process uses the isopropyl alcohol vapor having a lower surface tension. Therefore, sticking between the weight section 19 and the proximal section can be prevented and the cleaning can be carried out without dissolving the bonding pad.
- the embodiment of the method for manufacturing the semiconductor device has been described based on the piezoresistance type three-axis acceleration sensor, the embodiment of the present invention is not limited thereto.
- the embodiment of the present invention can be applied to any semiconductor devices on condition that such devices are manufactured by at least the successive steps of S 10 through S 12 .
- the heating chamber used in the heating process of the step S 11 having features of the present invention will be hereinafter described with reference to FIG. 7 showing schematic configuration of the heating chamber.
- the heating chamber 60 has a sealed space 61 .
- Heating devices 62 are provided on a side panel and a top panel of the heating chamber 60 .
- the side panel of the heating chamber 60 also has an exhaust port 63 at a lower portion.
- a vacuum pump 65 is connected to the exhaust port 63 via an exhaust line 64 .
- a spray nozzle 66 is provided for blowing oxygen.
- the spray nozzle 66 is connected to a flowmeter 67 and an oxygen gas source 68 via a supply line 69 which are installed outside of the heating chamber 60 .
- a wafer cassette 71 made of Teflon (registered trademark) is placed which receives one or a plurality of semiconductor wafers 70 already washed by the isopropyl alcohol vapor. It should be noted that a plurality of wafer cassettes 71 may be placed in the sealed space 61 .
- the sealed space 61 is controlled to have a specified constant temperature such as 130° C. by the heating devices 62 .
- the sealed space 61 is evacuated to establish a low-pressure condition such as 700 mTorr by the vacuum pump 65 .
- oxygen gas 72 is supplied to the sealed space 61 from the oxygen gas source 68 via the spray nozzle 66 .
- a flow rate of the oxygen gas 72 may be, for example, 500 SCCM. It should be noted that the above described apparatuses for controlling the conditions of the heating chamber 60 may be connected to a control unit (not shown) to automatically control the sealed space 61 at prescribed conditions.
- the semiconductor wafer 70 is kept in the sealed space 61 having the above described operating conditions for a prescribed time period such as 60 minutes.
- the semiconductor wafer 70 and the wafer cassette 71 therefor are both taken out from the sealed space 61 and sent to a subsequent process of the step S 12 .
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Pressure Sensors (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-062939 | 2007-03-13 | ||
| JP2007062939 | 2007-03-13 | ||
| JP2007062939A JP2008227121A (en) | 2007-03-13 | 2007-03-13 | Semiconductor device manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| US20080227292A1 US20080227292A1 (en) | 2008-09-18 |
| US7790625B2 true US7790625B2 (en) | 2010-09-07 |
Family
ID=39763145
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US12/043,165 Expired - Fee Related US7790625B2 (en) | 2007-03-13 | 2008-03-06 | Method for manufacturing semiconductor device |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7790625B2 (en) |
| JP (1) | JP2008227121A (en) |
| CN (1) | CN101266918B (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10132928B2 (en) * | 2013-05-09 | 2018-11-20 | Quanergy Systems, Inc. | Solid state optical phased array lidar and method of using same |
| KR101531088B1 (en) * | 2013-05-30 | 2015-07-06 | 삼성전기주식회사 | Inertial Sensor and Method of Manufacturing The Same |
| US10126412B2 (en) | 2013-08-19 | 2018-11-13 | Quanergy Systems, Inc. | Optical phased array lidar system and method of using same |
| US9753351B2 (en) | 2014-06-30 | 2017-09-05 | Quanergy Systems, Inc. | Planar beam forming and steering optical phased array chip and method of using same |
| US9869753B2 (en) | 2014-08-15 | 2018-01-16 | Quanergy Systems, Inc. | Three-dimensional-mapping two-dimensional-scanning lidar based on one-dimensional-steering optical phased arrays and method of using same |
| US10036803B2 (en) | 2014-10-20 | 2018-07-31 | Quanergy Systems, Inc. | Three-dimensional lidar sensor based on two-dimensional scanning of one-dimensional optical emitter and method of using same |
| US10641876B2 (en) | 2017-04-06 | 2020-05-05 | Quanergy Systems, Inc. | Apparatus and method for mitigating LiDAR interference through pulse coding and frequency shifting |
| WO2019208578A1 (en) * | 2018-04-24 | 2019-10-31 | 株式会社デンソー | Method for manufacturing semiconductor device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5313966A (en) * | 1990-07-31 | 1994-05-24 | Mitsubishi Denki Kabushiki Kaisha | Immersion cleaning device |
| JPH098043A (en) | 1996-08-06 | 1997-01-10 | Matsushita Electric Ind Co Ltd | Method for manufacturing semiconductor device |
| JPH0969509A (en) | 1995-09-01 | 1997-03-11 | Matsushita Electron Corp | Semiconductor wafer cleaning / etching / drying apparatus and method of using the same |
| JP2000196106A (en) | 1998-12-24 | 2000-07-14 | Fuji Electric Co Ltd | Method and apparatus for manufacturing semiconductor dynamic quantity sensor |
| US20020142617A1 (en) * | 2001-03-27 | 2002-10-03 | Stanton Leslie G. | Method for evaluating a wafer cleaning operation |
| JP2004283803A (en) | 2003-03-25 | 2004-10-14 | Dainippon Screen Mfg Co Ltd | Substrate treating apparatus |
| JP2006145547A (en) | 2005-12-09 | 2006-06-08 | Oki Electric Ind Co Ltd | Acceleration sensor and its manufacturing method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2005062060A1 (en) * | 2003-12-24 | 2007-12-13 | 日立金属株式会社 | Semiconductor type 3-axis acceleration sensor |
| JP2006078444A (en) * | 2004-09-13 | 2006-03-23 | Hosiden Corp | Acceleration sensor |
-
2007
- 2007-03-13 JP JP2007062939A patent/JP2008227121A/en active Pending
-
2008
- 2008-03-06 CN CN2008100065566A patent/CN101266918B/en not_active Expired - Fee Related
- 2008-03-06 US US12/043,165 patent/US7790625B2/en not_active Expired - Fee Related
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5313966A (en) * | 1990-07-31 | 1994-05-24 | Mitsubishi Denki Kabushiki Kaisha | Immersion cleaning device |
| JPH0969509A (en) | 1995-09-01 | 1997-03-11 | Matsushita Electron Corp | Semiconductor wafer cleaning / etching / drying apparatus and method of using the same |
| US5896875A (en) | 1995-09-01 | 1999-04-27 | Matsushita Electronics Corporation | Equipment for cleaning, etching and drying semiconductor wafer and its using method |
| JPH098043A (en) | 1996-08-06 | 1997-01-10 | Matsushita Electric Ind Co Ltd | Method for manufacturing semiconductor device |
| JP2000196106A (en) | 1998-12-24 | 2000-07-14 | Fuji Electric Co Ltd | Method and apparatus for manufacturing semiconductor dynamic quantity sensor |
| US6281033B1 (en) | 1998-12-24 | 2001-08-28 | Fuji Electric Co., Ltd. | Semiconductor dynamic quantity-sensor and method of manufacturing the same |
| US20020142617A1 (en) * | 2001-03-27 | 2002-10-03 | Stanton Leslie G. | Method for evaluating a wafer cleaning operation |
| JP2004283803A (en) | 2003-03-25 | 2004-10-14 | Dainippon Screen Mfg Co Ltd | Substrate treating apparatus |
| JP2006145547A (en) | 2005-12-09 | 2006-06-08 | Oki Electric Ind Co Ltd | Acceleration sensor and its manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101266918A (en) | 2008-09-17 |
| US20080227292A1 (en) | 2008-09-18 |
| JP2008227121A (en) | 2008-09-25 |
| CN101266918B (en) | 2011-11-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7790625B2 (en) | Method for manufacturing semiconductor device | |
| KR100285696B1 (en) | Cleaning method of patterned metal layer | |
| US6710461B2 (en) | Wafer level packaging of micro electromechanical device | |
| US5770883A (en) | Semiconductor sensor with a built-in amplification circuit | |
| US10199519B2 (en) | Method of making a sensor package with cooling feature | |
| US9780251B2 (en) | Semiconductor structure and manufacturing method thereof | |
| US20200168464A1 (en) | Method for removing a sacrificial layer on semiconductor wafers | |
| KR101186347B1 (en) | Technique for efficiently patterning an underbump metallization layer using a dry etch process | |
| US6660624B2 (en) | Method for reducing fluorine induced defects on a bonding pad surface | |
| JP4180512B2 (en) | Method for manufacturing color image sensor in which contact hole is opened before thinning | |
| US20050115321A1 (en) | Micromechanical sensor | |
| JPH1041222A (en) | Method for manufacturing semiconductor device | |
| JP3603347B2 (en) | Manufacturing method of semiconductor sensor | |
| CN112951863A (en) | Method for manufacturing image sensor | |
| US7649672B2 (en) | MEMS structure and method of fabricating the same | |
| JPH06213747A (en) | Capacitive semiconductor sensor | |
| CN119517844B (en) | Semiconductor device and preparation method thereof | |
| KR20050011353A (en) | Method for forming bonding pad of semiconductor device | |
| CN110867389B (en) | Method for improving crystallographic defects of aluminum pads | |
| KR100545216B1 (en) | Method for Manufacturing Pad of Semiconductor Device | |
| US20170345780A1 (en) | Surface Conditioning And Material Modification In A Semiconductor Device | |
| JP2005061840A (en) | Acceleration sensor and method of manufacturing acceleration sensor | |
| KR101080343B1 (en) | Stack-type semiconductor package and manufacturing method thereof | |
| Warnat | Technologies for the integration of Through Silicon Vias in MEMS packages | |
| JPH1187331A (en) | Manufacture of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AS | Assignment |
Owner name: OKI ELECTRIC INDUSTRY CO., LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MIKI, SHINSUKE;REEL/FRAME:020620/0229 Effective date: 20080111 |
|
| AS | Assignment |
Owner name: OKI SEMICONDUCTOR CO., LTD., JAPAN Free format text: CHANGE OF NAME;ASSIGNOR:OKI ELECTRIC INDUSTRY CO., LTD.;REEL/FRAME:022162/0669 Effective date: 20081001 Owner name: OKI SEMICONDUCTOR CO., LTD.,JAPAN Free format text: CHANGE OF NAME;ASSIGNOR:OKI ELECTRIC INDUSTRY CO., LTD.;REEL/FRAME:022162/0669 Effective date: 20081001 |
|
| AS | Assignment |
Owner name: LAPIS SEMICONDUCTOR CO., LTD., JAPAN Free format text: CHANGE OF NAME;ASSIGNOR:OKI SEMICONDUCTOR CO., LTD;REEL/FRAME:032495/0483 Effective date: 20111003 |
|
| REMI | Maintenance fee reminder mailed | ||
| LAPS | Lapse for failure to pay maintenance fees | ||
| STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
| STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
| FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20140907 |