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US6709512B2 - Method of growing a polycrystalline silicon layer, method of growing a single crystal silicon layer and catalytic CVD apparatus - Google Patents

Method of growing a polycrystalline silicon layer, method of growing a single crystal silicon layer and catalytic CVD apparatus Download PDF

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US6709512B2
US6709512B2 US09941530 US94153001A US6709512B2 US 6709512 B2 US6709512 B2 US 6709512B2 US 09941530 US09941530 US 09941530 US 94153001 A US94153001 A US 94153001A US 6709512 B2 US6709512 B2 US 6709512B2
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growth
silicon
layer
catalyst
chamber
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Hisayoshi Yamoto
Hideo Yamanaka
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Sony Corp
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Sony Corp
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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL-GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL-GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth

Abstract

When a polycrystalline or single crystal silicon layer is grown by catalytic CVD, a catalyst having a nitride covering at least its surface is used. In case that tungsten is used as the catalyst, tungsten nitride is formed as the nitride. The nitride is made by heating the surface of the catalyst to a high temperature around 1600 to 2100° C. in an atmosphere containing nitrogen prior to the growth. When the catalyst is heated to the temperature for its use or its nitrification, it is held in a hydrogen atmosphere.

Description

RELATED APPLICATION DATA

The present application(s) claim(s) priority to Japanese Application(s) No(s). P2000-261396 filed Aug. 30, 2000, which application(s) is/are incorporated herein by reference to the extent permitted by law.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a method of growing a polycrystalline silicon layer, a method of epitaxially growing a single crystal silicon layer, and a catalytic CVD apparatus, which are suitable for manufacturing, for example, a thin-film transistor (TFT).

2. Description of the Related Art

For fabricating a polycrystalline silicon (Si) layer, typically used heretofore was a method using atmospheric pressure chemical vapor deposition (APCVD) to decompose silane (SiH4) or disilane (Si2H6) under a temperature around 600 to 700° C., in hydrogen atmosphere and under the pressure of 1×105 Pa (760 Torr) and thereby grow the layer, a method using low-pressure chemical vapor deposition (LPCVD) to decompose and grow silane (SiH4) or disilane (Si2H6) under a temperature around 600 to 700° C., in hydrogen atmosphere and under the pressure of (0.53˜1.33)×102 Pa (0.4˜1 Torr) and thereby grow the layer, or a method using plasma CVD to decompose silane (SiH4) or disilane (Si2H6) under a temperature around 200 to 400° C., in a hydrogen atmosphere and under the pressure of (0.26˜2.6)×102 Pa (0.2˜2 Torr), thereby grow an amorphous silicon layer and thereafter anneal the amorphous silicon layer under a high temperature around 800 to 1300° C. so as to grow crystal grains.

However, those methods for growing polycrystalline silicon layers by APCVD and LPCVD involve the problem that their growth temperatures are high. In APCVD and LPCVD, since all of the energy required for chemical interaction and growth during growth of polycrystalline silicon layers is supplied in form of heat energy by heating, the growth temperature cannot be largely decreased from about 600° C. Additionally, since interaction efficiency of reactant gas like silane is generally as low as several t or less, almost all of such reactant gas is discharged and discarded, cost of reactant gas becomes high and cost required for the discard is also high. On the other hand, the method for fabricating a polycrystalline silicon layer by crystallizing an amorphous silicon layer involves the problem that it additionally needs an annealing apparatus for high-temperature annealing.

Recently, as a growth method of polycrystalline silicon layers overcoming those problems, a growth method called catalytic CVD are being remarked (for example, Japanese Laid-Open Publication No. sho 63-40314, Japanese Patent Laid-Open Publication No. hei 8-250438, Japanese Patent Laid-Open Publication No. hei 10-83988 and Applied Physics, Vol. 66, No. 10, p. 1094(1997)). This catalytic CVD uses catalytic cracking reaction between a heated catalyst and reactant gas (source material gas). Catalytic CVD, in its first stage, brings reactant gas (such as silane and hydrogen in case of using silane as the source material of silicon) into contact with a hot catalyst heated to 1600 through 1800° C., for example, to activate the reactant gas and thereby make silicon atoms, or clusters of silicon atoms, and hydrogen atoms, or clusters of hydrogen atoms, having high energies, and in its second stage, raises the temperature of these silicon atoms and hydrogen atoms or molecules having high energies, or a substrate that supplies their clusters, to a high temperature, thereby to supply and support the energy required particularly for silicon atoms to form single-crystal grains. Therefore, catalytic CVD enables growth of a polycrystalline silicon layer even at a lower temperature than those of conventional APCVD and LPCVD, such as around 350° C., for example.

However, according to results of various experiments made by the Inventor, in the case where a polycrystalline silicon layer is grown at a low temperature by existing catalytic CVD, metal impurities more easily enter into the growth layer than in growth layers grown by conventional APCVD and LPCVD, and containment of high-concentrated metal impurities in the resultant polycrystalline silicon layer is a problem this technique involves. These contained metal impurities amount to, for example, 2×1017˜2×1018 atoms/cc, of tungsten (W), 7×1015˜2×1017 atoms/cc of iron (Fe), 9×1014˜3×1016 atoms/cc of chromium (Cr), and less than 3×1018 atoms/cc of nickel(Ni). In contrast, concentrations of metal impurities contained in a polycrystalline silicon layer grown by conventional APCVD or LPCVD are less than 1×1015 atoms/cc of W, typically around 5×1016 atoms/cc of Fe, typically less than 3×1014 atoms/cc of Cr, and typically less than 6×1019 atoms/cc of Ni. Thus it is recognized how high the concentration of metal impurities contained in the polycrystalline silicon layer grown at a low temperature by catalytic CVD. Polycrystalline silicon layers containing metal impurities to a high concentration exhibit bad electric properties, such as having a low electron mobility, and when they are used as polycrystalline silicon layers for TFT, for example, it is difficult to operate the TFT at a high speed.

OBJECTS AND SUMMARY OF THE INVENTION

It is therefore an object of the invention to provide a polycrystalline silicon layer growth method that can grow a polycrystalline silicon layer remarkably low in concentration of metal impurities contained therein.

Another object of the invention is to provide a single crystal layer epitaxial growth method that can epitaxially grow a single crystal silicon layer remarkably low in concentration of metal impurities contained therein.

Still another object of the invention is to provide a catalytic CVD apparatus that can grow a polycrystalline silicon layer and a single crystal silicon layer remarkably low in concentration of metal impurities contained therein.

The Inventor made researches toward solution of the above problems involved in conventional techniques. These researches are outlined below.

According to the Inventor's researches, it is considered that W, Fe, Cr and Ni contained in polycrystalline silicon layers grown by conventional catalytic CVD derived exclusively from catalysts. Among them, W is the component element of a catalyst itself whereas Fe, Cr and Ni are considered to have been contained as impurities in the W material. W has a very high melting point as high as 3380° C. and a low vapor pressure, its amount taken into the growth layer is not considered to be so much. Actually, however, since oxidizing substances like O2 and H2O exist in the growth chamber of the catalytic CVD apparatus, W forming the catalyst will be oxidized to tungsten oxide when the catalyst is heated to a high, and tungsten oxide having a high vapor pressure will vaporize and will be taken into the growth layer.

Through various experiments, the Inventor reached the conclusion that, in order to prevent or minimize ingestion of metal impurities into a growth layer, it would be most effective to form a barrier layer on the surface of the catalyst to prevent separation of disengagement of component elements or impurities from the catalyst when it is heated to a high temperature for growth and that a carbide or a carbide would be preferable as the barrier layer from the viewpoint of heat resistance and easiness of its formation. It is sufficient for the barrier layer to exist on the surface of the catalyst at least upon the start of growth. It may be previously formed before placing the catalyst in the catalytic CVD apparatus, or may be formed before the growth is started after the catalyst is placed in the catalytic CVD apparatus.

The present invention has been made as a result of researches based on the Inventor's own knowledge.

According to the first aspect of the invention, there is provided a polycrystalline silicon layer growth method for growing a polycrystalline silicon layer on a substrate by catalytic CVD, characterized in:

the polycrystalline silicon layer being grown by using a catalyst having a nitride that forms at least the surface thereof.

According to the second aspect of the invention, there is provided a single crystal silicon layer epitaxial growth method for epitaxially growing a single crystal silicon layer on a material layer in lattice alignment with the single crystal by catalytic CVD, characterized in:

the polycrystalline silicon layer being epitaxially grown by using a catalyst having a nitride that forms at least the surface thereof.

According to the third aspect of the invention, there is provided a catalytic CVD apparatus using a catalyst, characterized in:

said catalyst having a nitride at least on the surface thereof.

In the first, second and third aspects of the invention, the nitride on the surface of the catalyst may be thick enough to prevent component elements or impurities from separating or disengaging externally at the temperature for using the catalyst. More specifically, a thickness not smaller than 1 nm is sufficient as the thickness of the nitride although it depends on the adhesiveness of the nitride with its base and the film quality of the nitride as well. For more reliable prevention of external separation of component elements or impurities from the catalyst, thickness of the nitride is preferably 5 nm or more, or more preferably not less than 10 nm. The nitride is typically made by nitrifying the surface of the catalyst before conducting the growth. Nitrification is normally conducted by heating the catalyst in an atmosphere of a gas containing nitrogen. In case a catalyst of tungsten, for example, is used, since the tungsten nitride formed on the surface of the catalyst of tungsten at a high temperature may suffer local cracks or exfoliation when the temperature of the catalyst decreases, for the purpose of preventing tungsten from oxidization and vaporization from cracks or portions of exfoliation, tungsten nitride is preferably formed on the surface of the catalyst immediately before the growth of the silicon layer. In case the surface of a catalyst of tungsten, for example, is nitrified, if nitrification is conducted at a temperature between 400° C. and 770° C., there occur disadvantages including an increase of the resistance value caused by nitrification of not only the surface of the catalyst but also the entirety. Therefore, the catalyst of tungsten is preferably heated in a gas atmosphere containing nitrogen to a temperature in the range from 800° C. to 2200° C., more preferably in the range from 800° C. to 2200° C., or more preferably in the range from 1600° C. to 2100° C. or in the range from 1700° C. to 1900° C. In these temperature ranges, a good-quality nitride can be formed at a practical speed. The gas containing nitrogen may be, for example, ammonium (NH3), nitrogen (N2) or hydrazine (N2H4). Upon heating the catalyst to the temperature for its use or the nitrification temperature, the catalyst is desirably held in a hydrogen atmosphere for the purpose of preventing oxidization by oxidizing components existing in the atmosphere. On the other hand, in case the catalyst of tungsten is nitrified after raising the temperature to the range from 1700° C. to 1900° C., since a slight amount of oxidizing components existing in the growth chamber may oxidize and evaporate tungsten and may stack tungsten on the substrate surface for growing the silicon layer on, for the purpose of preventing it, nitrification is conducted by first heating the catalyst of tungsten to a first temperature in the range from 800° C. to 1600° C. in a hydrogen atmosphere, for example, and thereafter heating the catalyst of tungsten to a second temperature in the range from 900° C. to 2200° C. in a gas atmosphere containing nitrogen. More preferably, the first temperature is in the range from 900° C. to 1100° C. whereas the second temperature is in the range from 1200° C. to 2200° C. More preferably, the first temperature is in the range from 900° C. to 1100° C. (typically around 1000° C.) whereas the second temperature is in the range from 1600° C. to 2100° C.

By growing a polycrystalline silicon layer or a single crystal silicon layer by catalytic CVD using a catalyst of tungsten having formed a nitride on the surface thereof, for example, the maximum tungsten concentration in the polycrystalline silicon layer or the single crystal silicon layer can be controlled to 5×1016 atoms/cm3 or less.

The nitride may be formed by stacking a nitride on the surface of the catalyst, instead of forming it by nitrifying the surface of the catalyst. For stacking the nitride, sputtering, metal-organic chemical vapor deposition (MOCVD), or other like method, for example, can be used.

On the other hand, in order to reduce the concentration of contained oxygen in addition to the concentration of the contained metal impurities in the polycrystalline silicon layer or single crystal silicon layer grown by catalytic CVD, it is effective to adjust the total pressure of the growth atmosphere to a value in the range from 1.33×10−3 Pa to 4 Pa at least at the beginning of the growth, or adjust the partial pressure of oxygen and moisture in the growth atmosphere to a value in the range from 6.65×10−10 Pa to 2×10−6 Pa at least at the beginning of the growth. By adjusting the total pressure of the growth atmosphere or the partial pressure of oxygen and moisture to a value in the above-indicated ranges, ingestion of oxygen to the growth layer can be reduced significantly. As a result, in case of a polycrystalline silicon layer, the maximum oxygen concentration of a portion at least 10 nm deep from the boundary between the substrate and the polycrystalline silicon layer can be reduced to a value not higher than 5×1018 atoms/cm3, or 2.5×1018 atoms/cm3 in some cases. Alternatively, the maximum oxygen concentration of a portion at least 50 nm deep from the boundary between the substrate and the polycrystalline silicon layer can be reduced to a value not higher than 5×1018 atoms/cm3. Alternatively, the maximum oxygen concentration of a portion at least 100 nm deep from the boundary between the substrate and the polycrystalline silicon layer can be reduced to a value not higher than 5×1018 atoms/cm3. In case a single crystal silicon layer, the maximum oxygen concentration of a portion at least 10 nm deep from the boundary between the material layer and the single crystal silicon layer can be reduced to a value not higher than 3×1018 atoms/cm3, or 2×1018 atoms/cm3 in some cases. Alternatively, the maximum oxygen concentration of a portion at least 50 nm deep from the boundary between the material layer and the single crystal silicon layer can be reduced to a value not higher than 3×1018 atoms/cm3. Alternatively, the maximum oxygen concentration of a portion at least 100 nm deep from the boundary between the material layer and the polycrystalline silicon layer can be reduced to a value not higher than 3×1018 atoms/cm3. If the thickness of the single crystal silicon layer is 1 μm or less, the maximum oxygen concentration can be reduced to a value not higher than 3×1018 atoms/cm3. If the thickness of the single crystal silicon layer is 100 nm or less, then the maximum oxygen concentration can be reduced to a value not higher than 2×1018 atoms/cm3.

According to the fourth aspect of the invention, there is provided a polycrystalline silicon layer growth method for growing a polycrystalline silicon layer on a substrate by catalytic CVD, characterized in:

the polycrystalline silicon layer being grown by using a catalyst having a carbide that forms at least the surface thereof.

According to the fifth aspect of the invention, there is provided a single crystal silicon layer epitaxial growth method for epitaxially growing a single crystal silicon layer on a material layer in lattice alignment with the single crystal by catalytic CVD, characterized in:

the polycrystalline silicon layer being epitaxially grown by using a catalyst having a carbide that forms at least the surface thereof.

According to the sixth aspect of the invention, there is provided a catalytic CVD apparatus using a catalyst, characterized in:

the catalyst having a carbide at least on the surface thereof.

In the fourth, fifth and sixth aspects of the invention, the carbide on the surface of the catalyst may be thick enough to prevent component elements or impurities from separating or disengaging externally at the temperature for using the catalyst. More specifically, a thickness not smaller than 1 nm is sufficient as the thickness of the carbide although it depends on the adhesiveness of the carbide with its base and the film quality of the carbide as well. For more reliable prevention of external separation of component elements or impurities from the catalyst, thickness of the carbide is preferably 5 nm or more, or more preferably not less than 10 nm. The carbide is typically made by carbonizing the surface of the catalyst before conducting the growth. Carbonization is normally conducted by heating the catalyst in an atmosphere of a gas containing carbon. In case a catalyst of tungsten, for example, is used, since the tungsten carbide formed on the surface of the catalyst of tungsten at a high temperature may suffer local cracks or exfoliation when the temperature of the catalyst decreases, for the purpose of preventing tungsten from oxidization and vaporization from cracks or portions of exfoliation, tungsten carbide is preferably formed on the surface of the catalyst immediately before the growth of the silicon layer. In case the surface of a catalyst of tungsten, for example, is carbonized, if carbonization is conducted at a temperature between 400° C. and 770° C., there occur disadvantages including an increase of the resistance value caused by carbonization of not only the surface of the catalyst but also the entirety. Therefore, the catalyst of tungsten is preferably heated in a gas atmosphere containing carbon to a temperature in the range from 800° C. to 2200° C., more preferably in the range from 800° C. to 2200° C., or more preferably in the range from 1600° C. to 2100° C. or in the range from 1700° C. to 1900° C. In these temperature ranges, a good-quality carbide can be formed at a practical speed. The gas containing carbon may be, for example, methane (NH4). Upon heating the catalyst to the temperature for its use or the nitrification temperature, the catalyst is desirably held in a hydrogen atmosphere for the purpose of preventing oxidization by oxidizing components existing in the atmosphere. On the other hand, in case the catalyst of tungsten is carbonized after raising the temperature to the range from 1700° C. to 1900° C., since a slight amount of oxidizing components existing in the growth chamber may oxidize and evaporate tungsten and may stack tungsten on the substrate surface for growing the silicon layer on, for the purpose of preventing it, carbonization is conducted by first heating the catalyst of tungsten to a first temperature in the range from 800° C. to 1600° C. in a hydrogen atmosphere, for example, and thereafter heating the catalyst of tungsten to a second temperature in the range from 900° C. to 2200° C. in a gas atmosphere containing carbon. More preferably, the first temperature is in the range from 900° C. to 1100° C. whereas the second temperature is in the range from 1200° C. to 2200° C. More preferably, the first temperature is in the range from 900° C. to 1100° C. (typically around 1000° C.) whereas the second temperature is in the range from 1600° C. to 2100° C.

By growing a polycrystalline silicon layer or a single crystal silicon layer by catalytic CVD using a catalyst of tungsten having formed a carbide on the surface thereof, for example, the maximum tungsten concentration in the polycrystalline silicon layer or the single crystal silicon layer can be controlled to 5×1016 atoms/cm3 or less.

The carbide may be formed by stacking a carbide on the surface of the catalyst, instead of forming it by nitrifying the surface of the catalyst. For stacking the carbide, sputtering, metal-organic chemical vapor deposition (MOCVD), or other like method, for example, can be used.

In order to reduce the concentration of contained oxygen in addition to the concentration of the contained metal impurities in the polycrystalline silicon layer or single crystal silicon layer grown by catalytic CVD, it is effective to adjust the total pressure of the growth atmosphere to a value in the range from 1.33×10−3 Pa to 4 Pa at least at the beginning of the growth, or adjust the partial pressure of oxygen and moisture in the growth atmosphere to a value in the range from 6.65×10−10 Pa to 2×10−6 Pa at least at the beginning of the growth.

In the present invention, usable catalyst materials include, as simplex metals, tungsten (W) (3380° C.), titanium (Ti) (1668° C.), vanadium (V) (1905° C.), zirconium (Zr) (1850° C.), niobium (Nb) (2468° C.), molybdenum (Mo) (2615° C.), technetium (Tc) (2170° C.), ruthenium (Ru) (2280° C.), tantalum (Ta) (2998° C.), rhenium (Re) (3160° C.), osmium (Os) (3027° C.), and iridium (Ir) (2443° C.), for example. Temperatures after respective materials are their melting points. Usable materials other than simplex metals (alloys and compounds) include TaN, TaC, W2N, WN, NiW, NiWN, TiW, TiWN, and MoNi. As carbides, there are TaC, WC, TiWc.

In the present invention, growth temperature of a polycrystalline silicon layer or a single crystal silicon layer by catalytic CVD may be in the range from 200° C. to 600° C.

In the second and fifth aspects of the invention, the base layer for epitaxially growing the single crystal silicon layer on, i.e. the material layer in lattice alignment with single crystal silicon, may be made of single crystal silicon, or sapphire, spinel, or the like. The “single crystal silicon” is used to involve those including sub-boundaries.

The growth method by catalytic CVD according to the invention can be used for manufacturing various types of semiconductor devices such as junction type FET and bipolar transistors in addition to thin-film transistors (TFT) that are MISFET, for example. Further, the method is applicable also to fabrication of diodes, capacitors and resistors, not limited to those transistors.

According to the invention having the above summarized configuration, since at least the surface of the catalyst is made up of a nitride or carbide, its component elements or metal impurities can be prevented from the catalyst when it is heated to a high temperature. Therefore, it is effectively prevented that these component elements or metal impurities are ingested into the growth layer while the a polycrystalline silicon layer or a single crystal silicon layer is grown by catalytic CVD.

Furthermore, by adjusting the total pressure of the growth atmosphere in the range from 1.33×10−3 Pa to 4 Pa at least at the beginning of the growth, it is possible to maintain the partial pressure of oxygen and moisture in the growth atmosphere in the range from 6.65×10−10 Pa to 2×10−6 Pa at least at the beginning of the growth and to remarkably reduce the ingestion of oxygen into the growth layer.

The above, and other, objects, features and advantage of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram that shows a catalytic CVD apparatus used for growth of a silicon layer in some embodiments of the invention;

FIG. 2 is a schematic diagram that shows a catalytic CVD apparatus used for growth of a silicon layer in some embodiments of the invention;

FIG. 3 is a schematic diagram that shows another catalytic CVD apparatus used for growth of a silicon layer in some embodiments of the invention;

FIG. 4 is a cross-sectional view that shows a cross-sectional structure of a catalyst of a catalytic CVD apparatus used for growth of a silicon layer in some embodiments of the invention;

FIGS. 5A and 5B are cross-sectional views for explaining a method of growing a polycrystalline silicon layer by catalytic CVD according to the first embodiment of the invention;

FIG. 6 is a schematic diagram that shows a result of SIMS measurement;

FIG. 7 is a schematic diagram that shows a result of SIMS measurement;

FIG. 8 is a schematic diagram that shows a result of SIMS measurement;

FIG. 9 is a schematic diagram that shows a result of SIMS measurement;

FIG. 10 is a schematic diagram that shows a result of SIMS measurement;

FIG. 11 is a schematic diagram that shows a result of SIMS measurement;

FIG. 12 is a schematic diagram that shows a result of SIMS measurement;

FIG. 13 is a schematic diagram that shows a result of SIMS measurement;

FIG. 14 is a schematic diagram that shows a result of SIMS measurement;

FIG. 15 is a schematic diagram that shows a result of SIMS measurement;

FIG. 16 is a schematic diagram that shows a result of Augier electron spectroscopy of a catalyst after surface nitrification;

FIG. 17 is a schematic diagram that shows a result of Augier electron spectroscopy of a catalyst after surface nitrification;

FIG. 18 is a schematic diagram that shows a result of Augier electron spectroscopy of a catalyst after surface nitrification;

FIG. 19 is a cross-sectional view that shows TFT using a polycrystalline silicon layer grown by catalytic CVD according to the first embodiment of the invention;

FIGS. 20A and 20B are cross-sectional views for explaining a method of growing a polycrystalline silicon layer by catalytic CVD according to the third embodiment of the invention; and

FIGS. 21A and 21B are cross-sectional views for explaining a method of growing a polycrystalline silicon layer by catalytic CVD according to the fourth embodiment of the invention;

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Some embodiments of the invention will now be explained below with reference to the drawings.

First explained is a catalytic CVD apparatus used for growth of a polycrystalline silicon layer or a single crystal silicon layer in some embodiments explained later. FIG. 1 shows an example of catalytic CVD apparatus.

As shown in FIG. 1, the catalytic CVD apparatus includes a growth chamber 1 having a side wall to which a turbo molecular pump (TMP) is connected by an evacuation pipe 2. The growth chamber 1 can be evacuated by this TMP to a pressure around 1×10−6 Pa, for example. At the bottom portion of the growth chamber 1, a gas supply pipe 3 is attached to supply reactant gas used for growth through the gas supply pipe 3 into the growth chamber 1. A substrate 4 for growing a polycrystalline silicon layer thereon is set to a sample holder portion 5 provided in an upper center inside the growth chamber 1 via a loadlock chamber, not shown. The sample holder portion 5 may be a graphite susceptor coated with SiC, for example, and can be heated by a heater 6 from the atmospheric air side. The sample holder portion 5 may be a graphite susceptor coated with SiC, for example, and can be heated by a heater 6 from the atmospheric air side. A catalyst 8 is placed between a gas blow-out nozzle 7 at the tip of the gas supply pipe 3 and the sample holder portion 5. Temperature of the substrate 4 can be measured by a thermocouple 9 attached to one side of the substrate 4 of the sample holder portion 5.

Usable as the catalyst 8 is one made by winding W wire in form of a coil, then reciprocally extending the coil-shaped W wire to span over an area sufficient for covering the entirety of the substrate 4 such that the spanning surface extends in parallel with the plane of the sample holder 5. Alternatively, the catalyst 8 may be formed as shown in FIG. 2 by using a fixing member 83 made of Mo, for example, attached to two quartz rods 81, 82 held in parallel and reciprocally bridging the quartz rods 81, 82 with W wire 84 in a zigzag fashion to span over an area sufficient for covering the entirety of the substrate 4, with the spanning plane extending in parallel to the plane of the sample holder 5. Alternatively, the catalyst 8 may be formed as shown in FIG. 3 by bridging two quartz rods 81, 82 held in parallel with W wire 84 vertically to the quartz rods 81, 82 so as to make a serial connection as a whole, such that the W wire 84 makes a plane spanning over the entirety of the substrate 4 and extending in parallel with the plane of the sample holder 5. Diameter of the W wire forming the catalyst 8 may be, for example, in the range from 0.4 to 0.6 mm. The catalyst 8 is heated by electrically charging it directly. Original form of the catalyst 8 is not limited to linear ones.

As shown in FIG. 4, on the surface of the W wire 84 of the catalyst 84 used here, a WN film 85 may be formed by sputtering or MOCVD when the catalyst 8 is manufactured. Alternatively, as explained later, after the catalyst 8 is mounted in the growth chamber 1, a WN film 85 may be formed by nitrifying the surface of W wire 81 in the growth chamber 1 before the growth is started.

Next explained is a growth method of a polycrystalline silicon layer by catalytic CVD according to the first embodiment. In the first embodiment, a polycrystalline silicon layer is grown after a WN film is made by nitrifying the surface of the catalyst 8 made of W wire immediately before the growth.

More specifically, in the first embodiment, nitrification of the surface of the catalyst 8 is first conducted in the following process in the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1.

The interior of the growth chamber 1 is reduced in pressure to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Specifically, the susceptor temperature of the sample holder portion 5 may be adjusted to 350° C., hydrogen flow rate to 100 sccm/min, and pressure in the growth chamber 1 to 6.7 Pa (50 mTorr).

After that, the catalyst 8 is electrically charged and heated to a temperature in the range from 1800° C. to 2100° C. (for example, 2000° C.), and it is maintained at this temperature for a predetermined length of time (for example five minutes). The reason why hydrogen is kept flowing into the growth chamber 1 as mentioned above lies in preventing oxidation of the catalyst 8 during heating.

After that, ammonium is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 under controlled values of flow rate and pressure. More specifically, for example, the susceptor temperature of the sample holder portion 5 is adjusted to 350° C., flow rate of hydrogen to 100 sccm/min, flow rate of ammonium to 100 sccm/min, and pressure in the growth chamber 1 to 1.33˜13.3 Pa (10˜100 mTorr), and these conditions are maintained for a length of time required (for example, for 30 minutes). As a result, as shown in FIG. 4, surface of the catalyst 8 is nitrified, and the WN film 85 is formed.

Subsequently, ammonium flow amount to the growth chamber 1 is set to zero, and power supply to the catalyst 8 is interrupted for five minutes, for example, to lower its temperature.

Thereafter, hydrogen flow rate is adjusted to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, ammonium introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

Through these procedures, surface nitrification of the catalyst 8 is completed.

Next started is the growth of a polycrystalline silicon layer in the following process.

That is, as shown in FIG. 5A, first prepared is a substrate 4 which is then washed and dried. Usable as the substrate 4 is a glass substrate, quartz substrate, or silicon substrate having formed a silicon oxide (SiO2) film on its surface, for example.

After that, the substrate 4 is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to a value much lower than the pressure employed by conventional catalytic CVD. More specifically, it is adjusted to a value in the range from 1.33×10−3 Pa to 4 Pa (from 0.01 to 30 mTorr), namely for example, 0.11 Pa (0.8 mTorr). Hydrogen flow rate is adjusted to 200 sccm/min.

After that, the catalyst 8 is electrically charged and heated to 1700° C., and it is maintained at this temperature for 10 minutes, for example. The reason why hydrogen is kept flowing into the growth chamber 1 as mentioned above lies in preventing oxidation of the catalyst 8 during heating.

After that, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 200 sccm/min, for example, and flow amount of silane is adjusted to 2.0 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 0.11 Pa (0.8 mTorr). In this manner, a polycrystalline silicon layer 10 is grown on the substrate 4 as shown in FIG. 5B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Thereafter, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

After that, the substrate 4 having the polycrystalline silicon layer 10 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

Polycrystalline silicon layers actually grown in the above-explained process were evaluated by using secondary ion mass spectrometry (SIMS). Growth conditions of polycrystalline silicon layers as samples for SIMS measurement are shown in Table 1.

TABLE 1
SiH4 H2 Growth
Sample flow rate flow rate pressure Thickness
No. Substrate (sccm) (sccm) (Pa) (nm)
1 Si 2 200 0.11 300
2 SiO2/Si 2 200 0.11 300
3 Si 2 200 0.11 300

FIGS. 6 and 7 show results of SIMS measurement conducted with Samples 1 and 2. As apparent from FIGS. 6 and 7, metal impurity concentrations in the polycrystalline silicon layers in Samples 1 and 2 were not beyond detector limits as to any of tungsten, iron, chromium and nickel except for surface regions and boundary regions with their substrates. Here the detector limits are 2×1014 atoms/cc for tungsten, 4×1015 atoms/cc for iron, 1×1014 atoms/cc for chromium, and 2×1018 atoms/cc for nickel. Metal impurity concentrations are high in surface regions of the polycrystalline silicon layers and boundary regions with their substrates presumably because, upon heating the catalyst 8, the growth chamber 5 was evacuated to a high vacuum, by interrupting introduction of hydrogen into the growth chamber 5, and even under the high vacuum, H2O and O2 existed and they oxidized the catalyst 8 to produce tungsten oxide, which in turn vaporized and are ingested into the growth layers. Therefore, by introducing hydrogen into the growth chamber 5 upon heating the catalyst 8, metal impurity concentrations can be lowered to or below detector limits also in the surface regions of the polycrystalline silicon layers and boundary regions with their substrates. A result thereof is shown in FIG. 8.

For comparison purposes, explained are results of measurement of metal impurity concentrations contained in polycrystalline silicon layers grown by conventional catalytic CVD using catalysts 8 made of W wire with the surface not nitrified. For any of Samples 4 to 10 shown below, temperature of the catalyst 8 was adjusted to values in the range from 1650° C. to 1700° C., and the susceptor temperature of the holder portion was adjusted to 200° C. Growth as 30 minutes for Sample 4, 20 minutes for Sample 5, 25 minutes for Sample 6, 30 minutes for Sample 7, 180 minutes for Sample 8, 30 minutes for Sample 9 and 150 minutes for Sample 10.

TABLE 2
SiH4 H2 Growth
Sample flow rate flow rate pressure Thickness
No. Substrate (sccm) (sccm) (Pa) (nm)
4 Si 3.0 90 12 500
5 Si 4.5 90 16 500
6 Si 1.5 100 6.7 300
7 Si 1.5 100 0.8 300
8 Si 0.25 30 0.11 300
9 Si 2 0.24 400
10 Si 0.3 0.17 400

Results of SIMS measurement regarding metal impurities in Samples 4 through 10 are shown in FIGS. 9 through 15. Metal impurity concentrations in polycrystalline silicon layers are shown in Table 3.

TABLE 3
Sam- W Fe Cr Ni
ple concentration concentration concentration concentration
No. (atoms/cc) (atoms/cc) (atoms/cc) (atoms/cc)
4 9 × 1016 7 × 1015 9 × 1014 within
detector
limit
5 9 × 1016 7 × 1015 1 × 1015 3 × 1018
˜within
detector
limit
6 1 × 1017 2 × 1016 3 × 1015 within
detector
limit
7 3 × 1017 2 × 1017 3 × 1016 within
detector
limit
8 2 × 1018 9 × 1016 1 × 1016 within
detector
limit
9 3 × 1017 2 × 1016 4 × 1015 within
detector
limit
10  1 × 1018 8 × 1016 1.5 × 1016   within
detector
limit

It is known from FIGS. 9 through 15 and Table 3 that, in any of Samples 4 to 10, W, Fe and Cr concentrations contained in polycrystalline silicon layers are very high. Comparing Samples 4 and 5, they are approximately equal in W, Fe and Cr concentrations, but a difference is observed regarding Ni concentration depending on the growth pressure, and Ni is found only in Sample 5 made under the higher growth temperature. Comparing Samples 6 through 8, W, Fe and Cr were found in all samples, but Ni was below the detector limit. Regarding W concentration, it becomes higher as the growth pressure decreases presumably because the lower the growth pressure, the longer the growth time of the samples.

Here is explained a result of evaluation by Augier electron spectrometry of nitride films made by nitrifying surfaces of catalysts 8. Among catalyst samples used for evaluation, Sample A was prepared by supplying ammonium by the flow rate of 300 sccm under the pressure of 670 Pa (5 Torr) at 1800° C. and nitrifying the surface of the catalyst made of W wire by interaction with ammonium for 120 minutes. Sample B was prepared by supplying ammonium by the flow rate of 300 sccm under the pressure of 670 Pa (5 Torr) at 1900° C. and nitrifying the surface of the catalyst made of W wire by interaction with ammonium for 120 minutes. Results of measurement of Samples A and B are shown in FIGS. 16 and 17, respectively. For comparison purposes, FIG. 18 shows results of measurement of Sample C prepared by supplying NH3 by the flow rate of 300 sccm under the pressure of 670 Pa (5 Torr) at 1900° C. and nitrifying the surface of the catalyst made of molybdenum wire by interaction with NH3 for 120 minutes. It is known from FIGS. 16, 17 and 18 that, in any of Samples A, B and C, a nitride film has been formed on the surface (WN films in Samples A and B and MoN film in the sample C). In qualitative comparison of Samples A and B, the latter has a higher content of N. It is highly likely that a thicker nitride film was formed on Sample C than on Samples A and B.

As explained above, according to the first embodiment, since the polycrystalline silicon layer is grown by catalytic CVD using the catalyst 8 having formed the WN film by nitrifying the surface of W wire, concentration of metal impurities contained in the polycrystalline silicon layer can be reduced significantly to a value smaller than conventional values by several digits. Therefore, it is possible to obtain a polycrystalline silicon layer having a higher electrical property, especially in electron mobility, as compared with polycrystalline silicon layers grown by conventional catalytic CVD.

In addition, since the growth pressure for growing the polycrystalline silicon layer by catalytic CVD is adjusted to 0.1 Pa (0.8 mTorr), it is possible to grow a polycrystalline silicon layer of a low oxygen concentration in which the maximum oxygen concentration is not higher than 5×1018 atoms/cc at least in its region 10 nm deep, or 50 nm deep, depending on the case, or even 100 nm deep from the boundary with the substrate 4. This polycrystalline silicon layer is a high-quality polycrystalline silicon layer excellent in surface morphology, crystal grain size, oxygen concentration, exfoliation property and crystallization ratio that are requirements for use in TFT. More specifically, it is possible to grow a polycrystalline silicon layer, for example, which has a smooth surface, crystal grain size not smaller than 5 nm, oxygen concentration not higher than 0.001 atomic %, unlikeliness to exfoliate from the base and crystallization ratio not lower than 85%.

Furthermore, since catalytic CVD is used for growth of the polycrystalline silicon layer, reaction efficiency of reaction gas, such as silane, is as high as tens %. Therefore, it contributes to saving resources, decreases the load to the environment, and can reduce the growth cost.

IN addition to those, according to the first embodiment, any polycrystalline silicon thin film element, such as hall element having a high mobility (for example, 30˜50 cm2/V·sec), can be formed on an alumino-silicate glass substrate, for example, without using the step of excimer laser annealing (ELA).

FIG. 19 shows an example of TFT using a polycrystalline silicon layer grown by the method according to the first embodiment explained above. That is, as shown in FIG. 19, this TFT includes a polycrystalline silicon layer 10 grown by catalytic CVD according to the first embodiment on a substrate 4 such as glass substrate or quartz substrate. Thickness of the polycrystalline silicon layer 10 is around 10 through 100 nm, its metal impurity concentration is not higher than the detector limit, and its maximum oxygen concentration is not higher than 5×1018 atoms/cc. Grown on the polycrystalline silicon layer 10 is a gate insulating film 11 such as SiO2 film by plasma CVD, for example. Formed on the gate insulating film 11 is a gate electrode 12 made of a polycrystalline silicon layer doped with an impurity, for example. In the polycrystalline silicon layer 10, a source region 13 and a drain region 14 are formed in self alignment with the gate electrode 12. The polycrystalline silicon layer 10 in the region between these source region 13 and drain region 14 form a carrier channel.

Since the polycrystalline silicon layer 10 forming the carrier channel has a high quality excellent in surface morphology, crystal grain size, oxygen concentration, exfoliation property, and crystallization ratio, a high-performance TFT having a high carrier mobility and a high reliability can be obtained.

Next explained is a method of growing a polycrystalline silicon layer by catalytic CVD according to the second embodiment of the invention. In the second embodiment, a polycrystalline silicon layer is grown after a WN film is made by nitrifying the surface of the catalyst 8 made of W wire immediately before the growth.

That is, in the second embodiment, as shown in FIG. 5A, first prepared is a substrate 4 which is then washed and dried. Usable as the substrate 4 is a glass substrate, quartz substrate, or silicon substrate having formed a silicon oxide (SiO2) film on its surface, for example.

After that, the substrate 4 is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature, for example 350° C., by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to a value much lower than the pressure employed by conventional catalytic CVD. More specifically, it is adjusted to a value in the range from 1.33×10−3 Pa to 4 Pa (from 0.01 to 30 mTorr), namely for example, 0.11 Pa (0.8 mTorr). Hydrogen flow rate is adjusted to 200 sccm/min.

Subsequently, in this hydrogen atmosphere, the catalyst 8 made of W is electrically charged and heated. When the temperature exceeds 1000° C., ammonium is supplied in addition to hydrogen by the flow rate of, for example, 200 sccm/min from the gas supply pipe 3 into the growth chamber 1 while continuously electrically charging the catalyst 8 to heat it to 1700° C. Interior pressure of the growth chamber 1 is adjusted to 1.33 Pa (10 mTorr), for example. The catalyst 8 is maintained in these conditions for 10 minutes, for example. As a result, as shown in FIG. 4, the surface of the catalyst 8 is nitrified, and the WN film 85 is formed.

After that, ammonium flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature. Interior pressure of the growth chamber 1 is adjusted to a value much lower than that for conventional catalytic CVD, more specifically to a value in the range from 1.33×10−3 Pa to 4 Pa (0.01 to 30 mTorr), i.e., for example, 0.11 Pa (0.8 mTorr). Hydrogen flow rate is adjusted to 200 sccm/min.

Thereafter, the catalyst 8 whose surface has been nitrified by the foregoing nitrification is electrically charged and heated to 1700° C., and maintained at this temperature for 10 minutes, for example. The reason why hydrogen is supplied to the growth chamber as explained above lies in preventing oxidation of the catalyst 8 when heated.

Subsequently, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 200 sccm/min, for example, and flow amount of silane is adjusted to 2.0 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 0.11 Pa (0.8 mTorr). In this manner, the polycrystalline silicon layer 10 grows on the substrate 4 as shown in FIG. 5B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Thereafter, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

After that, the substrate 4 having the polycrystalline silicon layer 10 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

The second embodiment also ensures the same advantages as those of the first embodiment.

Next explained is a method of growing a polycrystalline silicon layer by catalytic CVD according to the third embodiment of the invention. In the third embodiment, a polycrystalline silicon layer is grown by using a catalyst 8 made of tungsten, which is prepared beforehand by forming a WN film on the surface of the catalyst by nitirification or deposition.

That is, as shown in FIG. 5A, first prepared is a substrate 4 which is then washed and dried. Usable as the substrate 4 is a glass substrate, quartz substrate, or silicon substrate having formed a silicon oxide (SiO2) film on its surface, for example.

After that, the substrate 4 is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature, for example 350° C., by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to a value much lower than the pressure employed by conventional catalytic CVD. More specifically, it is adjusted to a value in the range from 1.33×10−3 Pa to 4 Pa (from 0.01 to 30 mTorr), namely for example, 0.11 Pa (0.8 mTorr). Hydrogen flow rate is adjusted to 200 sccm/min.

Subsequently, in this hydrogen atmosphere, the catalyst 8 whose surface has been nitrified beforehand is electrically charged and heated to 1700° C., and maintained at the temperature for 10 minutes, for example. The reason why hydrogen is supplied to the growth chamber 1 before hand as explained above lies in preventing oxidation of the catalyst 8 when heated.

Subsequently, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 200 sccm/min, for example, and flow amount of silane is adjusted to 2.0 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 0.11 Pa (0.8 mTorr). In this manner, the polycrystalline silicon layer 10 grows on the substrate 4 as shown in FIG. 5B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Thereafter, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

After that, the substrate 4 having the polycrystalline silicon layer 10 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

The third embodiment also ensures the same advantages as those of the first embodiment.

Next explained is a method of growing a polycrystalline silicon layer by catalytic CVD according to the fourth embodiment of the invention. The fourth embodiment is the same as the first embodiment excepting that the growth pressure is adjusted to a slightly higher value, i.e. 1.33 Pa (10 mTorr), similarly to conventional catalytic CVD.

That is, in the fourth embodiment, surface nitrification of the catalyst 8 is first conducted in the following process in the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1.

The interior of the growth chamber 1 is reduced in pressure to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Specifically, the susceptor temperature of the sample holder portion 5 may be adjusted to 350° C., hydrogen flow rate to 100 sccm/min, and pressure in the growth chamber 1 to 6.7 Pa (50 mTorr).

After that, the catalyst 8 is electrically charged and heated to a temperature in the range from 1800° C. to 2100° C. (for example, 2000° C.), and it is maintained at this temperature for a predetermined length of time (for example five minutes).

After that, ammonium is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 under controlled values of flow rate and pressure. More specifically, for example, the susceptor temperature of the sample holder portion 5 is adjusted to 350° C., flow rate of hydrogen to 100 sccm/min, flow rate of ammonium to 100 sccm/min, and pressure in the growth chamber 1 to 1.33˜13.3 Pa (10˜100 mTorr), and these conditions are maintained for a length of time required (for example, for 30 minutes). As a result, as shown in FIG. 4, surface of the catalyst 8 is nitrified, and the WN film 85 is formed.

Subsequently, ammonium flow amount to the growth chamber 1 is set to zero, and power supply to the catalyst 8 is interrupted for five minutes, for example, to lower its temperature.

Thereafter, hydrogen flow rate is adjusted to zero, and the pressure is reduced to about (1˜2)×10 −6 Pa. Particularly, ammonium introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

Through these procedures, surface nitrification of the catalyst 8 is completed.

Next started is the growth of a polycrystalline silicon layer in the following process.

That is, as shown in FIG. 5A, first prepared is a substrate 4 which is then washed and dried. Usable as the substrate 4 is a glass substrate, quartz substrate, or silicon substrate having formed a silicon oxide (SiO2) film on its surface, for example.

After that, the substrate 4 is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock-chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to, for example, 13.3 Pa (100 mTorr). Hydrogen flow rate is adjusted to 200 sccm/min.

After that, the catalyst 8 whose surface has been nitrified by the above-explained nitrification is electrically charged and heated to 1700° C., and it is maintained at this temperature for 10 minutes, for example.

After that, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 200 sccm/min, for example, and flow amount of silane is adjusted to 2.0 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 1.33 Pa (10 mTorr). In this manner, a polycrystalline silicon layer 10 is grown on the substrate 4 as shown in FIG. 5B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Thereafter, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×106 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

After that, the substrate 4 having the polycrystalline silicon layer 10 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

Also according to the fourth embodiment, similarly to the first embodiment, since the polycrystalline silicon layer is grown by catalytic CVD using the catalyst 8 having formed the WN film by nitrifying the surface of W wire, concentration of metal impurities contained in the polycrystalline silicon layer can be reduced significantly to a value smaller than conventional values by several digits. Therefore, it is possible to obtain a polycrystalline silicon layer having a higher electrical property, especially in electron mobility, as compared with polycrystalline silicon layers grown by conventional catalytic CVD.

Next explained is a method of growing a polycrystalline silicon layer by catalytic CVD according to the fifth embodiment of the invention. In the fifth embodiment, a silicon nitride layer and a polycrystalline silicon layer are sequentially grown on a substrate by catalytic CVD, and nitrification of the catalyst is conducted while the silicon nitride layer is grown.

That is, in the fifth embodiment, as shown in FIG. 20A, first prepared is a single crystal silicon substrate as the substrate 4. The single crystal silicon substrate next undergoes washing, removal of a thin oxide film from the surface with diluted hydrofluoric acid (1˜5% water solution), washing with pure water, and subsequent drying.

After that, the single crystal silicon substrate is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to, for example, 13.3 Pa (100 mTorr). Hydrogen flow rate is adjusted to 200 sccm/min. Subsequently, the catalyst 8 is electrically charged and heated to 1800° C.

Subsequently, silane and ammonium are supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon nitride layer of a predetermined thickness, namely, about 50 nm, for example. Flow amount of hydrogen is adjusted to 200 sccm/min, for example, flow amount of silane is adjusted to 2.0 sccm/min (100% silane is used), and flow amount of ammonium is adjusted to 200 sccm/min. Interior pressure of the growth chamber 1 is adjusted to, for example, 13.3 Pa. In this manner, the silicon nitride layer 15 grows to the thickness of 50 nm on the substrate 4, i.e. the single crystal silicon substrate, as shown in FIG. 20B. At the same time, as a result of nitrification of the surface of the catalyst 8 by ammonium, a WN film is formed.

After the growth of the silicon nitride layer 15, silane flow amount and ammonium flow amount to the growth chamber 1 are set to zero, and especially, silane and ammonium brought into the growth chamber 1 are discharged. It takes about five minutes for the discharge.

Subsequently, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 40 nm, for example. Flow amount of hydrogen is adjusted to 200 scam/min, for example, and flow amount of silane is adjusted to 2.0 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1.0 mTorr). In this manner, the polycrystalline silicon layer 10 grows on the silicon nitride layer 15 as shown in FIG. 20B.

After the growth of the polycrystalline silicon layer 10, silane flow amount to the growth chamber 1 is set to zero, and about five minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Subsequently, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about five minutes for-this discharge.

Thereafter, the substrate 4 having the silicon nitride layer 15 and the polycrystalline silicon layer 10 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

As explained above, according to the fifth embodiment, since the polycrystalline silicon layer is grown by nitrifying the surface of the catalyst 8 made of tungsten during growth of the silicon nitride layer 15 and next using the catalyst 8, concentration of metal impurities contained in the polycrystalline silicon layer can be reduced significantly to a value much smaller than conventional values by several digits. Therefore, it is possible to obtain a polycrystalline silicon layer having a higher electrical property, especially in electron mobility, as compared with polycrystalline silicon layers grown by conventional catalytic CVD.

In addition, since the growth pressure for growing the polycrystalline silicon layer by catalytic CVD is adjusted to 0.13 Pa (1.0 mTorr), it is possible to grow a polycrystalline silicon layer of a low oxygen concentration in which the maximum oxygen concentration is not higher than 5×1018 atoms/cc at least in its region 10 nm deep, or 50 nm deep, depending on the case, or even 100 nm deep from the boundary with the substrate 4. This polycrystalline silicon layer is a high-quality polycrystalline silicon layer excellent in surface morphology, crystal grain size, oxygen concentration, exfoliation property and crystallization ratio that are requirements for use in TFT. More specifically, it is possible to grow a polycrystalline silicon layer, for example, which has a smooth surface, crystal grain size not smaller than 5 nm, oxygen concentration not higher than 0.001 atomic %, unlikeliness to exfoliate from the base and crystallization ratio not lower than 85%.

Furthermore, since catalytic CVD is used for growth of the polycrystalline silicon layer, reaction efficiency of reaction gas, such as silane, is as high as tens %. Therefore, it contributes to saving resources, decreases the load to the environment, and can reduce the growth cost.

Next explained is a method of growing a single crystal silicon layer by catalytic CVD according to the sixth embodiment of the invention. In the sixth embodiment, a single crystal silicon layer is epitaxially grown after a WN film is made by nitrifying the surface of the catalyst 8 made of W wire immediately before the growth.

More specifically, in the sixth embodiment, surface nitrification of the catalyst 8 is first conducted in the following process in the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1.

The interior of the growth chamber 1 is reduced in pressure to about (1˜2)×106 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Specifically, the susceptor temperature of the sample holder portion 5 may be adjusted to 350° C., hydrogen flow rate to 100 sccm/min, and pressure in the growth chamber 1 to 6.7 Pa (50 mTorr).

After that, the catalyst 8 is electrically charged and heated to a temperature in the range from 1800° C. to 2100° C. (for example, 2000° C.), and it is maintained at this temperature for a predetermined length of time (for example five minutes). The reason why hydrogen is kept flowing into the growth chamber 1 as mentioned above lies in preventing oxidation of the catalyst 8 during heating.

After that, ammonium is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 under controlled values of flow rate and pressure. More specifically, for example, the susceptor temperature of the sample holder portion 5 is adjusted to 350° C., flow rate of hydrogen to 100 sccm/min, flow rate of ammonium to 100 sccm/min, and pressure in the growth chamber 1 to 1.33˜13.3 Pa (10˜100 mTorr), and these conditions are maintained for a length of time required (for example, for 30 minutes). As a result, as shown in FIG. 4, surface of the catalyst 8 is nitrified, and the WN film 85 is formed.

Subsequently, ammonium flow amount to the growth chamber 1 is set to zero, and power supply to the catalyst 8 is interrupted for five minutes, for example, to lower its temperature.

Thereafter, hydrogen flow rate is adjusted to zero, and the pressure is reduced to about (1˜2)×−6 Pa. Particularly, ammonium introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

Through these procedures, surface nitrification of the catalyst 8 is completed.

Next started is the epitaxial growth of a single crystal silicon layer in the following process.

That is, as shown in FIG. 21A, first prepared is a single crystal silicon substrate as the substrate 4. The single crystal silicon substrate next undergoes washing, removal of a thin oxide film from the surface with diluted hydrofluoric acid (1˜5% water solution), washing with pure water, and subsequent drying.

After that, the single crystal silicon substrate is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1 mTorr). Hydrogen flow rate is adjusted to 30 sccm/min.

Subsequently, the catalyst 8 is electrically charged and heated to 1800° C., and maintained at the temperature for 10 minutes, for example.

Subsequently, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon nitride layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 30 sccm/min, for example, and flow amount of silane is adjusted to 0.3˜2 sccm/min (100% silane is used). In this manner, the silicon nitride layer 16 epitaxially grows on the substrate 4, i.e. the single crystal silicon substrate, as shown in FIG. 21B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about five minutes later, for example, power supply to the catalyst 8 is interrupted to lower its temperature.

Subsequently, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×106 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about five minutes for this discharge.

Thereafter, the single crystal silicon substrate 4 having the single crystal silicon layer 16 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

As explained above, according to the sixth embodiment, since the single crystal silicon layer is epitaxially grown by catalytic CVD using the catalyst 8 having the WN film made by nitrifying the surface of W wire, concentration of metal impurities contained in the single crystal silicon layer can be reduced remarkably. Therefore, it is possible to obtain a single crystal silicon layer having a higher electrical property, especially in electron mobility.

In addition, since the growth pressure for growing the single crystal silicon layer by catalytic CVD is adjusted to 0.13 Pa (1 mTorr), it is possible to epitaxially grow a single crystal silicon layer of a low oxygen concentration in which the maximum oxygen concentration is not higher than 3×1018 atoms/cc at least in its region 10 nm deep, or 50 nm deep, depending on the case, or even 100 nm deep from the boundary with the substrate 4. This single crystal silicon layer is a high-quality single crystal silicon layer excellent in crystalline property. Furthermore, since catalytic CVD is used for epitaxial growth of the single crystal silicon layer, reaction efficiency of reaction gas, such as silane, is as high as tens %. Therefore, it contributes to saving resources, decreases the load to the environment, and can reduce the growth cost.

Moreover, since the single crystal silicon layer can be epitaxially grown at a temperature in the range from 200° C. to 600° C., in case the single crystal silicon layer is epitaxially grown on a single crystal silicon substrate having a high impurity concentration, for example, so-called auto doping can be prevented. As a result, controllability of the single crystal silicon layer, either in impurity concentration or thickness, can be improved. Furthermore, especially when the single crystal silicon layer is epitaxially grown on a sapphire substrate, thermal strain can be alleviated, and auto doping of aluminum from the sapphire substrate can be prevented substantially completely.

Further, since the growth temperature may be as low as 200° C. to 600° C. as explained above, small-power heating source can be used for the epitaxial growth apparatus. Therefore, the cooling mechanism is also simplified, and an inexpensive epitaxial growth apparatus can be made.

Next explained is a method of growing a single crystal silicon layer by catalytic CVD according to the seventh embodiment of the invention. In the seventh embodiment, a single crystal silicon layer is epitaxially grown after a WN film is made by nitrifying the surface of the catalyst 8 made of W wire immediately before the growth.

That is, in the seventh embodiment, as shown in FIG. 21A, first prepared is a single crystal silicon substrate as the substrate 4. The single crystal silicon substrate next undergoes washing, removal of a thin oxide film from the surface with diluted hydrofluoric acid (1˜5% water solution), washing with pure water, and subsequent drying.

After that, the single crystal silicon substrate is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Specifically, for example, susceptor temperature of the sample holder portion 5 is adjusted to 350° C., hydrogen flow rate to 200 sccm/min, and interior pressure of the growth chamber 1 to 6.7 Pa (50 mTorr).

Subsequently, in this hydrogen atmosphere, the catalyst 8 made of W is electrically charged and heated. When the temperature exceeds 1000° C., ammonium is supplied in addition to hydrogen by the flow rate of, for example, 200 sccm/min from the gas supply pipe 3 into the growth chamber 1 while continuously electrically charging the catalyst 8 to heat it to 1700° C. Interior pressure of the growth chamber 1 is adjusted to 1.33 Pa (10 mTorr), for example. The catalyst 8 is maintained in these conditions for 10 minutes, for example. As a result, as shown in FIG. 4, the surface of the catalyst 8 is nitrified, and the WN film 85 is formed.

After that, ammonium flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature. Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1 mTorr). Hydrogen flow rate is adjusted to 30 sccm/min.

Thereafter, the catalyst 8 whose surface has been nitrified by the foregoing nitrification is electrically charged and heated to 1700° C., and maintained at this temperature for 10 minutes, for example. The reason why hydrogen is supplied to the growth chamber as explained above lies in preventing oxidation of the catalyst 8 when heated.

Subsequently, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 30 sccm/min, for example, and flow amount of silane is adjusted to a value in the range from 0.3 sccm/min to 2 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1 mTorr). In this manner, the single crystal silicon layer 16 grows on the substrate 4, i.e. single crystal silicon substrate, as shown in FIG. 21B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Thereafter, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

After that, the single crystal silicon substrate 4 having the single crystal silicon layer 16 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

The seventh embodiment also ensures the same advantages as those of the sixth embodiment.

Next explained is a method of growing a single crystal silicon layer by catalytic CVD according to the eighth embodiment of the invention. In the eighth embodiment, a single crystal silicon layer is grown by using a catalyst 8 made of tungsten, which is prepared beforehand by forming a WN film on the surface of the catalyst by nitirification or deposition.

That is, as shown in FIG. 21A, first prepared is a single crystal silicon substrate as the substrate 4. The single crystal silicon substrate next undergoes washing, removal of a thin oxide film from the surface with diluted hydrofluoric acid (1˜5% water solution), washing with pure water, and subsequent drying.

After that, the single crystal silicon substrate is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1 mTorr). Hydrogen flow rate is adjusted to 30 sccm/min.

Thereafter, the catalyst 8 whose surface has been nitrified by the foregoing nitrification is electrically charged and heated to 1700° C., and maintained at this temperature for 10 minutes, for example. The reason why hydrogen is supplied to the growth chamber as explained above lies in preventing oxidation of the catalyst 8 when heated.

Subsequently, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 30 sccm/min, for example, and flow amount of silane is adjusted to a value in the range from 0.3 sccm/min to 2 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1 mTorr). In this manner, the single crystal silicon layer 16 grows on the substrate 4, i.e. single crystal silicon substrate, as shown in FIG. 21B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about 3 to 5 minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Thereafter, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

After that, the substrate 4 having the polycrystalline silicon layer 10 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

The eighth embodiment also ensures the same advantages as those of the sixth embodiment.

Next explained is a method of growing a single crystal silicon layer by catalytic CVD according to the ninth embodiment of the invention. The ninth embodiment is the same as the sixth embodiment excepting that the growth pressure is adjusted to a higher value, i.e. 13.3 Pa (100 mTorr).

That is, in the ninth embodiment, surface nitrification of the catalyst 8 is first conducted in the following process in the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1.

The interior of the growth chamber 1 is reduced in pressure to about (1˜2)×106 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Specifically, the susceptor temperature of the sample holder portion 5 may be adjusted to 350° C., hydrogen flow rate to 100 sccm/min, and pressure in the growth chamber 1 to 6.7 Pa (50 mTorr).

After that, the catalyst 8 is electrically charged and heated to a temperature in the range from 1800° C. to 2100° C. (for example, 2000° C.), and it is maintained at this temperature for a predetermined length of time (for example five minutes). The reason why hydrogen is supplied to the growth chamber as explained above lies in preventing oxidation of the catalyst 8 when heated.

After that, ammonium is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 under controlled values of flow rate and pressure. More specifically, for example, the susceptor temperature of the sample holder portion 5 is adjusted to 350° C., flow rate of hydrogen to 100 sccm/min, flow rate of ammonium to 100 sccm/min, and pressure in the growth chamber 1 to 1.33˜13.3 Pa (10˜100 mTorr), and these conditions are maintained for a length of time required (for example, for 30 minutes). As a result, as shown in FIG. 4, surface of the catalyst 8 is nitrified, and the WN film 85 is formed.

Subsequently, ammonium flow amount to the growth chamber 1 is set to zero, and power supply to the catalyst 8 is interrupted for five minutes, for example, to lower its temperature.

Thereafter, hydrogen flow rate is adjusted to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, ammonium introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

Through these procedures, surface nitrification of the catalyst 8 is completed.

Successively, as shown in FIG. 21A, first prepared is a single crystal silicon substrate as the substrate 4. The single crystal silicon substrate next undergoes washing, removal of a thin oxide film from the surface with diluted hydrofluoric acid (1˜5% water solution), washing with pure water, and subsequent drying.

After that, the single crystal silicon substrate is mounted to the susceptor of the sample holder portion 5 inside the growth chamber 1 of the catalytic CVD apparatus shown in FIG. 1 through a loadlock chamber, not shown. The susceptor of the sample holder portion 5 is previously adjusted to the growth temperature by the heater 6.

After that, interior pressure of the growth chamber 1 is reduced to about (1˜2)×10−6 Pa, for example, by TMP, especially to discharge oxygen and moisture brought into the growth chamber 1 from outside. Time required for the discharge is approximately 5 minutes, for example.

Subsequently, hydrogen is supplied from the gas supply pipe 3 into the growth chamber 1, while controlling its flow rate, pressure and the susceptor temperature to predetermined values. Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1 mTorr). Hydrogen flow rate is adjusted to 30 sccm/min.

Thereafter the catalyst is electrically charged and heated to 1800° C., and maintained at this temperature for 10 minutes, for example.

Subsequently, silane is supplied in addition to hydrogen from the gas supply pipe 3 into the growth chamber 1 to grow a silicon layer of a predetermined thickness, namely, about 0.5 μm, for example. Flow amount of hydrogen is adjusted to 30 sccm/min, for example, and flow amount of silane is adjusted to a value in the range from 0.3 sccm/min to 2 sccm/min (100% silane is used). Interior pressure of the growth chamber 1 is adjusted to, for example, 0.13 Pa (1 mTorr). In this manner, the single crystal silicon layer 16 grows on the substrate 4, i.e. single crystal silicon substrate, as shown in FIG. 21B.

After the growth, silane flow amount to the growth chamber 1 is set to zero, and about five minutes later, for example, the power supply to the catalyst 8 is interrupted to lower its temperature.

Thereafter, hydrogen flow amount to the growth chamber 1 is set to zero, and the pressure is reduced to about (1˜2)×10−6 Pa. Particularly, silane introduced into the growth chamber 1 is discharged. It takes about 5 minutes for this discharge.

After that, the single crystal silicon substrate 4 having the single crystal silicon layer 16 grown thereon is removed externally from the growth chamber 1 via a loadlock chamber, not shown.

According to the ninth embodiment, since the single crystal silicon layer is epitaxially grown by catalytic CVD using the catalyst having the WN film made by nitrifying the surface of W wire, concentration of metal impurities contained in the single crystal silicon layer can be reduced significantly to a value much smaller than conventional values by several digits. Therefore, it is possible to obtain a single crystal silicon layer having a higher electrical property, especially in electron mobility, as compared with single crystal silicon layers grown by conventional catalytic CVD.

Heretofore, some embodiments of the invention have been explained. The invention, however, is not limited to those embodiments, but can be modified in various modes based on the technical concept of the invention.

That is, processes, numerical values, and substrate materials are not but mere examples, and if necessary, other appropriate processes, numerical values and substrate materials can be used alternatively. The catalytic CVD apparatus used in the first embodiment is also a mere example, and any other appropriate type of catalytic CVD apparatus can be used alternatively, and also regarding the catalyst, those made of elements other than W are also usable alternatively.

As explained above, according to the invention, at least the surface of the catalyst is made of a nitride or carbide to prevent vaporization of component elements or metal impurities from the catalyst when heated. Therefore, when a polycrystalline silicon layer or single crystal silicon layer is grown by catalytic CVD, it is effectively prevented that the growth layer incorporates these component elements or metal impurities therein as impurities. As a result, a polycrystalline silicon layer or single crystal silicon layer having a remarkably low metal impurity concentration can be grown.

In addition, growth is conducted by adjusting the total pressure of the growth atmosphere in the range from 1.33×10−3 Pa to 4 Pa at least at the beginning of the growth, or adjusting the partial pressure of oxygen and moisture in the growth atmosphere in the range from 6.65×10−10 Pa to 2×10−6 Pa at least at the beginning of the growth, it is possible to epitaxially grow a high-quality polycrystalline silicon layer having an oxygen concentration not higher than 5×1018 atoms/cm3 at least in its portion 10 nm deep from the boundary between the substrate and the polycrystalline silicon layer, or a high-quality single crystal silicon layer having an oxygen concentration not higher than 3×1018 atoms/cm3 at least in its portion 10 nm deep from the boundary between the single crystal silicon layer and a material layer in lattice alignment with the single crystal silicon layer.

Having described specific preferred embodiments of the present invention with reference to the accompanying drawings, it is to be understood that the inventions is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope or the spirit of the invention as defined in the appended claims.

Claims (57)

What is claimed is:
1. A polycrystalline silicon layer growth method for growing a polycrystalline silicon layer by catalytic CVD, characterized in:
said polycrystalline silicon layer is grown by using a catalyst having a nitride formed at least on a surface of the catalyst.
2. The polycrystalline silicon layer growth method according to claim 1 wherein said nitride has a thickness not smaller than 1 nm.
3. The polycrystalline silicon layer growth method according to claim 1 wherein said nitride is formed by nitrifying the surface of the catalyst prior to growth of said polycrystalline silicon layer.
4. The polycrystalline silicon layer growth method according to claim 1 wherein said catalyst is made of tungsten, and tungsten nitride is formed as said nitride prior to growth of said polycrystalline silicon layer.
5. The polycrystalline silicon layer growth method according to claim 4 wherein nitrification of said catalyst is conducted by heating said catalyst made of tungsten to a temperature in a range from 800° C. to 2200° C. in a gas atmosphere containing nitrogen.
6. The polycrystalline silicon layer growth method according to claim 4 wherein nitrification of said catalyst is conducted by heating said catalyst made of tungsten to a temperature in the range from 1600° C. to 2100° C. in a gas atmosphere containing nitrogen.
7. The polycrystalline silicon layer growth method according to claim 1 wherein said catalyst is held in a hydrogen atmosphere when it is heated.
8. The polycrystalline silicon layer growth method according to claim 3 wherein said catalyst is held in a hydrogen atmosphere when it is heated.
9. The polycrystalline silicon layer growth method according to claim 4 wherein said catalyst made of tungsten is nitrified by first heating the tungsten to a first temperature in a range from 800° C. to 1600° C. in a hydrogen atmosphere and thereafter heating the tungsten to a second temperature higher than said first temperature in a second range from 900° C. to 2200° C. in a gas atmosphere containing nitrogen.
10. The polycrystalline silicon layer growth method according to claim 9 wherein said first temperature is in a range from 900° C. to 1100° C., and said second temperature is in the range from 1200° C. to 2200° C.
11. The polycrystalline silicon layer growth method according to claim 9 wherein said first temperature is in a range from 900° C. to 1100° C., and said second temperature is in a range from 1600° C. to 2100° C.
12. The polycrystalline silicon layer growth method according to claim 4 wherein a maximum tungsten concentration in said polycrystalline silicon layer is not higher than 5×1016 atoms/cm3.
13. The polycrystalline silicon layer growth method according to claim 1 wherein said nitride is formed by stacking the nitride on the surface of the catalyst.
14. The polycrystalline silicon layer growth method according to claim 1 wherein total pressure of a growth atmosphere is adjusted to a value in a range from 1.33×10−3 Pa to 4 Pa at least at the beginning of growth.
15. The polycrystalline silicon layer growth method according to claim 1 wherein partial pressure of oxygen and moisture in a growth atmosphere is adjusted to a value in a range from 6.65×10−10 Pa to 2×10−6 Pa at least at the beginning of growth.
16. The polycrystalline silicon layer growth method according to claim 1 wherein a maximum oxygen concentration at least in a portion 10 nm deep from the boundary between said substrate and said polycrystalline silicon layer is not higher than 5×1018 atoms/cm3.
17. The polycrystalline silicon layer growth method according to claim 1 wherein a maximum oxygen concentration at least in a portion 10 nm deep from the boundary between said substrate and said polycrystalline silicon layer is not higher than 2.5×1018 atoms/cm3.
18. The polycrystalline silicon layer growth method according to claim 1 wherein a maximum oxygen concentration at least in a portion 50 nm deep from the boundary between said substrate and said polycrystalline silicon layer is not higher than 5×1018 atoms/cm3.
19. The polycrystalline silicon layer growth method according to claim 1 wherein a maximum oxygen concentration at least in a portion 100 nm deep from the boundary between said substrate and said polycrystalline silicon layer is not higher than 5×1018 atoms/cm3.
20. A single crystal silicon layer epitaxial growth method for epitaxially growing a single crystal silicon layer on a material layer in lattice alignment with the single crystal by catalytic CVD, characterized in:
said single crystal silicon layer is epitaxially grown by using a catalyst having a nitride that is formed at least on the surface of the catalyst.
21. The single crystal silicon layer epitaxial growth method according to claim 20 wherein said nitride has a thickness not smaller than 1 nm.
22. The single crystal silicon layer epitaxial growth method according to claim 20 wherein said nitride is formed by nitrifying the surface of the catalyst prior to growth of said single crystal silicon layer.
23. The single crystal silicon layer epitaxial growth method according to claim 20 wherein said catalyst is made of tungsten, and tungsten nitride is formed as said nitride prior to growth of said single crystal silicon layer.
24. The single crystal silicon layer epitaxial growth method according to claim 23 wherein nitrification of said catalyst is conducted by heating said catalyst made of tungsten to a temperature in the range from 800° C. to 2200° C. in a gas atmosphere containing nitrogen.
25. The single crystal silicon layer epitaxial growth method according to claim 23 wherein nitrification of said catalyst is conducted by heating said catalyst made of tungsten to a temperature in a range from 1600° C. to 2100° C. in a gas atmosphere containing nitrogen.
26. The single crystal silicon layer epitaxial growth method according to claim 20 wherein said catalyst is held in a hydrogen atmosphere when it is heated.
27. The single crystal silicon layer epitaxial growth method according to claim 23 wherein said catalyst is held in a hydrogen atmosphere when it is heated.
28. The single crystal silicon layer epitaxial growth method according to claim 23 wherein said catalyst made of tungsten is nitrified by first heating it to a first temperature in a range from 800° C. to −1600° C. in a hydrogen atmosphere and thereafter heating it to a second temperature higher than said first temperature in a range from 900° C. to 2200° C. in a gas atmosphere containing nitrogen.
29. The single crystal silicon layer epitaxial growth method according to claim 28 wherein said first temperature is in a range from 900° C. to 1100° C., and said second temperature is in a range from 1200° C. to 2200° C.
30. The single crystal silicon layer epitaxial growth method according to claim 28 wherein said first temperature is in a range from 900° C. to 1100° C., and said second temperature is in a range from 1600° C. to 2100° C.
31. The single crystal silicon layer epitaxial growth method according to claim 23 wherein a maximum tungsten concentration in said single crystal silicon layer is not higher than 5×1016 atoms/cm3.
32. The single crystal silicon layer epitaxial growth method according to claim 2C wherein said nitride is formed by stacking the nitride on the surface of the catalyst.
33. The single crystal silicon layer epitaxial growth method according to claim 20 wherein a total pressure of a growth atmosphere is adjusted to a value in a range from 1.33×10−3 Pa to 4 Pa at least at the beginning of growth.
34. The single crystal silicon layer epitaxial growth method according to claim 20 wherein a partial pressure of oxygen and moisture in a growth atmosphere is adjusted to a value in the range from 6.65×10−10 Pa to 2×10−6 Pa at least at the beginning of growth.
35. The single crystal silicon layer epitaxial growth method according to claim 20 wherein a maximum oxygen concentration at least in a portion 10 nm deep from the boundary between said material layer and said single crystal silicon layer is not higher than 3×1018 atoms/cm3.
36. The single crystal silicon layer epitaxial growth method according to claim 20 wherein a maximum oxygen concentration at least in a portion 10 nm deep from the boundary between said material layer and said single crystal silicon layer is not higher than 2×1018 atoms/cm3.
37. The single crystal silicon layer epitaxial growth method according to claim 20 wherein a maximum oxygen concentration at least in a portion 50 nm deep from a boundary between said material layer and said single crystal silicon layer is not higher than 3×10 18 atoms/cm3.
38. The single crystal silicon layer epitaxial growth method according to claim 20 wherein a maximum oxygen concentration at least in a portion 100 nm deep from the boundary between said material layer and said single crystal silicon layer is not higher than 3×1018 atoms/cm3.
39. The single crystal silicon layer epitaxial growth method according to claim 20 wherein a thickness of said single crystal silicon layer is not larger than 1 μm, and maximum oxygen concentration is not higher than 3×1018 atoms/cm3.
40. The single crystal silicon layer epitaxial growth method according to claim 39 wherein a thickness of said single crystal silicon layer is not larger than 100 nm.
41. The single crystal silicon layer epitaxial growth method according to claim 39 wherein a maximum oxygen concentration is not higher than 2×1018 atoms/cm3.
42. A catalytic CVD apparatus using a catalyst, characterized in:
said catalyst has a nitride at least on a surface thereof.
43. The catalytic CVD apparatus according to claim 42 wherein said nitride is formed by nitrifying at least the surface of said catalyst.
44. The catalytic CVD apparatus according to claim 42 wherein said nitride has a thickness not smaller than 1 nm.
45. The catalytic CVD apparatus according to claim 42 said nitride is formed by nitrifying the surface of the catalyst prior to conducting growth.
46. The catalytic CVD apparatus according to claim 42 wherein said catalyst is made of tungsten, and tungsten nitride is formed as said nitride prior to conducting growth.
47. The catalytic CVD apparatus according to claim 46, wherein nitrification of said catalyst is conducted by heating said catalyst made of tungsten to a temperature in a range from 800° C. to 2200° C. in a gas atmosphere containing nitrogen.
48. The catalytic CVD apparatus according to claim 46, wherein nitrification of said catalyst is conducted by heating said catalyst made of tungsten to a temperature in the range from 1600° C. to 2100° C. in a gas atmosphere containing nitrogen.
49. The catalytic CVD apparatus according to claim 42, wherein said catalyst is held in a hydrogen atmosphere when it is heated.
50. The catalytic CVD apparatus according to claim 45, wherein said catalyst is held in a hydrogen atmosphere when it is heated.
51. The catalytic CVD apparatus according to claim 46 wherein said catalyst made of tungsten is nitrified by first heating the catalyst to a first temperature in a range from 800° C. to 1600° C. in a hydrogen atmosphere and thereafter heating the catalyst to a second temperature higher than said first temperature in a range from 900° C. to 2200° C. in a gas atmosphere containing nitrogen.
52. The catalytic CVD apparatus according to claim 51 wherein said first temperature is in a range from 900° C. to 1100° C., and said second temperature is in a range from 1200° C. to 2200° C.
53. The catalytic CVD apparatus according to claim 51 wherein said first temperature is in a range from 900° C. to 1100° C., and said second temperature is in a range from 1600° C. to 2100° C.
54. The catalytic CVD apparatus according to claim 42 wherein said nitride is formed by making a film on the surface of said catalyst.
55. A polycrystalline silicon layer growth method for growing a polycrystalline silicon layer by catalytic CVD, characterized in:
said polycrystalline silicon layer is grown by using a catalyst having a carbide that is formed at least on a surface of the catalyst.
56. A single crystal silicon layer epitaxial growth method for epitaxially growing a single crystal silicon layer on a material layer in lattice alignment with the single crystal by catalytic CVD, characterized in:
said single crystal silicon layer is epitaxially grown by using a catalyst having a carbide that is formed at least on a surface of the catalyst.
57. A catalytic CVD apparatus using a catalyst, characterized in:
said catalyst has a carbide at least on a surface thereof.
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Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040213907A1 (en) * 2003-04-24 2004-10-28 Todd Michael A. Methods for depositing polycrystalline films with engineered grain structures
US20060257569A1 (en) * 2005-05-13 2006-11-16 Kim Han K Method for in-situ polycrystalline thin film growth
US20060254514A1 (en) * 2005-05-11 2006-11-16 Kang Hee C Catalyst enhanced chemical vapor deposition apparatus
US20060254513A1 (en) * 2005-05-13 2006-11-16 Hee-Cheol Kang Catalyst enhanced chemical vapor deposition apparatus and deposition method using the same
US20070048200A1 (en) * 2005-08-31 2007-03-01 Tokyo Ohka Kogyo Co., Ltd. Gas phase reaction processing device
US20070102790A1 (en) * 2001-02-12 2007-05-10 Todd Michael A Process for deposition of semiconductor films
US20070117359A1 (en) * 2002-08-14 2007-05-24 Asm America, Inc. Deposition of amorphous silicon-containing films
US20070128861A1 (en) * 2005-12-05 2007-06-07 Kim Myoung S CVD apparatus for depositing polysilicon
US20080261347A1 (en) * 2007-04-20 2008-10-23 Sanyo Electric Co., Ltd. Method of manufacturing semiconductor film and method of manufacturing photovoltaic element
US20090155988A1 (en) * 2005-10-04 2009-06-18 Industrial Technology Research Institute Element of low temperature poly-silicon thin film and method of making poly-silicon thin film by direct deposition at low temperature and inductively-coupled plasma chemical vapor deposition equipment therefor
US20100079551A1 (en) * 2007-05-29 2010-04-01 Canon Kabushiki Kaisha Substrate for liquid discharge head, method of manufacturing the same, and liquid discharge head using such substrate
US20110079881A1 (en) * 2009-10-05 2011-04-07 Stmicroelectronics (Rousset) Sas Integrated circuit chip protected against laser attacks
US20110080190A1 (en) * 2009-10-05 2011-04-07 Stmicroelectronics (Rousset) Sas Method for protecting an integrated circuit chip against laser attacks
US20110126762A1 (en) * 2007-03-29 2011-06-02 Tokyo Electron Limited Vapor deposition system
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US20110287194A1 (en) * 2008-11-24 2011-11-24 Cemecon Ag Device and method for coating a substrate using cvd
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KR101462321B1 (en) * 2009-10-02 2014-11-14 산요덴키가부시키가이샤 Catalytic cvd device, method for formation of film, process for production of solar cell, and substrate holder

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100444332C (en) * 2004-03-26 2008-12-17 株式会社爱发科 Unit layer posttreating catalytic chemical vapor deposition apparatus and method of film formation therewith
US8017472B2 (en) * 2006-02-17 2011-09-13 Infineon Technologies Ag CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereof
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US20120312326A1 (en) * 2011-06-10 2012-12-13 Applied Materials, Inc. Methods for cleaning a surface of a substrate using a hot wire chemical vapor deposition (hwcvd) chamber
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5625018A (en) * 1979-08-01 1981-03-10 Happich Gmbh Gebr Sun visor for automobile with mirror arranged to sun vistor body
US5840631A (en) 1994-11-28 1998-11-24 Nec Corporation Method of manufacturing semiconductor device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62202896A (en) * 1986-02-28 1987-09-07 Toshiba Corp Heating body for producing diamond
JP3498363B2 (en) * 1994-06-13 2004-02-16 住友電気工業株式会社 The method of synthetic diamond
JP3453214B2 (en) * 1995-03-15 2003-10-06 科学技術振興事業団 Production method and a thin film transistor of the thin film transistor according catalyst cvd method
JP2000223419A (en) * 1998-06-30 2000-08-11 Sony Corp Method of forming single crystal silicon layer, and semiconductor device and manufacture thereof
JP2000111945A (en) * 1998-10-01 2000-04-21 Sony Corp Electrooptical device, driving substrate for electrooptical device and their preparation
US7011866B1 (en) 1999-01-22 2006-03-14 Sony Corporation Method and apparatus for film deposition
JP2000223421A (en) * 1999-01-29 2000-08-11 Sony Corp Film growth method and its device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5625018A (en) * 1979-08-01 1981-03-10 Happich Gmbh Gebr Sun visor for automobile with mirror arranged to sun vistor body
US5840631A (en) 1994-11-28 1998-11-24 Nec Corporation Method of manufacturing semiconductor device

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
Matsumura, "Formation of Silicon-Based Thin Films Prepared by Catalytic Chemical Vpro Deposition (cat-CVD) Method", Japanese Journal of Applied Physics vol 37 Part 1 No. 6a (1988) pp. 3175-3187.* *
Patent Abstracts of Japan JP63040314A2.
Patent Abstracts of Japan JP8250438A2.

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Publication number Priority date Publication date Assignee Title
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US20070102790A1 (en) * 2001-02-12 2007-05-10 Todd Michael A Process for deposition of semiconductor films
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US20060254514A1 (en) * 2005-05-11 2006-11-16 Kang Hee C Catalyst enhanced chemical vapor deposition apparatus
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