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Load-lock unit and wafer transfer system

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US5340261A
US5340261A US07857832 US85783292A US5340261A US 5340261 A US5340261 A US 5340261A US 07857832 US07857832 US 07857832 US 85783292 A US85783292 A US 85783292A US 5340261 A US5340261 A US 5340261A
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Prior art keywords
wafer
load
lock
unit
error
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US07857832
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Tetsu Oosawa
Teruo Asakawa
Kenji Nebuka
Hiroo Ono
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67126Apparatus for sealing, encapsulating, glassing, decapsulating or the like
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67745Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber characterized by movements or sequence of movements of transfer devices
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00Material or article handling
    • Y10S414/135Associated with semiconductor wafer handling
    • Y10S414/136Associated with semiconductor wafer handling including wafer orienting means
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00Material or article handling
    • Y10S414/135Associated with semiconductor wafer handling
    • Y10S414/137Associated with semiconductor wafer handling including means for charging or discharging wafer cassette
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00Material or article handling
    • Y10S414/135Associated with semiconductor wafer handling
    • Y10S414/139Associated with semiconductor wafer handling including wafer charging or discharging means for vacuum chamber

Abstract

A load-lock unit is disposed between first and second atmospheres, for storing a wafer transferred from the first atmosphere, and which is blocked off from the first atmosphere, thereafter being set in an atmosphere at least substantially similar to the second atmosphere, and opened so as to communicate with the second atmosphere in order to transfer the wafer to the second atmosphere. The load-lock unit includes a load-lock chamber, a holding mechanism, disposed in the load-lock chamber for holding the wafer, a rotating mechanism for rotating the wafer held by the holding mechanism, and an error detecting mechanism for detecting a positional error of the center of the wafer and an orientation error of the wafer on the basis of data obtained by radiating light on the wafer which is rotating.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a load-lock unit and, more particularly, to a load-lock unit for transferring a wafer between atmospheres having different pressures.

2. Description of the Related Art

When a semiconductor wafer is to be transferred between a process chamber for processing a semiconductor wafer in a vacuum atmosphere and the outside (atmospheric pressure), a load-lock unit is used to improve the operation efficiency by shortening the time required for evacuation. With this load-lock unit, for example, to load the wafer in the process chamber from the outside, the wafer is first placed in a load-lock chamber, the interior of the load-lock chamber is evacuated to a predetermined pressure, the load-lock chamber is opened to communicate with the atmosphere in the process chamber, and then the wafer is loaded into the process chamber.

A semiconductor wafer has a crystal orientation. Thus, when a wafer is to be processed or tested, not only its central position but also its orientation or direction of arrangement sometimes needs to be aligned.

For example, in an ion implantation unit, as shown in FIG. 1, ions generated by an ion generator I disposed in a terminal unit T are deflected by an analyzing magnet M and sequentially implanted in a wafer W on a turntable 1a (upright during ion implantation) in a process chamber through an acceleration tube A. Each wafer must be placed on the turntable 1a from the outside to be correctly aligned.

For this purpose, conventionally, as shown in FIG. 2, wafers W are transferred one by one to an aligning unit OD from a carrier 3 disposed at a predetermined position outside the process chamber 1 by a transfer robot R1 on the outer air side. An orientation error and a positional error of the center of each wafer are detected by the aligning unit OD, and two correcting steps for correction of the orientation and central position are performed to correct the errors, thus positioning the wafer W. Then, the wafer W in the aligning unit OD is transferred to a load-lock unit 2 by the transfer robot R1. The load-lock unit 2 is evacuated, and the wafer W is transferred to the turntable 1a from the load-lock unit 2 by a transfer robot R2 on the process chamber 1 side.

In such a conventional method, however, when the wafers are transferred into the load-lock unit one by one from the carrier, they must pass through the aligning unit, resulting in an increase in number of wafer handling times. Thus, damage to the wafer tends to occur or particles of dust tend to attach the wafer, leading to a decrease in yield. At the same time, as the number of handling times is increased, the loading time is prolonged, decreasing the processing throughput of the load-lock unit.

Regarding the aligning unit, a servo mechanism for moving the wafer in X and Y directions is need to correct, e.g., the central position of the wafer. As a result, the aligning unit becomes complicated and costly and requires an additional installation space for the servo mechanism.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a compact load-lock unit which can increase the throughput and yield.

It is another object of the present invention to provide a wafer transfer system which can efficiently correct a positional error of a wafer.

According to the present invention, there is provided a load-lock unit which is disposed between first and second atmospheres, stores a wafer transferred from the first atmosphere, is blocked off from the first atmosphere, is thereafter set in the same atmosphere as or a similar atmosphere to the second atmosphere, and is opened to communicate with the second atmosphere in order to transfer the wafer to the second atmosphere, comprising a load-lock chamber, holding means, disposed in the load-lock chamber, for holding the wafer, rotating means for rotating the wafer held by the holding means, and error detecting means for detecting a positional error of the center of the wafer and an orientation error of the wafer on the basis of data obtained by radiating light on the wafer which is rotating.

According to the present invention, there is also provided a transfer system comprising a load-lock unit which is disposed between first and second atmospheres, stores a wafer transferred from the first atmosphere, is blocked off from the first atmosphere, is thereafter set in the same atmosphere as or a similar atmosphere to the second atmosphere, and is opened to communicate with the second atmosphere in order to transfer the wafer to the second atmosphere, transfer means for transferring the wafer in the load-lock unit to a predetermined position in the second atmosphere, and control means for controlling the transfer means,

the load-lock unit comprising a load-lock chamber, holding means, disposed in the load-lock chamber, for holding the wafer, rotating means for rotating the wafer held by the holding means, and error detecting means for detecting a positional error of the center of the wafer and an orientation error of the wafer on the basis of data obtained by radiating light on the wafer which is rotating, and

the control means controlling the transfer means so that the wafer is disposed at the predetermined position in the second atmosphere after the positional error of the center of the wafer and the orientation error of the wafer are corrected on the basis of data from the error detecting means.

Furthermore, according to the present invention, there is also provided a transfer system comprising a first load-lock unit which is disposed between first and second atmospheres, stores a wafer transferred from the first atmosphere, is blocked off from the first atmosphere, is thereafter set in the same atmosphere as or a similar atmosphere to the second atmosphere, and is opened to communicate with the second atmosphere in order to transfer the wafer to the second atmosphere, a second load-lock unit having the same arrangement as that of the first load-lock unit, transfer means for transferring the wafer in each of the first and second load-lock units to a predetermined position in the second atmosphere, and control means for controlling the transfer means,

each of the first and second load-lock units comprising a load-lock chamber, holding means, disposed in the load-lock chamber, for holding the wafer, rotating means for rotating the wafer held by the holding means, and error detecting means for detecting a positional error of the center of the wafer and an orientation error of the wafer on the basis of data obtained by radiating light on the wafer which is rotating, and

the control means controlling the transfer means so that the wafer is disposed at the predetermined position in the second atmosphere after the positional error of the center of the wafer and the orientation error of the wafer are corrected on the basis of data from the error detecting means.

Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.

FIG. 1 is a view showing an overall arrangement of a conventional ion implantation unit;

FIG. 2 is a view showing a conventional wafer transfer system of the ion implantation unit;

FIG. 3 is a longitudinal sectional view showing a load-lock unit according to an embodiment of the present invention;

FIG. 4 is a view for explaining the positional relationship between a wafer and an optical path;

FIGS. 5 to 8 are sectional views showing various arrangements of a light-receiving section and a light-emitting section;

FIG. 9 is a view showing a wafer transfer system according to another embodiment of the present invention; and

FIG. 10 is a sectional view showing a partial arrangement of the load-lock unit shown in FIG. 3.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The preferred embodiments of the present invention will be described with reference to the accompanying drawings.

FIG. 3 is a sectional view showing an arrangement of a load-lock unit according to an embodiment of the present invention. In this embodiment, a bottomed cylindrical member 4 which is open upward and a lid plate 4a constituted by, e.g., a glass plate for closing the open surface of the cylindrical member 4 constitute a load-lock chamber 5. A magnetic seal (not shown) is disposed in a cylindrical base portion 4c vertically extending downward from the central portion of the lower surface of the bottom portion of the cylindrical member 4. A rotating shaft 4b which rotates about a vertical axis is hermetically inserted in the load-lock chamber 5 at the central position of the bottom portion through the magnetic seal.

A motor (not shown) is coupled to the lower end of the rotating shaft 4b, and a turntable 4d is provided at the upper end of the rotating shaft 4b. A chuck unit comprising electrodes 4e for electrostatically chucking a wafer is disposed on the upper surface of the turntable 4d. In this arrangement, the chuck unit and the turntable 4d constitute a holding portion.

Air supply paths 6 each having an exhaust path for evacuating the load-lock chamber 5 are provided at, e.g., two portions under the cylindrical member 4. The air supply paths 6 have exhaust pipes 6a and 6b, respectively, for performing a two-step evacuation.

A window 7 constituted by a glass plate is mounted on part of a side surface of the cylindrical member 4, and a box member 7a is mounted on the cylindrical member 4 to cover the outer surface of the window 7. A light-emitting section 8a for emitting a laser beam is disposed on the bottom portion of the box member 7a. A mirror 8b, a cylindrical lens 8c, and a light-receiving section 8d are housed in the box member 7a. The mirror 8b reflects the laser beam, which has been emitted upward from the light-emitting section 8a, at a right angle toward the interior of the load-lock chamber 5. The lens 8c shapes the spot of the laser beam into a thin elongated shape. The light-receiving section 8d receives the laser beam returned from the load-lock chamber 5.

A mirror 8e which reflects at a right angle a laser beam incident through the window 7 in order to form an optical path perpendicular to the path of the wafer and a mirror 8f which reflects the laser beam reflected by the mirror 8e to the outside of the window 7 are arranged in the load-lock chamber 5. The positions of the pair of mirrors 8e and 8f are set at places where the center of the major axis of a slit section S of the laser beam is located on, e.g., the periphery (excluding a linear portion l called an orientation flat) of the wafer W, as shown in FIG. 4, when the center of the wafer coincides with the center of rotation of the rotating shaft 4b.

The light-emitting section 8a, the mirror 8b, the lens 8c, and the light-receiving section 8d constitute a first unit together with the window 7 and the box member 7a. The mirrors 8e and 8f in the load-lock chamber 5 are mounted on a U-shaped common holding member 8g was to constitute a second unit and are fixed to the window 7 through a fixing member 8h.

If the respective members are combined to constitute the first and second units as described above, the relative positional relationship among the light-emitting section 8a, the mirror 8b, and the objective lens 8c and the position of the light-receiving section 8d of the first unit are preset, and the positions of the pair of mirrors 8e and 8f of the second unit are preset. Thus, to incorporate the first and second units in the load-lock unit, only the positions of the two units need be set. As a result, an optical path can be easily set with a high precision in a small load-lock unit.

The light-receiving section 8d is connected to an operating means 9 for calculating a positional error amount of the wafer W in the load-lock chamber 5, i.e., the amount of error in central positioning and orientation (rotation angle) of the wafer W on the basis of an electrical signal corresponding to an amount of light received by the light-receiving section 8d. In FIG. 3, the light-emitting section 8a, the light-receiving section 8d, and the operating means 9 constitute a positional error detecting means of the wafer. The load-lock unit according to this embodiment has the arrangement described above.

In the above-described embodiment shown in FIG. 3, the light-emitting and light-receiving sections 8a and 8d are combined as the first unit and disposed in the box member 7a. However, they are not limited to this arrangement but can be disposed at various positions.

In the arrangement shown in FIG. 5, a light-emitting section 8a is disposed outside the box member 7a, and a laser beam emitted from the light-emitting section 8a is incident on a load-lock chamber 5 through a transparent plate 8i. The arrangement shown in FIG. 5 is advantageous in that a mirror 8b can be omitted.

In the arrangement shown in FIG. 6, a light-emitting section 8a is disposed below a load-lock chamber 5, and a laser beam emitted from the light-emitting section 8a is incident on a load-lock chamber 5 through a transparent plate 8j. The arrangement shown in FIG. 6 is advantageous in that mirrors 8b and 8e can be omitted. Although not shown in FIG. 6, a lens 8c can be disposed either inside or outside the load-lock chamber 5.

In the arrangement shown in FIG. 7, a light-receiving section 8d is arranged above a load-lock chamber 5, and a laser beam from the load-lock chamber 5 is incident on the light-receiving section 8d through a transparent plate 8k. The arrangement shown in FIG. 7 is advantageous in that a mirror 8f can be omitted. In the arrangement shown in FIG. 7, the position of a light-emitting section 8a can be any of those shown in FIGS. 3, 5, or 6. When the light-emitting section 8ais disposed at the position shown in FIG. 6, all the mirrors can be omitted.

In the arrangement shown in FIG. 8, a light-receiving section 8d is disposed in a load-lock chamber 5. The arrangement shown in FIG. 8 is advantageous in that a mirror 8f can be omitted as in FIG. 7. In the arrangement shown in FIG. 8, the position of the light-emitting section 8a can be any one shown in FIGS. 3, 5, or 6.

Operation of the load-lock unit described above will now be described with reference to FIG. 3.

A gate (not shown) of the load-lock chamber 5 on the outer air side is opened, and a non-processed wafer W disposed in an outer air is loaded in the load-lock chamber 5 by a transfer mechanism (not shown) through its intake port, placed on the turntable 4d, and fixed on the turntable 4d by the electrostatic chuck. The gate on the outer air side is closed and the load-lock chamber 5 is evacuated to a predetermined vacuum degree. A motor (not shown) is driven to rotate the wafer W once while the light-emitting section 8a emits a laser beam. If a starting point of data detection is near the vertex of the orientation flat, a peak corresponding to the vertex of the orientation flat appears at two ends of the detection data, thus sometimes causing inconvenience in data read access. Hence, the wafer W is normally rotated through about 360°+5°.

The amount of laser beam received by the light-receiving section 8d corresponds to the position of the periphery of the wafer W in the laser beam range. Thus, the distance from the center of rotation to the periphery of the wafer w within the laser beam range at each angular position can be obtained by the operating means 9 on the basis of an electrical signal output from the light-receiving section 8d. The orientation flat l for determining the crystal orientation is formed in the wafer W. Therefore, an error amount of the center of the wafer W from a correct position and an error amount (error amount in rotation angle) of the orientation of the wafer W from a correct position can be simultaneously detected by obtaining the distance described above at each angular position of the wafer W.

The positional error of the center of the wafer need not be that from the correct position but can be a distance from a certain reference point, and the error in rotation angle can be an angle of the orientation flat with respect to a certain reference line.

Then, the electrostatic chuck is released, a gate (not shown) in the process chamber is opened, and the wafer W is loaded in the process chamber through its outlet port by the transfer mechanism (not shown).

The positional error of the center of the wafer and the error in rotation angle of the wafer can be detected in this manner in the load-lock unit. In this embodiment, e.g., an aligning mechanism (not shown) may be incorporated in the load-lock unit to correct these errors. Alternatively, alignment may be performed when the wafer is transferred into the process chamber from the load-lock unit as in another embodiment to be described below.

FIG. 9 shows part of a transfer system for transferring a wafer to a turntable 1a in a process chamber 1 of an ion implantation unit from the outside (atmospheric pressure). In this system, first and second load-lock units 11a and 11b each having an optical path unit 10 including light-emitting and receiving sections and mirrors as shown in FIG. 3 are disposed adjacent to each other.

A transfer mechanism 12 comprising, e.g., an articulated robot is provided in the process chamber 1. A control unit 13 for controlling the transfer mechanism 12 on the basis of an operation result is connected to the output of an operating means 9 connected to the optical path unit 10. Reference numeral 14 denotes a transfer mechanism on the outer air side; and 15a and 15b, denote wafer carriers disposed at predetermined positions.

Operation of the system shown in FIG. 9 will now be described.

The non-processed wafers W buffered in the carrier 15a or 15b disposed in the outer air are loaded one by one in the first load-lock unit 11a at a lower portion in FIG. 9 by the transfer mechanism 14 through a gate G1 on the outer air side. When one wafer W is transferred, the gate G1 is closed, and the load-lock unit 11a is evacuated. The wafer W is rotated during or after evacuation, as described above, and the positional error of the wafer W is detected by the operating means 9 by a positional error detecting means 100, i.e., on the basis of an electrical signal from the optical path unit 10.

Subsequently, a gate G2 on the process chamber 1 side is opened and the wafer W in the load-lock unit 11a is transferred to a predetermined position on the turntable 1a by the transfer mechanism 12. At this time, the control unit 13 supplies a control signal to the transfer mechanism 12 so that the positional error of the center and the error in rotation angle of the wafer W occurring in the load-lock unit 11a are corrected on the basis of the operation result (positional error amount of the wafer) supplied from the operating means 9 when the wafer W is placed at the predetermined position on the turntable 1a.

Regarding control of the transfer mechanism 12, the positional error amount may be corrected when the transfer mechanism 12 is to receive the wafer W in the load-lock unit 11a or 11b or is to place the wafer W on the turntable 1a, or in a process after the transfer mechanism 12 receives the wafer W and before the transfer mechanism 12 is to place the wafer W.

Regarding correction of the positional error detected in the load-lock unit, the error in rotation angle of the wafer W may be corrected by the rotating shaft 4b in the load-lock unit, and only the positional error of the center of the wafer W may be corrected by the transfer mechanism 12.

Since the system shown in FIG. 9 has two load-lock units, while a wafer W is being loaded from one load-lock unit 11a or 11b in the process chamber 1, alignment (detection of a positional error) of the next wafer W can be performed on the other load-lock unit 11b or 11a. Thus, the waiting time normally required for alignment can be eliminated so as to increase the throughput.

Regarding the gate G1 of each of the load-lock units 11a and 11b, if the wafer inlet port is formed to have a surface 16 inclined at, e.g., 45° with respect to the vertical axis, and the gate G1 for opening and closing the inlet port is provided with a pivotal member 17 which pivots about a horizontal axis P, as shown in FIG. 10, the path of movement of the gate G1 will not be widened in the transverse direction, and its movement distance can be minimized, thus minimizing the installation space. In this case, the gate G1 may be linearly moved in the vertical direction in place of being pivoted, or the arrangement described above may be applied to the gate G2 on the side of the process chamber.

Detection of the positional error of the wafer is not limited to the method described in this embodiment, and, e.g., light reflection by the periphery of the wafer may be utilized for this detection.

The present invention is not limited to wafer transfer between atmospheres having different pressures but can be similarly applied to wafer transfer between atmospheres having different types of gases.

As has been described above, according to the present invention, since the positional error of the wafer is detected in the load-lock unit, conventional handling including temporarily placing the wafer on the aligning unit can be eliminated. As a result, damage to the wafer and particles of dust attached to the wafer can be decreased, thus increasing the yield. In addition, since the time required for loading can be shortened, the throughput can be increased, and since the aligning unit can be eliminated, the size of the entire system can be reduced. Furthermore, since the positional error is detected on the basis of data obtained by rotation of the wafer, a large-size system such as a TV camera need not be used, thus avoiding an increase in size of the load-lock unit.

In particular, when the positional error of the wafer detected in the load-lock unit is corrected by the transfer mechanism disposed in the process chamber in, e.g., a vacuum atmosphere, transfer and correction of the positional error can be simultaneously performed, thus further increasing the throughput. In this manner, when the positional error is corrected at the final position of the wafer, e.g., at a position close to the turntable in the process chamber, high-precision alignment can be performed.

Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details, and representative devices, shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.

Claims (20)

What is claimed is:
1. A load-lock unit which is disposed between first and second atmospheres, for storing a wafer transferred from the first atmosphere, and which is blocked off from the first atmosphere, thereafter being set in an atmosphere at least substantially similar to the second atmosphere, and opened so as to communicate with the second atmosphere in order to transfer the wafer to the second atmosphere, said wafer having a shape bounded by a circular segment and a linear segment wherein said unit comprises:
a load-lock chamber having a wall and a floor;
a holding mechanism, disposed in said load-lock chamber, for holding the wafer;
a rotating mechanism for rotating the wafer held by said holding mechanism;
an exhausting mechanism for evacuating the load-lock chamber; and
an error detecting mechanism for detecting a positional error of a center of the wafer and an orientation error of the wafer while evacuating the load-lock chamber, based on data obtained by radiating light on the wafer when the wafer is rotating.
2. A unit according to claim 1, wherein said error detecting mechanism comprises an optical unit for generating an electrical signal on the basis of the optical data obtained by radiating light on the wafer which is rotating, and an operating mechanism, connected to said optical unit, for calculating the electrical signal.
3. A unit according to claim 2, wherein said optical unit comprises a light-emitting section for emitting a laser beam, and a light-receiving section for receiving the laser beam emitted from the rotating wafer and converting the laser beam into an electrical signal.
4. A unit according to claim 2, wherein said light-receiving section receives the laser beam passing through a peripheral portion of the wafer and detects a light amount thereof.
5. A unit according to claim 2, wherein said light-receiving section receives the laser beam reflected by a peripheral portion of the wafer and detects a light amount thereof.
6. A unit according to claim 1, wherein said rotating mechanism rotates said holding mechanism.
7. A unit according to claim 1, wherein said load-lock chamber comprises a wafer inlet port having an open surface which is inclined obliquely downward, and a pivotal member which is pivotal about a horizontal axis for opening and closing the wafer inlet port.
8. A transfer system comprising a load-lock unit which is disposed between first and second atmospheres, for storing a wafer transferred from the first atmosphere, and which is blocked off from the first atmosphere, thereafter being set in an atmosphere at least substantially similar to the second atmosphere, and opened so as to communicate with the second atmosphere in order to transfer the wafer to the second atmosphere, said wafer having a shape bounded by a circular segment and a linear segment, a transfer mechanism for transferring the wafer in said load-lock unit to a predetermined position in the second atmosphere, and a control mechanism for controlling said transfer mechanism;
said load-lock unit comprising a load-lock chamber having a wall and a floor, a holding mechanism, disposed in said load-lock chamber, for holding the wafer; a rotating mechanism for rotating the wafer held by said holding mechanism, an exhausting mechanism for evacuating the load-lock chamber; and an error detecting mechanism for detecting a positional error of a center of the wafer and an orientation error of the wafer while evacuating the load-lock chamber, based on data obtained by radiating light on the wafer when the wafer is rotating such that the rate of treatment of the wafer is improved; and
said control mechanism controlling said transfer mechanism so that the wafer is disposed at the predetermined position in the second atmosphere after the positional error of the center thereof and the orientation error thereof are corrected on the basis of the data from said error detecting mechanism.
9. A system according to claim 8, wherein said transfer mechanism has a function of correcting the positional error of the center of the wafer and the orientation error of the wafer, and wherein the positional error of the center of the wafer and the orientation error of the wafer are corrected during transfer of the wafer by said transfer mechanism.
10. A system according to claim 8, wherein a mechanism for correcting the positional error of the center of the wafer and the orientation error of the wafer is arranged in said load-lock chamber, and wherein the positional error of the center of the wafer and the orientation error of the wafer are corrected in said load-lock chamber by said error correcting mechanism.
11. A system according to claim 8, wherein the orientation error of the wafer is corrected by rotation of the wafer by said rotating mechanism.
12. A system according to claim 8, wherein the orientation error of the wafer is corrected during evacuation of said load-lock chamber.
13. A system according to claim 8, wherein said error detecting mechanism comprises an optical unit for generating an electrical signal on the basis of the optical data obtained by radiating light on the wafer which is rotating, and an operating mechanism, connected to said optical unit, for calculating the electrical signal.
14. A system according to claim 13, wherein said optical unit comprises a light-emitting section for emitting a laser beam, and a light-receiving section for receiving the laser beam emitted from the rotating wafer and converting the laser beam into an electrical signal.
15. A system according to claim 13, wherein said light-receiving section receives the laser beam passing through a peripheral portion of the wafer and detects a light amount thereof.
16. A system according to claim 13, wherein said light-receiving section receives the laser beam reflected by a peripheral portion of the wafer and detects a light amount thereof.
17. A system according to claim 8, wherein said rotating mechanism rotates said holding mechanism.
18. A system according to claim 8, wherein said load-lock chamber comprises a wafer inlet port having an open surface which is inclined obliquely downward, and a pivotal member which is pivotal about a horizontal axis for opening and closing the wafer inlet port.
19. A transfer system comprising a first load-lock unit which is disposed between first and second atmospheres, for storing a wafer transferred from the first atmosphere, and which is blocked off from the first atmosphere, thereafter being set in an atmosphere at least substantially similar to the second atmosphere, and opened so as to communicate with the second atmosphere in order to transfer the wafer to the second atmosphere, said wafer having a shape bounded by a circular segment and a linear segment, a second load-lock unit having structure corresponding to that of said first load-lock unit, a transfer mechanism for transferring the wafer in each of said first and second load-lock units to a predetermined position in the second atmosphere, and a control mechanism for controlling said transfer mechanism;
each of said first and second load-lock units comprising a load-lock chamber having a wall and a floor, a holding mechanism, disposed in said load-lock chamber, for holding the wafer, a rotating mechanism for rotating the wafer held by said holding mechanism, an exhausting mechanism for evacuating the load-lock chamber, and an error detecting mechanism for detecting a positional error of a center of the wafer and an orientation error of the wafer while evacuating the load-lock chamber based on data obtained by radiating light on the wafer when the wafer is rotating such that the rate of treatment of the wafer is improved; and
said control mechanism controlling said transfer mechanism so that the wafer is disposed at the predetermined position in the second atmosphere after the positional error of the center of the wafer and the orientation error of the wafer are corrected based on data from said error detecting mechanism.
20. A system according to claim 19, wherein the positional error of the center of the wafer and the orientation error of the wafer are detected in said second load-lock unit during transfer from said first load-lock unit to the second atmosphere.
US07857832 1991-03-26 1992-03-26 Load-lock unit and wafer transfer system Expired - Lifetime US5340261A (en)

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Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5435683A (en) * 1991-03-26 1995-07-25 Tokyo Electron Limited Load-lock unit and wafer transfer system
US5466117A (en) * 1993-06-10 1995-11-14 Xilinx, Inc. Device and method for programming multiple arrays of semiconductor devices
US5474410A (en) * 1993-03-14 1995-12-12 Tel-Varian Limited Multi-chamber system provided with carrier units
US5516732A (en) * 1992-12-04 1996-05-14 Sony Corporation Wafer processing machine vacuum front end method and apparatus
US5549435A (en) * 1992-10-06 1996-08-27 Balzers Aktiengesellschaft Chamber and a chamber combination for a vacuum facility and a method for transporting through at least one workpiece
WO1996026874A1 (en) * 1995-02-27 1996-09-06 Asyst Technologies, Inc. Standard mechanical interface integrated vacuum loadlock chamber
US5556248A (en) * 1993-01-14 1996-09-17 Applied Materials, Inc. Semiconductor wafer cassette transfer system
US5570987A (en) * 1993-12-14 1996-11-05 W. L. Gore & Associates, Inc. Semiconductor wafer transport container
US5590994A (en) * 1992-10-06 1997-01-07 Balzers Aktiengesellschaft Chamber, at least for the transport of workpieces, a chamber combination, a vacuum treatment facility as well as a transport method
US5700046A (en) * 1995-09-13 1997-12-23 Silicon Valley Group, Inc. Wafer gripper
US5718552A (en) * 1993-03-22 1998-02-17 Gruetzediek; Hartmut Procedure and facility for handling and transport of wafers in ultra-clean rooms
US6063244A (en) * 1998-05-21 2000-05-16 International Business Machines Corporation Dual chamber ion beam sputter deposition system
US6075334A (en) * 1999-03-15 2000-06-13 Berkeley Process Control, Inc Automatic calibration system for wafer transfer robot
US6120601A (en) * 1995-06-07 2000-09-19 Varian Semiconductor Equipment Associates, Inc. Wafer orientation inspection system
US6229611B1 (en) * 1999-09-20 2001-05-08 United Microelectronics Corp. Method of detecting a transparent quartz wafer in a semiconductor equipment
US6275742B1 (en) 1999-04-16 2001-08-14 Berkeley Process Control, Inc. Wafer aligner system
US6348967B1 (en) * 1992-07-08 2002-02-19 Active Impulse Systems, Inc. Method and device for measuring the thickness of opaque and transparent films
US6357984B1 (en) * 1997-07-03 2002-03-19 Asm International N.V. Storage assembly for wafers
US6395094B1 (en) * 1999-04-15 2002-05-28 Tokyo Electron Limited Process system with transfer unit for object to be processed
US6556887B2 (en) 2001-07-12 2003-04-29 Applied Materials, Inc. Method for determining a position of a robot
US6705828B2 (en) * 1995-07-19 2004-03-16 Hitachi, Ltd. Vacuum processing apparatus and semiconductor manufacturing line using the same
US6860965B1 (en) * 2000-06-23 2005-03-01 Novellus Systems, Inc. High throughput architecture for semiconductor processing
US20050175435A1 (en) * 1995-07-19 2005-08-11 Minoru Soraoka Vacuum processing apparatus and semiconductor manufacturing line using the same
US20050208842A1 (en) * 2004-03-16 2005-09-22 Po-Ching Lin [positioning apparatus and positioning method using the same]
US20060045668A1 (en) * 2004-07-19 2006-03-02 Grabowski Al W System for handling of wafers within a process tool
US20080101912A1 (en) * 2006-10-26 2008-05-01 Martin Todd W Deposition analysis for robot motion correction
US20090053016A1 (en) * 2003-11-10 2009-02-26 Van Der Meulen Peter Mid-entry load lock for semiconductor handling system
WO2012109577A3 (en) * 2011-02-10 2012-11-15 Hysitron, Inc. Nanomechanical testing system
US8500388B2 (en) 2003-11-10 2013-08-06 Brooks Automation, Inc. Semiconductor wafer handling and transport
US8919210B2 (en) * 2012-11-27 2014-12-30 Life Technologies Corporation Load cell lockouts and related fluid dispensing systems

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE59706031D1 (en) * 1996-12-23 2002-02-21 Unaxis Balzers Ag Vacuum treatment plant
US5944476A (en) * 1997-03-26 1999-08-31 Kensington Laboratories, Inc. Unitary specimen prealigner and continuously rotatable multiple link robot arm mechanism
NL1010317C2 (en) 1998-10-14 2000-05-01 Asm Int Sorting / storing device for wafers and method for the handling thereof.
GB2349204B (en) * 1999-04-19 2004-03-03 Applied Materials Inc A method of detecting the position of a wafer
US6244811B1 (en) 1999-06-29 2001-06-12 Lam Research Corporation Atmospheric wafer transfer module with nest for wafer transport robot
US6364762B1 (en) 1999-09-30 2002-04-02 Lam Research Corporation Wafer atmospheric transport module having a controlled mini-environment
US6591161B2 (en) * 2001-01-31 2003-07-08 Wafermasters, Inc. Method for determining robot alignment
US6778258B2 (en) 2001-10-19 2004-08-17 Asml Holding N.V. Wafer handling system for use in lithography patterning
KR20050044434A (en) * 2001-11-13 2005-05-12 에프 에스 아이 인터내셔날,인코포레이티드 Reduced footprlnt tool for automated processing of microelectronic substrates
US6497734B1 (en) 2002-01-02 2002-12-24 Novellus Systems, Inc. Apparatus and method for enhanced degassing of semiconductor wafers for increased throughput
RU2005123989A (en) 2003-01-02 2006-03-20 Лома Линда Юниверсити Медикал Сентер (Us) Configuration management and data retrieval system for remote system proton-proton radiation therapy
DE10303460A1 (en) * 2003-01-29 2004-08-19 Infineon Technologies Ag Method and apparatus for handling disc-shaped objects
US8313277B2 (en) 2003-11-10 2012-11-20 Brooks Automation, Inc. Semiconductor manufacturing process modules
US20070286710A1 (en) * 2003-11-10 2007-12-13 Van Der Meulen Peter Semiconductor manufacturing process modules
US8696298B2 (en) 2003-11-10 2014-04-15 Brooks Automation, Inc. Semiconductor manufacturing process modules
US8812150B2 (en) 2003-11-10 2014-08-19 Brooks Automation, Inc. Semiconductor manufacturing process modules
JP4892225B2 (en) * 2005-10-28 2012-03-07 株式会社日立ハイテクノロジーズ Vacuum processing method, the vacuum transfer apparatus and semiconductor processing equipment
US7387484B2 (en) * 2005-12-21 2008-06-17 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer positioning systems and methods thereof
JP2008192840A (en) * 2007-02-05 2008-08-21 Tokyo Electron Ltd Vacuum processing apparatus, method for vacuum processing and storage medium
JP5473820B2 (en) * 2010-07-29 2014-04-16 株式会社日立ハイテクノロジーズ Substrate holder and the substrate transfer system

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4457664A (en) * 1982-03-22 1984-07-03 Ade Corporation Wafer alignment station
EP0242066A2 (en) * 1986-04-17 1987-10-21 Varian Associates, Inc. Wafer positioning system
US4752898A (en) * 1987-01-28 1988-06-21 Tencor Instruments Edge finding in wafers
JPS63187644A (en) * 1987-01-30 1988-08-03 Nec Corp Production device for semiconductor
US4769523A (en) * 1985-03-08 1988-09-06 Nippon Kogaku K.K. Laser processing apparatus
EP0288233A2 (en) * 1987-04-20 1988-10-26 Applied Materials, Inc. System and method for detecting the center of an integrated circuit wafer
EP0313466A2 (en) * 1987-10-20 1989-04-26 Fujitsu Limited Wafer positioning apparatus
US4836733A (en) * 1986-04-28 1989-06-06 Varian Associates, Inc. Wafer transfer system
US4880348A (en) * 1987-05-15 1989-11-14 Roboptek, Inc. Wafer centration device
JPH025049A (en) * 1988-06-24 1990-01-09 Fuji Photo Film Co Ltd Formation of air bleeding path for film unit
US4917556A (en) * 1986-04-28 1990-04-17 Varian Associates, Inc. Modular wafer transport and processing system
US4973217A (en) * 1987-02-09 1990-11-27 Svg Lithography Systems, Inc. Wafer handling system
US5054991A (en) * 1989-10-24 1991-10-08 Mecs Corporation Wafer positioning apparatus
US5102280A (en) * 1989-03-07 1992-04-07 Ade Corporation Robot prealigner

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2986121B2 (en) * 1991-03-26 1999-12-06 東京エレクトロン株式会社 Load lock apparatus and vacuum processing apparatus

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4457664A (en) * 1982-03-22 1984-07-03 Ade Corporation Wafer alignment station
US4457664B1 (en) * 1982-03-22 1993-08-24 Ade Corp
US4769523A (en) * 1985-03-08 1988-09-06 Nippon Kogaku K.K. Laser processing apparatus
EP0242066A2 (en) * 1986-04-17 1987-10-21 Varian Associates, Inc. Wafer positioning system
US4917556A (en) * 1986-04-28 1990-04-17 Varian Associates, Inc. Modular wafer transport and processing system
US4836733A (en) * 1986-04-28 1989-06-06 Varian Associates, Inc. Wafer transfer system
US4752898A (en) * 1987-01-28 1988-06-21 Tencor Instruments Edge finding in wafers
JPS63187644A (en) * 1987-01-30 1988-08-03 Nec Corp Production device for semiconductor
US4973217A (en) * 1987-02-09 1990-11-27 Svg Lithography Systems, Inc. Wafer handling system
EP0288233A2 (en) * 1987-04-20 1988-10-26 Applied Materials, Inc. System and method for detecting the center of an integrated circuit wafer
US4880348A (en) * 1987-05-15 1989-11-14 Roboptek, Inc. Wafer centration device
EP0313466A2 (en) * 1987-10-20 1989-04-26 Fujitsu Limited Wafer positioning apparatus
JPH025049A (en) * 1988-06-24 1990-01-09 Fuji Photo Film Co Ltd Formation of air bleeding path for film unit
US5102280A (en) * 1989-03-07 1992-04-07 Ade Corporation Robot prealigner
US5054991A (en) * 1989-10-24 1991-10-08 Mecs Corporation Wafer positioning apparatus

Cited By (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5435683A (en) * 1991-03-26 1995-07-25 Tokyo Electron Limited Load-lock unit and wafer transfer system
US6348967B1 (en) * 1992-07-08 2002-02-19 Active Impulse Systems, Inc. Method and device for measuring the thickness of opaque and transparent films
US5865588A (en) * 1992-10-06 1999-02-02 Balzers Aktiengesellschaft Chamber, at least for the transport of workpieces, a chamber combination, a vacuum treatment facility as well as a transport method
US5590994A (en) * 1992-10-06 1997-01-07 Balzers Aktiengesellschaft Chamber, at least for the transport of workpieces, a chamber combination, a vacuum treatment facility as well as a transport method
US5549435A (en) * 1992-10-06 1996-08-27 Balzers Aktiengesellschaft Chamber and a chamber combination for a vacuum facility and a method for transporting through at least one workpiece
US6096231A (en) * 1992-10-06 2000-08-01 Balzers Aktiengesellschaft Chamber, at least for the transport of workpieces, a chamber combination, a vacuum treatment facility as well as a transport method
US6364955B2 (en) * 1992-10-06 2002-04-02 Unaxis Balzers Aktiengesellschaft Chamber, at least for the transport of workpieces, a chamber combination, a vacuum treatment facility as well as a transport method
US5516732A (en) * 1992-12-04 1996-05-14 Sony Corporation Wafer processing machine vacuum front end method and apparatus
US5556248A (en) * 1993-01-14 1996-09-17 Applied Materials, Inc. Semiconductor wafer cassette transfer system
US5474410A (en) * 1993-03-14 1995-12-12 Tel-Varian Limited Multi-chamber system provided with carrier units
US5779425A (en) * 1993-03-22 1998-07-14 Gruetzediek; Hartmut Procedure and facility for handling and transport of wafers in ultra-clean rooms
US5718552A (en) * 1993-03-22 1998-02-17 Gruetzediek; Hartmut Procedure and facility for handling and transport of wafers in ultra-clean rooms
US5466117A (en) * 1993-06-10 1995-11-14 Xilinx, Inc. Device and method for programming multiple arrays of semiconductor devices
US5691907A (en) * 1993-06-10 1997-11-25 Xilinx Inc. Device for programming multiple arrays of semiconductor devices
US5570987A (en) * 1993-12-14 1996-11-05 W. L. Gore & Associates, Inc. Semiconductor wafer transport container
US5586585A (en) * 1995-02-27 1996-12-24 Asyst Technologies, Inc. Direct loadlock interface
WO1996026874A1 (en) * 1995-02-27 1996-09-06 Asyst Technologies, Inc. Standard mechanical interface integrated vacuum loadlock chamber
US6120601A (en) * 1995-06-07 2000-09-19 Varian Semiconductor Equipment Associates, Inc. Wafer orientation inspection system
US7347656B2 (en) * 1995-07-19 2008-03-25 Hitachi, Ltd. Vacuum processing apparatus and semiconductor manufacturing line using the same
US20080138180A1 (en) * 1995-07-19 2008-06-12 Minoru Soraoka Vacuum processing apparatus and semiconductor manufacturing line using the same
US20090220322A1 (en) * 1995-07-19 2009-09-03 Minoru Soraoka Vacuum Processing Apparatus And Semiconductor Manufacturing Line Using The Same
US20050175435A1 (en) * 1995-07-19 2005-08-11 Minoru Soraoka Vacuum processing apparatus and semiconductor manufacturing line using the same
US6705828B2 (en) * 1995-07-19 2004-03-16 Hitachi, Ltd. Vacuum processing apparatus and semiconductor manufacturing line using the same
US5700046A (en) * 1995-09-13 1997-12-23 Silicon Valley Group, Inc. Wafer gripper
US6357984B1 (en) * 1997-07-03 2002-03-19 Asm International N.V. Storage assembly for wafers
US6063244A (en) * 1998-05-21 2000-05-16 International Business Machines Corporation Dual chamber ion beam sputter deposition system
US6075334A (en) * 1999-03-15 2000-06-13 Berkeley Process Control, Inc Automatic calibration system for wafer transfer robot
US6395094B1 (en) * 1999-04-15 2002-05-28 Tokyo Electron Limited Process system with transfer unit for object to be processed
US6275742B1 (en) 1999-04-16 2001-08-14 Berkeley Process Control, Inc. Wafer aligner system
US6229611B1 (en) * 1999-09-20 2001-05-08 United Microelectronics Corp. Method of detecting a transparent quartz wafer in a semiconductor equipment
US6860965B1 (en) * 2000-06-23 2005-03-01 Novellus Systems, Inc. High throughput architecture for semiconductor processing
US7039501B2 (en) 2001-07-12 2006-05-02 Applied Materials, Inc. Method for determining a position of a robot
US6556887B2 (en) 2001-07-12 2003-04-29 Applied Materials, Inc. Method for determining a position of a robot
US20040199291A1 (en) * 2001-07-12 2004-10-07 Applied Materials, Inc. Method for determining a position of a robot
US20090053016A1 (en) * 2003-11-10 2009-02-26 Van Der Meulen Peter Mid-entry load lock for semiconductor handling system
US8672605B2 (en) 2003-11-10 2014-03-18 Brooks Automation, Inc. Semiconductor wafer handling and transport
US7988399B2 (en) 2003-11-10 2011-08-02 Brooks Automation, Inc. Mid-entry load lock for semiconductor handling system
US8500388B2 (en) 2003-11-10 2013-08-06 Brooks Automation, Inc. Semiconductor wafer handling and transport
US20050208842A1 (en) * 2004-03-16 2005-09-22 Po-Ching Lin [positioning apparatus and positioning method using the same]
US7446872B2 (en) * 2004-03-16 2008-11-04 Powerchip Semiconductor Corp. Positioning apparatus and positioning method using the same
US20060045668A1 (en) * 2004-07-19 2006-03-02 Grabowski Al W System for handling of wafers within a process tool
US20080101912A1 (en) * 2006-10-26 2008-05-01 Martin Todd W Deposition analysis for robot motion correction
WO2012109577A3 (en) * 2011-02-10 2012-11-15 Hysitron, Inc. Nanomechanical testing system
US8770036B2 (en) 2011-02-10 2014-07-08 Hysitron, Inc. Nanomechanical testing system
US8939041B2 (en) 2011-02-10 2015-01-27 Hysitron, Inc. Nanomechanical testing system
US8959980B2 (en) 2011-02-10 2015-02-24 Hysitron, Inc. Nanomechanical testing system
US8919210B2 (en) * 2012-11-27 2014-12-30 Life Technologies Corporation Load cell lockouts and related fluid dispensing systems
US9719845B2 (en) 2012-11-27 2017-08-01 Life Technologies Corporation Load cell overload protection by a relieving mechanism for fluid dispensing systems

Also Published As

Publication number Publication date Type
US5435683A (en) 1995-07-25 grant
JP2986121B2 (en) 1999-12-06 grant
EP0506045A2 (en) 1992-09-30 application
DE69206295T2 (en) 1996-05-02 grant
EP0506045B1 (en) 1995-11-29 grant
DE69206295D1 (en) 1996-01-11 grant
JPH04298061A (en) 1992-10-21 application
KR0165556B1 (en) 1999-02-01 grant
EP0506045A3 (en) 1992-11-25 application

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