US4217562A - Equalizer networks providing a bump shaped response - Google Patents

Equalizer networks providing a bump shaped response Download PDF

Info

Publication number
US4217562A
US4217562A US05/937,527 US93752778A US4217562A US 4217562 A US4217562 A US 4217562A US 93752778 A US93752778 A US 93752778A US 4217562 A US4217562 A US 4217562A
Authority
US
United States
Prior art keywords
operational amplifier
junction point
input terminal
output terminal
connected via
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US05/937,527
Other languages
English (en)
Inventor
John M. Rollett
Alan J. Greaves
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Post Office
Original Assignee
Post Office
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Post Office filed Critical Post Office
Application granted granted Critical
Publication of US4217562A publication Critical patent/US4217562A/en
Assigned to BRITISH TELECOMMUNICATIONS reassignment BRITISH TELECOMMUNICATIONS THE BRITISH TELECOMMUNICATIONS ACT 1981 (APPOINTED DAY) ORDER 1981 (SEE RECORD FOR DETAILS) Assignors: POST OFFICE
Assigned to BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY reassignment BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY THE BRITISH TELECOMMUNICATION ACT 1984. (APPOINTED DAY (NO.2) ORDER 1984. Assignors: BRITISH TELECOMMUNICATIONS
Assigned to BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY reassignment BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY THE BRITISH TELECOMMUNICATIONS ACT 1984. (1984 CHAPTER 12) Assignors: BRITISH TELECOMMUNICATIONS
Assigned to BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY reassignment BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY THE TELECOMMUNICATIONS ACT 1984 (NOMINATED COMPANY) ORDER 1984 Assignors: BRITISH TELECOMMUNICATIONS
Assigned to BRITISH TELECOMMUNICATIONS reassignment BRITISH TELECOMMUNICATIONS THE BRITISH TELECOMMUNICATIONS ACT 1981 (APPOINTED DAY) ORDER 1981 (SEE RECORD FOR DETAILS) Assignors: POST OFFICE
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/04—Control of transmission; Equalising
    • H04B3/14—Control of transmission; Equalising characterised by the equalising network used
    • H04B3/143—Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers
    • H04B3/145—Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers variable equalisers

Definitions

  • This invention relates to equalizer networks.
  • amplitude equalizers In telecommunications systems it is often necessary to reduce the amplitude distortion of a transmission channel, so that the loss over the bandwidth of the channel is substantially constant, i.e. within prescribed variation limits.
  • Networks which can be cascaded with a transmission channel to make the loss more or less constant are termed amplitude equalizers.
  • Such equalizers have, in the past, been generally constructed with relatively bulky components such as coils and capacitors. More recently, ways have been sought to eliminate coils from electronic circuits, particularly in low frequency applications (say below 10 kHz) where they tend to be disproportionately large, heavy and expensive.
  • circuits containing only amplifiers, resistors and capacitors since such circuits can be small, light and can be realised in microelectronic form and can utilise thin film or thick film components.
  • Equalizers constructed according to the present invention may be used for:
  • audio equalization for sound recording, reproduction or measurement e.g. in the form of "graphic equalizers" which would require a bank of similar equalizers tuned to adjacent frequency bands; or
  • Amplitude equalizer networks when cascaded with a transmission channel also affect the phase response characteristic or its derivative the group delay characteristic of the transmission channel.
  • the group delay characteristic is not important and any arbitrary characteristic is acceptable. However, for other purposes, notably for data transmission it is important that the group delay characteristic lies within a fairly narrow band.
  • an active equalizer network including first and second differential input operational amplifiers, and input terminal, and output terminal, a reference terminal, a first, a second, a third and a fourth junction point;
  • said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input of the second operational amplifier;
  • said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier;
  • said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal, and connected to the non-inverting input terminal of the first operational amplifier;
  • said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input of the first operational amplifier;
  • said output terminal being connected to the output terminal of the first operational amplifier
  • the inverting input terminal of the first operational amplifier being connected to the second junction point and the inverting input terminal of the second operational amplifier being connected to the third junction point.
  • an active equalizer network including first and second differential input operational amplifiers, and input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point;
  • said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-invertin input of the second operational amplifier;
  • said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier;
  • said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal; and connected to the non-inverting input terminal of the first operational amplifier;
  • said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input terminal of the first operational amplifier;
  • said output terminal being connected to the output terminal of the first operational amplifier
  • the inverting input terminal of the first operational amplifier being connected to the second junction point and connected to the inverting input terminal of the second operational amplifier.
  • an active equalizer network including first and second differential input operational amplifiers, an input terminal, an output terminal, a reference terminal, a first, a second, a third and a fourth junction point;
  • said first junction point being connected via a first resistance element to the input terminal, and connected via a second resistance element to the output terminal of the first operational amplifier, and connected to the non-inverting input of the second operational amplifier;
  • said second junction point being connected via a third resistance element to the output terminal of the first operational amplifier and connected via a first capacitance element to the output terminal of the second operational amplifier;
  • said third junction point being connected via a fourth resistance element to the output terminal of the second operational amplifier, and connected via a second capacitance element to the input terminal; and connected to the non-inverting input terminal of the first operational amplifier;
  • said fourth junction point being connected via a fifth resistance element to the output terminal of the first operational amplifier, and connected via a sixth resistance element to the reference terminal, and connected to the non-inverting input terminal of the first operational amplifier;
  • said output terminal being connected to the output terminal of the first operational amplifier
  • the inverting input terminal of the first operational amplifier being connected to the first junction point and to the non-inverting input terminal of the second operational amplifier, and the inverting input terminal of the second operational amplifier being connected to the second junction point.
  • the present invention in the three aspects described above provides an active equalizer network which may have an amplitude characteristic with a ⁇ bump ⁇ at the resonance frequency of the circuit.
  • An additional resistance element may be connected between said fourth junction point and the non-inverting input terminal of the first operational amplifier.
  • This additional resistance element allows the bandwidth of the ⁇ bump ⁇ in the amplitude characteristic of the network to be varied by varying the value of this resistance element without thereby varying the ⁇ height ⁇ of the ⁇ bump ⁇ or the resonance frequency of the network.
  • An eighth resistance element may be connected between the fourth junction point and the input terminal.
  • This additional resistance element allows the values of the circuit components to be chosen to give an amplitude characteristic with a ⁇ dip ⁇ or ⁇ valley ⁇ at the resonance frequency.
  • the eighth and fifth resistance elements may comprise a single potentiometer having a variable tapping point, where the fourth junction point is connected to said tapping point.
  • the fifth and eighth resistance elements may be connected to said fourth junction point via a ninth resistance element.
  • This additional resistance allows the amplitude and group delay characteristics of the network to be varied independently and linearly by varying the value of resistance elements in the network.
  • FIG. 1 is a circuit diagram illustrating a basic circuit and possible variations in accordance with the present invention
  • FIG. 2 is a graph showing the relationship between signal amplitude plotted on the ordinate and shown as gain on the lefthand side and angular frequency plotted on the abscissa for the circuit of FIG. 1.
  • FIG. 3 is a circuit diagram illustrating a modification of the basic circuit which allows a more independent selection of circuit parameters
  • FIG. 4 is a circuit diagram illustrating a modification of the basic circuit which allows the general shape of the amplitude characteristic of the basic circuit to be varied;
  • FIGS. 5 and 6 are diagrams of a part of the circuit of FIG. 4 illustrating further modifications
  • FIG. 7 is a circuit diagram showing how linear amplitude adjustment may be achieved.
  • FIG. 8 is a circuit diagram of a network which allows amplitude and group delay to be varied in steps.
  • a basic form of a circuit is shown and essentially it comprises two high-gain differential-input operational amplifiers 1 and 2 as active elements, two capacitors, and several resistors; the circuit having frequency response characteristics (centre frequency, amplitude, Q-factor) which can be chosen to give an amplitude ⁇ bump ⁇ of a required shape at the resonance frequency of the circuit.
  • the circuit has an input terminal V in , an Earth reference terminal V E and an output terminal V out .
  • Four junction points of the circuit will be identified for ease of description and designated respectively as A, B, C and D.
  • the output terminal of the operational amplifier 1 is connected directly to the circuit output terminal V out and is connected via series resistances R 2 and R 1 to the circuit input terminal V in .
  • the junction between the resistors R 1 and R 2 , the junction point A, is connected to the non-inverting input terminal of the operational amplifier 2.
  • the output terminal of the operational amplifier 1 is further connected via a resistor R 3 to the junction point B, which junction point is connected to the output terminal of the operational amplifier 2 via a capacitor C 4 .
  • the output terminal of the operational amplifier 2 is further connected via a resistor R 5 to the junction point C, and the junction point C is connected to the non-inverting input terminal of the operational amplifier 1.
  • the output terminal of the operational amplifier 1 is connected to the Earth terminal V E by series resistors R 7 and R 6 .
  • the junction point D between the resistors R 6 and R 7 is connected to the non-inverting input terminal of the operational amplifier 1.
  • a capacitor C 8 is connected between the non-inverting input terminal of the operational amplifier 1 and the circuit input terminal V in .
  • the remaining part of the circuit comprises the circuit connections to the inverting input terminals of the operational amplifiers 1 and 2.
  • the number of theoretically possible circuit variations is severly reduced in practice by problems of d.c. stability. That is to say the majority of these circuits produce square wave oscillations or latch up.
  • FIG. 1 there are three ways of connecting the inverting input terminals of the operational amplifiers to the rest of the circuit which lead to d.c. stable circuits. These three ways have been condensed into the single circuit diagram of FIG. 1 by the alternative connections a, b and c shown by dotted lines. In practice, only one of these three possible connections would be provided.
  • the inverting input terminal of the operational amplifier 1 is connected to the junction point B and the inverting input terminal of the operational amplifier 2 is connected to the junction point C. It has been discovered that this circuit, while achieving d.c. stability, is liable to oscillate at high frequencies particularly when cascaded, and its usefulness is therefore limited.
  • the inverting input terminal of the operational amplifier 1 is connected to the non-inverting input terminal of the operational amplifier 2 and the inverting input terminal of the operational amplifier 2 is connected to the junction point B.
  • This circuit is the most stable of the three, and is substantially free from oscillations at high frequencies even when a number of sections are cascaded.
  • circuit analysis yields the following expression for the transfer function of the equalizer circuit of FIG. 1, and the expression holds whichever of the three alternative connections a, b or c is employed. ##EQU1##
  • G 1 represents the conductance of the resistor R 1 , etc;
  • c 4 represents the capacitance of the capacitor C 4 etc
  • T(s) of second-order biquadratic amplitude equalizer is given generally by: ##EQU2##
  • ⁇ o represents the resonance angular frequency
  • h represents the amplitude at the resonance frequency
  • FIG. 2 shows the relationship between signal amplitude (loss in dB) and angular frequency.
  • the bandwidth is defined as the difference in frequency at half the maximum loss produced at the resonant frequency of the equalizer network, and equals ⁇ o b ⁇
  • the equations 3-5 may be re-arranged to give formulae for the components of the circuit in terms of the parameters ⁇ o , b, h.
  • FIG. 3 A modification of the basic circuit of FIG. 1 will now be described with reference to FIG. 3.
  • the operation of the circuit of FIG. 1 is not affected by the addition of a resistor connected between the output terminal V out and the Earth terminal V E .
  • a resistor connected in this manner forms a delta network with the resistors R 6 and R 7 , and this network can be replaced by a star network as is shown in FIG. 3.
  • the circuit shown in FIG. 3 is the same as the basic circuit shown in FIG. 1 apart from the replacement of resistors R 6 and R 7 by new resistors R b and R a and the addition of a further resistor R c between the junction point D and the non-inverting input terminal of the operational amplifier 1.
  • the resistances of the resistors R a , R b and R c are related to the resistances of the resistors R 6 and R 7 of FIG. 1 by the following equations:
  • the determining eqations for the amplitude/frequency characteristic of the circuit of FIG. 3 may be taken as being equations (3), (18) and (19).
  • equation (3) shows that the resonance frequency ⁇ o can be chosen by adjusting the values of any of the components R 1 , R 2 , R 3 , R 5 , C 4 and C 8 .
  • resistors In low frequency circuits it is usually preferable to adjust resistors rather than capacitors; it will therefore be assumed that the values of the capacitors C 4 and C 8 remain fixed.
  • ⁇ o may be chosen by suitably choosing the values of either or both the resistors R 3 and R 5 .
  • Equation (18) shows that the ⁇ bump ⁇ height
  • the reciprocal Q-factor b is dependent on the values of the resistors R 3 , R 5 , R a and R b and so is varied as these values are varied in the selection of
  • the circuit of FIG. 3 may be slightly modified to give a practical adjustable circuit so that the trimming operations described above may be easily carried out.
  • the modifications comprise replacing the resistors R 3 (or R 5 ) and R c by variable resistors, and replacing the series resistors R a and R b by a potentiometer connected at its tapping point to the resistor R c .
  • the sequence of adjustments to the circuit are typically as follows:
  • the resonance frequency is set to a frequency of minimum loss
  • the equalizer characteristic In practice the finite bandwidths of the amplifiers 1 and 2 cause the equalizer characteristic to be slightly asymmetric; the asymmetry is greater the more the resonance frequency approaches the gain-bandwidth products of the amplifiers. Usually this distortion of the characteristic is too slight to be of consequence, but it can if necessary be connected in any of the following ways ie. connection of a large-value resistance between the juntion between the resistors R 1 and R 2 , and earth; or connection of a small-valued capacitance across any one of resistors R 1 , R 3 or R 5 .
  • the asymmetry may be over-compensated, ie. made greater in the opposite sense, by using a smaller resistance or larger capacitances. It may be made more pronounced by connection of a capacitor from the junction of the resistors R 1 and R 2 to earth, or by connecting a capacitor across resistor R 2 .
  • the impedances of the compensating (or distorting) components just described would generally be an order of magnitude greater than the values of the components forming the remainder of the equalizer circuit.
  • the resonance frequencies of a set of equalizers will be set through the channel-band, and the ⁇ bump ⁇ heights and then the Q-factor adjusted to give a roughly equal ripple loss characteristic.
  • the circuit shown comprises the equalizer circuit of FIG. 1 with an additional resistor R 8 connected between the junction point D and the circuit input terminal V in .
  • the circuit of FIG. 4 is a combination of the equalizer circuit of FIG. 1 which gives a ⁇ bump ⁇ type amplitude characteristic and an equalizer circuit described in U.S. Pat. No. 4,012,704 which gives a ⁇ dip ⁇ type characteristic.
  • the circuit of FIG. 4 allows the selection of a ⁇ dip ⁇ or ⁇ bump ⁇ type amplitude characteristic of desired shape and centre frequency.
  • FIG. 5 part of the circuit of FIG. 4 is shown with the modification that an additional resistor R 9 is connected between the junction point D and the non-inverting input terminal of the operational amplifier.
  • the determining equation for the modified circuit of FIGS. 4 and 5 are therefore (21), (22) and (34) with (36).
  • the resonance frequency ⁇ o can be trimmed by adjusting any of the components R 1 , R 3 , R 5 , C 4 , C 8 , R 2 .
  • resistors rather than capacitors
  • the ratio (r 2 /r 1 ) occurs in three of the equations, it is convenient to assume that the values of the resistors R 1 and R 2 are fixed, and substantially equal.
  • the resonance frequency ⁇ o is best adjusted by adjusting the resistor R 3 or the resistor R 5 .
  • equation (22) shows that a range of values of
  • the trimming procedure is therefore as follows:
  • the initial Q-factor can be designed to lie below the required Q-factor for the worst-case spaced of initial element values.
  • the Q-factor can be reduced without altering ⁇ o , by increasing the values of both the resistors R 2 and R 3 in the same proportion.
  • the finite bandwidths of the amplifiers cause the equalizer characteristics to be slightly asymmetric; the asymmetry increases as the resonance frequency approaches the gain-bandwidth product of the amplifiers. This may be compensated as previously described.
  • the networks previously described can be used both for selecting an appropriate amplitude characteristics and for selecting an appropriate group delay characteristics.
  • the ⁇ bump ⁇ or ⁇ dip ⁇ amplitude equalizer circuit shown in FIG. 4 provides a group delay if T 0 at its resonance frequency ⁇ o , where T 0 is given by: ##EQU18##
  • T 0 can now be set by adjusting the resistor R 9 , without producing any effect on the value of h although, of course it will affect b--the reciprocal Q-factor.
  • the procedure for setting up the network to provide required values of amplitude and group delay at the resonance frequency is firstly to set h, by varying the value of resistance R 8 or R 7 (or both, as in FIG. 6), and then to set T 0 by varying the value of the resistor R 9 .
  • the network of FIG. 5 or its equivalent with variable controls, FIG. 6, therefore has many of the desired characteristics of an equalizer for independent control of amplitude and group delay.
  • Equation (39) shows that equal increments of the value of the resistor R 9 lead to equal increments of group delay T 0 --that is the law is linear.
  • the law relating amplitude h with variations of the value of resistors R 7 and R 8 (or both, as in FIG. 6) is, however, complex (in fact bi-quadratic). However, if the range of amplitude variation required is moderate, for example ⁇ 3dB, then a slight modification of the circuit leads to a law which can be made approximately linear.
  • the amplitude at resonance may be varied continuously by using a potentiometer, as indicated in FIGS. 6 and 7.
  • a switch can be used with a set of fixed resistors, together with a double-pole, double-throw, change-over switch to select either gain or loss.
  • FIG. 8 A suitable arrangement is shown in FIG. 8, where the resistors R 7 and R 8 are provided by a potentiometer having fixed selectable tapping points at intervals, the tapping points providing the selectable junctions between the resistors R 7 and R 8 .
  • a double-pole, double-throw, change-over switch S having terminals t 1 , t 2 , t 3 , t 4 is connected into the circuit so that the contact terminals t 1 and t 2 are connected either respectively to terminals t 3 and t 4 or respectively to terminals t 4 and t 3 .
  • the terminal t 1 is connected to the input terminal V in
  • the terminal t 2 is connected to the output terminal V out
  • the terminals t 3 and t 4 are connected to respective ends of the potentiometers.
  • the bandwidths of the amplifier are much greater than the frequency range over which the equalizer is required to provide a given characteristic. If the resonance frequency is more than a small fraction of the bandwidth, say about 1%, then certain discrepancies between the practical and ideal characteristics may be observed, and it may be desirable to correct them. Ways of correcting the practical characteristics are now described.
  • the ⁇ wiggle ⁇ is due to the non-coincidence of the pole and zero frequencies. It can be shown that the pole frequency is usually lower than the zero frequency, and the two frequencies can be made to coincide by any of the following means ie. connection of a suitable large-valued resistance between the junction point A, and earth; or connection of a suitable small-valued capacitance across any of the resistors R 1 , R 3 , or R 5 .
  • the impedances of such components are generally required to be an order of magnitude greater than the other components in the basic equalizer circuit.
  • the characteristic may still not be flat, but exhibit a slight bump at the resonance frequency, again due to the finite bandwidths of the amplifiers.
  • the characteristic can be corrected to exhibit a flat response by connecting a large valued resistor in parallel with either of the capacitors C 4 or C 8 , or a small valued resistor in series with either of the capacitors C 4 or C 8 .

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Networks Using Active Elements (AREA)
US05/937,527 1977-09-07 1978-08-28 Equalizer networks providing a bump shaped response Expired - Lifetime US4217562A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB37358/77 1977-09-07
GB3735877 1977-09-07

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US8500379A Continuation-In-Part 1979-10-15 1979-10-15

Publications (1)

Publication Number Publication Date
US4217562A true US4217562A (en) 1980-08-12

Family

ID=10395859

Family Applications (1)

Application Number Title Priority Date Filing Date
US05/937,527 Expired - Lifetime US4217562A (en) 1977-09-07 1978-08-28 Equalizer networks providing a bump shaped response

Country Status (2)

Country Link
US (1) US4217562A (enrdf_load_stackoverflow)
DE (1) DE2839020A1 (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506237A (en) * 1982-11-30 1985-03-19 Rockwell International Corporation Adjustable slope equalizer
US6222694B1 (en) * 1993-05-31 2001-04-24 Canon Kabushiki Kaisha Reproduction apparatus having reduced decoding error rate
US20050232382A1 (en) * 2002-07-04 2005-10-20 Koninklijke Philips Electroics Tuning arrangement

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3736517A (en) * 1972-02-02 1973-05-29 Bell Canada Northern Electric Active delay-equalizer network
US4012704A (en) * 1975-03-24 1977-03-15 The Post Office Active amplitude equalizers

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3736517A (en) * 1972-02-02 1973-05-29 Bell Canada Northern Electric Active delay-equalizer network
US4012704A (en) * 1975-03-24 1977-03-15 The Post Office Active amplitude equalizers

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506237A (en) * 1982-11-30 1985-03-19 Rockwell International Corporation Adjustable slope equalizer
US6222694B1 (en) * 1993-05-31 2001-04-24 Canon Kabushiki Kaisha Reproduction apparatus having reduced decoding error rate
US20050232382A1 (en) * 2002-07-04 2005-10-20 Koninklijke Philips Electroics Tuning arrangement

Also Published As

Publication number Publication date
DE2839020C2 (enrdf_load_stackoverflow) 1987-10-15
DE2839020A1 (de) 1979-03-22

Similar Documents

Publication Publication Date Title
USRE29529E (en) Equalization circuit
US3753140A (en) Equalizing network
US5235223A (en) Constant Q peaking filter utilizing synthetic inductor and simulated capacitor
US6268766B1 (en) Band pass filter from two notch filters
US4012704A (en) Active amplitude equalizers
US4280102A (en) Frequency response characteristic adjustable circuit
JPS5926126B2 (ja) オンシツチヨウセイソウチ
US4217562A (en) Equalizer networks providing a bump shaped response
US4229716A (en) Amplitude equalizer circuit
US4403201A (en) Bandpass filter circuit
US5282252A (en) Audio equalizer providing reciprocal equalization plus infinite-depth notch
US4553103A (en) RC-Active filters
US4764938A (en) Circuit and method for correcting distortion in a digital audio system
US3993959A (en) Second-order canonical active filter
US4275358A (en) Frequency sensitive amplitude equalization circuit
US3829626A (en) Telephone line equalizer
US3983504A (en) Active filter
US3955150A (en) Active-R filter
US4057766A (en) Active networks having biquadratic transfer functions
JP3092968B2 (ja) 電子的に制御可能な伝達特性を持つ回路装置
US4994693A (en) Second order active filters
US4063187A (en) Equalizer circuit
US3509482A (en) Active filter networks
US4524337A (en) Variable amplitude delay equalizer
US4188593A (en) RC Oscillator

Legal Events

Date Code Title Description
AS Assignment

Owner name: BRITISH TELECOMMUNICATIONS

Free format text: THE BRITISH TELECOMMUNICATIONS ACT 1981 (APPOINTED DAY) ORDER 1981;ASSIGNOR:POST OFFICE;REEL/FRAME:004976/0307

Effective date: 19871028

Owner name: BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY

Free format text: THE TELECOMMUNICATIONS ACT 1984 (NOMINATED COMPANY) ORDER 1984;ASSIGNOR:BRITISH TELECOMMUNICATIONS;REEL/FRAME:004976/0276

Effective date: 19871028

Owner name: BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY

Free format text: THE BRITISH TELECOMMUNICATIONS ACT 1984. (1984 CHAPTER 12);ASSIGNOR:BRITISH TELECOMMUNICATIONS;REEL/FRAME:004976/0291

Effective date: 19871028

Owner name: BRITISH TELECOMMUNICATIONS

Free format text: THE BRITISH TELECOMMUNICATIONS ACT 1981 (APPOINTED DAY) ORDER 1981;ASSIGNOR:POST OFFICE;REEL/FRAME:004976/0248

Effective date: 19871028

Owner name: BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY

Free format text: THE BRITISH TELECOMMUNICATION ACT 1984. (APPOINTED DAY (NO.2) ORDER 1984.;ASSIGNOR:BRITISH TELECOMMUNICATIONS;REEL/FRAME:004976/0259

Effective date: 19871028

STCF Information on status: patent grant

Free format text: PATENTED FILE - (OLD CASE ADDED FOR FILE TRACKING PURPOSES)