US3903775A - Electronic musical instrument - Google Patents
Electronic musical instrument Download PDFInfo
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- US3903775A US3903775A US448583A US44858374A US3903775A US 3903775 A US3903775 A US 3903775A US 448583 A US448583 A US 448583A US 44858374 A US44858374 A US 44858374A US 3903775 A US3903775 A US 3903775A
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- tone
- signal
- waveshape
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- tone color
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
- G10H7/00—Instruments in which the tones are synthesised from a data store, e.g. computer organs
- G10H7/08—Instruments in which the tones are synthesised from a data store, e.g. computer organs by calculating functions or polynomial approximations to evaluate amplitudes at successive sample points of a tone waveform
- G10H7/12—Instruments in which the tones are synthesised from a data store, e.g. computer organs by calculating functions or polynomial approximations to evaluate amplitudes at successive sample points of a tone waveform by means of a recursive algorithm using one or more sets of parameters stored in a memory and the calculated amplitudes of one or more preceding sample points
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- This invention relates to an electronic musical instrument and, more particularly, to an electronic musical instrument in which a basic musical tone waveshape is formed in accordance with a plurality of tone color waveshapes and positions of a plurality of tone levers and written in an analog memory for subsequent repetitive reading therefrom at a period selected by depression of a key to produce an electrical musical tone waveshape output.
- tone source signals are produced by a plurality of oscillators or frequency dividers and these tone source signals are applied to a tone color circuit via a key switch to produce a desired musical tone waveshape.
- the prior art electronic musical instruments therefore require a very complicated and large circuit construction.
- FIG. 1 is a block diagram showing one preferred embodiment of the electronic musical instrument according to the invention.
- FIG. 2 is a circuit diagram showing an example of an analog accumulator
- FIG. 3a is a block diagram showing an example of a musical tone waveshape writing logic circuit
- FIG. 3b is a diagram showing the tone color memory 7 in FIG. 3a more in detail
- FIG. 30 is a diagram showing the tone lever circuit in FIG. 3a more in detail
- FIG. 4 is a circuit diagram showing an example of an attack-decay factor multiplier
- FIG. 5 is a timing chart showing relations between a tone color memory address counter, a tone lever counter and an analog memory address counter in writing a musical tone waveshape
- FIG. 6 is a circuit diagram showing an example of a waveshape writing gate
- FIG. 7 is a diagram showing shifting of an amplitude voltage level of each bit of the musical tone waveshape to be written in an analog waveshape memory
- FIG. 8 is a block diagram showing an example of an attack-decay factor generator 5;
- FIG. 9 is a block diagram showing a keyboard circuit
- FIG. 10 is a block diagram showing a logic circuit 2;
- FIG. 11 is a circuit diagram showing a sample hold circuit 14.
- a keyboard circuit 1 is adapted to pass a drive signal provided by a logic circuit 2 to a contact of each key of a keyboard. If a selected key is depressed, a timing pulse corresponding to the key is supplied to the logic circuit 2 as key identification information.
- the logic circuit 2 provides, upon receipt of this key indentification information, an address signal of the depressed key to a frequency memory 3.
- the address signal denotes which note of which octave the depressed key represents.
- the large thick arrows in FIG. 1, as well as in FIGS. 30, 8 and I0 indicate parallel transmission of muIti-bit signals, while the small arrows indicate transmission of single-bit signals.
- the frequency memory is a read-only memory in which are stored numerical values corresponding to frequencies of the notes of the respective keys. These numerical values are represented, for purposes of explanation, as F numbers.”
- the claim address signal is used not for directly read- F. 139091 0.6676 10 E 3 x5 mg a waveshape analog memory 10 but for comparison o it l244-5l and selection of an analog memory address signal 5613 which is a value corresponding to data at each sample 1 10x13 0.520s C l046.5() 0.5000 point of a musical tone waveshape stored 1n the waveshape analog memory 10.
- a claim address comparison and selection circuit 6 is adapted to perform such com- In the frequency memory 3, an F number correparison d Selection spohdlhg to the address Signal pp from the logic it should be noted that each claim address signal is an Circuit 2 is Selected and Provided to a claim address address signal forarespective sample point of a desired generator 4.
- the SUCCeSSiVc Values Shown control signal causes a musical [one waveshape for each in Table 2 are repeatedly Produced as selection gate 11 to open.
- This musical tone waveshape Claim Bddl'CSS signal Whil he key correspon ing to selection gate 11 is an analog gate provided for selectthat note remains depressed.
- the qF value f0! 5116- ing a voltage level V concerning one sample point of cessive accumulated periods in Table 2 varies in the musical tone waveshape of the currently depressed accordance with a simple arithmetic progression. key from the analog waveshape memory 10.
- each note column in Table 2 has a sequence of color memory circuit 7 comprises a plurality of tone qF terms each of which differs from the preceding color memories each of which stores a particular tone term by the same F number. Therefore, the qF term color waveshape by storing amplitude samples thereof for any accumulated period can be determined from at respective sample points.
- qF F+ (period number l)F. from a logic circuit 8, the amplitude at the first sample Table 2 point of the first tone color memory is initially read out.
- the amplitude at the first sample point of the sec- Accumulmcd qF ond tone color memory is read out, and reading in a pcriuds like manner successively contmues.
- the amplitude at the secl.7826 2.0000 ond sample point of the first memory is read out, fol- Z i lowed by the amplitude at the second sample point of 5 51, 55 5 the second memory, and so on.
- the analog wave- 6 5.3478 6 shape memory 10 there is stored a musical tone waveshape which is produced by combining tone color waveshapes, each level of which is determined by a tone lever circuit 9, as will be described in detail later.
- the output of the musical tone selection gate 11, i.e. the musical tone waveshape signal of the depressed key 31 27.6303 31.0000 33 2852' 32000, is represented by the voltage Vi.
- This output is applled 33 29.4129 33.0000 to an attack-decay factor multiplier 12 and multiplied with attack and decay factors for producing a musical 36 32.0868 361.0000 tone waveshape signal.
- the attack and decay factors are formed by the attack-decay factor generator 5 as will be described in detail later with references to FIG. 8.
- the output of the attack-decay factors multiplier 12 y is a level of a single tone represented by the voltage Vi.
- a musical tone waveshape signal of a compound tone is produced by applying the above described musical tone waveshape signal multiplied with the attack and decay factors to an analog accumulator l3 and cumulatively adding voltage levels Vi for l2 notes (Not necessarily notes of one octave but any note will suffice.) 6 6213010
- analog accumulator 13 has completed this cumulative addition for the 12 notes, the voltage levels which have been cumulatively added together are applied to a sample holding circuit 14 in response to a signal from logic circuit 2 and are held in the holding circuit. Thereupon. analog accumulator 13 starts a new adding operation and holding circuit 14 continues to hold the previously added voltage levels until completion of the new adding operation and, upon such completion, receives and holds the new output of analog accumulator 13.
- FIG. 2 is a circuit diagram of one example of the ana log accumulator 13.
- reference character I designates a voltage-current converter, C a capacitor and S a reset switch respectively.
- the reset switch S may actually be composed of electronic components but in this figure it is shown simply as a mechanical switch.
- Reset switch S closes upon receipt of a reset signal from logic circuit 2 and thereby causes capacitor C to discharge.
- Reset switch S opens when no reset signal is applied thereto.
- reset switch 5 While reset switch 5 is open, capacitor C is successively charged with the outputs of multiplier 12, thereby effecting accumulation of the voltage levels of the i2 tones.
- a sample pulse is applied from logic circuit 2 to sample holding circuit 14.
- holding circuit 14 is actuated to cause a voltage level of capacitor C corresponding to the accumulation of the voltage levels of the 12 tones to be shifted to holding circuit 14 and held there until the next sample pulse is applied.
- a reset pulse is applied for an instant to accumulator 13 thereby causing switch S to close and capacitor C to discharge in preparation for the next accumulation.
- the compound tone musical tone waveshape signal thus sequentially provided from sample holding circuit 14 constitutes one sample point amplitude of the musical tone waveshape to be produced.
- FIGS. 3b and 3c show the tone color memory 7 and the tone lever circuit more in detail.
- Clock pulses generated by a master oscillator M are applied to an analog memory address counter 15.
- Carry pulses of the counter 15 are applied to a tone lever counter 16 and carry pulses of the counter 16 to a tone color memory address counter 17.
- the analog memory address counter 15 has a capacity of 6 bits and is adapted to sequentially output the analog memory address signal of 64 words at a high rate. As has previously been described, the analog memory address signal is compared with the claim address signal in the claim address comparison and selection circuit 6.
- the tone lever counter 16 outputs data of n 1 words (where n represents the number of the tone lever switches provided in tone lever circuit 9 for selecting a desired one or more of a plurality of tone colors of various musical instruments) at a rate which is l/64 that of the analog memory address counter 15.
- the outputs of the tone lever counter 16 corresponding to the n words are decoded by a decoder to drive the tone lever circuit 9.
- the output corresponding to the last word is applied to a timing control logic circuit 19 for causing it to produce a write signal WR to be described later.
- the tone color memory address counter 17 has a capacity of 6 bits and is adapted to output data of 64 words at a rate which is that of the tone lever counter 16. The output of this counter 17 is used as an address signal for reading data from the tone color memory circuit 7.
- the tone color memory circuit 7 comprises n memories M M,, corresponding in number to the number of tone lever switches in tone lever circuit 9.
- n memories :1 waveshape of the particular tone color is stored in analog representation at 64 sample points for one period.
- the output from the tone color memory address counter 17 is used to read out data at these 64 sample points.
- the decoded outputs corresponding to the n words are provided from the decoder 20 to the tone color memory circuit 7 to drive sequentially the n tone color memories M,M,,.
- the sample point read at this time is designated by the address signal from the tone color 'counter 17.
- the outputs from the decoder 20 also drive the tone lever circuit 9 thereby causing it to produce 2 bit digital signals representing the states of the respective tone lever switches 5 -8,, through diode matrix D,-D,,.
- the particular tone lever switch e.g. the third tone lever switch S which is driven corresponds to the particular tone color memory which is being read at the same instant (i.e. the tone color memory M
- the tone levers switches respectively have, for example, four states, i.e. 1, Va, A, and 0.
- the states of the respective tone lever switches are multiplied with the data of the corresponding tone colors in a tone lever state multiplier 21 and a resulting output is produced therefrom as a voltage level.
- the result of this multiplication is applied to a tone color accumulator 22. If, for example, the throw-in state of a tone lever switch is O, the result of the multiplication is O and, accordingly, no voltage level is output. States of the rest of the tone lever switches are successively multiplied with data of the corresponding tone color in the tone lever state multiplier 21 and the results of multiplication are accumulated in the tone color accumulator 22.
- This total sum is a voltage level representing one sample point of a musical tone waveshape composed of the n tone colors.
- the above described operation is conducted within a period of time during which the tone color memory address counter 17 outputs one word. During this period the tone lever counter 16 outputs n words and the analog memory address counter 15 outputs 64 X n words.
- tone color herein means a tone color of a musical instrument such as flute or strings.
- the tone lever state multiplier 21 and the tone color accumulator 22 may respectively be of a similar construction to that of the attack-decay factor multiplier 12 shown in FIG. 4 and the analog accumulator 13 shown in FIG. 2, as will now be described more in detail.
- Ri,-Ri,,, Rs -Rs and RE designate resistors, Tn-Tr transistors or field effect transistors and LSB-MSB, electronic switches (shown as mechanical switches for convenience of explanation).
- a voltage level Vi at a sample point in tone color memory circuit 7 is applied to this circuit, whereas digital signals representing states of the tone lever switches are applied from tone lever circuit 9 to the respective electronic switches LSB-MSB.
- the number of possible states of each tone lever switch S -S is four, and these states can be represented by two bits. Consequently, the FIG.
- the switches LSB and KSB respectively correspond to the two bits of each digital word supplied from tone lever circuit 9, and the switches close when the bit is l and open when the bit is 0.
- the tone lever state multiplier 2I therefore produces an output which represents the state of the tone lever switch, i.e. the input level Vi controlled according to the digital word.
- a waveshape write gate 23 is opened. Application of a waveshape write instruction W to this gate 23 will be described hereinbelow with reference to FIG. 6.
- FIG. 5 is a timing chart of the respective output data of the tone color memory address counter I7, the analog memory address counter and the tone lever counter 16.
- the tone color memory address counter 17 outputs one word
- the tone lever counter I6 outputs n 1 words.
- the tone lever counter 16 outputs l word
- the analog memory address counter 15 outputs 64 words.
- Time during which the tone lever counter 16 produces data for driving the first to the nth tone lever switches S -S is equal to time during which the tone color accumulator 22 carries out accumulation of one sample point ofa musical tone waveshape with respect to the respective tone colors.
- the (n l )th output data of the tone lever counter 16 causes the timing control logic circuit 19 to produce the write signal WR.
- the coincidence signal SA representing coincidence of the tone color memory address and the analog memory address is produced n 1 times in the address comparator 18 while one word of the tone color memory address is output.
- a coincidence signal SA effective for producing the waveshape write instruction W is the (n +l )th one.
- the analog memory address signal shown in FIG. 5 is for the analog memory address of 64 Words which is produced when the tone lever counter counts the (n +1 )th output data.
- the coincidence signal SA is produced when the analog memory address counter also counts the address 1. Then while the tone color memory address counter is counting the address 2, the coincidence signal SA is produced when the analog memory address counter also counts the address 2.
- the AND gate AND produces its output only when the address coincidence signal SA and the write signal WR are simultaneously applied to the AND gate AND.
- This output of the AND gate AND is the waveshape write instruction W which operates the waveshape write gate 23.
- FIG. 6 is one example of a circuit construction of the waveshape write gate 23.
- a MOS transistor M When the waveshape write instruction W is input, a MOS transistor M is actuated to cause the voltage level representing one sample point of the musical tone waveshape provided by the tone color accumulator 22 to be applied to the analog waveshape memory 10 as a new waveshape data signal NW. Since the output of an inverter INV is 0 at this time, a MOS transistor M is not actuated and, accordingly, a memory waveshape data signal MW fed back from the waveshape analog memory I0 is not passed through the waveshape write gate 23. Thus, the new waveshape data signal NW is selected in the waveshape write gate 23 and thereafter is stored in the analog waveshape memory IO. It will be apparent from the foregoing description that the waveshape data signal NW is representative of the musical tone waveshape at one sample point and takes into account the throw-in states of the tone lever switches.
- the tone color memory address counter 17 Upon completion of writing of the data for one sample point, the tone color memory address counter 17 proceeds to the next address and repeats the above described operation to cause data for the next sample point to be written in the waveshape memory I0.
- data for all of the 64 sample points are sequentially stored in the waveshape memory I0 thereby completing storage of one musical tone waveshape. If no waveshape write instruction W is input to the waveshape write gate 23, the output of the inverter INV is I so that the MOS transistor M is actuated. Accordingly, the memory waveshape data signal MW fed back from the analog waveshape memory 10 is applied to the analog waveshape memory I0 as the output of the waveshape write gate 23.
- the analog waveshape memory 10 consists of an analog shift register such as a CCD (charged coupled device) of the type described in Electronics, May II, 1970, pp. 1 12-1 18.
- the CCD has capacitors for 64 bits each being capable of storing the voltage level at one sample point. Accordingly, the CCD is capable of storing voltage levels of 64 sample points in all.
- Writing of new waveshape data NW and storing of former waveshape data MW in the waveshape memory 10 are made possible by shifting the voltage level stored in each bit by one by application of a master clock pulse produced from the master oscillator M. If the time at which the voltage level is shifted is represented as I, the state of the amplitude voltage level at each sample point stored in the respective bits from I to 1 is shown in FIG. 7.
- FIG. 7 shows the change of contents for the respective bits in the analog waveshape memory 10.
- the amplitude voltage level at one sample point of the musical tone waveshape input to the analog waveshape memory 10 is first stored in the first bit thereof, shifted 64 times thereafter and output from the 64th bit.
- the amplitude voltage level of one sample point of the musical tone waveshape output from the 64th bit is fed back to the analog waveshape memory as the memory waveshape data MW and stored in the first bit of the memory 10.
- the period of application of the new waveshape data NW is equal to the counting speed of the tone color memory address counter 17 whereas shifting speed by the master clock is much higher than the counting speed of the counter 17. Accordingly, musical tone waveshape data from the memory 10 are constantly fed back to the memory 10 during the interval of the new waveshape data NW fed to the memory 10. Further, data of one sample point of the same musical tone waveshape are repeatedly read from the analog waveshape memory N) at a relatively high rate. Accordingly, a musical tone waveshape of a desired note can be produced by adjusting the timing of selection of the data output from the analog waveshape memory 10. As has previously been described, this selection is designated by the claim address signal produced upon depression of the key.
- the musical tone waveshape in the analog waveshape memory 10 is selected at the musical tone waveshape selection gate 11 and thereafter is multiplied with the attack-decay factors in the attack-decay factor multiplier 12.
- An address signal representing an attack or decay envelope is applied from the logical circuit 2 to the attack-decay factor generator 5.
- This address signal consists of 6 bits, one bit of which is used for designating the attack envelope or the decay envelope and the rest of the bits are used to designate 32 sample points constituting the respective envelopes. These sample points start from depression of the key in the case of the attack envelope and start from release of the key in the case of the decay envelope.
- FIG. 8 is a block diagram showing one example of the attack-decay factor generator 5.
- the attack and decay factors are represented by voltage levels of the envelopes corresponding to the attack-decay address signal supplied from the logic circuit 2.
- the attack-decay factors are given by the following equation using voltage level (dB) as unit. Attack factor where 5 represents dividing number.
- Decay factor (in cascn E K) where K represents the number ofa sample point of the decay envelope at which the envelope bends as it be gins to level off from its initial steep descent.
- the attack decay factor generator 5 shown in FIG. 8 is adapted to perform the above described calculation to produce the attack and decay factors.
- the nth sample point n of the attack envelope is inverted to n by an inverted INV; and thereafter is added to the dividing number S of the attack envelope in an adder AD
- the output Sn of the adder AD is applied, on one hand, to an adder AD: where +l is added to Sn to produce an output Sn+l.
- the output Sn is applied, on the other hand, to a multiplier MU
- the output Sn+l of the adder AD is multiplied with the output Sn of the adder AD in the multiplier MU, to produce an output (Sn) (Sn+l
- This output of the multiplier MU is further multiplied with A/2 in a multiplier MU to produce
- the output An(dB) of the multiplier MU is input to a selection gate 86
- the values S and A/2 are values which are preset in the generator 5.
- n and K are compared with each other for determining which is a larger number.
- the output signal C of the comparator CM is 1 if n is smaller than K (n K) and 0 if n is equal or larger than K (n 5 K).
- a value D n is produced through a multiplier MU whereas a value D,K D (nK) is produced through an adder AD a multiplier MU. and an adder AD If a signal representing the value D,n input to the selection gate SG is designated as A and a signal representing the value D K D (n'K) as B, the signal A is selected at the selection gate S0 when the signal C from the comparator CM is 1, whereas the signal 8 is selected when the signal C is O.
- the values K, K, D D and D,K are preset in the generator 5.
- the output Dn(dB) thus obtained is applied to the selection gate SG Either one of values An or Dn is selected in ac cordance with an attack or decay selection address signal from the logic circuit 2 and the selected one is applied to the attack-decay factor multiplier 12 as the attack or decay factor.
- FIG. 4 shows one example of the attack-decay factor multiplier 12.
- Reference characters Ri Ri,,, RS,RS, and RE denote resistors and Tr ,Trn transistors or field effect transistors.
- Digital control switches LSB-MSB are switches respectively provided for the output bits of the attack-decay factor generator 5. There are provided, for example, 7 switches if the output An or Dn of the attack-decay factor generator 5 is a binary word of 7 bits. The signal An or Dn is applied to the digital control switches LSB-MSB. If, for example, the switch LSB corresponds to 1 dB, the switch LSB only is closed when the signal A or D, is l dB and an attenuation output of l dB is obtained.
- Values of resistance corresponding to the respective switches are selected so as to be suitable for obtaining the required attenuation. Moreover, if the signal A,, or Dn is 2 dB, only the switch next to the switch LSB is closed to produce an attenuation output of 2 dB.
- the subsequent digital control switches are actuated according to the level (dB) of the signal applied thereto whereby a desired amount of attenuation is obtained.
- multiplier 12 Since the multiplier 12 is of an attenuation type, the same result produced in the case of applying the signal An or Dn is also produced in the case where the signal An or Dn is applied to the multiplier 12. lt will therefore be appreciated that no change of sign is required for multiplier 12.
- a musical tone waveshape signal multiplied with the attack or decay factor is produced as the output of the multiplier 12.
- the foregoing operation is performed with respect to each of the l2 notes (not necessarily limited to one octave) in a time sharing manner in the system from the keyboard circuit 1 to the attack-decay factor multiplier 12.
- the voltage levels of the 12 notes are cumulatively added together in the analog accumulator 13 and a final output is produced from the sample holding circuit 14 as a signal representing the compound musical tone waveshape at one sample point combined with specific tone color and the attack and decay factors.
- FIG. is a block diagram showing a detailed circuit construction of logic circuit 2 shown in FIG. 1.
- a shift register 25 has stages corresponding in number to the total number of the keys and receives the output of the OR circuit Or (HO. 9). Accordingly, the input to shift register 25 represents the present state of the key and the output thereof represents the preceding state of the same key.
- An AND gate 26 produces a key new press signal which represents that a key has newly been depressed and an AND gate 27 produces a key new release signal which represents that a depressed key has been released.
- a claim register 28 has stages (channels) corresponding in number to the maximum number of tones to be reproduced simultaneously, e.g. l2, each stage storing a I bit when the tone of the corresponding channel is being reproduced.
- a claimed key address shift register 36 stores a key address signal which identifies the depressed key in accordance with the bits stored in the respective stages of register 28.
- the output of the analog memory address counter (FIG. 3a) is applied to a binary counter 32 where it is divided in frequency by 2 and further divided in frequency by 12 in a duodecimal channel counter 33. The frequency divided output thereafter is applied to a key address counter 34.
- the output of key address counter 34 is applied to a register 36 through a select gate 35.
- a release register 41 stores a 1 bit corresponding to the channel for the released key upon receipt of the output of a comparator 39 which compares the output of counter 34 with the output of register 36.
- a counter constituted by a gate 43, an adder 44 and a 12 stage shift register 45 counts attack clock pulses from an attack oscillator 48 and decay clock pulses from a decay oscillator 51. This counting is made on the basis of the contents of the respective stages (channels) of registers 28 and 41.
- a channel which has a maximum count in its register 45 is detected by an oldest signal generator consisting of comparators 52 and 55, a register 53 and a gate 54, and an oldest signal is produced from the oldest sig' nal generator and supplied to AND gate 29 at the corresponding channel time. This causes a new claim signal to be produced at a time corresponding to a channel in which decay has advanced further than any other channels.
- the counting during the attack time is stopped by the output of an attack finish logic element 49 and the contents of the respective stages of registers 28 and 41 are reset by the output of a NAND circuit 56 provided for detecting decay finish.
- the output (4 bits) of channel counter 33 is applied to a last number" decoder 57 which detects the last number 12 among 12 counted values. This output is applied to AND gates 58 and 59.
- the sample pulse from AND gate 59 is applied to the gate of an analog switching element which may be an FET. Since at this time analog accumulator 13 (FIG. 1) has finished accumulation of the amplitudes of each corresponding sample point for the 12 notes ranging from the first to the twelfth channels, a composite amplitude voltage of one sample point of the synthesized waveshapes of the l2 notes is applied from accumulator 13 to a buffer amplifier 141.
- This composite amplitude voltage is sampled through switching element 142 rendered conductive by the aforesaid sample pulse, and the sampled voltage is charged into a capacitor 143 and held therein. The voltage is then outputted from capacitor 143 through a buffer amplifier 144 of high input impedance. After the sample pulse has ceased to be applied, a reset pulse is applied from AND gate 58 (P10. 10) to analog accumulator 13 to reset the same.
- An electronic musical instrument for producing an electrical musical tone signal comprising:
- tone color memories each storing a waveshape of a particular tone color in analog representation at plural sample points;
- tone lever switches each being provided for determining the level of a corresponding tone color waveshape
- c. means for reading sequentially the waveshapes from the tone color memories at said levels for the respective tone color waveshapes;
- d. means for accumulating waveshape samples of the respective tone colors at each sample point
- a waveshape analog memory for storing the accumulated waveshape samples at each sample point of the analog memory and shifting cyclically the accumulated samples
- a claim address generator for generating claim addresses which change at a rate related to the frequency of a tone to be generated
- g. means for reading from said analog memory those samples among the stored accumulated samples that are designated by said claim addresses.
- tone color memory address counter capable of producing address signals which successively read the amplitudes stored at the respective addresses of all of the tone color memories commonly;
- a tone lever counter capable of drigin sequentially said tone color memories while the tone color memory address counter is addressing one address to the tone color memories; and wherein said means for reading sequentially the waveshapes from the tone color memories further comprise:
- tone lever position signal generator which. upon receipt of an energizing signal, generates a digital signal corresponding to a position of each of the tone lever switches;
- a tone lever state multiplier for producing an analog output signal by multiplying the analog signals from the tone color memories successively with the tone lever position digital signals
- a tone color accumulator for accumulating said analog output signal for the same period of time during which the tone color memory is addressed thereby to produce the amplitude samples of a wavcshape at certain intervals.
- a. gate means connected to the output of said tone color accumulator to receive said accumulated sample signal at certain intervals at one input terminal thereof and to the output of said analog memory at another input terminal thereof;
- an analog memory address counter for producing address signals for said analog memory
- a comparator for comparing the tone color memory address signal with the analog memory address signal from the analog memory address counter and producing a coincidence signal when these signals coincide with each other;
- a timing control logic circuit for producing a write signal when the count of said tone lever counter is maximum
- an AND gate which provides a gate signal to said gate means when said coincidence signal and said write signal coincide with each other, said gate means passing the accumulated sample from said tone color accumulator to the input of said analog memory upon receipt of said gate signal and, in the absence of said gate signal, passing the output of said analog memory back to the input of said analog memory.
- a frequency information memory storing F numbers corresponding to frequencies of the notes of respective keys
- circuit means for producing an address signal designating a predetermined F number in said frequency information memory upon depression of a selected key
- said claim address generator receiving the F number designated in said frequency information memory and producing a claim address signal by successively accumulating the F number at regular intervals over a predetermined period;
- a comparator circuit for comparing the claim address signal with the analog memory address signal and producing upon coincidence of these signals, a coincidence signal
- a gate circuit connected to the output of said analog memory and adapted to gate out the output of said analog memory upon receipt of the coincidence signal from said comparator.
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Abstract
An amplitude of a basic musical tone waveshape at each of its sample points is formed by multiplying an amplitude of a tone color waveshape at each of its sample points by a digital signal representing the position of corresponding tone lever and accumulating the products of such multiplication. The amplitudes of the basic musical tone waveshape at the respective sample points are successively written in an analog waveshape memory and stored therein. A musical tone waveshape signal is obtained by reading from the analog waveshape memory the amplitude at a same point corresponding to an address signal formed by accumulating an F number of the selected key for a predetermined period.
Description
United States Patent 11 1 Kondo et al. Sept. 9, 1975 [541 ELECTRONIC MUSICAL INSTRUMENT 3.789.719 2/1974 Maillet 84/1113 X 3,794,748 2/1974 Dcutschm. 84/124 [751 Inventors: Nakada}; 3.809.786 5/1974 Deutsch 84/101 Masanob" (3hfbana; Tsuyosl" 3,821,714 6/1974 Tomisawa et 111...... 84/10] x Futamase; Aklyoshi y all Of 3.2121390 7/1974 Tomisawa et a1... 84/].01 x Hamamatsu, Japan 3,836,909 9/l974 Cockcrcll 84/11)! X 3,844,379 10/1974 Tomisawa et a1... 84/101 [73] Ass1gnee: Ni on Gakki 91 Kabush'k' 3,854,365 12/1974 Tomisawa ct a1 84/101 Kaisha, Japan [221 Filed: Mar. 6, 1974 Primary Examiner-Stephen J. Tomsky Assistant ExuminerStanley J. Witkowski 21 A l. N 448,583 1 pp 0 Attorney, Agent, or Firm-Lamas Parry, Von Gehr,
Goldsmith & Deschamps [30] Foreign Application Priority Data Mar. 8. 1973 Japan 48-27516 ABSTRACT [52] US. Cl. 84/l.0l; 84/109; 84/127 An amplitude of a basic musical tone waveshapc at [5 1] Int. Cl. GIOH 1/02; GlOH 5/00 each of its sample points is formed by multiplying an [58] Field of Search 84/l.Ol-l.03, amplitude of a tone color waveshape at each of its 84/l.l3, 1.24, 1.26, 1.28. DIG. 29, 1.09, 1.1, sample points by a digital signal representing the posil.27 tion of corresponding tone lever and accumulating the products of such multiplication; The amplitudes of the [56] References Cited basic musical tone waveshape at the respective sample UNITED STATES PATENTS points are successively written in an analog waveshape 360799 0/1971 Watson 84/ m memory and stored therein. A musical tone wave- .imulsos 10 1971 watson ct allilu. II 144M211 x Shape signal is Obtained by wading from the analog 3.683.096 11/1972 Peterson ct a1... 84/].03 x p memory the amplitude at 9 same point COP 3 1971161 10 1972 D ch 4 1 1 responding to an address signal formed by accumulat- 3,743.7S5 7/1973 Watson S4/L0l ing an F number of the selected key for a predeter- 3,746,773 7/1973 Vctrccht.... 84/101 mined period. 3,749.837 7/1973 Doughty 84/101 X 3.755.608 8/1973 Deutsch 84/l.0l 4 Claims, 13 Drawing Figures BOARD CIRCUIT LOGIC CIRCUIT l g 1 mass LEVER vIORY '@\l f 1 (LAN ADDRESS 4 5 TONE oowAmsoN a AY COLOR SELECT'ON -s GENERA'DR MEMOQY CIRCUT LOGIC 7 mos CIRCUIT G GATE AGUMU MEMORY 1 LATOR I I ATTACK-DECAY S R FACTOR MULTlPLIER HOLD ClRCUlT PATENTEDSEP" 91915 SHEET 1 BF 8 Fl G. I
KEY BOARD cmcun I LOGIC CIRCUIT 3 U L M E I%IRE$M MEMORY GEN- 1 K (LAIM ADDRESS 4 1 5 SEQ? TONE g2 g l a FACTOR COLOR LEC -6 GENERATOR MEMORY CIRCUIT I0 I l m i I 1 ANALOG DNA 06 GATE ACCUMU MEMORY LATOR T ATTACK DECAY B SAMPLE HOLDING FACTOR MULTIPLIER CIRCUIT FIG. I I
FROM 2 (AND GATE 5 q SAMPLE PULSE BUFFER LAMP. I44
PATENTEB SEP 9i975 SHEET 3 OF 8 Fl G. 3 0
T0 LOGIC CIRCUIT 2 M f I? I TONE g5 EEYJ N TER c0 INTER (TONE MAS ER OOLOR CLO K MEMORY To CLAIM ADDRESS ADDRESS (IJMPARISCN AND COUNTER SELECTION l CIRCUIT 6 ADDRESS -18 COMPARATOR DECODER MEMORY QBCUIT \9 7 MULTIPLIER E AmLMLAT -22 MASTER 0R CLOCK TOGATEII f ED GATE NW MEMORY 'PATENTEI] SEP 91975 sum 0f 3 TO MULTIPLIER 2| 2 m u P .U W m PATENTED SEP 9 I975 sumsu g FIG. 6
TO MEMORY IO M FIG. 7
OUTPUT INPUT 'PATENTEDSEP 'r 3 903 775 sum 6 5 3 FIG. 8
ATTACKn 1 INVERTER S lNvz U CM *l AD] ADDER 1 ADDER Mu NULTIPLIER MUZ MLTIPLIER ATTACK DECAY SELECTION GATE 5G2 SELCT U T0 MULTIPLIER 2| PATENTED 93% 3. 903 775 SHEET 8 BF 8 FIG. IO To] 32 TO 4 BYNARY 1 r33 s4 CHANEL W 2 ADDRESS FROM 8 COUNTER WTER COUNTER t LAS F CR NUMBER r DECODER SANPLE RESET PULSE PULSE T0l4 TOI3 K i W 25 \1 NEW SELECT mm CLAIM GATE -35 Y FROM? 26 RHEASE 2? KEY -36 29 ADRRESS CLAM -28 w ATTACK osc 3 5| DECAY 49 -69 DECAY osc WW 9 ii 52 56 TO 5 ,A f 54 s 4 W GATE czLggsT i F5 EGISTER A B Q CR CR ELECTRONIC MUSICAL INSTRUMENT BACKGROUND OF THE INVENTION This invention relates to an electronic musical instrument and, more particularly, to an electronic musical instrument in which a basic musical tone waveshape is formed in accordance with a plurality of tone color waveshapes and positions of a plurality of tone levers and written in an analog memory for subsequent repetitive reading therefrom at a period selected by depression of a key to produce an electrical musical tone waveshape output.
In prior art electronic musical instruments, tone source signals are produced by a plurality of oscillators or frequency dividers and these tone source signals are applied to a tone color circuit via a key switch to produce a desired musical tone waveshape. The prior art electronic musical instruments therefore require a very complicated and large circuit construction.
SUMMARY OF THE INVENTION It is, therefore, an object of the present invention to eliminate the above described disadvantages of the prior art electronic musical instrument and provide a novel electronic musical instrument which, despite its relatively simple construction, is capable of accurately producing a desired musical tone waveshape signal.
It is another object of the invention to provide an electronic musical instrument constructed on a principle which is entirely different from that of the prior art and requiring no more than a simple shift register type analog memory as a memory for producing various kinds of musical tone waveshape signals.
It is another object of the invention to provide an electronic musical instrument capable of producing a sample point amplitude of the basic musical tone waveshape for each of a predetermined number of sample points by sequentially multiplying the respective voltage levels at each sample point of a plurality to tone color waveshapes with digital signals representing positions of respective tone levers and thereafter accumulating the results of the multiplication thereby to produce the basic musical tone waveshape from the analog memory without requiring a complicated calculation.
It is another object of the invention to provide an electronic musical instrument capable of immediately producing a desired basic musical tone waveshape corresponding to positions of tone levers by adjusting the positions of these tone levers.
It is another object of the invention to provide an electronic musical instrument capable of producing from a single memory a plurality of musical tone signals of different tone pitches corresponding to depressed keys by reading out a basic musical tone waveshape amplitude at a sample point corresponding to a claim address signal which is formed by accumulating an F number corresponding to a depressed key by a predetermined number of periods.
It is another object of the invention to provide an electronic musical instrument capable of producing a musical tone signal provided with attack and decay envelopes corresponding to desired attack and decay factors by adjusting the voltage level of an output musical tone signal by attack and decay factors consisting of digital signals.
It is still another object of the invention to provide an electronic musical instrument capable of readily producing a compound tone musical tone signal by accumulating in an analog manner the waveshape amplitudes read from an analog waveshape memory during a predetermined period of time and outputting the result of the accumulation.
These and other objects of the invention will become apparent from the description made hereinbelow with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing one preferred embodiment of the electronic musical instrument according to the invention;
FIG. 2 is a circuit diagram showing an example of an analog accumulator;
FIG. 3a is a block diagram showing an example of a musical tone waveshape writing logic circuit;
FIG. 3b is a diagram showing the tone color memory 7 in FIG. 3a more in detail;
FIG. 30 is a diagram showing the tone lever circuit in FIG. 3a more in detail;
FIG. 4 is a circuit diagram showing an example of an attack-decay factor multiplier;
FIG. 5 is a timing chart showing relations between a tone color memory address counter, a tone lever counter and an analog memory address counter in writing a musical tone waveshape;
FIG. 6 is a circuit diagram showing an example of a waveshape writing gate; I
FIG. 7 is a diagram showing shifting of an amplitude voltage level of each bit of the musical tone waveshape to be written in an analog waveshape memory;
FIG. 8 is a block diagram showing an example of an attack-decay factor generator 5;
FIG. 9 is a block diagram showing a keyboard circuit FIG. 10 is a block diagram showing a logic circuit 2; and
FIG. 11 is a circuit diagram showing a sample hold circuit 14.
DETAILED DESCRIPTION OF THE INVENTION Referring to FIG. I, a keyboard circuit 1 is adapted to pass a drive signal provided by a logic circuit 2 to a contact of each key of a keyboard. If a selected key is depressed, a timing pulse corresponding to the key is supplied to the logic circuit 2 as key identification information. The logic circuit 2 provides, upon receipt of this key indentification information, an address signal of the depressed key to a frequency memory 3. The address signal denotes which note of which octave the depressed key represents. The large thick arrows in FIG. 1, as well as in FIGS. 30, 8 and I0, indicate parallel transmission of muIti-bit signals, while the small arrows indicate transmission of single-bit signals.
The frequency memory is a read-only memory in which are stored numerical values corresponding to frequencies of the notes of the respective keys. These numerical values are represented, for purposes of explanation, as F numbers."
For example, numerical values of F numbers corresponding respectively to frequencies of notes ranging from C in the sixth octave (C.;) to C in the seventh octave (C are shown in Table I.
Table I Table 2-Continued Note name Frequency F number Accumulated qF periods C 2093.00 1.0000 5 A 3 n 1 A"; 12:23:22 8:331; 35 33:5; 5
A l7fit),(Xl (1.84l2 G lofil .22 0.7940 c 1567.9x 0.7494 \i The claim address signal is used not for directly read- F. 139091 0.6676 10 E 3 x5 mg a waveshape analog memory 10 but for comparison o it l244-5l and selection of an analog memory address signal 5613 which is a value corresponding to data at each sample 1 10x13 0.520s C l046.5() 0.5000 point of a musical tone waveshape stored 1n the waveshape analog memory 10. A claim address comparison and selection circuit 6 is adapted to perform such com- In the frequency memory 3, an F number correparison d Selection spohdlhg to the address Signal pp from the logic it should be noted that each claim address signal is an Circuit 2 is Selected and Provided to a claim address address signal forarespective sample point of a desired generator 4. in the claim address generator 4, values 0f musical {one waveshape whereas each analog memory the F number are cumulatively added in accordance 2O address signal is an address signal for a respective sam- Whh Pcriod '1 designated y lhc logic Circuit 2 and ple point of a musical tone waveshape which is actually each cumulatively added value denoted qF is outputted ff d as a claim address ignal- When the claim address signal and the analog mem- Cumulatively add d alu s q are ShOWfl in Table 2 ory address signal coincide with each other, the claim for #6 in the Sixth Octave) and C? take" address comparison and selection circuit 6 produces a for illustrative purposeS. The SUCCeSSiVc Values Shown control signal causes a musical [one waveshape for each in Table 2 are repeatedly Produced as selection gate 11 to open. This musical tone waveshape Claim Bddl'CSS signal Whil he key correspon ing to selection gate 11 is an analog gate provided for selectthat note remains depressed. The qF value f0! 5116- ing a voltage level V concerning one sample point of cessive accumulated periods in Table 2 varies in the musical tone waveshape of the currently depressed accordance with a simple arithmetic progression. key from the analog waveshape memory 10. The tone Thus, each note column in Table 2 has a sequence of color memory circuit 7 comprises a plurality of tone qF terms each of which differs from the preceding color memories each of which stores a particular tone term by the same F number. Therefore, the qF term color waveshape by storing amplitude samples thereof for any accumulated period can be determined from at respective sample points. Upon receipt of signals the equation: qF= F+ (period number l)F. from a logic circuit 8, the amplitude at the first sample Table 2 point of the first tone color memory is initially read out.
Then the amplitude at the first sample point of the sec- Accumulmcd qF ond tone color memory is read out, and reading in a pcriuds like manner successively contmues. When the ampli- G tudes at the first sample points of all the tone color I (mg I 3 L000) memories have been read out, the amplitude at the secl.7826 2.0000 ond sample point of the first memory is read out, fol- Z i lowed by the amplitude at the second sample point of 5 51, 55 5 the second memory, and so on. In the analog wave- 6 5.3478 6 shape memory 10 there is stored a musical tone waveshape which is produced by combining tone color waveshapes, each level of which is determined by a tone lever circuit 9, as will be described in detail later. The output of the musical tone selection gate 11, i.e. the musical tone waveshape signal of the depressed key 31 27.6303 31.0000 33 2852' 32000, is represented by the voltage Vi. This output is applled 33 29.4129 33.0000 to an attack-decay factor multiplier 12 and multiplied with attack and decay factors for producing a musical 36 32.0868 361.0000 tone waveshape signal. The attack and decay factors are formed by the attack-decay factor generator 5 as will be described in detail later with references to FIG. 8. The output of the attack-decay factors multiplier 12 y is a level of a single tone represented by the voltage Vi. A musical tone waveshape signal of a compound tone is produced by applying the above described musical tone waveshape signal multiplied with the attack and decay factors to an analog accumulator l3 and cumulatively adding voltage levels Vi for l2 notes (Not necessarily notes of one octave but any note will suffice.) 6 6213010 When analog accumulator 13 has completed this cumulative addition for the 12 notes, the voltage levels which have been cumulatively added together are applied to a sample holding circuit 14 in response to a signal from logic circuit 2 and are held in the holding circuit. Thereupon. analog accumulator 13 starts a new adding operation and holding circuit 14 continues to hold the previously added voltage levels until completion of the new adding operation and, upon such completion, receives and holds the new output of analog accumulator 13.
FIG. 2 is a circuit diagram of one example of the ana log accumulator 13. In the figure, reference character I designates a voltage-current converter, C a capacitor and S a reset switch respectively. The reset switch S may actually be composed of electronic components but in this figure it is shown simply as a mechanical switch. Reset switch S closes upon receipt of a reset signal from logic circuit 2 and thereby causes capacitor C to discharge. Reset switch S opens when no reset signal is applied thereto. While reset switch 5 is open, capacitor C is successively charged with the outputs of multiplier 12, thereby effecting accumulation of the voltage levels of the i2 tones. When the accumulation has been completed, a sample pulse is applied from logic circuit 2 to sample holding circuit 14. Consequently, holding circuit 14 is actuated to cause a voltage level of capacitor C corresponding to the accumulation of the voltage levels of the 12 tones to be shifted to holding circuit 14 and held there until the next sample pulse is applied. Immediately after the application of the sample pulse to holding circuit 14, a reset pulse is applied for an instant to accumulator 13 thereby causing switch S to close and capacitor C to discharge in preparation for the next accumulation. The compound tone musical tone waveshape signal thus sequentially provided from sample holding circuit 14 constitutes one sample point amplitude of the musical tone waveshape to be produced.
Next to be described is the musical tone waveshape writing logic circuit 8 one example of which is shown in a block diagram in FIG. 30. FIGS. 3b and 3c show the tone color memory 7 and the tone lever circuit more in detail.
Clock pulses generated by a master oscillator M (FIG. 3a) are applied to an analog memory address counter 15. Carry pulses of the counter 15 are applied to a tone lever counter 16 and carry pulses of the counter 16 to a tone color memory address counter 17. The analog memory address counter 15 has a capacity of 6 bits and is adapted to sequentially output the analog memory address signal of 64 words at a high rate. As has previously been described, the analog memory address signal is compared with the claim address signal in the claim address comparison and selection circuit 6. The tone lever counter 16 outputs data of n 1 words (where n represents the number of the tone lever switches provided in tone lever circuit 9 for selecting a desired one or more of a plurality of tone colors of various musical instruments) at a rate which is l/64 that of the analog memory address counter 15.
The outputs of the tone lever counter 16 corresponding to the n words are decoded by a decoder to drive the tone lever circuit 9. The output corresponding to the last word is applied to a timing control logic circuit 19 for causing it to produce a write signal WR to be described later.
The tone color memory address counter 17 has a capacity of 6 bits and is adapted to output data of 64 words at a rate which is that of the tone lever counter 16. The output of this counter 17 is used as an address signal for reading data from the tone color memory circuit 7.
The tone color memory circuit 7 comprises n memories M M,, corresponding in number to the number of tone lever switches in tone lever circuit 9. In each of the n memories, :1 waveshape of the particular tone color is stored in analog representation at 64 sample points for one period. The output from the tone color memory address counter 17 is used to read out data at these 64 sample points.
The decoded outputs corresponding to the n words are provided from the decoder 20 to the tone color memory circuit 7 to drive sequentially the n tone color memories M,M,,. The sample point read at this time is designated by the address signal from the tone color 'counter 17.
The outputs from the decoder 20 also drive the tone lever circuit 9 thereby causing it to produce 2 bit digital signals representing the states of the respective tone lever switches 5 -8,, through diode matrix D,-D,,.
The particular tone lever switch, e.g. the third tone lever switch S which is driven corresponds to the particular tone color memory which is being read at the same instant (i.e. the tone color memory M The tone levers switches respectively have, for example, four states, i.e. 1, Va, A, and 0.
The states of the respective tone lever switches are multiplied with the data of the corresponding tone colors in a tone lever state multiplier 21 and a resulting output is produced therefrom as a voltage level. The result of this multiplication is applied to a tone color accumulator 22. If, for example, the throw-in state of a tone lever switch is O, the result of the multiplication is O and, accordingly, no voltage level is output. States of the rest of the tone lever switches are successively multiplied with data of the corresponding tone color in the tone lever state multiplier 21 and the results of multiplication are accumulated in the tone color accumulator 22. As the above described multiplication and accumulation are carried out with respect to all of the n tone levers, a total sum of the accumulation is pro duced as the output of the tone color accumulator 22. This total sum is a voltage level representing one sample point of a musical tone waveshape composed of the n tone colors.
The above described operation is conducted within a period of time during which the tone color memory address counter 17 outputs one word. During this period the tone lever counter 16 outputs n words and the analog memory address counter 15 outputs 64 X n words.
The word tone color" herein means a tone color of a musical instrument such as flute or strings. The tone lever state multiplier 21 and the tone color accumulator 22 may respectively be of a similar construction to that of the attack-decay factor multiplier 12 shown in FIG. 4 and the analog accumulator 13 shown in FIG. 2, as will now be described more in detail.
In FIG. 4, Ri,-Ri,,, Rs -Rs and RE designate resistors, Tn-Tr transistors or field effect transistors and LSB-MSB, electronic switches (shown as mechanical switches for convenience of explanation). In case the circuit shown in FIG. 4 is used as the tone lever state multiplier 21, a voltage level Vi at a sample point in tone color memory circuit 7 is applied to this circuit, whereas digital signals representing states of the tone lever switches are applied from tone lever circuit 9 to the respective electronic switches LSB-MSB. In the embodiment of tone lever circuit 9 shown in FIG. 3c, the number of possible states of each tone lever switch S -S, is four, and these states can be represented by two bits. Consequently, the FIG. 4 circuit insofar as it relates to the transistors Tr and Tr will suffice for the tone lever state multiplier 21. Accordingly, the switches LSB and KSB respectively correspond to the two bits of each digital word supplied from tone lever circuit 9, and the switches close when the bit is l and open when the bit is 0. The tone lever state multiplier 2I therefore produces an output which represents the state of the tone lever switch, i.e. the input level Vi controlled according to the digital word.
When the tone color accumulator 22 has completed all accumulation concerning one sample point of the musical tone waveshape, a waveshape write gate 23 is opened. Application of a waveshape write instruction W to this gate 23 will be described hereinbelow with reference to FIG. 6.
In an address comparator 18, the analog memory address signal which is the output of the analog memory counter 15 is compared with the tone color memory address signal which is the output of the tone color memory address counter 17 and, when the two address signals correspond to each other, an address coincidence signal SA is applied to an AND gate AND. In the meantime, the timing control logic circuit 19 provides a write signal WR to the AND gate AND upon completion of accumulation for all of the tone lever switches and subsequently provides a reset signal ac to the accumulator 22 upon completion of writing. FIG. 5 is a timing chart of the respective output data of the tone color memory address counter I7, the analog memory address counter and the tone lever counter 16.
While the tone color memory address counter 17 outputs one word, the tone lever counter I6 outputs n 1 words. While the tone lever counter 16 outputs l word, the analog memory address counter 15 outputs 64 words. Time during which the tone lever counter 16 produces data for driving the first to the nth tone lever switches S -S is equal to time during which the tone color accumulator 22 carries out accumulation of one sample point ofa musical tone waveshape with respect to the respective tone colors. The (n l )th output data of the tone lever counter 16 causes the timing control logic circuit 19 to produce the write signal WR. The coincidence signal SA representing coincidence of the tone color memory address and the analog memory address is produced n 1 times in the address comparator 18 while one word of the tone color memory address is output. A coincidence signal SA effective for producing the waveshape write instruction W is the (n +l )th one. The analog memory address signal shown in FIG. 5 is for the analog memory address of 64 Words which is produced when the tone lever counter counts the (n +1 )th output data.
While the tone color memory address counter is counting the address I, the coincidence signal SA is produced when the analog memory address counter also counts the address 1. Then while the tone color memory address counter is counting the address 2, the coincidence signal SA is produced when the analog memory address counter also counts the address 2.
Thus, the AND gate AND produces its output only when the address coincidence signal SA and the write signal WR are simultaneously applied to the AND gate AND. This output of the AND gate AND is the waveshape write instruction W which operates the waveshape write gate 23. FIG. 6 is one example of a circuit construction of the waveshape write gate 23.
When the waveshape write instruction W is input, a MOS transistor M is actuated to cause the voltage level representing one sample point of the musical tone waveshape provided by the tone color accumulator 22 to be applied to the analog waveshape memory 10 as a new waveshape data signal NW. Since the output of an inverter INV is 0 at this time, a MOS transistor M is not actuated and, accordingly, a memory waveshape data signal MW fed back from the waveshape analog memory I0 is not passed through the waveshape write gate 23. Thus, the new waveshape data signal NW is selected in the waveshape write gate 23 and thereafter is stored in the analog waveshape memory IO. It will be apparent from the foregoing description that the waveshape data signal NW is representative of the musical tone waveshape at one sample point and takes into account the throw-in states of the tone lever switches.
Upon completion of writing of the data for one sample point, the tone color memory address counter 17 proceeds to the next address and repeats the above described operation to cause data for the next sample point to be written in the waveshape memory I0. Thus, data for all of the 64 sample points are sequentially stored in the waveshape memory I0 thereby completing storage of one musical tone waveshape. If no waveshape write instruction W is input to the waveshape write gate 23, the output of the inverter INV is I so that the MOS transistor M is actuated. Accordingly, the memory waveshape data signal MW fed back from the analog waveshape memory 10 is applied to the analog waveshape memory I0 as the output of the waveshape write gate 23.
The analog waveshape memory 10 consists of an analog shift register such as a CCD (charged coupled device) of the type described in Electronics, May II, 1970, pp. 1 12-1 18. The CCD has capacitors for 64 bits each being capable of storing the voltage level at one sample point. Accordingly, the CCD is capable of storing voltage levels of 64 sample points in all. Writing of new waveshape data NW and storing of former waveshape data MW in the waveshape memory 10 are made possible by shifting the voltage level stored in each bit by one by application of a master clock pulse produced from the master oscillator M. If the time at which the voltage level is shifted is represented as I, the state of the amplitude voltage level at each sample point stored in the respective bits from I to 1 is shown in FIG. 7. FIG. 7 shows the change of contents for the respective bits in the analog waveshape memory 10.
The amplitude voltage level at one sample point of the musical tone waveshape input to the analog waveshape memory 10 is first stored in the first bit thereof, shifted 64 times thereafter and output from the 64th bit. When there is no new waveshape data NW supplied from the tone color accumulator 22. the amplitude voltage level of one sample point of the musical tone waveshape output from the 64th bit is fed back to the analog waveshape memory as the memory waveshape data MW and stored in the first bit of the memory 10.
The period of application of the new waveshape data NW is equal to the counting speed of the tone color memory address counter 17 whereas shifting speed by the master clock is much higher than the counting speed of the counter 17. Accordingly, musical tone waveshape data from the memory 10 are constantly fed back to the memory 10 during the interval of the new waveshape data NW fed to the memory 10. Further, data of one sample point of the same musical tone waveshape are repeatedly read from the analog waveshape memory N) at a relatively high rate. Accordingly, a musical tone waveshape of a desired note can be produced by adjusting the timing of selection of the data output from the analog waveshape memory 10. As has previously been described, this selection is designated by the claim address signal produced upon depression of the key.
The musical tone waveshape in the analog waveshape memory 10 is selected at the musical tone waveshape selection gate 11 and thereafter is multiplied with the attack-decay factors in the attack-decay factor multiplier 12.
Next to be described the application of the attack and decay factors to the musical tone waveshape. An address signal representing an attack or decay envelope is applied from the logical circuit 2 to the attack-decay factor generator 5. This address signal consists of 6 bits, one bit of which is used for designating the attack envelope or the decay envelope and the rest of the bits are used to designate 32 sample points constituting the respective envelopes. These sample points start from depression of the key in the case of the attack envelope and start from release of the key in the case of the decay envelope.
FIG. 8 is a block diagram showing one example of the attack-decay factor generator 5. The attack and decay factors are represented by voltage levels of the envelopes corresponding to the attack-decay address signal supplied from the logic circuit 2. The attack-decay factors are given by the following equation using voltage level (dB) as unit. Attack factor where 5 represents dividing number. Decay factor (in cascn E K) where K represents the number ofa sample point of the decay envelope at which the envelope bends as it be gins to level off from its initial steep descent.
The attack decay factor generator 5 shown in FIG. 8 is adapted to perform the above described calculation to produce the attack and decay factors. The nth sample point n of the attack envelope is inverted to n by an inverted INV; and thereafter is added to the dividing number S of the attack envelope in an adder AD The output Sn of the adder AD, is applied, on one hand, to an adder AD: where +l is added to Sn to produce an output Sn+l. The output Sn is applied, on the other hand, to a multiplier MU The output Sn+l of the adder AD, is multiplied with the output Sn of the adder AD in the multiplier MU, to produce an output (Sn) (Sn+l This output of the multiplier MU is further multiplied with A/2 in a multiplier MU to produce The output An(dB) of the multiplier MU is input to a selection gate 86 The values S and A/2 are values which are preset in the generator 5.
+1 in the adders AD, and AD is required because in the system according to the invention the complement of two is used in the required calculation.
Calculation of the decay factor will be described with reference also to FIG. 8.
In a comparator CM, n and K are compared with each other for determining which is a larger number. The output signal C of the comparator CM is 1 if n is smaller than K (n K) and 0 if n is equal or larger than K (n 5 K).
A value D n is produced through a multiplier MU whereas a value D,K D (nK) is produced through an adder AD a multiplier MU. and an adder AD If a signal representing the value D,n input to the selection gate SG is designated as A and a signal representing the value D K D (n'K) as B, the signal A is selected at the selection gate S0 when the signal C from the comparator CM is 1, whereas the signal 8 is selected when the signal C is O. The values K, K, D D and D,K are preset in the generator 5. The output Dn(dB) thus obtained is applied to the selection gate SG Either one of values An or Dn is selected in ac cordance with an attack or decay selection address signal from the logic circuit 2 and the selected one is applied to the attack-decay factor multiplier 12 as the attack or decay factor.
FIG. 4 shows one example of the attack-decay factor multiplier 12. Reference characters Ri Ri,,, RS,RS,, and RE denote resistors and Tr ,Trn transistors or field effect transistors. Digital control switches LSB-MSB are switches respectively provided for the output bits of the attack-decay factor generator 5. There are provided, for example, 7 switches if the output An or Dn of the attack-decay factor generator 5 is a binary word of 7 bits. The signal An or Dn is applied to the digital control switches LSB-MSB. If, for example, the switch LSB corresponds to 1 dB, the switch LSB only is closed when the signal A or D, is l dB and an attenuation output of l dB is obtained. Values of resistance corresponding to the respective switches are selected so as to be suitable for obtaining the required attenuation. Moreover, if the signal A,, or Dn is 2 dB, only the switch next to the switch LSB is closed to produce an attenuation output of 2 dB.
The subsequent digital control switches are actuated according to the level (dB) of the signal applied thereto whereby a desired amount of attenuation is obtained.
Since the multiplier 12 is of an attenuation type, the same result produced in the case of applying the signal An or Dn is also produced in the case where the signal An or Dn is applied to the multiplier 12. lt will therefore be appreciated that no change of sign is required for multiplier 12.
ln the meantime, the signal representing the musical tone waveshape corresponding to the depressed key is applied to the input of the multiplier 12.
Consequently, a musical tone waveshape signal multiplied with the attack or decay factor is produced as the output of the multiplier 12. It should be noted that the foregoing operation is performed with respect to each of the l2 notes (not necessarily limited to one octave) in a time sharing manner in the system from the keyboard circuit 1 to the attack-decay factor multiplier 12. Finally, the voltage levels of the 12 notes are cumulatively added together in the analog accumulator 13 and a final output is produced from the sample holding circuit 14 as a signal representing the compound musical tone waveshape at one sample point combined with specific tone color and the attack and decay factors.
FIG. is a block diagram showing a detailed circuit construction of logic circuit 2 shown in FIG. 1. A shift register 25 has stages corresponding in number to the total number of the keys and receives the output of the OR circuit Or (HO. 9). Accordingly, the input to shift register 25 represents the present state of the key and the output thereof represents the preceding state of the same key. An AND gate 26 produces a key new press signal which represents that a key has newly been depressed and an AND gate 27 produces a key new release signal which represents that a depressed key has been released.
A claim register 28 has stages (channels) corresponding in number to the maximum number of tones to be reproduced simultaneously, e.g. l2, each stage storing a I bit when the tone of the corresponding channel is being reproduced.
A claimed key address shift register 36 stores a key address signal which identifies the depressed key in accordance with the bits stored in the respective stages of register 28.
The output of the analog memory address counter (FIG. 3a) is applied to a binary counter 32 where it is divided in frequency by 2 and further divided in frequency by 12 in a duodecimal channel counter 33. The frequency divided output thereafter is applied to a key address counter 34. The output of key address counter 34 is applied to a register 36 through a select gate 35. A release register 41 stores a 1 bit corresponding to the channel for the released key upon receipt of the output of a comparator 39 which compares the output of counter 34 with the output of register 36.
A counter constituted by a gate 43, an adder 44 and a 12 stage shift register 45 counts attack clock pulses from an attack oscillator 48 and decay clock pulses from a decay oscillator 51. This counting is made on the basis of the contents of the respective stages (channels) of registers 28 and 41. During decay counting, a channel which has a maximum count in its register 45 is detected by an oldest signal generator consisting of comparators 52 and 55, a register 53 and a gate 54, and an oldest signal is produced from the oldest sig' nal generator and supplied to AND gate 29 at the corresponding channel time. This causes a new claim signal to be produced at a time corresponding to a channel in which decay has advanced further than any other channels. Thus, the contents of registers 28 and 36 are rewritten. The counting during the attack time is stopped by the output of an attack finish logic element 49 and the contents of the respective stages of registers 28 and 41 are reset by the output of a NAND circuit 56 provided for detecting decay finish.
The output (4 bits) of channel counter 33 is applied to a last number" decoder 57 which detects the last number 12 among 12 counted values. This output is applied to AND gates 58 and 59. The sample pulse from AND gate 59 is applied to the gate of an analog switching element which may be an FET. Since at this time analog accumulator 13 (FIG. 1) has finished accumulation of the amplitudes of each corresponding sample point for the 12 notes ranging from the first to the twelfth channels, a composite amplitude voltage of one sample point of the synthesized waveshapes of the l2 notes is applied from accumulator 13 to a buffer amplifier 141. This composite amplitude voltage is sampled through switching element 142 rendered conductive by the aforesaid sample pulse, and the sampled voltage is charged into a capacitor 143 and held therein. The voltage is then outputted from capacitor 143 through a buffer amplifier 144 of high input impedance. After the sample pulse has ceased to be applied, a reset pulse is applied from AND gate 58 (P10. 10) to analog accumulator 13 to reset the same.
What is claimed is:
1. An electronic musical instrument for producing an electrical musical tone signal comprising:
a. a plurality of tone color memories, each storing a waveshape of a particular tone color in analog representation at plural sample points;
b. a plurality of tone lever switches, each being provided for determining the level of a corresponding tone color waveshape;
c. means for reading sequentially the waveshapes from the tone color memories at said levels for the respective tone color waveshapes;
d. means for accumulating waveshape samples of the respective tone colors at each sample point;
e. a waveshape analog memory for storing the accumulated waveshape samples at each sample point of the analog memory and shifting cyclically the accumulated samples;
f. a claim address generator for generating claim addresses which change at a rate related to the frequency of a tone to be generated; and
g. means for reading from said analog memory those samples among the stored accumulated samples that are designated by said claim addresses.
2. An electronic musical instrument as defined in claim I, wherein said means for reading sequentially the waveshapes from the tone color memories comprise:
a. a tone color memory address counter capable of producing address signals which successively read the amplitudes stored at the respective addresses of all of the tone color memories commonly; and
b. a tone lever counter capable of drigin sequentially said tone color memories while the tone color memory address counter is addressing one address to the tone color memories; and wherein said means for reading sequentially the waveshapes from the tone color memories further comprise:
c. a tone lever position signal generator which. upon receipt of an energizing signal, generates a digital signal corresponding to a position of each of the tone lever switches;
d. a tone lever state multiplier for producing an analog output signal by multiplying the analog signals from the tone color memories successively with the tone lever position digital signals; and
e. a tone color accumulator for accumulating said analog output signal for the same period of time during which the tone color memory is addressed thereby to produce the amplitude samples of a wavcshape at certain intervals.
3. An electronic musical instrument as defined in claim 1, further comprising:
a. gate means connected to the output of said tone color accumulator to receive said accumulated sample signal at certain intervals at one input terminal thereof and to the output of said analog memory at another input terminal thereof;
b. an analog memory address counter for producing address signals for said analog memory;
c. a comparator for comparing the tone color memory address signal with the analog memory address signal from the analog memory address counter and producing a coincidence signal when these signals coincide with each other;
d. a timing control logic circuit for producing a write signal when the count of said tone lever counter is maximum; and
e. an AND gate which provides a gate signal to said gate means when said coincidence signal and said write signal coincide with each other, said gate means passing the accumulated sample from said tone color accumulator to the input of said analog memory upon receipt of said gate signal and, in the absence of said gate signal, passing the output of said analog memory back to the input of said analog memory.
4. An electronic musical instrument as defined in claim 3, wherein said means for reading from said analog memory comprise:
a. a frequency information memory storing F numbers corresponding to frequencies of the notes of respective keys;
b. circuit means for producing an address signal designating a predetermined F number in said frequency information memory upon depression of a selected key;
c. said claim address generator receiving the F number designated in said frequency information memory and producing a claim address signal by successively accumulating the F number at regular intervals over a predetermined period;
d. a comparator circuit for comparing the claim address signal with the analog memory address signal and producing upon coincidence of these signals, a coincidence signal; and
e. a gate circuit connected to the output of said analog memory and adapted to gate out the output of said analog memory upon receipt of the coincidence signal from said comparator.
Claims (4)
1. An electronic musical instrument for producing an electrical musical tone signal comprising: a. a plurality of tone color memories, each storing a waveshape of a particular tone color in analog representation at plural sample points; b. a plurality of tone lever switches, each being provided for determining the level of a corresponding tone color waveshape; c. means for reading sequentially the waveshapes from the tone color memories at said levels for the respective tone color waveshapes; d. means for accumulating waveshape samples of the respective tone colors at each sample point; e. a waveshape analog memory for storing the accumulated waveshape samples at each sample point of the analog memory and shifting cyclically the accumulated samples; f. a claim address generator for generating claim addresses which change at a rate related to the frequency of a tone to be generated; and g. means for reading from said analog memory those samples among the stored accumulated samples that are designated by said claim addresses.
2. An electronic musical instrument as defined in claim 1, wherein said means for reading sequentially the waveshapes from the tone color memories comprise: a. a tone color memory address counter capable of producing address signals which successively read the amplitudes stored at the respective addresses of all of the tone color memories commonly; and b. a tone lever counter capable of drigin sequentially said tone color memories while the tone color memory address counter is addressing one address to the tone color memories; and wherein said means for reading sequentially the waveshapes from the tone color memories further comprise: c. a tone lever position signal generator which, upon receipt of an energizing signal, generates a digital signal corresponding to a position of each of the tone lever switches; d. a tone lever state multiplier for producing an analog output signal by multiplying the analog signals from the tone color memories successively with the tone lever position digital signals; and e. a tone color accumulator for accumulating said analog output signal for the same period of time during which the tone color memory is addressed thereby to produce the amplitude samples of a waveshape at certain intervals.
3. An electronic musical instrument as defined in claim 1, further comprising: a. gate means connected to the output of said tone color accumulator to receive said accumulated sample signal at certain intervals at one input terminal thereof and to the output of said analog memory at another input terminal thereof; b. an analog memory address counter for producing address signals for said analog memory; c. a comparator for comparing the tone color memory address signal with the analog memory address signal from the analog memory address counter and producing a coincidence signal when these signals coincide with each other; d. a timing control logic circuit for producing a write signal when the count of said tone lever counter is maximum; and e. an AND gate which provides a gate signal to said gate means when said coincidence signal and said write signal coincide with each other, said gate means passing the accumulated sample from said tone color accumulator to the input of said analog memory upon receipt of said gate signal and, in the absence of said gate signal, passing the output of said analog memory back to the input of said analog memory.
4. An electronic musical instrument as defined in claim 3, wherein said means for reading from said analog memory comprise: a. a frequency information memory storing F numbers corresponding to frequencies of the notes of respective keys; b. circuit means for producing an address signal designating a predetermined F number in said frequency information memory upon depression of a selected key; c. said claim address generator receiving the F number designated in said frequency information memory and producing a claim address signal by successively accumulating the F number at regular intervals over a predetermined period; d. a comparator circuit for comparing the claim address signal with the analog memory address signal and producing upon coincidence of these signals, a coincidence signal; and e. a gate circuit connected to the output of said analog memory and adapted to gate out the output of said analog memory upon receipt of the coincidence signal from said comparator.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2751673A JPS5735476B2 (en) | 1973-03-08 | 1973-03-08 |
Publications (1)
Publication Number | Publication Date |
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US3903775A true US3903775A (en) | 1975-09-09 |
Family
ID=12223278
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US448583A Expired - Lifetime US3903775A (en) | 1973-03-08 | 1974-03-06 | Electronic musical instrument |
Country Status (2)
Country | Link |
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US (1) | US3903775A (en) |
JP (1) | JPS5735476B2 (en) |
Cited By (7)
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US4014238A (en) * | 1974-08-13 | 1977-03-29 | C.G. Conn, Ltd. | Tone signal waveform control network for musical instrument keying system |
US4067253A (en) * | 1976-04-02 | 1978-01-10 | The Wurlitzer Company | Electronic tone-generating system |
US4082027A (en) * | 1975-04-23 | 1978-04-04 | Nippon Gakki Seizo Kabushiki Kaisha | Electronics musical instrument |
US4114496A (en) * | 1977-01-10 | 1978-09-19 | Kawai Musical Instrument Mfg. Co., Ltd. | Note frequency generator for a polyphonic tone synthesizer |
US4133242A (en) * | 1976-03-05 | 1979-01-09 | Nippon Gakki Seizo Kabushiki Kaisha | Waveshape memory type electronic musical instrument |
US4333377A (en) * | 1979-08-17 | 1982-06-08 | Acoustic Standards | Tone generation system for electronic musical instrument |
FR2517854A1 (en) * | 1978-03-18 | 1983-06-10 | Casio Computer Co Ltd | Electronic musical instrument with progressive digital counter - has volume control and period counter dividing period into blocks with stages and accumulates volume and tone signals for output loudspeaker |
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Also Published As
Publication number | Publication date |
---|---|
JPS49115532A (en) | 1974-11-05 |
JPS5735476B2 (en) | 1982-07-29 |
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