US3825827A - Columnar display for electrical signals with digital signal limit set - Google Patents

Columnar display for electrical signals with digital signal limit set Download PDF

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Publication number
US3825827A
US3825827A US00243649A US24364972A US3825827A US 3825827 A US3825827 A US 3825827A US 00243649 A US00243649 A US 00243649A US 24364972 A US24364972 A US 24364972A US 3825827 A US3825827 A US 3825827A
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United States
Prior art keywords
indicator
digital signal
digital
series
limit
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Expired - Lifetime
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US00243649A
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English (en)
Inventor
G Tumbush
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Warner and Swasey Co
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Bendix Corp
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Filing date
Publication date
Application filed by Bendix Corp filed Critical Bendix Corp
Priority to US00243649A priority Critical patent/US3825827A/en
Priority to CA164,094A priority patent/CA971229A/en
Priority to FR7312404A priority patent/FR2180312A5/fr
Priority to IT22920/73A priority patent/IT983810B/it
Priority to AR247531A priority patent/AR203083A1/es
Priority to GB1772373A priority patent/GB1425833A/en
Priority to JP4204773A priority patent/JPS5719361B2/ja
Priority to DE19732318790 priority patent/DE2318790B2/de
Application granted granted Critical
Publication of US3825827A publication Critical patent/US3825827A/en
Assigned to WARNER & SWASEY COMPANY, THE reassignment WARNER & SWASEY COMPANY, THE ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: BENDIX CORPORATION, THE
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R17/00—Measuring arrangements involving comparison with a reference value, e.g. bridge
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/40—Arrangements for displaying electric variables or waveforms using modulation of a light beam otherwise than by mechanical displacement, e.g. by Kerr effect
    • G01R13/404—Arrangements for displaying electric variables or waveforms using modulation of a light beam otherwise than by mechanical displacement, e.g. by Kerr effect for discontinuous display, i.e. display of discrete values
    • G01R13/405—Arrangements for displaying electric variables or waveforms using modulation of a light beam otherwise than by mechanical displacement, e.g. by Kerr effect for discontinuous display, i.e. display of discrete values using a plurality of active, i.e. light emitting, e.g. electro-luminescent elements, i.e. bar graphs
    • G01R13/406—Arrangements for displaying electric variables or waveforms using modulation of a light beam otherwise than by mechanical displacement, e.g. by Kerr effect for discontinuous display, i.e. display of discrete values using a plurality of active, i.e. light emitting, e.g. electro-luminescent elements, i.e. bar graphs representing measured value by a dot or a single line

Definitions

  • variable electrical signals are produced in analog form; i.e., the magnitude and/or phase of the voltage or current produced by the transducer corresponds to the parameter value.
  • these signals are converted to digital form for further processing. If a limit system is utilized, that is, an "indication is provided whenever the parameter value reaches a preset value, and if the analog signal is compared to a preset analog value, drift or shifts in the correspondence between the digital signals and the analog signals sometimes occurs, leading to change in the digital value triggering the indicator. This may lead the operator to believe there is a malfunction in the limit set circuit, even though the drift is within the operating tolerance of the instrument.
  • variable level electrical signals into digital form, which digital signals in turn are decoded and arranged to consecutively activate a vertical series of indicator elements up and down the series in responseto increases and decreases in the digital signal respectively and to deactivate the preceding activated indicator element so that a single individual indicator element is activated, corresponding to each digital signal, the relative position of this single indicator element thus indicating the level of the variable electrical signal.
  • An arrangement is also disclosedfor providing signal limit-indication comprising means for comparingthe digital signal generated by the A/D converter with a preset digital limit signal which means drives a limit indicator element whenever the generated digital signal is outside the preset value.
  • FIG. 1 is-a perspective view of an instrument utilizing the columnar display according ,to the present invention.
  • FIG. 2 is a perspective view of a group of instruments of the type shown in FIG. 1 as ganged together.
  • FIG. 3 is a block diagram of the signal processing systern according to the present invention.
  • FIG. 4 is a schematic diagram of the decoding and driving circuit together with the light emitting'diodes shown in block form in FIG. 3.
  • FIG. 5 is a schematic diagram of a first embodiment I of a limit circuit shown in block form in FIG. 3.
  • a column type display unit 10 is depicted.
  • This unit includes an instrument housing unit 12 containing the instrument electronics, with the housing unit 12 being supported vertically by a pair of support blocks 14 and 16.
  • the visual display is comprised of a vertical series of indicator elements comprising light emitting diodes (LEDs) 18 arranged adjacent a vertical scale 20, with increments thereof opposite respective LEDs 18.
  • the LEDs are driven to emit for respective digital values corresponding to an incremental value of an input variable level electrical signal by means of circuitry to be herein described so that as the level of the signal increases and decreases the LEDs experience changes of state such that they are activated consecutively up and down the column and the preceding activated LED 18 is deactivated so that a single individual LED is activated for each incremental value of the analog signal thus, the position of the activated LED provides an indication of the level of the electrical signal and gives I the same general appearance as the float element used Whenever the signal value goes beyond the range of the instrument regardless of the limit values, an overrange LED 28 is provided driven by a logic circuit to be described infra to indicate such a reading.
  • control knob 30 used to apply a bias signal to shift the correspondence between a given analog signal with a given LED for purposes well-known in the art.
  • FIG. 3 a block diagram of the system electronics accomplishing the above function is shown.
  • a source of an analog of a variable level electrical signal is shown as a displacement transducer 32.
  • This displacement transducer 32 could for many purposes suited to the present invention be of the differential
  • This signal processing circuitry 34 provides a DC output voltage which is an analog of the displacement sensed by the displacement transducer 32.
  • this analog signal is then converted into digital form by converter means including analog-to-digital converter 36, such devices also being well-known in the art and which function to generate corresponding digital signals from the analog signal generated by the transducer 32.
  • this output comprises a six-bit binary word.
  • One common and suitable approach to the analog digital conversion is to provide means for controlling the counting of clock pulses into a binary register by a comparator circuit which matches the analog signal value against a control signal value which increases incrementally with the counting of each pulse to an extent depending on the amplification built into the converter 36. When these match, pulse counting into the register stops and the count is read into a storage register for use in the decoding and limit logic circuitry described herein.
  • the decoding and driver circuit 38 reads and deocdes the binary number corresponding to a given analog signal and causes a single respective LED 18 to emit, with increasing and decreasing binary values causing higher and lower LEDs 18 in the column to be activated to produce the effect described above in' which the relative position of the single activated LED provides an indication of the level of the variable electrical signal.
  • the system is provided with limit indicator means including the limit circuit 40 which compares the binary number with preset digital values for upper and lower limits and triggers the reject indicator 22 in response to generation of digital signal values above or below respectively these preset digital values. It can be seen that since the signal value compared with the limit values is in digital (binary) form, drift occurring in the A/D converter cannot cause a variation in the particular binary number triggering the rejection indicator 22.
  • the over-range logic 42 also reads the binary number, and provides emitting by the over-range LED 28 whenever it exceeds the binary number corresponding to the maximum range of the instrument.
  • FIG. 4 depicts the decoder and driver circuit 38 in schematic form which is arranged to read and decode the six-bit binary word contained in the storage register of the A/D converter and drive a respective LED 18.
  • a six-bit binard word is capable of representing 0-63 increments corresponding to values of the analog signal.
  • a scale comprised of 51 increments is adequate, allowing for a 25 to +25 increment range.
  • the decoding and driver circuit 38 is arranged to drive a respective LED 18 for binary numbers 07 through 57. This is accomplished by setting the amplification in the A/D converter 36 such that the analog signal corresponding to 25 units produces a binary signal from the converter equal to 07.
  • the decoder and driver circuit 38 includes octal coverters 44 and 46 which have inputs connected to the output of the A/D converter such that the lowest three digits of the binary number b b and b are connected to octal converter 44 and the highest three digits b b and b are connected to octal converter 46.
  • Octal converter 46 is conventional in the sense that for various binary number o-7 represented at the inputs, a respective output -7 goes to the low state.
  • Octal converter 44 on the other hand is internally connected so that for each binary number 0-7 represented at the input terminals a respective output 0-7 is connected to ground.
  • Each of the outputs 0-7 of octal converter 46 is connected to inverters 48-62 and junction transistors 64-78 so that if a respective output O-7 is low the corresponding junction transistor 64-78 is turned on to apply a potential to the respective emitter line 80-94.
  • the emitter lines 80-94 are connected to the anodes .of groupings of the LEDs 18 as shown, the emitter line These connections causea respective LED 18 designated by decimal 07-57 to emit when the equivalent binarynumber b b is read at the octal converter 44.
  • line 110 also connects the 15, 23, 31, 39,47, and 55 LEDs to ground, these do not have a potential applied to the anode, hence none of these emit, so that for binary 0001 11 only the 07LED emits.
  • binary 00100 equal to decimal 8
  • b b and 12 are all zero so that only line 96 is connected to ground.
  • only the 08 LED is activated because the circuit is complete only Y for this LED.
  • these LEDs are arranged physically on the instrument in vertical sequence with the 07 LED being lowest and the 57 LED being highest.
  • this matrix of connections with the two octal converters (44 and 46) in effect provide:a conversion means for converting a six-bit binary number into an output pattern of states at points in the matrix unique to each binary number, these states comprising completed circuits at'each point to thus provide a decoding of the binary number and driving of each corresponding LED 18.
  • the LEDs l8 are consecutively activated upwardly at incremental values thereof, and similarly as the signal level decreases the LEDs 18 are consecutively activated downwardly. It will of course be understood that if the signal levelvaries rapidly by several increments a subsequent LED 18 in one direction or the other (i.e., upwardly or downwardly) will be activated rather than a strictly consecutive activation. Since the decoder and driver circuit 38, provides for only a single activated LED 18, any preceding activated LED is deactivated as the individual LED 18 corresponding to the analog signal level is activated, so that only a single LED 18 is activated for a given level of the analog signal.
  • a first embodiment of a limit circuitry 40 is depicted in schematic form.
  • This circuit includes a series of converters 112, 114, 116, and 118 V which combined with a series of AND gates 120, 122,
  • each of the converters-112, 114, 116, and 118 is of the type which function'to convert a four-bit, binary word to low outputs at one of 16 outputs, each corresponding to a binary numberin the series capable of being represented by a four-bit word. lnthe present embodiment, however, the lower seven outputs of converter 112 and the upper six outputs of converter 118 are not utilized since only 51 increments, are used in the column.
  • the output of the AND gates 120, 122, 124, and 126 serves to inhibit any-output from each of the converters 112-118 which associatedtherewith if the output is high and will enable converters 112-118 ifthe output is low.
  • the b and b inputs are read in combinations inverted and not inverted such that if b, and b are zero, converter'112 is allowed to produce outputs 07-15, if b, is one and b is zero, converter 114 is allowed to produce outputs 16-31, if b, is one and b is one, converter 116 is allowed to produce outputs 32-47, and if both b and 12 are 'one" converter 118 is allowed to produce its outputs 48-57.
  • this arrangement in effect produces a six-bit conversion of the binary number into 51 respective low states at the outputs of the converters 112-118.-These outputs are used to set the upper and lower limits by means of a slide wire system 128 which functions to allow selective connection of the converter 112-118 outputs which are connected to series of slide wire contacts 130 via line 132 to ,a pair of flip-flops 134 and 136.
  • Flip-flop 134 functions to trigger the reject indicator 22 whenever the binary signal increases to the value corresponding to that of the high value of these two contacts 132 engaged by a slidable contact 138.
  • the slidable contact 138 includes a pair of contact elements 140 and 142 structurally joined to move together but Similary, flip-flop 136 functions to trigger the reject indicator 22 whenever the binary signal declines to the value corresponding to that of the lower value of these two contacts 132 engaged by a slidable contact 152.
  • Slidable contact 152 includes a pair of contact elements 154 and 156 structurally joined to move together but electrically insulated from each other and which serve to connect a respective contact 132 to conductive strips 160 and 158 respectively in turn respectively connected to the .l and K inputs of the flip-flop 136 via inverters 162 and 164.
  • flip-flop 136 When the binary signal declines to the value corresponding to that connected by contact 154 flip-flop 136 is set to trigger the reject indicator 22. When the signal increases to the value corresponding to that connected by contact 156 the flip-flop 136 is reset to discontinue the reject indication.
  • a reset logic signal LR is applied upon turning on the power so that the upper limit flip-flop 134 is reset and the lower limit flip-flop 136 is set as indicated.
  • FIGS. 6 and 7 an alternate arrangement for providing the digital limit circuitry is shown, which involves simpler electronics than the version shown in FIG. 5.
  • a comparator 170 With the six bits b b of the binary signal read from the A/D converter 36.
  • the comparator 170 functions such that it will produce an output high state on line 172 whenever the binary signal is less than the value selectively set in the binary code source 166.
  • This signal is used to set a flipflop 176 whenever the binary signal is less than that set in the binary code source 166 to trigger the reject indicator 22 under these conditions.
  • a five-bit selectively set binary code C C is compared with the six bits of the binary signal contained in the A/D converter 36 b h in comparator 178 which produces an output whenever the b b signal is greater than the C C value. This output is used to set a flip-flop 180 whenever an output is received from comparator 178 to thus trigger the reject indicator 22 whenever these conditions exist.
  • the binary code sources 166 and 168 could comprise a slidable bus bar grounding a binary pattern of conductive strips to form a binary code source, or any other such suitable arrangement, as is well-known in the art.
  • FIG. 8 shows a logic circuit for triggering the overrange LED 28.
  • This includes a combination of the b b b and b bits in AND gate 184, and the inverted b and b bits in AND gate 186, the outputs of which are connected to the reset and set inputs of a flip-flop 188 as shown having its Q output inverted and connected to LED 28 so that whenever the flip-flop 188 is set the over-range LED 28 is caused to emit.
  • the flip-flop 188 is set when the bits b,, 5 I2 and b go to one (indicating a binary signal 111010 corresponding to decimal 58) or greater and reset as soon as the bits b and b return to zero (indicating binary signal 1 l 1001, equivalent to decimal 57) or less.
  • a display arrangement for providing a visual display of the level of variable electrical analog signals comprising:
  • converter means generating corresponding digital signals from said analog signals
  • limit indicator means including an indicator and also including means responsive to the generation of a preset digital signal value to activate said indicator, including a digital signal source and comparator means comparing said digital signals to a preset value of said digital signal source whereby said indicator is activated in response to the generation of the same preset digital signal value notwithstanding drift in said converter means.
  • said limit indicator means includes means for varying the preset digital signal value causing activation of said indicator.
  • said means consecutively changing states of individual indicator elements includes means activating individual indicator elements and means deactivating any preceding activated elements so that only a single indicator element in said series is activated for each digital signal whereby the relative position of the single activated individual indicator element in said series provides a visual display of the digital signal.
  • indicator elements comprise light emitting diodes.
  • the display arrangement of claim 3 further including at least one adjustable limit indicator providing an indication along the series of indicator elements of the preselected limit set by said limit indicator means.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Indicating Measured Values (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Illuminated Signs And Luminous Advertising (AREA)
US00243649A 1972-04-13 1972-04-13 Columnar display for electrical signals with digital signal limit set Expired - Lifetime US3825827A (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
US00243649A US3825827A (en) 1972-04-13 1972-04-13 Columnar display for electrical signals with digital signal limit set
CA164,094A CA971229A (en) 1972-04-13 1973-02-20 Columnar display for electrical signals with digital signal limit set
FR7312404A FR2180312A5 (enrdf_load_stackoverflow) 1972-04-13 1973-04-06
AR247531A AR203083A1 (es) 1972-04-13 1973-04-12 Exhibidor columnar para senales electricas
IT22920/73A IT983810B (it) 1972-04-13 1973-04-12 Indicatore a colonna per segnali elettrici con predisposizione numerica dei limiti dei segnali
GB1772373A GB1425833A (en) 1972-04-13 1973-04-12 Display for electrical signals
JP4204773A JPS5719361B2 (enrdf_load_stackoverflow) 1972-04-13 1973-04-13
DE19732318790 DE2318790B2 (de) 1972-04-13 1973-04-13 Anzeigeeinrichtung fuer eine elektrische, in analogform vorliegende messgroesse

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00243649A US3825827A (en) 1972-04-13 1972-04-13 Columnar display for electrical signals with digital signal limit set

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US3825827A true US3825827A (en) 1974-07-23

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US (1) US3825827A (enrdf_load_stackoverflow)
JP (1) JPS5719361B2 (enrdf_load_stackoverflow)
AR (1) AR203083A1 (enrdf_load_stackoverflow)
CA (1) CA971229A (enrdf_load_stackoverflow)
DE (1) DE2318790B2 (enrdf_load_stackoverflow)
FR (1) FR2180312A5 (enrdf_load_stackoverflow)
GB (1) GB1425833A (enrdf_load_stackoverflow)
IT (1) IT983810B (enrdf_load_stackoverflow)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3906345A (en) * 1973-08-03 1975-09-16 Kelsey Hayes Co Electro optical meter system having a series lighting display and matrix scanning
US3952247A (en) * 1973-09-14 1976-04-20 Sony Corporation Level indicating apparatus for P.C.M. transmitting system
US3987392A (en) * 1973-06-22 1976-10-19 Robert Bosch G.M.B.H. Luminescent voltage indicator circuit
DE2609976A1 (de) * 1975-05-05 1976-11-25 Sigma Instruments Inc Einrichtung zur anzeige von analogen werten
US4014011A (en) * 1975-04-25 1977-03-22 Hewlett-Packard Company Variable resolution display
US4038756A (en) * 1975-08-21 1977-08-02 The Valeron Corporation Electronic column gage
US4092591A (en) * 1975-08-06 1978-05-30 Lozowski Joseph F Electric meter
US4109198A (en) * 1975-09-08 1978-08-22 Victor Company Of Japan, Limited Peak level indicating electronic circuit
US4243938A (en) * 1978-10-16 1981-01-06 The Echlin Manufacturing Company Digital bar graph tachometer
US5412312A (en) * 1992-10-01 1995-05-02 Snap-On Incorporated Frequency and instantaneous voltage level meter

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS514559A (ja) * 1974-07-01 1976-01-14 Mitsubishi Electric Corp Meetaariree
JPS5168248A (ja) * 1974-12-10 1976-06-12 Chubu Hitachi Denki Dejitaruhyojikei
JPS5268434A (en) * 1975-12-04 1977-06-07 Kyoto Daiichi Kagaku Kk Indicator for analyzing device
JPS5273758A (en) * 1975-12-16 1977-06-21 Kyoto Daiichi Kagaku Kk Indicator for analyzing device
JPS5817210Y2 (ja) * 1976-04-27 1983-04-07 桑野電機株式会社 バ−インジケ−タ
JPS5360838U (enrdf_load_stackoverflow) * 1976-10-26 1978-05-24
JPS5810099Y2 (ja) * 1977-01-20 1983-02-24 三洋電機株式会社 アラ−ム付表示装置
JPS5421364A (en) * 1977-07-18 1979-02-17 Yokogawa Hokushin Electric Corp Set display device
US4222120A (en) * 1977-08-08 1980-09-09 Rca Corporation Tuning position display system
DE2811368A1 (de) * 1978-03-16 1979-09-27 Felix Von Rueling Verfahren und geraet zur anzeige von messwerten, insbesondere der schichtdicke
DE2830085C3 (de) * 1978-07-08 1986-07-10 Heidelberger Druckmaschinen Ag, 6900 Heidelberg Verfahren und Vorrichtung zum Anzeigen von Stellgrößen
DE2939801C2 (de) * 1979-10-01 1984-10-11 Leybold-Heraeus GmbH, 5000 Köln Gerät für die Messung analoger, in elektrische Signale umgesetzter Größen
GB2134687B (en) * 1983-01-05 1986-11-19 Frank Fox Display apparatus
DE102004007077A1 (de) * 2004-02-13 2005-09-08 Hydac Electronic Gmbh Vorrichtung zum kategorisierten Signalisieren eines Messwertes
CA2615470A1 (en) * 2006-12-15 2008-06-15 Laerdal Medical As Display unit for chest compression signals
US7993290B2 (en) 2006-12-15 2011-08-09 Laerdal Medical As Display unit for providing feedback in CPR
US8394040B2 (en) 2006-12-15 2013-03-12 Laerdal Medical As Signal processing device for providing feedback on chest compression in CPR
USD628212S1 (en) 2008-03-07 2010-11-30 Laerdal Medical As Graphical user interface for a display screen
USD609813S1 (en) 2008-03-07 2010-02-09 Laerdal Medical As Cardiopulmonary resuscitation (CPR) meter

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US2486890A (en) * 1946-05-25 1949-11-01 Rudolph W Stanmyre Decibeloscope
US2536806A (en) * 1948-08-04 1951-01-02 Gen Electric Hall effect control initiator
US2883649A (en) * 1955-07-26 1959-04-21 Exxon Research Engineering Co Galvanometer digitizer
US3108470A (en) * 1960-03-28 1963-10-29 Danly Mach Specialties Inc High speed tonnage indicator for power press
US3440537A (en) * 1963-08-20 1969-04-22 Non Linear Systems Inc Bar-graph display instrument
US3488589A (en) * 1965-09-02 1970-01-06 Cutler Hammer Inc Apparatus for classifying measurements according to their magnitudes

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DE974751C (de) * 1952-06-11 1961-04-20 Blaupunkt Werke Gmbh Anzeigevorrichtung fuer Geraete der Nachrichtentechnik
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Publication number Priority date Publication date Assignee Title
US2486890A (en) * 1946-05-25 1949-11-01 Rudolph W Stanmyre Decibeloscope
US2536806A (en) * 1948-08-04 1951-01-02 Gen Electric Hall effect control initiator
US2883649A (en) * 1955-07-26 1959-04-21 Exxon Research Engineering Co Galvanometer digitizer
US3108470A (en) * 1960-03-28 1963-10-29 Danly Mach Specialties Inc High speed tonnage indicator for power press
US3440537A (en) * 1963-08-20 1969-04-22 Non Linear Systems Inc Bar-graph display instrument
US3488589A (en) * 1965-09-02 1970-01-06 Cutler Hammer Inc Apparatus for classifying measurements according to their magnitudes

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3987392A (en) * 1973-06-22 1976-10-19 Robert Bosch G.M.B.H. Luminescent voltage indicator circuit
US3906345A (en) * 1973-08-03 1975-09-16 Kelsey Hayes Co Electro optical meter system having a series lighting display and matrix scanning
US3952247A (en) * 1973-09-14 1976-04-20 Sony Corporation Level indicating apparatus for P.C.M. transmitting system
US4014011A (en) * 1975-04-25 1977-03-22 Hewlett-Packard Company Variable resolution display
DE2609976A1 (de) * 1975-05-05 1976-11-25 Sigma Instruments Inc Einrichtung zur anzeige von analogen werten
US4163971A (en) * 1975-05-05 1979-08-07 Sigma Instruments Inc. Systems for displaying analog values
US4092591A (en) * 1975-08-06 1978-05-30 Lozowski Joseph F Electric meter
US4038756A (en) * 1975-08-21 1977-08-02 The Valeron Corporation Electronic column gage
US4109198A (en) * 1975-09-08 1978-08-22 Victor Company Of Japan, Limited Peak level indicating electronic circuit
US4243938A (en) * 1978-10-16 1981-01-06 The Echlin Manufacturing Company Digital bar graph tachometer
US5412312A (en) * 1992-10-01 1995-05-02 Snap-On Incorporated Frequency and instantaneous voltage level meter

Also Published As

Publication number Publication date
GB1425833A (en) 1976-02-18
JPS5719361B2 (enrdf_load_stackoverflow) 1982-04-22
IT983810B (it) 1974-11-11
DE2318790A1 (de) 1973-10-25
AR203083A1 (es) 1975-08-14
FR2180312A5 (enrdf_load_stackoverflow) 1973-11-23
JPS4918048A (enrdf_load_stackoverflow) 1974-02-18
DE2318790B2 (de) 1976-11-25
CA971229A (en) 1975-07-15

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