US3800183A - Display device with means for drawing vectors - Google Patents

Display device with means for drawing vectors Download PDF

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Publication number
US3800183A
US3800183A US00260897A US26089772A US3800183A US 3800183 A US3800183 A US 3800183A US 00260897 A US00260897 A US 00260897A US 26089772 A US26089772 A US 26089772A US 3800183 A US3800183 A US 3800183A
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Prior art keywords
deflection
digital
analog
larger
ramp
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Expired - Lifetime
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US00260897A
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English (en)
Inventor
L Halio
H Lavoie
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Digital Equipment Corp
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Digital Equipment Corp
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Priority to US00260897A priority Critical patent/US3800183A/en
Priority to FR7320745A priority patent/FR2188877A5/fr
Priority to JP48064301A priority patent/JPS4963344A/ja
Priority to IE927/73A priority patent/IE38117B1/xx
Priority to CA173,510A priority patent/CA998756A/en
Priority to GB2749773A priority patent/GB1393653A/en
Priority to DE2329446A priority patent/DE2329446A1/de
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Publication of US3800183A publication Critical patent/US3800183A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
    • G09G1/08—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system
    • G09G1/10—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system the deflection signals being produced by essentially digital means, e.g. incrementally

Definitions

  • Each line is defined by its starting point and deflection components A X and A Y) along axes in a rectangular coordinate system.
  • Two binary numbers identify the deflection components. Both numbers are shifted to the left in respective A X and A Y registers until a one" in one of the numbers reaches the leftmost stage in its register.
  • This number corresponds to a deflection component along the major" axis, i.e., the axis with the larger deflection.
  • X and Y multiplying digital-to-analog converters receive a common ramp voltage and the respective shifted numbers. The larger number, after being shifted, controls the ramp voltage slope so an output signal from the multiplying digital-to-analog converter associated with the major axis has a constant slope when any length line is drawn. Hence, all lines are drawn with the same constant velocity component along the major axis.
  • This invention generally relates to display devices and more specifically to devices for displaying straight lines on cathode ray tube screens or the like in response to digital data inputs.
  • a constant time system the time to draw any line is constant regardless of line length.
  • the velocity of the writing element e.g., electron beam in a cathode ray tube device or ink pen in a X-Y plotter device
  • the intensity of a line may vary inversely with the velocity of the writing element, a long line may be noticeably dimmer than a short line.
  • a constant velocity display should overcome the intensity problem.
  • prior constant velocity systems do not compensate for a wide range of line lengths. For example, in one specific display, binary numbers representing deflections along X and Y axes are compared and a composite group of digital signals are generated. In response, a weighting circuit then sets an analog signal to one of three values depending upon the relative magnitudes of the range of the absolute magnitude deflections along the axes. As a result, there are a number of different velocities that may occur. This type of system does reduce line brightness variations. However, the wide range of line length variations and angles still produce noticeable intensity variations.
  • Another object of this invention is to provide a display which draws a vector on a cathode-ray tube display without noticeable intensity variations.
  • a display system stores deflection data for the X and Y axes as separate binary numbers. The system shifts both numbers to the left until a one" appears in one of the most significant bit position. If the larger deflection is associated with the X axis, then the X axis is the major axis" for the display.
  • the shifted binary number associated with the major axis sets the slope of a ramp voltage. This ramp voltage energizes two digital-analog converter circuits in parallel. Each shifted binary number is a second input to one converter circuit. Each converter circuit produces an output which is a function of the product of ramp voltage and the shifted binary number. Changes in the ramp voltage slope and values shifted to the converter circuit associated with the major axis are offsetting, so that the output signal from that circuit always has the same slope and the line is drawn with a constant velocity component in the major axis, notwithstanding its length.
  • the shifting operation assures that the maximum velocity variation along the major axis cannot exceed a 2:1 ratio.
  • this permits the use of a conventional ramp generator, which produces a narrow range of ramp slopes for the other converter inputs, to decrease the trace velocity.
  • the resulting velocity range speed is approximately 1.4: l so there are no noticeable brightness changes for lines of different lengths.
  • FIG. 1 is a block diagram of a display system in accordance with my invention
  • FIG. 2 is a detailed schematic diagram of one embodiment of a display system using my invention.
  • FIG. 3 is a chart which indicates a typical sequence of events in a display system shown in FIGS. 1 and 2.
  • this invention may be applied to display systems with retentive or non-retentive display surfaces.
  • Examples of the former include X-Y plotters and cathode ray tubes with retentive screens.
  • Conventional cathode ray tubes are in the second category, and they must be refreshed by continuously retracing any given display on the screen at a rate which provides a persistent display.
  • the following description merely discusses the operation for drawing one line one time, the invention is appliable to both retentive and non-retentive displays and to systems which draw curves using a series of straight-line segments.
  • a display system 10 receives four items of data from a data device 11.
  • Two items are binary numbers representing the X and Y coordinates of one end of a line to be traced.
  • the other two items constitute the deflections along the X and Y axes required to trace the line.
  • a cathode ray tube display device 112 receives signals from a signal generator 13. Two of these signals are analog signals (hereinafter an X signal and a Y signal) which respectively energize X and Y deflection circuits of the display device 12. The other is a blanking or Z signal.
  • the 2" signal enables or disables a beam in a cathode ray tube display or raises or lowers the marking element in a X-Y plotter from the paper.
  • Other signals for the display device 12 are not necessary to an understanding of this invention.
  • a deflection data circuit 115 stores binary numbers associated with deflections along the X and Y axes and contains circuitry for determining which of the two deflection binary numbers is larger and for shifting both simultaneously to the left. The larger number is associated with a major" axis and shifting largely normalizes the representation of the component of the line along this axis. Subsequently, the shifted or normalized binary numbers are gated into the signal generator 13. In addition, the shifted binary number which defines the major axis sets the outputof a ramp controller 16. This ramp controller, in turn, sets the slope of a ramp signal from a ramp generator 17.
  • the signal generator 13 multiplies the ramp signal and each normalized binary number to produce X and Y deflection signals.
  • the slope of the signal associated with the major axis is always the same and not dependent on line length along the major axis. The component of velocity along the major axis is therefore always the same for all lines which are traced.
  • the slope of the minor axis signal is proportional to the minor axis deflection required for the tracing of a straight line.
  • the system controls the termination of the line by storing the absolute magnitude of the major axis deflection in a maximum deflection circuit 20.
  • This circuit generates a constant analog signal which is one input to a comparator circuit 21.
  • the other input to this circuit 21 is the major axis output from the signal generator 13. When these two signals are equal, the comparator 21 disables the ramp generator 17 and thus terminates tracing of the line.
  • the display device 12 receives the X and Y signals from the signal generator 13.
  • FIG. 2 shows how this invention may be applied to a cathode ray tube (CRT) system.
  • a cathode ray tube 30 has circuits associated with X and Y deflection coils 31 and 32, respectively.
  • a terminal 33 represents the circuitry associated with the blanking or Z axis control.
  • the data device 11 transmits the AX and AY deflection data as binary numbers, that data is received in an adder 34 and AX and AY shift registers 35 and 36 under the control of pulses from the timer 14. Then the timer 14 (FIG. 1) generates a pulse (GRAPH A in FIG. 3) to transfer the larger deflection component through a slope gate 44 to a ADAC register 62 (FIG. 2) for purposes discussed later. As shown in GRAPH B (FIG. 2), the timer 14 then generates an enabling signal so a shift clock 37 begins pulsing AND circuit 40 (GRAPH C in FIG. 3). Each pulse defines a time period for an iteration during which contents in the AX and AY shift registers 35 and 36 shift simultaneously one place to the left.
  • a conductor 35a connects to the most significant bit (leftmost) position in the AX shift register 35, while a bus 35b connects to the remaining positions. Normally, the conductor 35a is part of the bus 35b. Similarly, a conductor 36a and a bus 36b connect to a corresponding position in the AY shift register 36. When a ONE appears in either of the two most significant bit positions, the signal level in conductor 35a or 36a jumps as shown in GRAPH D so a NOR circuit 41 disables the gate 40 (GRAPH B). This disconnects the shift clock 37 and terminates the iterative shifting operation.
  • the appearance of a ONE in a most significant bit position also causes the timer 14 (FIG. 1) to begin a time delay shown in GRAPH E of FIG. 3 to allow the data to settle before it is used. This delay may be omitted in some circuits.
  • the contents of the registers 35 and 36 at this point may be termed normalized deflections.
  • comparator 42 deter mined which shift register contained the larger deflection number and then moved it into the ADAC 62. It also controlled the transfer of the larger binary number, after it is shifted, to a digital-to-analog converter 43 (hereinafter slope DAC 43).
  • the slope DAC 43 generates an analog output voltage which varies inversely as the magnitude of the binary number applied at its input. That is, if all ONES are applied to the slope DAC 43, the output signal is at a minimum value, while all ZEROES will generate a maximum output signal. As will be apparent, however, with one exception in which both deflections are zero, the most significant bit into the slope DAC 43 is always a ONE. Therefore, the output of the slope DAC ranges from a minimum to some intermediate value (usually twice the minimum) as shown in GRAPH F.
  • the binary number is constant so the analog output voltage is constant.
  • the voltage is integrated by an integrator circuit comprising a feedback capacitor 45, input resistor 46, control switch 47 and amplifier 48.
  • the integrator circuit thus generates a linear ramp signal where slope is proportional to the output signal from the slope DAC 43. Specifically, when the slope DAC 43 generates its minimum output voltage, the ramp has a base slope with respect to time (the dashed line in GRAPH F). As the binary number which controls the slope DAC 43 decreases, the analog output voltage increases and so the ramp slope also increases. If there is a 2:1 ratio in the DAC output voltage range, the integrator circuit generates a ramp voltage which has a slope between the base slope or twice the base slope.
  • the ramp signal serves as the analog or reference input for a multiplying digitaI-to-analog converter 50 associated with the X axis, (hereinafter X MDAC 50) and another MDAC associated with the Y axis (hereinafter Y MDAC 51).
  • a multiplying digital-to-analog converter is a digitally adjustable variable gain follower with an output equal to an analog input signal multiplied by the value of a digital input.
  • the digital inputs are the normalized deflections in the respective registers 35 and 36; the analog input is the ramp signal.
  • the output of each MDAC is a ramp voltage whose slope is the product of the digital input to MDAC and the slope of the ramp output of the integrator amplifier 48.
  • the MDAC digital inputs are proportional to the X and Y deflections (AX and AY), since the shifting operation in the registers 35 and 36 merely multiplies the contents of these registers by the same factor.
  • the slopes of the MDAC 50 and 51 outputs are, therefore, related to each other by the ratio AX/AY.
  • These outputs are the X and Y deflection voltages and their slopes thus govern the X and Y velocity components of the electron beam in cathode ray tube 30. The velocity components are therefore also in proportion by the ratio AX/AY.
  • the normalized major axis deflection may be as little as 1,000 and as great as l l l l---, approximately a 2:1 range. With a constant slope, of the ramp voltage applied to the MDACs 50 and 511, this would result in a 2:1 range in the major axis component of the trace velocity.
  • the ramp slope control by the slope DAC 43 provides an offsetting 2:1 range of ramp slopes and the major axis trace velocity is therefore constant, i.e., independent of line length.
  • the minor axis velocity may vary from zero to a value equal to the major axis velocity and consequently the overall velocity may vary over a range of 1.41:1. This is well within the requirement for an apparently constant trace intensity.
  • the outputs of the XDAC 55 and X MDAC 50 are summed by a summing circuit 57 which generates the analog signal for the X deflection circuitry 311.
  • the X MDAC 50 may energize either a positive or summing circuit input.
  • a switch 58 responds to a POSITIVE signal to cause the summing circuit 57 to add the two analog signals; when a NEGA- TIVE signal appears, the summing circuit 57 actually substracts the signals. In the first case, the line moves to the right; in the second case, it moves to the left.
  • a similar switching circuit 60 couples the output of the Y MDAC 511 to a summing circuit 61 that also receives the output of the YDAC 56 to energize the Y axis deflection circuitry 32.
  • a POSITIVE signal causes the beam to move upwardly during the tracing; a NEGA- TIVE signal causes it to move downward.
  • the slope gate 44- enables the digital-to-analog converter 62 (a ADAC) to receive the major axis deflection from the data device 11 before the shifting operation.
  • the resulting analog signal is one input of a comparator 63; it represents the limits of deflection along the major axis.
  • the other input to the comparator 63 comes from a switch 641 controlled by the comparator 42, which couples the output of the major axis MDAC (MDAC 50 or 51) to the comparator 63.
  • MDAC major axis MDAC
  • the comparator 63 indicates when the beam reaches the end of its major axis deflection and this, in turn, coincides with completion of the line then being drawn.
  • the switch 47 opens and the integrator amplifier 48 begins to generate the ramp (GRAPH F) with slopes in the range shown between the solid and dashed lines.
  • a signal from the compartor 63 at the Z axis terminal 33 turns on the cathode ray tube beam as shown in GRAPH G.
  • Graph H shows the major axis MDAC output. It has a constant slope, notwithstanding the slope of the signal from the amplifier 48 (GRAPH F). As shown in GRAPH l, the current to the major axis deflection cir- 6 cuit depends on the starting position held in the XDAC 55 or the YDAC 56. The appropriate summing amplifier 57 or 61 generates this signal for the deflection coil, but no display occurs because the voltage on terminal 33 inhibits the beam. As soon as the switch 47 opens, simultaneously with the voltage to the terminal 33 enabling the beam, the major axis MDAC output begins to increase linearly from zero.
  • the timer 14 (FIG. 1) also generates an update pulse (GRAPH J) which couples the outputs ofX and Y position registers 65 and 66, respectively, to the X register 53 and Y register 54.
  • GAAPH J update pulse
  • the X and Y registers 53 and 54 contain data which has been updated digitally and therefore is not subject to any signal shifts which might occur over an extended period if the position were stored in an analog fashion such as by charging a capacitor.
  • This updated data may represent the beginning point of the next line to be drawn and, as shown in GRAPH I, the current to the deflection circuits 31 and 32 assumes the new level. Then the system is ready to trace the next line.
  • G means for combining each of the normalized digital representations with the ramp generator output to generate deflection signals
  • H means responsive to said deflection signals for deflecting said point whereby the velocity component along the axis with the larger deflection component is substantially uniform.
  • a display device as recited in claim 1 wherein:
  • said ramp generator comprises an integrator circuit responsive to a dc input voltage for generating a linear output signal having a slope dependent upon the magnitude of the dc input voltage
  • said slope control means comprises a digital-toanalog converter and means for applying larger normalized representation to said digital-to-analog converter, the analog output signal said converter energizing said integrator 3.
  • said normalizing means comprises first and second shift registers for receiving digital deflection data for first and second axes, respectively, and means for shifting the data in each register toward a most significant bit position and means responsive to a ONE in the most significant bit position for inhibiting said shifting means.
  • said combining means comprises first and second multiplying digital-to-analog converters associated with the first and second perpendicular axes respectively, each said multiplying digital analog converters having a first input for receiving digital data and a second input for being energized by said ramp generator, and means responsive to a completion of a shifting operator for transferring the normalized contents of said shift registers to the respective multiplying digital-to-analog converters and thereafter enabling said ramp generator, each of said multiplying digital-to-analog converters generating an analog output signal.
  • a display device including a cathode ray tube, means for generating an electron beam to illuminate a point on a cathode ray tube defined in rectangular coordinates using X and Y axes, X axis and Y axis deflection circuits for positioning the beam, and a blanking circuit for turning the beam on and off
  • first and second means for respectively storing the deflections along the X and Y axes as binary deflection numbers
  • comparator means connected to said storage means for determining the larger deflection number
  • F. gated ramp means including input means connected to the output of said digital-to-analog converter so said ramp means generates a linear signal with a slope which varies between a normal value and twice normal value,
  • timing means for gating said ramp means on to initiate deflection of the beam and to enable the blanking circuit to turn the beam on
  • K means for comparing the output signal of the multiplying digital-to-analog converter associated with the larger deflection number and the output signal of said reference means for resetting said gated ramp means and turning off the beam in response to correspondence of the two signals.

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Details Of Television Scanning (AREA)
  • Controls And Circuits For Display Device (AREA)
US00260897A 1972-06-08 1972-06-08 Display device with means for drawing vectors Expired - Lifetime US3800183A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
US00260897A US3800183A (en) 1972-06-08 1972-06-08 Display device with means for drawing vectors
FR7320745A FR2188877A5 (ref) 1972-06-08 1973-06-07
JP48064301A JPS4963344A (ref) 1972-06-08 1973-06-07
IE927/73A IE38117B1 (en) 1972-06-08 1973-06-07 Display device with means for drawing vectors
CA173,510A CA998756A (en) 1972-06-08 1973-06-07 Display device with means for drawing vectors
GB2749773A GB1393653A (en) 1972-06-08 1973-06-08 Display device with means for drawing vectors
DE2329446A DE2329446A1 (de) 1972-06-08 1973-06-08 Einrichtung zum darstellen und zeichnen einer linie

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US00260897A US3800183A (en) 1972-06-08 1972-06-08 Display device with means for drawing vectors

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US3800183A true US3800183A (en) 1974-03-26

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US00260897A Expired - Lifetime US3800183A (en) 1972-06-08 1972-06-08 Display device with means for drawing vectors

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US (1) US3800183A (ref)
JP (1) JPS4963344A (ref)
CA (1) CA998756A (ref)
DE (1) DE2329446A1 (ref)
FR (1) FR2188877A5 (ref)
GB (1) GB1393653A (ref)
IE (1) IE38117B1 (ref)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4115863A (en) * 1976-12-07 1978-09-19 Sperry Rand Corporation Digital stroke display with vector, circle and character generation capability
EP0015319A3 (en) * 1979-03-07 1981-06-03 International Business Machines Corporation Digital input/analog drive positioning system
US4365305A (en) * 1981-01-05 1982-12-21 Western Electric Company, Inc. Vector generator for computer graphics
US4491925A (en) * 1981-06-19 1985-01-01 Raytheon Company Precision time tracking line generator
EP0108473A3 (en) * 1982-09-09 1987-07-01 Sperry Corporation Slew length timer
US4686642A (en) * 1984-10-18 1987-08-11 Etak, Inc. Method and apparatus for generating a stroke on a display

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199815A (en) * 1978-05-12 1980-04-22 Electra Corporation Typesetter character generating apparatus
US4298945A (en) * 1978-05-12 1981-11-03 Eltra Corporation Character generating method and apparatus
US4254468A (en) * 1979-05-03 1981-03-03 Eltra Corporation Typesetter character generating apparatus
US4500879A (en) * 1982-01-06 1985-02-19 Smith Engineering Circuitry for controlling a CRT beam

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544835A (en) * 1966-04-15 1970-12-01 Ametek Inc Digitally controlled generation of a trace
US3582705A (en) * 1969-07-15 1971-06-01 Information Int Inc Vector display system
US3586874A (en) * 1969-08-13 1971-06-22 Gen Electric Integrated circuit periodic ramp generator

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544835A (en) * 1966-04-15 1970-12-01 Ametek Inc Digitally controlled generation of a trace
US3582705A (en) * 1969-07-15 1971-06-01 Information Int Inc Vector display system
US3586874A (en) * 1969-08-13 1971-06-22 Gen Electric Integrated circuit periodic ramp generator

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4115863A (en) * 1976-12-07 1978-09-19 Sperry Rand Corporation Digital stroke display with vector, circle and character generation capability
EP0015319A3 (en) * 1979-03-07 1981-06-03 International Business Machines Corporation Digital input/analog drive positioning system
US4365305A (en) * 1981-01-05 1982-12-21 Western Electric Company, Inc. Vector generator for computer graphics
US4491925A (en) * 1981-06-19 1985-01-01 Raytheon Company Precision time tracking line generator
EP0108473A3 (en) * 1982-09-09 1987-07-01 Sperry Corporation Slew length timer
US4686642A (en) * 1984-10-18 1987-08-11 Etak, Inc. Method and apparatus for generating a stroke on a display

Also Published As

Publication number Publication date
CA998756A (en) 1976-10-19
IE38117B1 (en) 1978-01-04
JPS4963344A (ref) 1974-06-19
FR2188877A5 (ref) 1974-01-18
GB1393653A (en) 1975-05-07
IE38117L (en) 1973-12-08
DE2329446A1 (de) 1973-12-20

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