US3781849A

US3781849A - Method and apparatus for generating self contrasting character images

Info

Publication number: US3781849A
Application number: US00236428A
Authority: US
Inventors: S Baron; S Kreinik
Original assignee: Columbia Broadcasting System Inc
Current assignee: CBS Broadcasting Inc; Thomson CSF Broadcast Inc
Priority date: 1972-03-20
Filing date: 1972-03-20
Publication date: 1973-12-25
Anticipated expiration: 1990-12-25

Abstract

A subsystem of an apparatus that receives characterrepresentative signals and generates video control signals and keying control signals that are suitable for controlling a scanned display to present contrasting character images. A stroke generator means, responsive to the character-representative signals, generates a stroke of a character to be displayed. The stroke consists of a plurality of time sequential bits corresponding to a sequence of display events and a plurality of code bits that distinguish between contrasting portions of the sequence of display events. A decoding means is responsive to the time sequential bits and the code bits and generates keying control signals and video control signals that are suitable for controlling a scanned display to present contrasted images of characters to be displayed. In a preferred embodiment of the invention, the code bits are representative of the keying and video portions of the sequence of display events. The coding means produces signals that disable the generation of video signal during selected stroke portions, the code bits being determinative of which portions of the display event are to be disabled.

Description

United States Eatent [1 1 Baron et al.

' Dec. 25, 1973 METHOD AND APPARATUS FOR GENERATING SELF CONTRASTING CHARACTER IMAGES [75] Inventors: Stanley N. Baron, Stamford, Conn.;

I Stephen Kreinik, Monsey, NY.

[73] Assignee: Columbia Broadcasting System, Inc.,

New York, NY.

[22] Filed: Mar. 20, 1972 [21] Appl. No.: 236,428

[52] US. Cl 340/324 AD, 178/DIG. 34

[51] Int. Cl. G06t 3/14 [58] Field of Search 340/324 AD, 324 A;

178/5.8 R, DIG. 34

[56] References Cited UNITED STATES PATENTS 3,471,848 10/1969 Manber 340/324 AD 3,109,166 10/1963 Kronenberg et al. 340/324 AD 3,573,789 4/1971 Sharp et al 340/324 AD 2,138,577 11/1938 Gray l78/DlG. 34

2,990,450 6/1961 Treuhart 178/D1G. 34

Primary Examiner-John W. Caldwell Assistant ExaminerMarshall M. Curtis Attorney-Spencer E. Olson et al.

[ ABSTRACT A subsystem of an apparatus that receives characterrepresentative signals and generates video control signals and keying control signals that are suitable for controlling a scanned display to present contrasting character images. A stroke generator means, responsive to the character-representative signals, generates a stroke of a character to be displayed. The stroke consists of a plurality of time sequential bits corresponding to a sequence of display events and a plurality of code bits that distinguish between contrasting portions of the sequence of display events. A decoding means is responsive to the time sequential bits and the code bits and generates keying control signals and video control signals that are suitable for controlling a scanned display to present contrasted images of characters to be displayed. In a preferred embodiment of the invention, the code bits are representative of the keying and video portions of the sequence of display events. The coding means produces signals that disable the generation of video signal during selected stroke portions, the code bits being determinative of which portions of the display event are to be disabled.

19 Claims, 11 Drawing Figures space/r ans/c T/Ml/VG TIMI/V6 To 30/\ I T 60/ 6/03 SPEC/F/ED CHARACTER I LEVEL mm gga I GENERATOR CHM/Ir s l I/VFORMAT/O/V E STROKE 6 I PORT/0N 20 I S 5 SENSOR L i even I eve/7 I I I I 650 l I I I I 660 670 I I I I I I I P nnmzs ms SHIET 5 BF 9 BASIC CLOCK I l l I SPACER 7'/M//V6 PULSE PATENTEDmzs I973 SHEET 9 BF 9 B E m N m S SCA/VL/NE /3 METHOD AND APPARATUS FOR GENERATING SELF CONTRASTING CHARACTER IMAGES BACKGROUND OF THE INVENTION This invention relates to video display apparatus and, more particularly, to an apparatus for generating signals that are suitable for controlling a scanned display to present contrasted character images such as edged title information.

There have been previously described various systems which convert digital title information into video signals that are suitable for display in readable form. Systems of this type are employed, for example, to provide title information along on a display screen, such as is typically done with financial data. Title information may also be generated for display in conjunction with conventional television picture information. This is generally accomplished by combining the video picture and the title signal using known keying techniques.

In the type of system where title information is generated for display in conjunction with conventional television picture information, a raster-compatible character generator is generally employed. The character generator receives digitally coded character signals from an input source, typically a keyboard. A number of coded character signals, representative of a number of characters to be displayed at a particular time, are stored in a recirculating shift register. The shift register is recirculated at a rate that is synchronized with the line rate of the television raster scanning pattern. Character signals read out of the recirculating shift register are fed to a stroke generator portion of the character generator which, under precise timing constraints, produces character stroke signals that ultimately control the blanking and unblanking of a scanning beam in a display device. After being read out, each character signal is restored in the recirculating register to be recalled when the next strokes of each character in the display row are generated. Character traces are formed on the display device by the blanking and unblanking f the scanning beam as the beam traverses the display device. Each character is formed on the display as a series of slices or strokes during successive scanlines. The retentivityof vision of the eye is relied upon to build up the impression of complete characters from the separate character strokes produced during each scanline.

When title information is to be displayed in conjunction with conventional picture video, the title strokes are inserted" in the picture signal using a keying circult that effectively opens slots" in the picture video and inserts the title strokes at some predetermined brightness level, generally white level. Resultant white characters are usually of satisfactory visibility. When, however, the picture background happens to also be white or near-white, the characters become difficult to distinguish from the background Consequently, it has become common practice to employ an edging circuit" that produces contrasting outlines around the displayed characters, usually a black outline around white characters. The edging function is generally accomplished in the following manner:

The character stroke signals are fed to two pairs of delay lines, one pair of which is used to generate the edges on the left and right of the character outlines (i.e., "horizontal edging") and the other pair used to generate the edges on the top and bottom of the character outlines (i.e., vertical edging"). The two delay lines used to accomplish horizontal edging have short inherent delays, for example nanoseconds each, that are representative of a single display picture element. These delay lines are coupled in series so that three versions of the input stroke signal are available; viz, an undelayed signal (called a left signal), a once delayed signal (called a main signal) and a twice delayed signal (called a right signal). The left, main, and right signals are combined in a particular manner that results in a processed stroke that starts one picture element (about 150 nanoseconds) before the main signal and ends one picture element after the main signal. The processed stroke is utilized to open a keying slot that is wider than the main signal. Thus, by inserting white video in accordance with the main signal, a white stroke having black edges on each side is formed.

The vertical edging is achieved in analagous manner except that delays of one and two scanlines (i.e., 64 and 128 microseconds) are employed. In this case, top," main," and bottom signals are formed and then combined in appropriate manner to provide a black edge above and below white video. While white and black have been chosen for illustration, any selection of colors or shades can be used in this manner to produce contrasting characters and edges.

The conventional edging scheme just described is satisfactory in most applications, but does suffer certain disadvantages and limitations. One disadvantage, which is largely aesthetic in nature, is illustrated in FIG. 1, wherein there is shown a face view of the character F" as might be displayed by a system utilizing conventional edging circuitry. The body 10 of the letter is typically displayed as white video having surrounding black edges. The right and left edging, designated by reference numeral 11, is generated by the horizontal edging circuitry while the top and bottom edging 12, is generated by the vertical edging circuitry. A close observation reveals that the edging appears cut out at the sharp letter corners; in other words, the corners designated 13 have no edging.

The absence of edging around the corners of the character follows directly from the fact that the small unedged voids are neither directly above, below, or on the side of white video. Consequently, the edging circuitry does not generate edges in these areas. This phenomenon serves to illustrate the basic disadvantage of conventional edging schemes; i.e., that the placement of edges is completely determined by the shape of the main video. Thus, situations where it is desirable to have special edging or shading effects cannot be handled by conventional edging equipments.

Accordingly, it is an object of this invention to provide an edging system that is capable of generating fully edged characters and, most importantly, capable of generating special edging effects to the desires of a user.

SUMMARY OF THE INVENTION The present invention is directed to a subsystem of an apparatus that receives character-representative signals and generates video control signals and keying control signals that are suitable for controlling a scanned display to present contrasting character images. In accordance with the invention. there is provided a stroke generator means responsive to character-representative signals for generating a stroke of a character to be displayed, the stroke comprising a plurality of time sequential bits corresponding to a sequence of display events and a plurality of code bits that distinguish between contrasting portions of the sequence of display events. Further provided are decoding means responsive to the time sequential bits and code bits for generating keying control signals and video control signals suitable for controlling a scanned display to present contrasted images of the characters to be displayed.

In a preferred embodiment of the invention the code bits are representative of the keying and video portions of the sequence of display events. In this embodiment, the decoding means produces signals that disable the generation of a video signal during selected stroke portions. The code bits are determinative of which portions of the display events are to be disabled.

Further features and advantages of the invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I, referred to as background for the invention, is a face view of a displayed character formed by a system utilizing conventional edging circuitry;

FIG. 2 is a simplified block diagram of a rastercompatible character generator system;

FIG. 3 illustrates the type of character patterns which can be formed with stroke signal generated by the apparatus of FIG. 2;

FIG. 4 illustrates in-further detail the functioning of the stroke generator portion of FIG. 2;

FIG. 5 is a block diagram of circuitry in accordance with the present invention;

FIG. 6 is a block diagram of the horizontal edge generator circuit of FIG. 5;.

FIG. 7, consisting of FIGS. 7a and 7b, illustrates the timing associated with the production of contrasted characters in accordance with the circuitry of FIG. 5;

FIG. 8 is a block diagram of the stroke portion sensor circuit of FIG. 5;

FIG. 9 is a block diagram of circuitry in accordance with another embodiment of the invention; and

FIG. 10 illustrates the timing associated with the production of contrasted characters in accordance with the circuitry of FIG. 9.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG. 2, there is shown a simplified block diagram of a raster-compatible character generator system which, in conjunction with components of the present invention, will be suitable for controlling a scanned display to present contrasted character images such as edged title information. The character generation system of FIG. 2 is of a particular type that generates proportionally spaced characters, and is described in detail in the copending U. S. patent application Ser. No. 128,727 of Stanley Baron entitled Proportional Character Generator filed Mar. 29, 1971 and assigned to same assignee as the present invention. That application is incorporated herein by reference, and only portions of the previous disclosure needed for a proper understanding of the present invention will be described in detail herein.

The basic units of the system of FIG. 2 are a recirculating storage means 100, a timing generator 200, a stroke generator 300, and a spacer detector 400. Character-representative digital signals are received by the recirculating storage means 100. These signals are typically in binary form with, for example, a given six bit coded input signal representing one of 64 (2) letters, numbers and symbols. The input characterrepresentative signals may be derived, for example, from a computer or from an input keyboard. The stroke generator 300 receives certain signals from the other units and generates stroke bits suitable for controlling a display to produce appropriate strokes or slices of a character represented at a particular time.

Before proceeding with the description of the system of FIG. 2, it is instructive to illustrate the type of character patterns which can be formed with the stroke signals generated by that apparatus, as is done with the aid of FIG. 3. The characters are depicted as being displayed on a display device having a television rastertype scanning pattern. With such a device the characters are generally displayed at a white or light level, but the characters are shown in FIG. 3 as black on a white background for each of illustration. The characters of FIG. 3 are generated without the use of prior art edging systems or the character contrasting equipment of the present invention, and are shown for the purpose of describing the manner in which character strokes are used to form the desired letters, numbers or symbols.

The scanning pattern of FIG. 3 may be a conventional interlaced television raster scan of 525 horizontal scanlines; i.e., 262 /2 odd lines and 262 /2 even lines. The illustrated upper casecharacters are 28 scanlines high, the individual scanlines being labeled as h through h Each scanline has a duration of about 64 microseconds. A basic system clock produces a plurality of pulses during each scanline and effectively divides each scanline into a plurality of elemental spaces, shown as the horizontal divisions or elements in FIG. 3. Each element corresponds to a time duration of about nanoseconds, and the first character W was arbitrarily chosen as starting at a time t or 100 elements (i.e. l0 microseconds) after the beginning of the horizontal scanline reference.

The row of characters shown in FIG. 3 occupies the portion of the screen r to about t so it takes the scanning beam about 9 microseconds to traverse the portion shown during each scanline. During the first scanline, labeled h,, the top stroke of the character W" is displayed by turning the scanning beam "on" for the period two I104, I113 tug, and 2 [13 After a space? of 4 elements, the beam is again turned on for the period I r to produce the top stroke of the 1" and then from 2, r for the top stroke of the E, etc. The next horizontal scanline of an interlaced raster scan is h;,, which happens to require the same strokes as h for the character shown. For the scanline h,, the beam is turned on for the period r r r and 2 [129 for the W; 35 -t 39 for the 1; rm. 11 for the E;" and so on. In this manner, and with the help of the retentivity of vision of the eye, the separate character strokes produced during each scanline give the impression of complete characters on the display screen.

It is seen that the characters have differing widths and that each character does not occupy an equal size character space on the display screen. For example,

among the characters shown, the number of elemental widths occupied by each character are as follows: t- ,1i%t;,il: an shisf a u e called proportional spacing" is a feature of the abovereferenced copending application, and is described herein only as an illustration of a particular type of character generator with which the techniques of the present invention can be utilized. It will become clear, however, that the principles of the present invention apply equally well to character generator systems wherein each character occupies the same width on the display screen.

Returning to the description of FIG. 2, the storage means 100 includes a six-level shift register having a plurality of stages, the number of stages being determined by the maximum number of characters to be displayed in a row on the display device. The received signals are stored in sequence in the shift register. Upon the appropriate commands, the six bits representative of the character in the last stage of the shift register are read out and then restored to the first stage of the register to be recirculated. The character read out is referred to as the specified character and its representative bits or signals as the specified character signals.

The timing generator means 200 receives synchronizing signals from the display device; namely the vertical and horizontal sync signals. The timing generator means 200 includes a megacycle keyed oscillator which produces basic clock pulses every 100 nanosecends. The oscillator is keyed by the horizontal sync signals from the display device. The timing generator also includes various counters which keep track of the number of lines scanned by the display up to a given time. When the display scan is in a row area (only a single row of displayed characters is considered for ease of explanation) the counters produce signals that indicate which line of the row is being scanned.

The stroke generator 300 receives the specified character signals and line information from the timing generator means and, in response thereto, generates stroke bits suitable for controlling the display to produce the appropriate stroke of the specified character. The stroke generator means typically includes a readonly memory which is addressed by the received character information and by line information. For example, if the received information indicates that the specified character is a W" and that the present display scanning line is h5 (FIG. 3), then the memory output stroke bits will be sequential signals instructing the scanning beam to turn on for the intervals t r n: 120 and '12s 130- The specified character signals are also received by the spacer detector 300 which determines the width of the specified character and generates a spacer timing signal which depends upon the time when the horizontally scanning beam passes out of the display area needed to produce the specified character. The spacer timing signals are used to shift the recirculating storage means so that the next character in sequence becomes the new specified" character in the last stage of the shift register. The appropriate stroke of the new specified character is then generated. The spacer detector also generates a coordinating timing signal, synchronized with a spacer timing signal, for controlling the timing associated with the generation and readout of stroke bits.

The operation of the apparatus of FIG. 2 can be better understood by visualizing the letters of FIG. 3 as being the beginning of the sequence of, say, twenty characters to be displayed in a single row. The sequence of binary coded character-representative signals are read into the recirculating storage and are stored with the W, the I, the E, etc. in adjacent stages of the shift register. The sync signals from the display are fed to the timing generator 200, and counters in the timing generator count the number of horizontal scanlines of a display field scansion until, after a predetermined number of lines, the display row area is reached. The scanlines within the display row are then separately counted by the timing generator 200, the first scanline being h, (FIG. 3).

The scanline h, begins its left to right scan at time reference, t which represents the time at which the horizontal sync signal keys the 10 megacycle basic clock oscillator. A predetermined time after t the signals representative of the character in the last stage of the shift register (i.e., the specified character W) are fed to the stroke generator 300 and to the spacer detector 400. The stroke generator generates stroke bits which instruct the scanning beam to turn on" for the appropriate time intervals (t 2 r r and r r for character W," line 11,). The spacer detector 400 decodes the character-representative signals and determines the width of the specified character. In the case of he the ch a te s.3 r,,s ta d is o wide, or, in other words, it requires a 31 clock pulse duration for display. The spacer detector accordingly generates a spacer timing signal at a time reference r that is, 31 clock pulses after the initiation (at t of display of the specified character.

The spacer timing signal is fed to the recirculating storage 100 and used to shift the positions of the character-representative signals in the shift register. The W" is shifted back to the first stage of the shift register and the I moves into the last stage to become the new specified character. Similarly, each character moves up one position so that the E is in the next to last stage, the L is in the second from last stage, and so on. A coordinating timing signal, which occurs shortly after the spacer timing signal, is also generated by the spacer detector. The coordinating timing signal is fed to the stroke generator.

During the time after occurrence of the spacer timing signal, the scanning beam moves along the space" area beginning with the elemental division r (FIG. 3). Also during this time, the binary signals representative of the character I are fed from the last stage of the shift register to the stroke generator 300 and to the spacer detector 400. The stroke generator 300 generates stroke bits which instruct the scanning beam to turn on for a period of four elemental divisions. The coordinating timing signal (from the spacer detector 400) controls the start of the readout of stroke bits to occur at h so that the scanning beam turns on for the time interval r r Meanwhile, the spacer detector decodes the new character-representative signals and determines that the specified character (I) is four elemental divisions wide. The spacer detector accordingly generates the next spacer timing signal at the time reference r that is, four clock pulses after the initiation (at r of the display of the specified character I."

In a similar manner the remaining top slices of each of the twenty characters are produced during the scanline h For the complete scanline, the spacer timing signals circulate the character-representative signals in the shift register by exactly one full cycle, so that at the end of scanline h, the W is again in the last stage of the shift register, the I is in the next to last stage, etc. The next horizontal scanline of the interlaced raster scan is h The horizontal sync signal associated with the beginning of the scanline h is counted by the timing generator 200 and the resultant new line information is fed to the stroke generator. The appropriate strokes of each of the twenty characters are then generated as previously described, and in this manner the character strokes for each odd-numbered scanline are successively formed. At the end of the vertical field scansion the scanning beam is retraced whereupon it scans the even-numbered scanlines and forms the remaining character strokes.

FIG. 4 illustrates the functioning of the stroke generator 400 of FIG. 2. The stroke generator includes a read-only memory (ROM) unit 41 .1 which receives the specified character signals as well as line information from the timing generator 200 (FIG. 2). Read-only memories that are addressable with multiple inputs are well known in the art and are described, for example, inan article by F. Kvamme which appeared at page 88 of the Jan. 5, 1970 issue of Electronics. The ROM 411 generates thirty-one stroke bits which are entered in parallel into the parallel-in-serial-out shift register 412. The stroke bits are clocked out serially using the basic clock pulses from the keyed oscillator in timing generator 200. The readout of stroke bits is initiated by the enabling of the register 412, which is accomplished by coordinating timing signals from the spacer detector 300. Most of the characters consist of less than thirty-one stroke bits. For example, the top stroke line of an 1 consists of only four stroke bits, e.g. 11 ll. The remaining bits (five to thirty-one) to be read out of the ROM are Os. These Os do not have a chance to be read out, however. After the fourth stroke bit (still using the I as an example), a timing signal from spacer detector 300 shifts the recirculating storage means and a new specified character is read into the ROM 411, at the same time disabling readout of stroke bits from the register 412. The shift register 412 is reloaded and does not begin its next readout until enabled again by the coordinating timing signal. The spacer detector 300 also produces between-character spacer timing pulses on a line 301, these pulses being utilized in the present invention in a manner to be described hereinafter.

The stroke bits, read out over line 413 can be combined with standard picture video (using conventional keying techniques) to produce a composite television picture having unedged title information. Alternatively, a commerical edging equipment, as described in the background portion of this specification, can be used to produce title information having a conventional type of edging.

As above-stated, the foregoing description was intended to illustrate a particular type of character generator with which the techniques of the present invention can be utilized. Referring to FIG. there is shown a block diagram of circuitry in accordance with the present invention. A stroke generator means 500 is similar in function to the stroke generator 400 of FIG. 4, and

has included therein a ROM 5'11 and a parallel-inserial-out shift register 512 that functions in the same manner as the register 412 of FIG. 4. Once again, the ROM receives specified character signals and line information from other portions of a character generator system and generates a plurality of stroke bits that are entered in parallel into the register 512. As before, the register 512 is enabled by coordinating timing signals and its readout, (over a line 513), is synchronized with basic clock signals.

The stroke generator 500 includes a buffer register 514 which, in this embodiment, consists of only two levels. In addition to the thirty-one stroke bits which the ROM generates and enters into the register 512, the ROM Slll generates two additional bits, called code bits, for each stroke. These bits are entered into buffer 514 which serves the purpose of holding" a pair of outputs, denoted S and S at a specified input level (determined by the two entered bits) for the duration of the individual stroke. Thus, for example, if a particular stroke were to have its two code bits at the I level, the buffer 514 would hold the outputs on the lines S and S high until the stroke bits for the particular stroke had been completely read out of register 512 over line 513.

A decoding means 600, shown in dashed line, receives the stroke bits and the code bits and generates video control signals, designated E and E,,, that are suitable for controlling conventional keying circuitry and a scanned display to present contrasted images of characters to be displayed. The decoding means 600 includes a level generator 601 that receives digital stroke bits on line 513 and produces a continuous stroke signal on an output line 602. The level generator 601, typically a flip-flop, is utilized in conventional fashion to convert digital stroke bits to a continuous rectangular-wave signal E of the type sketched in FIG. 5.

The stroke signal E is received by a horizontal delay circuit 603 that is shown in detail in FIG. 6. The circuit 603 includes a pair of D-type flip-flops, designated as flip-

flops

604 and 605. D-type flip-flops are well-known in the art as having at least two inputs sometimes designated D and T. The unit is designed such that its output follows the input at D after the occurrence of a clock pulse at the T input. In the circuit 603, these devices are utilized to generate processed stroke signals that are delayed by one and two clock pulses from the original stroke signal E.

The stroke signal E is received at the D input of fiipflop 604 which receives basic clock signals at its T input. Since the stroke signal was originally generated in synchronism with the basic clock, the positive-going edge of the stroke signal E will occur at substantially the same time as a basic clock signal at T. In order for the input at D to appear at the flip-flop output, the clock pulse at T must occur after the signal at D. Therefore, the output of flip-flop 604, designated as E,,,,,,,,, will start one clock pulse after the beginning of stroke signal E; in other words, E is delayed by one clock pulse from E.

The output of flip-flop 604 (E,,,,,,,,) is received at the D input of flip-flop 605 which also receives the basic clock at its input T. This unit acts similarly to the flipfiop 604 in that it produces an output, designated E that is delayed from E by one clock pulse. The original stroke input E is made available as an output of the circuit 603 and designated as E so that three processed stroke signals designated E,,,,,, E,,,,,,,,, and E are available as outputs. These stroke signals have respective delays from the original stroke signal of zero clock pulses, one clock pulse and two clock pulses.

Referring again to FIG. 5, the processed stroke signals from circuit 603 are each fed as inputs to an OR gate 610 that is designated herein as a keying gate.+ The signal E is also coupled as an input to an AND gate 611 designated herein as a video gate. The gate 611 has two additional inputs that will be described hereinafter, but for the present it will be assumed that these inputs are at a logical I level so that the output of video gate 611 tracks the input E,,,,,,,,. The output of keying gate 610, designated E,, is typically coupled to an insert keyer that effectively opens slots in the picture video. These slots," being an absence of video, will appear black on a display if no light video is inserted therein. The signal E controls the insertion of title strokes at a predetermined brightness level, generally white level.

The manner in which the circuitry described to this point is utilized to produce strokes having contrasted edges can be described with the aid of FIG. 7. The displayed characters at the top of the FIGURE are similar in form to the characters depicted in FIG. 3. In FIG. 7, however, each full character, including edging, is formed from 30 scanlines or strokes, with the main unedged portion of the character requiring the same 28 scanlines as the characters of FIG. 3. The portions of FIG. 7 below the characters indicate the timing relationships of certain signals associated with the formation of various parts of the illustrated characters. These signals are shown in synchronism with the illustrated characters.

The scanlines during which the characters illustrated in FIG. 7 are formed are sequentially designated from 1 to 30, the designation of selected scanlines being labeled to the left of the characters. The first set of timing diagrams are associated with scanline 2 and are useful in explaining the operation of the portions of FIG. 5 described up to this point. The first line of the group shows the timing of the stroke signal E that is used to form scanline 2 of the sequence of characters shown in FIG. 7. This signal also becomes E as was described in conjunction with FIG. 6. The next two lines of the timing diagram respectively show signals E and E,,,,,,,; i.e., two sets of signals that are delayed one and two clock pulses from E,,.,,. The fourth line of the diagram shows the timing of the signal designated E in FIG. 5. By action of the OR gate 610, the signal E, is seen to be present when E e or Em or Er is present The fifth and final line of this group shows E, which, for this particular example, corresponds to E,,,,,,,,. The two signals 5,. and E,,, when viewed together, illustrate the formation of the strokes of the three characters T, H, and 1". The edges on each character (for this scanline) are formed by an overlap" of the keying for each stroke of the characters, the overlap on each side of each stroke being one clock pulse in length.

Referring again to FIG. 5, the signal E in addition to being received by the

gates

610 and 611, is coupled to a stroke portion sensor unit 620. The unit 620, which also receives spacer timing pulses over line 301 (see FIG. 4), effectively determines the occurrence of the different parts or portions of the video events that make up the stroke for a particular character. In the present embodiment, the video events are classified as odd or even events. For example, in FIG. 7, scanline 2 of the character H is made up of two distinct stroke portions that form slices of the sides of the H. For E,,,,,,,,, these stroke portions are seen to occur (in the timing diagram scale) from t=273l for the first stroke portion and from r=42-46 for the second stroke portion. The first stroke portion is considered an odd stroke portion (as would be the third, fifth, etc. stroke portions if they occurred), while the second stroke portion is considered an even stroke portion (as would be the fourth, sixth, etc. if they occurred).

The circuitry of the stroke portion sensor 620 produces an output of an odd output line 621 during occurrence ofa characters odd stroke portions and an output on an even output line 622 during occurrence of a characters even stroke portions. The unit 620 is shown in further detail in FIG. 8 wherein there is depicted a toggle-type flip-flop 625 and a D-type flipflop 626.

Each of the flip-flops receives, as a reset input, the spacer timing pulse over line 301. Accordingly, the two flip-flops are reset so as to have a logical 0 output between successive characters of character sequence. The toggle flip-flop 625 receives E as an input and is triggered to alternate output levels by the leading edges of successive stroke portions. Thus, the output of flip-flop 625, designated E is initially at a logical 0 (having been reset) and is switched to a logical 1 output level by the leading edge of the first stroke portion of the stroke associated with a new character. The subsequent stroke portions of the character cause E to alternate between 0 and 1 such that E is a logical 1 during the odd" stroke portions of the particular character.

The output of flip-flop 625, in addition to being utilized as the E output on line 621, is fed to the D input of the flip-flop 626. This flip-flop, which receives E,,,,,,,, at its T input, is reset to a logical 0 output between characters, but stays at a 0 output after the first stroke of a new character. When the leading edge of the first stroke portion is received at the T input of gate 626, the D input of the gate is still at a logical 0 level due to the small inherent propagation time of the toggle flip-flop 625. As a result, the 1 input at D is received after the 1 input at T, and the output of gate 626, designated E remains at 0. When, however, the leading edge of the second stroke portion is received at the T input of gate 626, the D input is still at 1 (again due to the propagation of gate 625), so that the output of gate 626 goes to 1 during the second stroke portion of the character. In this manner, the output E on line 622 is at a logical I level during a characters even stroke portions and at a 0 level during the character's odd stroke portions.

Returning to FIG. 5, the outputs of the stroke portion sensor 620 are coupled to a pair of

NAND gates

640 and 650. The gate 640 receives as one input the E signal on line 621 and, as its other input, one of the code bits S The gate 650 receives as inputs the signal E on line 622 and the code bit S The outputs of the

gates

640 and 650 are received by video gate 611 which, it will be recalled, receives as its third input signal E,,,,,,,,. In operation, the outputs of the

gates

640 and 650 selectively disable the video gate 611 during prescribed stroke portions, the code bits being determinative of which portions of the stroke are disabled. When one or both of the code bits are 0, the NAND gate which receives the code bit necessarily has a 1 output. Consequently, the output of that particular gate or gates does not disable the video gate 611 during any portion of the stroke of the particular character to which the code bits correspond. For example, in the case of scanline 2 as shown in FIG. 7, the code bits S and S are both 0 for all three of the characters shown. This means that the outputs of the

gates

640 and 650 are at 1 during formation of these characters, and the generation of the signals E,, and E, is determined solely by action of the circuitry described above in conjunction with the set of timing diagrams for scanline 2.

The overall operation of the circuitry of FIG. 5 is best illustrated with the aid of the timing diagrams of FIG. 7. The next group of timing graphs to be considered is the one associated with scanline 13 of the characters shown in FIG. 7. This scanline forms parts of the vertical leg of both the T and the and forms a part of the legs of the H as well as the edge above the central bar of this letter. The code bits associated with each of the characters are indicated in the FIGURE below the timing graphs. The code bits for both the T and the 1" are seen to be 0s, while the code bits for the H are S,,,, =0 and S ,,,.,,=l.

Considering the T first, the stroke signal for scanline 13 is four clock pulses wide and timed such that E occurs from t=0 to t=l4. The formation of the outputs of the horizontal delay circuit 603 (E E,,,,,,,,,' and E,,,,,,,) as well as the formation of E,, are similar in principle to the description of these operations with respect to scanline 2. In this case, E extends from t=9-l5 and, as above, overlaps the signal E by one clock pulse on each side. The signal E begins coincidentally with E,,,,,,,, since the stroke portion of the T being considered here (the only portion for this scanline) is an odd portion. The signal E remains on until the spacer timing pulse on line 301 resets the stroke portion sensor 620 (FIG. 8). The spacer timing pulses on line 301, as described above, occur in the space period between characters. In the present embodiment, these pulses occur one clock pulse after the last bit of E for each character. In FIG. 7, this means that the spacer timing pulses occur at F24, F47 and t=66. Thus, the signal E for the T continues until t=24 whereupon the stroke portion sensor is reset by the spacer timing pulse and E goes off. In the case of the T, there is no signal E since only one stroke portion is present. Also, the existence of E does not result in any disabling of the video gate 611 since the code bit S 0 for scanline 13 of the T. The signal E, is therefore seen to correspond to the signal E with E, occurring from Fl0l4. It should be noted that the production of this particular stroke of T would have been the same if S had been 1 since, in any event, the absence of a signal E would have prevented a disable signal being generated by the gate 650. In instances such as these, however, code bits which effect only nonexistent stroke portions are considered as being 0 for consistency, although their value in these circumstances makes no practical difference.

Considering, now, the H, the stroke signal for scanline 13 consists of three portions which are timed such the E occurs from F27-31, 1=32-4l and t=42-46. These stroke portions result in an E, that extends from t=26-47. The signal E reflects only the first and third of the three portions, and is active from t=27-32 and r=42-47. The signal E reflects the second portion and is active from i=32-42. As indicated to the right of the timing graphs, the code bits for scanline 13 of the H are S O and S ,.,.,,=l. This means that only gate 650 (FIG. 5) can disable video gate 611 and this disabling, which occurs during E,.,..,,, is effected from l==3242. The resultant E, consists of the first and third portions of E,,,.,,,,; viz., r=27-31 and r=42-46. The second portion of E does not become part of E, since gate 611 is disabled by E during this portion. Thus, the long keying signal E. and the two short portions of E, are utilized to form the desired scanline 13 of the H.

Scanline 13 of the is routine with both code bits being zero for this character.

The next group of timing graphs relates to scanline 26, and this scanline of the is of interest in that it forms the edging above the lower arm of the character. The slices of the other two characters are formed in routine manner. The code bits for the 1 are S l and S ,,=0. As a result, E, is disabled during the first of the two illustrated stroke portions. The signal 15,, extends the length of the character (in the time domain), and a superimposed E, signal from Fol-65 forms the desired slice of the character.

The next group of timing graphs relates to scanline 8, and this scanline of the T is of particular interest in that it forms part of the shading below the crown of the T. This type of selective shading is not available with conventional edging equipments. The stroke signal is made up of five portions. The code bits for the T for this scanline are S,,,,,,=0 and S =l so E, is disabled during the second and fourth stroke portions to achieve the desired character slice. Again, the two remaining character slices are formed in the routine fashion with code bits all 0.

The last group of timing graphs of FIG. 7 relates to scanline 30 which forms the bottom edging below all three characters. This is achieved by disabling E, during all stroke portions of all characters so that only keying signal E;, is generated. Accordingly, all code bits of significance are 1.

Referring to FIG. 0, there is shown another embodiment of the invention in which the ROM 511 generates three code bits, the third code bit being designated as S,,. In this embodiment, the decoding means 600 includes two additional gates, an OR gate 660 and an AND gate 670. In other respects, the circuit of FIG. 9 is the same as the circuit of FIG. 5. The OR gate 660 receives as inputs the signals E and E from the stroke portion sensor 620. The output of OR gate 660 and the code bit 5,, are received by AND gate 670, the output of which is fed as an additional input to the keying gate 610.

The bit S is utilized to control a situation wherein an edging or shading area is to appear continuously between successive stroke portions of a character. The use of this additional bit as part of the character strokes allows achievement of certain effects that were obtained in the previous embodiment, but with different sets of sequential stroke bits than were used with that embodiment. An example of the operation of the system of FIG. 9 is illustrated with the aid of FIG. 10 which deals with formation of scanline 13 of an 11 using this system. It will be recalled from FIG. 7 that scanline 13 of the H is formed from a keying signal that extends from t==26-47 and video stroke portions that extend from F2741 and t=4246. With the equipment of FIG. 5, the desired keying and video signals had been achieved by forming a stroke that consisted of three portions (see FIG. 7). The middle stroke portion was utilized to form the edging or shading above the central bar of the H. By fixing the code bit S at 1, video was inhibited during this central stroke portion to achieve the desired effect.

With the system of FIG. 9, the desired pattern can be formed utilizing stroke bits that yield a stroke signal which has only two separated portions that represent the video needed for the legs of the H. The edging above the horizontal bar of the H is achieved by having the stroke generator produce the third code bit S as a 1 so that an edge is automatically produced between the two stroke portions.

In FIG. 10, the stroke signal for scanline 13 is seen to consist of two portions which are timed such that E occurs from t=27-3l and t=42-46. The signal E which starts contemporaneously with E remains on until t=46 whereupon the signal E goes on. It is therefore seen from FIG. 9, that the output of OR gate 660 is active from t=27 to the end of the character. With 8, equalling l, the output of gate 660 will cause the AND gate 670 to have a 1 output during this same interval, with the result that the keying gate 610 is turned on during this time. The signal E thus extends the length of the character (in the time domain) and yields the desired edge between the video stroke portions.

FIGS. 9 and show the manner in which additional code bits can be utilized to achieve special effects. It will be understood that the illustrated embodiments could be modified in various ways within the spirit and scope of the invention. For example, the stroke generator could be preset to produce larger numbers of code bits to obtain different combinations of keying and video events or to obtain various keying signals for utilization in obtaining different colored display effects.

We claim:

1. in an apparatus that receives characterrepresentative signals and generates video control signals and keying control signals that are suitable for controlling a scanned display to present self-contrasting character images superimposed on a background, the combination comprising:

stroke generator means responsive to said characterrepresentative signals for generating a stroke for each scanline of a character to be displayed, said stroke comprising a plurality oftime sequential bits corresponding to a sequence of character display events and a plurality of code bits generated simultaneously with said time sequential bits for distinguishing between contrasting portions of the sequence of character display events; and

decoding means responsive to said time sequential bits and said code bits for generating keying control signals and video control signals suitable for controlling the scanned display to present the selfcontrasting images of the characters to be displayed.

2. The combination as defined by claim 1 wherein said code bits are representative of the keying and video portions of the sequence of character display events.

3. The combination as defined by claim 2 wherein said decoding means includes horizontal delay means for receiving signals representative of said time sequential bits and generating delayed versions of said signals.

4. The combination as defined by claim 1 wherein said decoding means includes stroke portion sensing means for sensing various portions of signals represented by said time sequential bits and for generating different output signals during said various portions.

5. The combination as defined by claim 4 wherein said decoding means includes means responsive to the outputs of said stroke portion sensing means and to said code bits for producing signals that disable the generation of a video signal during selected stroke portions.

6. The combination as defined by claim 5 wherein said code bits are determinative of which portions of the character display events are to be disabled.

7. The combination as defined by claim 6 wherein said stroke portion sensing means senses even and odd portions of the signals representative of said time sequential bits.

8. In an apparatus that receives characterrepresentative signals and display synchronizing signals and generates video control signals and keying control signals that are suitable for controlling a scanned display to present self-contrasting character images superimposed on a background, the combination comprising:

stroke generator means responsive to said characterrepresentative signals and said synchronizing signals for generating a stroke for each scanline of a character to be displayed, said stroke comprising a plurality of time sequential bits corresponding to a sequence of character display events and first and second code bits generated simultaneously with said time sequential bits for distinguishing between contrasting portions of the sequence of character display events; and

9. The combination as defined by claim 8 wherein said decoding means includes stroke portion sensing means for sensing the odd and even portions of signals represented by the time sequential bits and for generating first and second output signals during said off and even portions respectively.

10. The combination as defined by claim 9 wherein said first code bit indicates that video is to be inhibited during the odd portions of the signals represented by the time sequential bits, and the second code bit indicates that video is to be inhibited during the even portions of the signals represented by the time sequential bits. I

11. The combination as defined by claim 10 wherein said decoding means further includes a first gate which receives as inputs said first code bit and said first output signal and produces a first inhibit signal when its inputs are present simultaneously, and a second gate which receives as inputs said second code bit and said second output signal and produces a second inhibit signal when its inputs are present simultaneously, said first and second input signals being adapted to inhibit video.

12. The combination as defined by claim 11 wherein said decoding means includes horizontal delay means for receiving signals representative of said time sequential bits and generating delayed versions of said signals.

13. The combination as defined by claim 12 wherein said decoding means includes a keying gate and a video gate, said keying gate receiving the signals representative of the time sequential bits and all delayed versions thereof, and said video gate receiving one of the delayed versions of the signals representative of the time sequential bits.

14. The combination as defined by claim 13 wherein said video gate receives as inputs said first and second input signals.

15. The combination as defined by claim 14 wherein said keying gate is an OR gate and said video gate is an AND gate.

16. The combination as defined by claim 14 wherein said stroke generator means generates a third code bit for each character to be displayed and wherein said decoding means further includes a third gate which receives said first and second output signals and a fourth gate which receives said third code bit and the output of said third gate, the output of said fourth gate being received as an input by said keying gate.

17. The combination as defined by claim 16 wherein said third gate is an OR gate and said fourth gate is an AND gate.

18. The combination as defined by claim 17 wherein said keying gate is an OR gate and said video gate is an AND gate.

19. A method of receiving character-representative signals and generating video control signals and keying control signals that are suitable for controlling a scanned display to present self-contrasting character images, comprising the steps of:

a. generating a stroke for each scanline of a character to be displayed, said stroke comprising a plurality of time sequential bits corresponding to a sequence of character display events and a simultaneously generated plurality of code bits that distinguish between contrasting portions of the sequence of character display events;

b. generating said keying control signals from said time sequential bits; and

c. generating said video control signals from selected portions of said time sequential bits, said code bits being determinative of which portions of said time sequential bits are selected.

Claims

1. In an apparatus that receives character-representative signals and generates video control signals and keying control signals that are suitable for controlling a scanned display to present self-contrasting character images superimposed on a background, the combination comprising: stroke generator means responsive to said characterrepresentative signals for generating a stroke for each scanline of a character to be displayed, said stroke comprising a plurality of time sequential bits corresponding to a sequence of character display events and a plurality of code bits generated simultaneously with said time sequential bits for distinguishing between contrasting portions of the sequence of character display events; and decoding means responsive to said time sequential bits and said code bits for generating keying control signals and video control signals suitable for controlling the scanned display to present the self-contrasting images of the characters to be displayed.

8. In an apparatus that receives character-representative signals and display synchronizing signals and generates video control signals and keying control signals that are suitable for controlling a scanned display to present self-contrasting character images superimposed on a background, the combination comprising: stroke generator means responsive to said character-representative signals and said synchronizing signals for generating a stroke for each scanline of a character to be displayed, said stroke comprising a plurality of time sequeNtial bits corresponding to a sequence of character display events and first and second code bits generated simultaneously with said time sequential bits for distinguishing between contrasting portions of the sequence of character display events; and decoding means responsive to said time sequential bits and said code bits for generating keying control signals and video control signals suitable for controlling the scanned display to present the self-contrasting images of the characters to be displayed.

10. The combination as defined by claim 9 wherein said first code bit indicates that video is to be inhibited during the odd portions of the signals represented by the time sequential bits, and the second code bit indicates that video is to be inhibited during the even portions of the signals represented by the time sequential bits.

19. A method of receiving character-representative signals and generating video control signals and keying control signals that are suitable for controlling a scanned display to present self-contrasting character images, comprising the steps of: a. generating a stroke for each scanline of a character to be displayed, said stroke comprising a plurality of time sequential bits corresponding to a sequence of character display events and a simultaneously generated plurality of code bits that distinguish between contrasting portions of the sequence of character display events; b. generating said keying control signals from said time sequential bits; and c. generating said video control signals from selected portions of said time sequential bits, said code bits being determinative of which portions of said time sequential bits are selected.