US3751688A - Erasing circuit for use in a display tube provided with a storage screen - Google Patents

Erasing circuit for use in a display tube provided with a storage screen Download PDF

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Publication number
US3751688A
US3751688A US00211249A US3751688DA US3751688A US 3751688 A US3751688 A US 3751688A US 00211249 A US00211249 A US 00211249A US 3751688D A US3751688D A US 3751688DA US 3751688 A US3751688 A US 3751688A
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United States
Prior art keywords
voltage
transistor
screen
circuit
resistor
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Expired - Lifetime
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US00211249A
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English (en)
Inventor
R Hooghordel
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US Philips Corp
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US Philips Corp
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/20—Cathode-ray oscilloscopes
    • G01R13/22—Circuits therefor
    • G01R13/225—Circuits therefor particularly adapted for storage oscilloscopes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/26—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using storage tubes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/23—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using electrostatic storage on a common layer, e.g. Forrester-Haeff tubes or William tubes

Definitions

  • ABSTRACT [30] Foreign Application Priority Data Jan 8 1971 Netherlands 71002 To erase the 1nformat1on on a storage screen of a d1splay tube there must be applied to the tube sudden po- [52] U S Cl 307/246 307/247 A 307/202 tential variations which may have values of several hun- 315712 328/123 340/173 dreds of volts.
  • cathode ray tubes it is known to use cathode ray tubes to display electric information. By deflecting an electron beam emitted from a cathode charges may locally be stored on a display screen or the screen may be caused to emit light.
  • display tubes which have a display screen which emits light only when the electron beam strikes the screen, and in some cases a screen exhibiting afterglow is used.
  • a given type of storage screen may be used in conjunction with a special tube construction.
  • a tube of such type may be provided with a writing gun, i.e., a system which provides the controllable writing beam, at least one holding gun capable of emitting a uniform stream of electrons to the entire screen, and a special screen comprising a glass plate which is coated with a thin conductive layer which in turn is coated with a dielectric layer of, for example, a phosphor.
  • a writing gun i.e., a system which provides the controllable writing beam, at least one holding gun capable of emitting a uniform stream of electrons to the entire screen, and a special screen comprising a glass plate which is coated with a thin conductive layer which in turn is coated with a dielectric layer of, for example, a phosphor.
  • the secondary emission factor of the layer is smaller or greater than unity. This energy depends not only on the voltage between the cathodes and the conductive layer but also, owing to the insulating properties of the dielectric layer, on the charge present on the layer. If the emission factor is less than unity, a negative charge is collected on the screen which is supplied from the continuously spraying holding guns, and the layer assumes cathode potential. The screen is dark, no light is emitted and hence information may be written in. For this purpose the writing gun provides a beam of high-energy electrons, for its cathode is at a high negative potential of several thousands of volts relative to the screen. At the points of impact on the screen the emission factor is greater than unity, so that a positive charge builds up.
  • the phosphor emits light, so that the oscillogram or the information becomes visible.
  • the positive charge attracts stray electrons which are given an energy such that the emission factor still remains greater than unity, so that after the collapse of the writing beam the information remains visible. Thus, a store in produced.
  • an erasing circuit for this purpose.
  • One of the effects of the known erasing circuit is that the correct bias voltage between the spraying cathode and the conductive layer on the screen is adjusted and maintained.
  • a tube circuit is used which represents a direct voltage supply having a low internal resistance and is generally referred to as cathode follower.
  • the anode of the tube used is connected to a supply source of a voltage of about 500 Volts, its grid is connected through a resistor to a voltage divider having a range between V and 250 V, and its cathode is connected through a resistor to the common lead to which the spraying cathode also is connected and on the other hand to the conductive layer on the screen.
  • the screen To enable the image on the screen to be erased the screen must be brought to a high positive potential for a given time so that the emission factor for the entire dielectric layer becomes greater than unity and hence the entire layer is given a positive charge and the entire screen emits light: equalization of the charge, after which this charge is removed, and a negative charge is applied to the layer in that the conductive layer is temporarily brought to a low potential or to zero potential relative to the spraying cathode.
  • the sudden positiveand negative-going voltage variations which may be superimposed on the bias voltage must be of sufficient duration to equalize the entire screen in respect of charges. For present-day storage tubes this time must be of the order of from 50 to 150 milliseconds.
  • the known circuit uses sudden voltage variations which decrease exponentially and are obtainable by differentiating a square-wave voltage via a capacitanceresistance network.
  • one electrode of a capacitor is connected to the grid of the tube and the other electrode is connected to a change-over switch which has a rest position, in which it establishes a connection to the common line, and an operative position, in which it etablishes a connection to a potential of, say, +250 V.
  • the combination of the various resistors included in the grid circuit and the capacitor produces an RC time of a duration sufficient for the erasing process.
  • a disadvantage of the known erasing circuit consists in the use of a tube, which is comparatively bulky, and together with its high voltage and filament-current supply devices is heavy and dissipates a considerable amount of power.
  • the erasing circuit according to the invention obviates all these difficulties. Only one cheap low-voltage transistor is required, and the supply voltage may be halved, for example from 500 V to 250 V.
  • an erasing circuit is characterized in that the direct-voltage supply source includes an emitter follower circuit the emitter circuit of which is connected between the storage screen and the cathode circuit and which includes at least one transistor the maximum permissible collector-emitter voltage of which is smaller than the sum of the direct voltage and the peak value of the erasing voltage.
  • Means are provided to protect the emitter follower circuit against excessive voltages, while the point of the circuit to which the other electrode of the first capacitor is connected is chosen so that the resistors together with the capacitor and in conjunction with the said means provide the appropriate time constants.
  • the various embodiments of the invention are based on the recognition that sudden voltage variations are obtainable by superposition on the bias direct voltage, without an amplifier element being required to be driven through the entire peak-to-peak voltage range, by capacitive coupling, the amplifier element being switched off, being saturated or retaining a constant voltage and hence being protected against excessive voltages.
  • FIG. 1 shows schematically an e; asing circuit according to the invention in which the collector-emitter voltage remain substantially constant
  • FIG. 2 shows such a circuit using a series arrangement
  • FIG. 3 shows a circuit using blocking diodes and time-constant matching
  • FIG. 4 shows a circuit using collector-base protection.
  • a 250 V supply source is connected to terminals 1 and 2 of the erasing circuit, in which this voltage is converted to the bias voltage of from 130 V to 230 V by means of a voltage divider comprising resistors 3 and 4 and a potentiometer 5.
  • a screen S of a display tube is connected through a lead 6 to the emitter circuit of an emitter follower to which is also connected, through a lead 7, a cathode circuit K of the display tube.
  • the emitter follower comprises a transistor 8 having an emitter resistor 9 and is biased, via a resistor 10 connected to the base, by means of the slider of the potentiometer 5.
  • the collector is connected through a collector resistor 11 to the positive terminal 1, while the emitter is connected through an emitter resistor 9 and the lead 7 to the negative terminal 2.
  • the transistor 8 is of the npn type.
  • the positive-going and negative-going sudden voltage variations used for erasing are produced by means of a change-over switch 12 which acts as a square-wave voltage supply source.
  • a rest contact 15 is connected to the lead 7
  • a make contact 14 is connected to the terminal l
  • the switch-over contact 13 is capacitively coupled to the emitter follower.
  • the 250 V pulses are produced via a capacitor 16 connected between the base of the transistor 8 and the switch-over contact 13 and decay exponentially owing to the provision of a base equivalent resistance comprising the resistors of the voltage divider 3, 4 and 5, the base resistor 10 and the input resistance of the transistor circuit.
  • the peak-to-peak value of the sudden voltage variations is substantially 500 V.
  • the transistor 8 has a maximum permissible collector-emitter voltage of, for example, V.
  • a capacitor 17 is connected between the switch-over contact 13 and the collector of the transistor 8.
  • the time constant of the base circuit which constant is determined by the capacitor 16 and the base equivalent resistance, is made equal to, or slightly greater than, the time constant of the collector circuit. This latter constant is determined by the capacitor 17 connected in parallel with the collector resistor 11, the emitter resistor 9 and the screen load.
  • the direct-voltage supply source is floating, because the emitter follower circuit is fed from a separate winding 18 of a supply transformer, for example of a DC-AC inverter of a line voltage transformer, through a rectifying circuit 19 which may also act as a voltage stabilizer.
  • the terminal 2 and hence the common lead of the emitter follower circuit are separate from the lead 7 to the cathode K but are connected to it through a small resistor 21.
  • the change-over switch I2 is fed from a separate source 22 of 250 V, the rest contact 15 being connected to the lead 7 and the make contact I4 being connected to the 250 V terminal.
  • the switch-over contact 13 is connected via the capacitor 16 to the emitter follower circuit, or strictly speaking to the said common lead thereof.
  • the switch 12 When the switch 12 is thrown over, the desired erasing voltages are produced across the resistor 21, the RC time constant being determined by the capacitor 16 and the resistor 21. These sudden voltage variations are in series with the screen bias voltage as measured across the emitter resistor 9.
  • the resistor 21 is given a small value because, seen from the display tube, it increases the internal resistance of the direct-voltage source. Since because of the series arrangement the erasing current to the display tube must pass through the emitter follower circuit, it is ensured that this current cannot produce a voltage drop which might damage the transistor by giving the supply part a low internal resistance, for example by means of a buffer capacitor 20.
  • the current drive of the transistor 8 has a magnitude such that the transistor is not cut off and the erasing current is permissible as a modulation of its bias current.
  • the capacitor 16 and the switch 12 form a load of the emitter follower.
  • the latter will deliver a large current so that the transistor 8 is driven into saturation by the provision of the base resistor 10, the voltage divider 3, 4 and 5 and the collector resistor 11.
  • the equivalent resistor used for determining the RC time must be constituted by the parallel arrangement of the said resistors with the emitter resistor 9 and the screen load.
  • the positive-going pulse causes a diode 23 included between the emitter of the transistor 8 and the emitter current to cut off, so that the transistor is shielded against the high voltage. Since the RC time for this pulse must be of the same order as for the negativegoing pulse, a parallel path is provided in the form of a resistor 25 and a diode 24 which ensures that the value of the resistor 25 is equal to the parallel resistance of the resistors and 11.
  • one electrode of the capacitor 16 is connected between the base resistor 10 and the transistor 8.
  • the negative-going pulse is also passed by the emitter follower, causing the collector-emitter voltage of the transistor to rise to a value at which the diode 26 will break down in the reverse direction. This breakdown voltage is such that the maximum permissible voltages across the transistor are not exceeded.
  • the diode 26 may be a Zener diode of a particular type.
  • the RC time for negative-going and positive-going sudden voltage variations is mainly determined by the resistor l0 and the voltage divider 3, 4 and 5. Owing to the parallel connection of the resistors 11 and 9 and the screen load the time thus obtained for the positivegoing voltage variation will be slightly shorter than that obtained for the negative-going variation, which at the beginning of the pulse has the same RC time as long as the diode 26 is operated in the breakdown direction.
  • An erasing circuit for use in a display tube provided with a storage screen and a cathode circuit comprising a DC voltage source, a potentiometer connected in parallel with the DC voltage source, a transistor having a base, an emitter and a collector, means connecting the potentiometer to the base of the transistor, a resistor, means connecting the emitter of the transistor to the DC voltage source through the resistor, means connecting the cathode circuit of the display tube to the side of the DC voltage supply connected to the emitter of the transistor, means connecting the collector of the transistor to a side of the DC voltage supply remote from the emitter of the transistor, a square wave voltage supply, a capacitor, means connecting the square wave voltage supply to the base of the transistor through the capacitor, whereby the capacitor and the potentiometer provide a circuit for applying the differential of the square wave to the base of the transistor thereby superimposing the differential of the square wave voltage on the potential from the DC voltage source, the maximum permissible collector-emitter voltage of the transistor being smaller than the sum of
  • the protection means comprises a second resistor connecting the emitter of the transistor to the DC voltage source, a third resistor connecting the base of the transistor to the potentiometer, a diode connecting the emitter of the transistor to the first resistor and having a low resistance conduction path in the direction of conduction through the emitter of the transistor, a fourth resistor, a second diode connected in series with the fourth resistor, means connecting the side of the diode remote from the fourth resistor to the side of the third resistor remote from the base of the transistor, and means connecting the side of the fourth resistor remote from the diode to the side of the first diode remote from the emitter of the transistor.
  • the protection means comprises a second resistor connecting the collector of the transistor to the DC voltage source, a diode connected in parallel with the basecollector path of the transistor, the diode having the same forward direction of conduction as the basecollector diode of the transistor and having a reverse breakdown voltage below the maximum permissable base-collector voltage of the transistor, the means connecting the base of the transistor to the potentiometer comprising a third resistor, and wherein the side of the capacitor remote from the square wave voltage supply is connected to the side of the third resistor remote from the potentiometer.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)
  • Manufacture Of Electron Tubes, Discharge Lamp Vessels, Lead-In Wires, And The Like (AREA)
US00211249A 1971-01-08 1971-12-23 Erasing circuit for use in a display tube provided with a storage screen Expired - Lifetime US3751688A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7100211A NL7100211A (enrdf_load_stackoverflow) 1971-01-08 1971-01-08

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US3751688A true US3751688A (en) 1973-08-07

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US00211249A Expired - Lifetime US3751688A (en) 1971-01-08 1971-12-23 Erasing circuit for use in a display tube provided with a storage screen

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US (1) US3751688A (enrdf_load_stackoverflow)
JP (1) JPS5237740B1 (enrdf_load_stackoverflow)
CA (1) CA963163A (enrdf_load_stackoverflow)
DE (1) DE2165262A1 (enrdf_load_stackoverflow)
FR (1) FR2121708B1 (enrdf_load_stackoverflow)
GB (1) GB1380088A (enrdf_load_stackoverflow)
IT (1) IT948131B (enrdf_load_stackoverflow)
NL (1) NL7100211A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3831054A (en) * 1972-04-24 1974-08-20 Rca Corp Storage tube erase control
US3889133A (en) * 1972-03-16 1975-06-10 Matsushita Electric Ind Co Ltd Output-voltage variable device
US3919668A (en) * 1972-10-20 1975-11-11 Matsushita Electric Ind Co Ltd Device for generating variable voltage
US3950669A (en) * 1974-04-24 1976-04-13 Rca Corporation Erasing method for storage tube employing raster scan
US4521705A (en) * 1983-07-20 1985-06-04 Honeywell Inc. Reliable field-effect transistor timer circuit

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2946917A (en) * 1959-02-12 1960-07-26 Meguer V Kalfaian Storage tube
US3090887A (en) * 1960-01-15 1963-05-21 Collins Radio Co Background improvement circuit for direct view storage tube radar indicator
US3383546A (en) * 1965-01-15 1968-05-14 Navy Usa Brightiness control circuitry for direct view storage tubes
US3426237A (en) * 1965-08-23 1969-02-04 Tektronix Inc Automatic erase circuit for storage tube
US3651489A (en) * 1970-01-22 1972-03-21 Itt Secondary emission field effect charge storage system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2946917A (en) * 1959-02-12 1960-07-26 Meguer V Kalfaian Storage tube
US3090887A (en) * 1960-01-15 1963-05-21 Collins Radio Co Background improvement circuit for direct view storage tube radar indicator
US3383546A (en) * 1965-01-15 1968-05-14 Navy Usa Brightiness control circuitry for direct view storage tubes
US3426237A (en) * 1965-08-23 1969-02-04 Tektronix Inc Automatic erase circuit for storage tube
US3651489A (en) * 1970-01-22 1972-03-21 Itt Secondary emission field effect charge storage system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3889133A (en) * 1972-03-16 1975-06-10 Matsushita Electric Ind Co Ltd Output-voltage variable device
US3831054A (en) * 1972-04-24 1974-08-20 Rca Corp Storage tube erase control
US3919668A (en) * 1972-10-20 1975-11-11 Matsushita Electric Ind Co Ltd Device for generating variable voltage
US3950669A (en) * 1974-04-24 1976-04-13 Rca Corporation Erasing method for storage tube employing raster scan
US4521705A (en) * 1983-07-20 1985-06-04 Honeywell Inc. Reliable field-effect transistor timer circuit

Also Published As

Publication number Publication date
JPS5237740B1 (enrdf_load_stackoverflow) 1977-09-24
FR2121708A1 (enrdf_load_stackoverflow) 1972-08-25
FR2121708B1 (enrdf_load_stackoverflow) 1976-10-29
CA963163A (en) 1975-02-18
NL7100211A (enrdf_load_stackoverflow) 1972-07-11
DE2165262A1 (de) 1972-07-27
GB1380088A (en) 1975-01-08
IT948131B (it) 1973-05-30

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