US3718511A - Process for epitaxially growing semiconductor crystals - Google Patents

Process for epitaxially growing semiconductor crystals Download PDF

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US3718511A
US3718511A US00098262A US3718511DA US3718511A US 3718511 A US3718511 A US 3718511A US 00098262 A US00098262 A US 00098262A US 3718511D A US3718511D A US 3718511DA US 3718511 A US3718511 A US 3718511A
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elements
bath
proportion
type
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M Moulin
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Thales SA
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Thomson CSF SA
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02417—Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02485—Other chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02568—Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02623—Liquid deposition
    • H01L21/02628—Liquid deposition using solutions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/063—Gp II-IV-VI compounds

Definitions

  • ABSTRACT A semiconductor with a PIN junction, adapted to be used as a detector or emitter of luminous radiation, is grown from a bath consisting of a liquefied mixture of three elements which are the constituents of two alloys or solid solutions taken from Groups lI/VI and/or IV/Vl of the Periodic Table.
  • the proportions of the three elements in the mixture are so chosen that the solidus curve of the temperature/composition diagram intersects the stoichiometric line at a point lying along the boundary between the solid and the solid/liquid phase on the side of the lower concentrations of the element common to the two alloys.
  • the bath In a state of thermodynamic equilibrium for the liquid/solid phase, the bath is slowly cooled in a temperature range above or below a critical temperature corresponding to the point of intersection with resulting growth of an N- type or P-type layer on a substrate immersed in the bath.
  • a change in the composition with or without a shift in temperature, the conductivity type of the layer is altered with formation of a PIN junction.
  • My present invention relates to a process for epitaxially growing semiconductor crystals of predetermined conductivity type, more specifically a unitary crystal body with at least two zones of opposite conductivity types forming a P/N junction therebetween.
  • the general object of my invention is to provide an improved process for making such semiconductors with avoidance of the aforestated drawbacks.
  • a more specific object is to provide a process for reproducibly manufacturing a crystal structure adapted to be used as a detector or emitter of luminous radiation.
  • I utilize the phenomenon of expitaxial crystal growth from a suitable solution on a compatible substrate immersed therein, with control of the bath composition and the operating temperatures, to obtain a crystalline layer of the desired conductivity type which may be the same as or different from that of the substrate and which may be followed by the formation of a second crystal layer, of opposite conductivity type, upon a modification of the bath composition and without removal of the treated substrate therefrom.
  • the resulting crystal body may have a junction between the portion thereof constituted by the original substrate and a layer of opposite conductivity type grown thereon, and/or between two such layers grown successively in the same bath.
  • the process according to my invention starts with the selection of two semiconductive compositions of two constituents each, these constituents being normally solid elements taken from Groups Il/VI and/or IV/Vl of the Periodic Table and including one element common to both compositions. It is preferred to utilize either selenium or tellurium, both from Group VI, as one of the elements and to choose the other two elements of the composition from among such metals as lead and tin (Group IV) and/or cadmium, zinc or mercury (Group II).
  • a bath consisting of a liquefied mixture of these three constituents is prepared in proportions corresponding to a point on the liquidus curve which is spaced from a neutral point on that curve, i.e., the one lying on the temperature level of the aforementioned point of intersection, in a direction consistent with the desired conductivity type of the crystal layer to be grown; this is the point of saturation and incipient solidification occurring upon a suitable lowering of the bath temperature.
  • a substrate of compatible crystal structure such as a conventionally produced semiconductor body of the same basic composition
  • the controlled cooling is terminated at least temporarily, with or without immediate removal of the coated substrate from the bath according to the number of layers to be formed.
  • the modification may be such as to shift the saturation point on the liquidus curve to a location on the opposite side of the neutral point, generally in the direction of decreasing temperatures with resulting reliquefaction of the bath mixture at the aforementioned final temperature; alternatively, the modification may vary the position of the solidus curve so as to displace its point of intersection with the stoichiometric line to a location a the opposite side of the final temperature level previously reached, thus again with a reversal of the relative positions of the neutral point and the saturation point on the liquidus curve.
  • the proportion of the common element with reference to the combined proportion of the two other elements may be reduced, preferably by the introduction of added amounts of these latter two elements with substantially no change of their relative proportion in the bath; in the second instance, the relative proportion of the last-mentioned elements may be varied with substantially no change in the proportion of the common element with reference to these other two. Both measures could, however, also be used jointly.
  • FIGS. 1 and 2 are temperature/composition diagrams of different two-component mixtures to be used as starting materials for a process according to the invention
  • FIGS. 3 and 4 are similar diagrams for a three-component composition consisting of the constituents of the mixtures of FIGS. 1 and 2;
  • FIGS. 5 '7 are somewhat schematic cross-sectional views of semiconductor bodies obtained by the process according to my invention.
  • FIG. 1 I have shown the phase diagram of a leadtellurium alloy, with the proportion of lead in terms of atomic concentration decreasing from 100 percent to percent from left to right and with the corresponding proportion of tellurium similarly decreasing from right to left.
  • the diagram shows, at the 50 percent value, a stoichiometric line l (denoting the intrinsic semiconductor material corresponding to this composition) along with a solidus curve 11 and a liquidus curve Ill separating a liquid phase (liq), a liquid-solidphase (ligsol) and a solid phase (sol).
  • FIG. 2 shows a corresponding diagram for a mixture of tin and tellurium.
  • the solidus curve 11 is offset to the right from stoichiometric line I, i.e., in the direction of increasing percentages oftellurium (region P), without ever"intersecting that line.
  • the diagram of FIG. 3 relates to a mixture of the two compositions represented in FIGS. 1 and 2, i.e., a three-component alloy consisting of lead, tin and tellurium.
  • the combined proportion of lead and tin decreases from 100 to 0 percent from left to right, the proportion of tellurium (the common element of the two starting compositions) decreasing again from right to left in this diagram.
  • tellurium the common element of the two starting compositions
  • the solidus curve 11 of FIG. 3 intersects the stoichiometric line I at a point lying on atemperature level T, (about 470 C); this point of intersection 10 is located on the boundary between the liquid-solid and the solid phase at the left of the diagram, thus on the side of the lower percentages of the common component Te.
  • a temperature level T there exists on the liquidus curve 111 a neutral point 20 corresponding to a relatively low proportion u, of (Te) and (Pb Sn).
  • the relative proportion x of lead and tin in that mixture does not affect the location of points 10 and 20 so long as the overall proportion u is maintained constant.
  • l choose an initial composition corresponding to either a ratio such as u,,, with a saturation point 21 on a temperature level T, (in a range of 500 to 550 C) corresponding to a point 11 on solidus curve 11 well above point 10 and within the n-type region N of the diagram, or a ratio such as u with a saturation point 22 on a temperature level T, (in a range of 400 to 450 C) corresponding to a point 12 on curve 11 well below point 10 and within the p-type region P.
  • Curve II intersects the line I at a point 10' and the temperature level T, at a point 11' within the n-type region N;
  • curve Il" intersects the line I at a point 10" and the temperature level Te, at a point 12" within the p-type region P.
  • modifying x instead of u also shifts the relative position of the saturation point and the neutral point on the liquidus curve.
  • the neutral point 20 is similarly displaced to a position 20' or 20" so that either n-type or p-type deposits can be obtained with an initial bath composition u, and with a temperature in the neighborhood of level T,.
  • EXAMPLE I It is desired to form a junction between a p-type monocrystalline substrate of composition (Pb Sn, )1 and.
  • the substrate is a wafer out along a privileged crystal plane from a suitably doped p-type body of the composition stated, produced by a conventional crystaldrawing process.
  • the bath chosen or the formation of the junction has the composition (Pb Sn Se corresponding to x 0.1 land u 0.05.
  • This mixture is heated in a protective atmosphere of argon to a temperature of 800 C, above the liquidus curve on the PbSn side of the associated phase diagram which is generally similar to that of FIGS. 3 and 4.
  • This bath is cooled to a level of about 700 C corresponding to the point 21 in the diagram of FIG. 3.
  • the substrate is immersed into the saturated solution from which a layer consisting predominantly of lead and tin begins to crystallize on the substrate.
  • the bath temperature is progressively lowered over a period of about 10 minutes to about 650 C, well above the level T,.
  • the growth rate of this layer is on the order of 2 microns per minute.
  • EXAMPLE II It is desired to produce a semiconductor of the same general type as that obtained in Example I, with two epitaxial layers ofp and n type, respectively, separated by a P/N junction.
  • the first, n-type layer is produced in the same manner as in the preceding Example.
  • the operating point is shifted to the left of the liquidus curve III so that the mixture is reliquefied, requiring further cooling to about 600 C restore saturation at a new point of incipient solidification corresponding to point 22 of FIG. 3.
  • controlled cooling is resumed for a period of, say, 20 minutes with formation of a second, p-type layer (with x 0.075) on the n-type layer already present on the substrate which is then removed from the bath.
  • EXAMPLE III The semiconductor body described in the preceding Example can be produced by modifying the bath concentration, after formation of the n-type first layer in the manner. described, by introducing a sufficient amount of selenium and tin to change the value of x from 0.11 to 0.15, with u remaining at its original value of 0.05. This establishes a new solidus curve, similar to curve II of FIG. 4, to the right of the original curve whereby the deposit obtained upon further controlled cooling is of p-type conductivity as explained above.
  • EXAMPLE IV To produce a semiconductor akin to that of Example I but with the selenium replaced by tellurium, a bath consisting of lead, tin and tellurium as discussed in conjunction with FIGS. 3 and 4 is used with a composition (Pb Sn Te i.e., with x 0.30 and u 0.05.
  • the substrate in this case, is a conventionally drawn monocrystal composed of lead, tin and tellerium.
  • the n-type layer grown on that substrate is of substantially the same composition, with x 0.20 and Controlled cooling takes place from 550 to about 500 Cl
  • a second (p-type) layer may be deposited on the n-type first layer by the technique of Example [I or III.
  • FIGS. 5 7 I have shown several types of semiconductor obtainable with the process described above.
  • a substrate 30 of p-type conductivity is covered by an epitaxially grown n-type layer 31 forming therewith a junction 32, the two major faces of being electrically-energized in the forward direction of one of their junctions.
  • These cubes which may be produced by etching through a mask of silicon oxide, are provided on all lateral faces with semireflecting coatings 37 to intensify the emission of substantially monochromatic light from the plane of junction 32.
  • the concentration of charge carriers and the physical thickness of the various layers depends on the intended use of the semiconductor.
  • the light-receiving layer (31 in FIG. 5) should be only limitedly conductive, i.e., should deviate only slightly in its composition from the stoichiometric relationship, and should have a thickness depending on the absorptivity of the material for the wavelengths to be detected, the adjoining zone of opposite conductivity type being given a strong concentration of charge carriers to minimize current flow in the nonilluminated state.
  • the use of homojunction, as described above, in the position of boundary 36 (thus with additional n-type material of different carrier concentration on the segments of FIG. 7) may help solve the problem of guiding the radiation in an emitter of light, particularly if this emitter has an active layer 31 insufficiently transparent to this radiation.
  • compositions include (Cd, Hg)Te in addition to the lead/tin/tellurium and lead/tin/selenium alloys discussed above.
  • Sn(Se,Te) is preferred.
  • a process for epitaxially growing a semiconductor crystal of predetermined conductivity type comprising the steps of:
  • compositions of two normally solid elements each, including one element common to both compositions, with constituents from Groups II/VI or IV/VI of the Periodic Table, said constituents being cadmium or mercury in Group II, lead or tin in Group IV and selenium or tellurium in Group VI, said common element being selenium, tellurium or zinc, the other two elements being members of the same Group;
  • preparing a bath consisting of a liquefied mixture of the constituents of said compositions in proportions giving rise to a temperature/composition diagram with a stoichiometric line and with a solidus curve intersecting said line at a first point lying along the boundary between the solid and the solid/liquid phases on one side of the solidus curve, said diagram having a liquidus curve diverging from said boundary and defining a second point on the temperature level of said first point, said proportions being chosen to correspond to a third point on said liquidus curve spaced from said second point in a direction consistent with said predetermined conductivity type;
  • a process as defined in claim 2 wherein the modification of the bath composition involves a diminution of the proportion of said common element with reference to the combined proportion of the other two elements, with substantially no change in the relative proportion of said other two elements and with resulting reliquefaction of the mixture at said final temperature above a fourth point on said liquidus curve which is spaced from said second point in a direction opposite said third point and consistent with said opposite conductivity type, the bath temperature being lowered to said fourth point prior to resumption of controlled cooling to form said other layer.

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  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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US00098262A 1969-12-17 1970-12-15 Process for epitaxially growing semiconductor crystals Expired - Lifetime US3718511A (en)

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FR6943698A FR2071085A5 (enrdf_load_stackoverflow) 1969-12-17 1969-12-17

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BE (1) BE760375A (enrdf_load_stackoverflow)
DE (1) DE2062041C3 (enrdf_load_stackoverflow)
FR (1) FR2071085A5 (enrdf_load_stackoverflow)
GB (1) GB1340671A (enrdf_load_stackoverflow)
LU (1) LU62262A1 (enrdf_load_stackoverflow)
NL (1) NL7018330A (enrdf_load_stackoverflow)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3770565A (en) * 1972-01-05 1973-11-06 Us Navy Plastic mounting of epitaxially grown iv-vi compound semiconducting films
US3902924A (en) * 1973-08-30 1975-09-02 Honeywell Inc Growth of mercury cadmium telluride by liquid phase epitaxy and the product thereof
US3925147A (en) * 1971-08-30 1975-12-09 Hughes Aircraft Co Preparation of monocrystalline lead tin telluride
US4075043A (en) * 1976-09-01 1978-02-21 Rockwell International Corporation Liquid phase epitaxy method of growing a junction between two semiconductive materials utilizing an interrupted growth technique
US4263065A (en) * 1980-03-24 1981-04-21 Rockwell International Corporation Semi-open liquid phase epitaxial growth system
US4273596A (en) * 1978-10-03 1981-06-16 The United States Of America As Represented By The Secretary Of The Army Method of preparing a monolithic intrinsic infrared focal plane charge coupled device imager
US4315477A (en) * 1980-03-24 1982-02-16 Rockwell International Corporation Semi-open liquid phase epitaxial growth system
WO1982001671A1 (en) * 1980-11-14 1982-05-27 Barbara Res Center Santa Process and apparatus for growing mercury cadmium telluride layer by liquid phase epitaxy from mercury-rich melt
US4357620A (en) * 1980-11-18 1982-11-02 The United States Of America As Represented By The Secretary Of The Army Liquid-phase epitaxial growth of cdTe on HgCdTe
US4376663A (en) * 1980-11-18 1983-03-15 The United States Of America As Represented By The Secretary Of The Army Method for growing an epitaxial layer of CdTe on an epitaxial layer of HgCdTe grown on a CdTe substrate
US5150183A (en) * 1987-07-10 1992-09-22 Kernforschungszentrum Karlsruhe Gmbh Switch matrix including optically non-linear elements
WO2003105197A1 (en) * 2002-06-10 2003-12-18 Ii-Vi Incorporated Radiation detector
US7223367B1 (en) * 1999-03-26 2007-05-29 Sony International (Europe) Gmbh Chemical sensor arrangement
US20220285103A1 (en) * 2021-03-08 2022-09-08 Kabushiki Kaisha Toshiba Photoelectric conversion element and method for manufacturing the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS575325A (en) * 1980-06-12 1982-01-12 Junichi Nishizawa Semicondoctor p-n junction device and manufacture thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3403133A (en) * 1961-12-26 1968-09-24 Minnesota Mining & Mfg Thermoelectric compositions of tellurium, manganese, and lead and/or tin

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3403133A (en) * 1961-12-26 1968-09-24 Minnesota Mining & Mfg Thermoelectric compositions of tellurium, manganese, and lead and/or tin

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Hiscocks et al., Crystal Pulling and Constitution in Pbi xSnxTe of Materials Science, Vol. 3, 1968, pages 76 79. *

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3925147A (en) * 1971-08-30 1975-12-09 Hughes Aircraft Co Preparation of monocrystalline lead tin telluride
US3770565A (en) * 1972-01-05 1973-11-06 Us Navy Plastic mounting of epitaxially grown iv-vi compound semiconducting films
US3902924A (en) * 1973-08-30 1975-09-02 Honeywell Inc Growth of mercury cadmium telluride by liquid phase epitaxy and the product thereof
US4075043A (en) * 1976-09-01 1978-02-21 Rockwell International Corporation Liquid phase epitaxy method of growing a junction between two semiconductive materials utilizing an interrupted growth technique
US4273596A (en) * 1978-10-03 1981-06-16 The United States Of America As Represented By The Secretary Of The Army Method of preparing a monolithic intrinsic infrared focal plane charge coupled device imager
US4263065A (en) * 1980-03-24 1981-04-21 Rockwell International Corporation Semi-open liquid phase epitaxial growth system
US4315477A (en) * 1980-03-24 1982-02-16 Rockwell International Corporation Semi-open liquid phase epitaxial growth system
US4401487A (en) * 1980-11-14 1983-08-30 Hughes Aircraft Company Liquid phase epitaxy of mercury cadmium telluride layer
WO1982001671A1 (en) * 1980-11-14 1982-05-27 Barbara Res Center Santa Process and apparatus for growing mercury cadmium telluride layer by liquid phase epitaxy from mercury-rich melt
US4357620A (en) * 1980-11-18 1982-11-02 The United States Of America As Represented By The Secretary Of The Army Liquid-phase epitaxial growth of cdTe on HgCdTe
US4376663A (en) * 1980-11-18 1983-03-15 The United States Of America As Represented By The Secretary Of The Army Method for growing an epitaxial layer of CdTe on an epitaxial layer of HgCdTe grown on a CdTe substrate
US5150183A (en) * 1987-07-10 1992-09-22 Kernforschungszentrum Karlsruhe Gmbh Switch matrix including optically non-linear elements
US7223367B1 (en) * 1999-03-26 2007-05-29 Sony International (Europe) Gmbh Chemical sensor arrangement
WO2003105197A1 (en) * 2002-06-10 2003-12-18 Ii-Vi Incorporated Radiation detector
US20050268841A1 (en) * 2002-06-10 2005-12-08 Csaba Szeles Radiation detector
US7192481B2 (en) 2002-06-10 2007-03-20 Ii-Vi Incorporated Radiation detector
US20220285103A1 (en) * 2021-03-08 2022-09-08 Kabushiki Kaisha Toshiba Photoelectric conversion element and method for manufacturing the same
US11955295B2 (en) * 2021-03-08 2024-04-09 Kabushiki Kaisha Toshiba Photoelectric conversion element and method for manufacturing the same

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Publication number Publication date
DE2062041B2 (enrdf_load_stackoverflow) 1979-06-21
DE2062041A1 (de) 1971-06-24
FR2071085A5 (enrdf_load_stackoverflow) 1971-09-17
LU62262A1 (enrdf_load_stackoverflow) 1971-05-14
BE760375A (fr) 1971-05-17
DE2062041C3 (de) 1980-02-21
NL7018330A (enrdf_load_stackoverflow) 1971-06-21
GB1340671A (en) 1973-12-12

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