US3669769A - Method for minimizing autodoping in epitaxial deposition - Google Patents
Method for minimizing autodoping in epitaxial deposition Download PDFInfo
- Publication number
- US3669769A US3669769A US76399A US3669769DA US3669769A US 3669769 A US3669769 A US 3669769A US 76399 A US76399 A US 76399A US 3669769D A US3669769D A US 3669769DA US 3669769 A US3669769 A US 3669769A
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- US
- United States
- Prior art keywords
- wafer
- autodoping
- layer
- epitaxial
- impurity
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- Expired - Lifetime
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/08—Germanium
-
- H10P14/24—
-
- H10P14/2905—
-
- H10P14/3411—
-
- H10P32/15—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/007—Autodoping
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/145—Shaped junctions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/916—Autodoping control or utilization
Definitions
- the present invention relates to the growth of epitaxial layers on semiconductor substrates and more particularly to a method for achieving a control over the impurity concentration level in the epitaxial layer or other deposited layer.
- epitaxy implies a continuation of the lattice structure of a crystalline substrate into a deposited material.
- a layer of semiconductor material is conventionally deposited on a monocrystalline semiconductor wafer wherein the crystal lattice of the layer is a continuation of the base wafer.
- the active regions of the devices are generally fabricated into the epitaxial layer and the base wafer serves normally as a support.
- vapor epitaxial growth processes Two main types of vapor epitaxial growth processes are known, e.g., disproportionation processes and pyrolytic decomposition processes.
- a material which is a semiconductor constituent is formed into a compound with a carrier element or material at one temperature in the deposition system, and is released or disproportionated from the carrier material at another temperature at the substrate, which is typically monocrystalline.
- a compound of which the semiconductor is one constituent is decomposed by heat in the vicinity of the substrate and the semiconductor compound constituent of the lattice grows on the substrate.
- Epitaxial growth of both depositions typically takes place at elevated temperatures.
- the epitaxial deposition of silicon on a silicon substrate occurs normally in the temperature range of 900'1200 C.
- the impurity in a diffuse'd region has a sufficient vapor pressure to outdiffuse from the diffused region.
- the main gas flow within the reactor creates a thin layer of relatively static gas in the immediate vicinity of the substrate surface.
- Some of the outdiffusing impurity atoms will have sufiicient energy to enter the main gas flow, although most of the impurity atoms from the difiused region lack sufficient energy to penetrate this thin boundary layer.
- these atoms are laterally distributed within the generally static gas layer since there are no thermal or aerodynamical restrictions for lateral motion of the atoms within this layer; this results in the possibility of impurity atoms being redeposited onto the surface of the substrate, not only over the diffused region but also in the non-diffused or substrate regions.
- This lateral transport of the impurity atmos is due to the tendency to establish an equilibrium of the impurity concentration within the gas phase of the boundary layer, causing the epitaxial film or other deposited layer to be autodoped at substantial distances from the diffused region in the substrate.
- the impurity concentration decreases away from the diffused region but it is still significant at substantial distances from the diffused region.
- the present invention provides a method for growing an epitaxial layer so that it does not have an uncontrolled impurity concentration due to autodoping.
- the invention controls or significantly reduces autodoping from the diffused region of a substrate by capping the diffused region with an initial growth so that the impurity atoms in the diffused region cannot escape from the diffused region into the portions of the epitaxial layer or into the non-diffused regions of the substrate.
- the object of this invention is to provide a method of controlling autodoping.
- Another object of this invention is to provide a method for minimizing autodoping by means of controlled variations in the compositions of the gaseous reaction mixture used to produce the epitaxial layer wherein a cap is formed under conditions which minimize the incorporation of the outdiffused impurity within the deposited layer.
- FIG. l-3 is a sequence of elevational views in broken cross-section of a semiconductor wafer illustrating the structure during various stages of the process.
- FIG. 4 is an elevational view in cross-section of a semiconductor device illustrating the profiles produced by autodoping during the deposition of an N-type epitaxial layer on a P-type substrate with a localized N+ diffusion by known prior art techniques.
- FIG. 5 is a graph of impurity concentration versus depth illustrating the impurity profiles resulting from uncontrolled N-type autodoping of an intrinsic deposition and comparing the same with the profile produced by the process of the invention.
- FIG. 6 is an elevational cross-sectional view of a semiconductor device having a P-type epitaxial layer deposited on a P-type substrate which contains a N+ localized dilfused area.
- FIG. 7' is a graph of impurity concentration versus depth illustrating for comparison profiles produced by the subject method and prior art methods of depositing epitaxial layers.
- FIG. 4 illustrates the configuration of an outdilfused impurity region in the N-type epitaxial layer being deposited by conventional prior art techniques.
- diffused region 10 of opposite type than base wafer 12 produces in the epitaxial layer 14 a region 15 having long, thin laterally extending regions 16 about the region 10 located at the interface 17 between wafer 12 and layer 14.
- Region 16 can in certain types of devices cause shorts between active elements and also alter the characteristics of resistors when integrated circuit devices are fabricated in layer 14.
- curve A depicts the profile taken on line 5A which indicates a relatively heavy impurity concentration adjacent to the interface.
- FIG. 1 depicts a monocrystalline wafer 18 doped with a P-type impurity with a diffused region 20 having a relatively high concentration on N-type impurity.
- a thin initial epitaxial layer 22 is grown on base wafer 18 by positioning the wafer in an epitaxial reactor, heating the wafer up to a growth temperature on the order of 900 1300 C. and introducing a gaseous reaction mixture capa- 4 ble of depositing semiconductor material.
- the gaseous mixture contains a compound of the semiconductor material and a carrier gas.
- the semiconductor material Upon coming in contact with the heated wafer, the semiconductor material will deposit on the wafer forming a continuation of the original crystal lattice of the wafer.
- the concentration of the compound of the semiconductor material in the gaseous mixture is maintained at a relatively low value typically 0.01 to 0.1 percent by volume.
- this ratio of the carrier gas to the compound of the semiconductor material is in the range of 1000 to 10,000.
- the resultant relatively slow growth rate is achieved by utilizing the above mentioned reactive mixture which substantially reduces lateral autodoping.
- the deposition rate is in the range of 10 to 5000 A. per minute, more preferably to 800 A. per minute.
- the compound of the semiconductor material can be SiH SiCl SiHCl GeH GeI or other semiconductor source material such as -IIIV or lI-VI compounds.
- the carrier gas is typically hydrogen but could also be another inert gas such as nitrogen, argon or the like, or mixtures of gases.
- the wafer is supported on a susceptor which can be heated by induction or other means to a temperature in the range of 800 to 1300 C. more preferably 1000 to 1200 C.
- the gaseous reaction mixture is changed to increase the proportion of the compound of the semiconductor material to between 1 to 4 percent.
- the ratio of the carrier gas to the compound of the semiconductor material is in the range of 25 to 100 volumes of carrier gas to one volume of semiconductor material. This mixture results in a significantly faster deposition rate, typically in the range of 1000 to 10,000 A. per
- thickness of the overall epitaxial layer is achieved which is typically from 1.0 to 20.0 microns.
- Curve B in FIG. 5 depicts the impurity concentration profile taken on line 5B of FIG. 3. Comparing profile B to A, it is obvious that the abnormally high autodoping about the impurity region 20 near the interface 17 is reduced.
- FIG. 6 illustrates a 'P-type epitaxial layer 30 deposited on P-type wafer 18 provided with an N+ region 20.
- Curve 7A depicts the profile taken adjacent region 20 on section 7A when layer 30 is deposited by the method of this invention.
- curve 32 indicates the profile taken at the same point that could be reasonably expected if prior art deposition techniques are used to deposit layer 30. Note that a significant impurity concentration is present at the interface 17 when the standard technique is used.
- EXAMPLE I A silicon wafer having a diffused region with an arsenic impurity surface concentration of 2 l0 was placed in a standard horizontal open tube reactor on an RF. inductively heated susceptor. The reactor, maintained at room temperature, was then purged for ten minutes with argon flowing through the tube at 10 liters per minute. The reactor still at room temperature was then purged with hydrogen for ten minutes at a flow rate of 20 liters per minute. The wafer was then baked for ten minutes at 1175 C. in the hydrogen environment. A first gaseous reaction mixture for depositing the initial epitaxial layer was admitted to the reactor, which mixture was produced by introducing 20 liters of hydrogen per minute and 3 cc. of SiCl per minute.
- the deposition rate was on the order of .01 micron per minute. After 7 minutes and 15 seconds the composition of the gaseous reaction mixture was changed by increasing the flow rate of the SiCl to 230 cc. per minute. The deposition was continued for 7 minutes at a rate on the order of ,5 micron per minute. Upon cooling, the wafer was examined and the epitaxial thickness measured. A resistivity profile was made 3.5 mils from the diffused region, which indicated that there was no significant autodoping at that point in the epitaxial layer.
- EXAMPLE II The eifect of deposition rate on autodoping was demonstrated by depositing epitaxial layers on separate wafers, similar to the wafer described in Example I, at diiferent rates. A first wafer was placed in the previously described reactor and the same initial purging and baking operation performed. An H -SiC1 gaseous mixture with a somewhat higher SiCl concentration than the one described in Example I, was passed for 18 minutes over the wafer heated to a temperature of 1175 C. Thereafter the wafer was cooled, the thickness of the deposited layer measured by bevel and stain techniques and the impurity profile taken at a distance of 50 mils from the diffused region.
- the identical procedure was followed in depositing a layer on the second wafer except that the gaseous mixture was similar to the subsequent mixture described in Example I.
- the mixture was passed over the wafer for 7 /2 minutes. Thickness measurements indicated an epitaxial thickness of 3.3 microns on each wafer.
- the deposition rate for the first wafer was calculated as 0.18 micron per minute.
- the growth rate for the second wafer was 0.44 micron per minute.
- a comparison of the impurity profiles indicated that the outdifiused impurity on the second wafer at a point 50 mils from the edge of the diffused region was at least double that of the first wafer when also measured 50 mils away from the edge of the diffused region. This clearly indicated the beneficial efiect of a reduced growth rate in regard to minimizing autodoping.
- EXAMPLE III The same apparatus, and techniques described in Example II are used to demonstrate the effect of deposition rate on autodoping when using SiH
- the first wafer is exposed for 18 minutes to a gaseous mixture produced by admitting to the reactor 20 liters of hydrogen per minute and 50 cc. of SiH per minute which will result in a growth rate of about 0.2 micron per minute.
- the second wafer is exposed for 7 /2 minutes to a gaseous mixture produced by admitting 20 liters of hydrogen per minute and 120 cc. of SiH, per minute to the reactor which will result in a growth rate of about 0.5 micron per minute.
- the wafers are heated to 1175 C.
- the deposition rate of silicon on the first wafer using the aforedescribed gaseous mixture is approximately that of the rate resulting on the second wafer from using the second gaseous mixture. Significantly more autodoping results on the second wafer where the deposition occurs at a more rapid rate.
- a process for minimizing autodoping during deposition of an epitaxial layer of semiconductor material from the gaseous phase on a heated base of monocrystalline semiconductor material which base includes diffused regions of a semiconductor impurity comprising:
- a first gaseous reaction mixture which includes a carrier gas and a compound of the semiconductor material in a ratio in the range of 1000 to 10,000 volumes of carrier gas to one volume of the compound of the semiconductor material for a period of time sufficient to deposit an epitaxial layer having a thickness of at least 2,000 A.
- a second gaseous reaction mixture which includes a carrier gas and a compound of the semiconductor material in a range of 25 to volumes of carrier gas semiconductor to one volume of the compound of the semiconductor material for a period of time suflicient to deposit the desired thickness of epitaxial layer
- said second gaseous mixture resulting in a significantly faster deposition rate of from 0.1 to 1 micron per minute.
- said compound of a semiconductor material is a material selected from the group consisting of SiH SiCl SiHCl GeH and GeI 3.
- said carrier gas is H 4.
- said compound of semiconductor material is 'SiCl 5.
- said base is heated to a temperature in the range of 800 to 1300 C.
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US7639970A | 1970-09-29 | 1970-09-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US3669769A true US3669769A (en) | 1972-06-13 |
Family
ID=22131771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US76399A Expired - Lifetime US3669769A (en) | 1970-09-29 | 1970-09-29 | Method for minimizing autodoping in epitaxial deposition |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US3669769A (enExample) |
| DE (1) | DE2148119A1 (enExample) |
| FR (1) | FR2105864A5 (enExample) |
| GB (1) | GB1328170A (enExample) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3761757A (en) * | 1970-12-10 | 1973-09-25 | Siemens Ag | Infrared lamp with silicon bulb |
| US3765960A (en) * | 1970-11-02 | 1973-10-16 | Ibm | Method for minimizing autodoping in epitaxial deposition |
| US3885061A (en) * | 1973-08-17 | 1975-05-20 | Rca Corp | Dual growth rate method of depositing epitaxial crystalline layers |
| US3929526A (en) * | 1972-02-11 | 1975-12-30 | Ferranti Ltd | Method of making semi-conductor devices utilizing a compensating prediffusion |
| JPS5623739A (en) * | 1979-08-04 | 1981-03-06 | Tohoku Metal Ind Ltd | Manufactue of semiconductor element having buried layer |
| US4504330A (en) * | 1983-10-19 | 1985-03-12 | International Business Machines Corporation | Optimum reduced pressure epitaxial growth process to prevent autodoping |
| US4559091A (en) * | 1984-06-15 | 1985-12-17 | Regents Of The University Of California | Method for producing hyperabrupt doping profiles in semiconductors |
| US4687682A (en) * | 1986-05-02 | 1987-08-18 | American Telephone And Telegraph Company, At&T Technologies, Inc. | Back sealing of silicon wafers |
| US4859626A (en) * | 1988-06-03 | 1989-08-22 | Texas Instruments Incorporated | Method of forming thin epitaxial layers using multistep growth for autodoping control |
| US4894349A (en) * | 1987-12-18 | 1990-01-16 | Kabushiki Kaisha Toshiba | Two step vapor-phase epitaxial growth process for control of autodoping |
| US6162706A (en) * | 1997-07-31 | 2000-12-19 | Stmicroelectronics S.A. | Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenic |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR890003983A (ko) * | 1987-08-27 | 1989-04-19 | 엔.라이스 머레트 | 종래의 cvd 반응로를 사용한 스트레인층 초격자의 연속 화학 증착 성장 방법 |
-
1970
- 1970-09-29 US US76399A patent/US3669769A/en not_active Expired - Lifetime
-
1971
- 1971-07-30 FR FR7129454A patent/FR2105864A5/fr not_active Expired
- 1971-08-27 GB GB4027771A patent/GB1328170A/en not_active Expired
- 1971-09-27 DE DE19712148119 patent/DE2148119A1/de active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3765960A (en) * | 1970-11-02 | 1973-10-16 | Ibm | Method for minimizing autodoping in epitaxial deposition |
| US3761757A (en) * | 1970-12-10 | 1973-09-25 | Siemens Ag | Infrared lamp with silicon bulb |
| US3929526A (en) * | 1972-02-11 | 1975-12-30 | Ferranti Ltd | Method of making semi-conductor devices utilizing a compensating prediffusion |
| US3885061A (en) * | 1973-08-17 | 1975-05-20 | Rca Corp | Dual growth rate method of depositing epitaxial crystalline layers |
| JPS5623739A (en) * | 1979-08-04 | 1981-03-06 | Tohoku Metal Ind Ltd | Manufactue of semiconductor element having buried layer |
| US4504330A (en) * | 1983-10-19 | 1985-03-12 | International Business Machines Corporation | Optimum reduced pressure epitaxial growth process to prevent autodoping |
| US4559091A (en) * | 1984-06-15 | 1985-12-17 | Regents Of The University Of California | Method for producing hyperabrupt doping profiles in semiconductors |
| US4687682A (en) * | 1986-05-02 | 1987-08-18 | American Telephone And Telegraph Company, At&T Technologies, Inc. | Back sealing of silicon wafers |
| US4894349A (en) * | 1987-12-18 | 1990-01-16 | Kabushiki Kaisha Toshiba | Two step vapor-phase epitaxial growth process for control of autodoping |
| US4859626A (en) * | 1988-06-03 | 1989-08-22 | Texas Instruments Incorporated | Method of forming thin epitaxial layers using multistep growth for autodoping control |
| US6162706A (en) * | 1997-07-31 | 2000-12-19 | Stmicroelectronics S.A. | Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenic |
| US6776842B2 (en) | 1997-07-31 | 2004-08-17 | Stmicroelectronics S.A. | Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenic |
Also Published As
| Publication number | Publication date |
|---|---|
| GB1328170A (en) | 1973-08-30 |
| FR2105864A5 (enExample) | 1972-04-28 |
| DE2148119A1 (de) | 1972-03-30 |
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