US3649923A - Carrier-frequency generator for multiplex communication system - Google Patents

Carrier-frequency generator for multiplex communication system Download PDF

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US3649923A
US3649923A US36026A US3649923DA US3649923A US 3649923 A US3649923 A US 3649923A US 36026 A US36026 A US 36026A US 3649923D A US3649923D A US 3649923DA US 3649923 A US3649923 A US 3649923A
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frequency
train
pulse
outputs
dividers
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Piero Venturini
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Italtel SpA
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Societa Italiana Telecomunicazioni Siemens SpA
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J1/00Frequency-division multiplex systems
    • H04J1/02Details
    • H04J1/06Arrangements for supplying the carrier waves ; Arrangements for supplying synchronisation signals

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  • a Square wave generated y a high-freq ency oscillator is sub- 323/
  • My present invention relates to a circuit arrangement for the simultaneous generation of a plurality of high-frequency waves to be used. for example, as carriers for a multiplex communication system.
  • the several carrier frequencies employed, or at least some of them are harmonically unrelated, i.e., are not multiples or factors of one another.
  • the general object of my present invention is to provide a frequency-generating system satisfying these requirements.
  • my invention aims at providing a frequency-generating network incorporating only a few different types of circuit elements which, therefore, can be easily standardized and which preferably should bd realizable by the integrated-circuit technique.
  • a further object is to provide a frequency-generating system in which several harmonically unrelated frequencies can be derived from a common source with high and substantially uniform signal-to-noise ratio.
  • a more specific object of our invention is to provide two or more related pulse trains of this description adapted to be used for the synthesizing of certain frequencies in the manner described above.
  • a high-frequency oscillator which generates a basic square wave and feeds it to a frequencydividing network including a plurality of dividers whose output frequencies are related to the basic oscillator frequency by different stepdown ratios.
  • the outputs of some or all of these dividers are filtered to yield the corresponding fundamental frequencies or higher harmonics thereof.
  • the outputs thereof can be gated to produce a train of relatively narrow pulses with relatively wide spacing.
  • a pulse train may be utilized for modulating purposes, as described with reference to the copending application identified above, or for generating output frequencies considerably higher than the corresponding fundamental.
  • FIG. 1 is a block diagram of a carrier-frequency generator embodying our invention
  • FIGS. 2-6 are sets of graphs relating to the operation of the system of FIG. I;
  • FIG. 7 is a more detailed illustration of a frequency divider forming part of the system of FIG. 1;
  • FIG. 8 is a set of graphs serving to explain the operation of the divider of FIG. 7.
  • the system shown in FIG. 1 is particularly designed to produce a multiplicity of carrier frequencies for a multiplex telecommunication system, namely:
  • a reversing carrier F of l 14 kHz.
  • a conventional square-wave generator 100 such as a sinewave oscillator followed by a squarer, emits a basic frequency F of 1,440 kHz.
  • the output of this generator is fed to a frequency-dividing network I0! whose several stages, grouped in a number of parallel branches and cascaded within these branches, are constituted by individual bistable elements or combinations of such elements.
  • square-wave generator [00 works directly into a simple flip-flop 102, operating as a divider with a stepdown ratio of 2:1, and in parallel therewith into a frequency divider 103 of stepdown ratio 15: l.
  • Divider I02 feeds another divider [10, of stepdown ratio 3: l whose output is a pulse train with a repetition frequency of 240 kHz.
  • This output is fed to a lead d via a pair of cascaded flip-flops I07, 108, to another lead 3 by way ofa single flip-flop 109, and to a chain of additional dividers (stepdown ratio 3:1) and 190, 191, 192(stepdown ratio 2: l
  • the output of flip-flop 109 is further supplied, by way of two cascaded dividers I17 and 118 of respective stepdown ratios 3: l and 2: 1, to a lead c which carries a pulse train having a repetition frequency of 20 kHz.
  • An AND-gate receives on its inputs 151, I52, I53 the outputs of dividers I20, I90 and 191 to energize a lead e with a pulse train having a repetition frequency of 12 kHz. (corresponding to that of flip-flop Hill) and a pulse width equal to that of the output of divider I20.
  • Lead e has two branches e e, and also extends to inputs 16!, 17I of two AND-gates I60 and 170 in parallel therewith; AND-gate I70 further receives at its input 172 the output of flip-flop 192 to energize a lead )1 with a pulse train of repetition frequency 6 kHz., whereas AND-gate has inputs 162, 163 respectively supplied by dividers I10 and I02 to produce a pulse train of repetition frequency 12 kHz. on a lead 1' split into five branches i,i,,. Finally, a lead j is energized from lead 1' and from the output of divider 106 via inputs 181, 182 of an AN D-gate 180 to carry a pulse train of repetition frequency 4 kHz.
  • Leads a-j include respective filters, generally designated 130. working into individual amplifiers 200.
  • Leads a, b and c include identical low-pass filters 131, 132. 133 with a cutoff frequency of 22 kHz. to deliver the frequencies F F F representing the fundamentals of their respec tive pulse trains.
  • Leads d, f, g are also provided with low-pass filters 134, 136 and 138 having a cutoff frequency at 122 kHz.; since the last stage of the network branch feeding the lead 4' (as well as the leads a, b, c) is a flip-flop. the pulse train on that lead is a square wave which has no even harmonics so that the filter 134 is required to suppress only the third and higher harmonics.
  • filters 134, 136 and 138 pass respective sine waves whose frequencies F F,, and F, correspond to the fundamentals of the incoming pulse trains.
  • the use of similar filters with substantially identical cutoff frequencies is, of course, possible only where the highest frequency (F or F,,) is not more than about double the lowest frequency (F I or F).
  • the remaining leads 2,, e it, i,i and j include respective band-pass filters 135, 137 and 139-145 designed to select higher harmonics of the corresponding repetition frequencies.
  • FIG. 2 shows in graphs (a)(j) the pulse trains appearing on the correspondingly designated leads of FIG. 1.
  • trains (a), (b), (c) and (d) are square waves, with pulse widths equal to half their periods, owing to the bistable nature of the terminal divider stages 191, 105, 118 and 108.
  • FIG. 3 shows the three pulse trains fed into the inputs 151, 152, 153 of AND-gate 150, together with the pulse train (e) issuing therefrom.
  • the first pulse train (151), supplied by the frequency divider 120 of FIG. I, has a pulse width of6T, and a repetition period of 311T corresponding to a frequency of 48 kHz.
  • the second and third pulse trains (152) and (153) are square waves of frequencies 24 kHz. and 12 kHz. with pulse widths of 311T, and GOT, corresponding to periods of T,, and 120T,, respectively.
  • the logical product of these three pulse trains is the train (e) described above with reference to FIG. 2.
  • FIG. 4 similarly, shows pulse trains (161), (162) and (163) appearing on the correspondingly designated inputs of AND- gate 160, together with the resulting pulse train (i).
  • Train (161) has a pulse width of 61, and a period 120T,,, its frequency being thus 12 kHz.
  • Train (162) has a pulse width of 2T, period of 6T,,, corresponding to a frequency of 240 kHz.
  • Train (163) is a square wave of frequency 720 kHz. with a pulse width equal to T, and a period of 2T,,. Again, the logical product of these three pulse trains is the train (i) discussed above with reference to FIG. 2.
  • Pulse train (h) is identical with the one so designated in FIG. 2.
  • Train (181) and (182) fed to the inputs I81. 182 of AND-gate 180 to produce the pulse train (j) of FIG. 2.
  • Train (181) has pulses of width T, and period 120T,,, its frequency being 12 kHz.
  • Train (182) has a pulse width equal to the period of train (181 and a period of 360T,,, its frequency being 4 kHz.
  • FIG. 7 illustrates an embodiment of frequency dividers I10 and 120 of FIG. 1.
  • Divider comprises three cyclically interconnected flip-flops 111, 112, 113 with setting inputs connected in parallel to the set output of the divider 102 and with resetting inputs connected to the set outputs of the respective preceding flip-flops in the cycle.
  • Divider is a similar cyclic array of flip-flops 121, 122, 123, 124, having setting inputs energized in parallel from divider 110, specifically from the reset output of its flip-flop 113.
  • Each flip-flop 121 125 has its set output connected on the one hand to an enabling input of the next-following flip-flop and on the other hand to a resetting input of the next-but-one flip-flop preceding it in the chain.
  • the set outputs of two consecutive flip-flops, here the stages 121 and 122, are combined in an AND-gate 126 feeding the divider 190 and the AND-gate of FIG. 1.
  • graph P represents the pulse train arriving from divider 102, i.e., a square wave of pulse width T and period 21",.
  • Graph P shows the periodic setting and resetting of flip-flop 11] in response to periodic stepping pulses P With this flip-flop reset at a given instant, the next pulse P sets it and causes the substantially concurrent resetting of flip-flop 112 (assumed to have been set before) whereby the next pulse P sets the latter flip-flop without affecting the condition of flipflop 111.
  • the setting of flip'flop 112 resets the previously set flip-flop 113, thus enabling same to be set again in response to a third stepping pulse P with resulting resetting of flip-flop 11]; the cycle is then repeated.
  • the three flip-flops of divider 110 are set during mutually staggered intervals of length 4T, and reset during similarly staggered intervals of length 2T,,.
  • Graph 1 shows the inversion of pulse train P as obtained from the reset output of flip-flop 113, its pulses occupying one-third of a cycle of 6T,,.
  • the first pulse of this graph is assumed to set the flip-flop 121 of divider 120, as shown in graph P
  • This setting enables the second flip-flop 122 which is therefore set by the next pulse P see graph P and in turn enables the t hird flip-flop 123 for setting by the following stepping pulse P as indicated in graph P
  • flip-flops 124 and 125 are successively set as indicated in graphs P and P
  • the setting of flip-flop 123 resets the flip-flop 12]; flip-flop 122 is reset upon the occurrence of a pulse P and so forth.
  • the set intervals of flip flops 121-125 have a duration of 12T,, and are relatively staggered by half that duration, their spacing within each pulse train being 1ST, for a total period of 30T,,.
  • the overlapping portions of pulses P and P open the AND-gate 126 to give rise to a pulse train P with pulses of width 6T, and period 30T,,.
  • the latter pulse train is, of course, identical with the train (151) delivered to input 151 of AND-gate 150 and shown in FIG. 3.
  • Oscillator 100 is advantageously of the quartz-stabilized type as is well known per se.
  • bistable elements may be used to provide the same or different groups of frequencies.
  • a transposition of dividers 104 and 105 would give rise to a pulse train on lead b of the same frequency 16 kHz. as the one shown in FIG. 2 but of a pulse width reduced to 3011,.
  • narrower pulses on leads 2 and h could be obtained by the insertion of an AND gate, similar to gate 180, receiving on its other input a pulse train of a period equal to at least 6T and a width smaller than T,,. e.g., as available at input 151 or l62, provided, of course, that the frequency of that pulse train be equal to or a multiple of the frequency of the pulses whose width is to be reduced.
  • frequency divider 103 with its stepdown ratio of can be readily derived from the combination of units 110 and 120 (FIG. 7) by simply providing the AND-gate 126 with a third input directly connected to the reset output of flip-flop 113.
  • a stepdown ratio of, say, (with a like ratio of pulse width to repetition period) can be realized with the aid of the divider [20 followed by, or bracketed between, two simple flip-flops whose outputs are also fed into AND-gate 126.
  • a system for producing several high-frequency waves derived from a common source comprising:
  • oscillator means for generating a square wave of elevated basic frequency
  • a frequency-dividing network connected to said oscillator means for stepping down said basic frequency, said network including a plurality of dividers with output frequencies related to said basic frequency by different stepdown ratios;
  • said filter means including a plurality of band-pass filters connected in parallel to said coincidence-gate means for selecting different higher harmonics of the fundamental frequency of said pulse train.
  • bistable elements are cyclically interconnected for staggered operation to yield a frequency stepdown of(2kl l A- being an integer.
  • said network has at least one branch terminating in a bistable element for producing a square wave output, said filter means including a low-pass filter for converting said square wave output into its fundamental sine wave.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Radio Relay Systems (AREA)
  • Amplifiers (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A square wave generated by a high-frequency oscillator is subjected to repetitive frequency division with formation of the logical products of the outputs of various combinations of divider stages to produce trains of relatively narrow pulses with relatively wide spacing. Higher harmonics of the fundamental frequencies of these pulse trains, obtained from them by filtration, have a nearly uniformly high signal-to-noise ratio.

Description

O United States Patent (151 3,649,923 Venturini 1 Mar. 14, 1972 i541 CARRIER-FREQUENCY GENERATOR [56] References Cited FOR MULTIPLEX COMMUNICATION UNITED STATES PATENTS SYSTEM 3,172,042 3/1965 Dawirs ..328/30 X Inventor: Flew Venmrini, Milan. Italy 3,403,343 9/1968 Kelly ..328/17 [73] Assignee: Societa Italiana Telecomunivacioni Siemens 2994790 8/ 328,27 x A Milan Hal 2,566,085 8/1951 Green 328/27 X y 3,241,033 3/1966 Amato 328/30 x [22] Filed: May 11, 1970 3,512,092 /1970 Thurnell ..328/22 X [2!] App. No; 36,026 3,355,539 11/1967 Munch, Jr. et a]. ..328/l7 X Primary Examiner-Stanley T. Krawczewicz Foreign Application Priority Data AttarneyKarl F. Ross May 19, 1969 [121) ..16965 A/69 57 ABSTRACT [52] 0.8. CI ..328/105, 307/261, 307/271, A Square wave generated y a high-freq ency oscillator is sub- 323/|7, 323/39, 323/60 jected to repetitive frequency division with formation of the 5: Int. Cl. ..n03k 1/00 logical Products of the Outputs of various combinations of [58} Field of Search 323/17, 22, 27, 29, 3Q, 39, vider stages to produce trains of relatively narrow pulses with 328/60, 105', 307/225, 261, 271 relatively wide spacing. Higher harmonics of the fundamental frequencies of these pulse trains, obtained from them by filtration, have a nearly uniformly high signal-to-noise ratio.
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Piero Venfurini I N VEN'I UR Attorney PATENTEDHAR 14 I972 SHEET 5 0F 5 Piano Venfun'ni INVEN'IOR.
G v Ross Atto y CARRIER-FREQUENCY GENERATOR FOR MULTIPLEX COMMUNICATION SYSTEM My present invention relates to a circuit arrangement for the simultaneous generation of a plurality of high-frequency waves to be used. for example, as carriers for a multiplex communication system.
In such a system the several carrier frequencies employed, or at least some of them, are harmonically unrelated, i.e., are not multiples or factors of one another. Especially in singlesideband transmission, it is desirable to derive all these frequencies from a single source with the aid of relatively simple circuitry readily duplicated at the receiving end whereby, on the basis of a separately transmitted pilot oscillation, the several carriers can be correctly reconstituted.
The general object of my present invention is to provide a frequency-generating system satisfying these requirements.
More particularly, my invention aims at providing a frequency-generating network incorporating only a few different types of circuit elements which, therefore, can be easily standardized and which preferably should bd realizable by the integrated-circuit technique.
A further object is to provide a frequency-generating system in which several harmonically unrelated frequencies can be derived from a common source with high and substantially uniform signal-to-noise ratio.
In commonly owned application Ser. No. 36,252, filed 11 May 1970 by Emanuele Angeleri and Fabio Balugani, there has been disclosed a digital frequency modulator in which a basic train of equispaced pulses is additively or subtractively combined with a train of modulating pulses, of similar width but lower cadence harmonically related to that of the basic pulse train, for selectively suppressing some of the basic pulses or interleaving additional pulses therewith to produce an irregular pulse sequence of lower or higher mean cadence. Upon the feeding of this irregular pulse sequence to a pulse counter with a bistable output stage, a square wave is obtained whose frequency is a function of the cadences of both the basic and the modulating pulse trains and which can readily be converted into its fundamental sine wave. The pulses, especially those of the modulating train, must be narrow compared with their spacing and, for proper synchronization with those of the basic train, should be derived from the same source. Thus, a more specific object of our invention is to provide two or more related pulse trains of this description adapted to be used for the synthesizing of certain frequencies in the manner described above.
These objects are realized, pursuant to my present invention, by the provision of a high-frequency oscillator which generates a basic square wave and feeds it to a frequencydividing network including a plurality of dividers whose output frequencies are related to the basic oscillator frequency by different stepdown ratios. The outputs of some or all of these dividers are filtered to yield the corresponding fundamental frequencies or higher harmonics thereof.
With the aid oflogical circuitry including one or more coincidence gates i.e., AND, NAND or equivalent NOR gates) connected to a combination of these dividers, the outputs thereof can be gated to produce a train of relatively narrow pulses with relatively wide spacing. Such a pulse train may be utilized for modulating purposes, as described with reference to the copending application identified above, or for generating output frequencies considerably higher than the corresponding fundamental.
Thus, in a pulse train of fundamental frequencyf, and pulse width 1', Fourier analysis yields an amplitude rmf r where K is a constant and n is an integer representing the order of a given harmonic. The relative magnitude of the n' harmonic as compared with that of the fundamental (n=l), and therefore the signal-to-noise ratio in the output of a filter passing this harmonic, increases accordingly with decreasing ratios r/T where T=l/f,, is the repetition period of the pulse train. The narrower the pulse, therefore, the higher the order of the harmonics that can be efficiently filtered out. With high values of n, furthermore, the ratio of (ntll/n approaches unity so that the amplitudes A,,-,, A A, of adjacent harmonies differ only slightly from one another. It then becomes possible, through the choice of a sufficiently low repetition frequency f, in comparison with a desired group of output frequencies, to generate these output frequencies with a nearly uniformly high signal-to-noise ratio.
The above and other features of our invention will be described in greater detail hereinafter with reference to the accompanying drawing in which:
FIG. 1 is a block diagram of a carrier-frequency generator embodying our invention;
FIGS. 2-6 are sets of graphs relating to the operation of the system of FIG. I;
FIG. 7 is a more detailed illustration of a frequency divider forming part of the system of FIG. 1; and
FIG. 8 is a set of graphs serving to explain the operation of the divider of FIG. 7.
The system shown in FIG. 1 is particularly designed to produce a multiplicity of carrier frequencies for a multiplex telecommunication system, namely:
three channel carriers F F F;, of l2, l6 and 20 kHz., respectively;
a pilot frequency F, of 16 kHz.;
four sub-group carriers F,,, F, F F; of 84, 96, 108 and [20 kHz, respectively;
a reversing carrier F, of l 14 kHz.;
five group carriers F F F F F of I80, 240, 300, 360 and 420 kHz., respectively; and
a further pilot frequency F,, of 556 kHz.
A conventional square-wave generator 100, such as a sinewave oscillator followed by a squarer, emits a basic frequency F of 1,440 kHz. The output of this generator is fed to a frequency-dividing network I0! whose several stages, grouped in a number of parallel branches and cascaded within these branches, are constituted by individual bistable elements or combinations of such elements. Thus, square-wave generator [00 works directly into a simple flip-flop 102, operating as a divider with a stepdown ratio of 2:1, and in parallel therewith into a frequency divider 103 of stepdown ratio 15: l. The output of the latter stage, Le, a pulse train with a repetition frequency of 96 kHz., is applied directly to a leadfand in parallel therewith, through a pair of cascaded dividers I04, 105 of stepdown ratios 3:l and 2:1, to a lead b. Divider I02 feeds another divider [10, of stepdown ratio 3: l whose output is a pulse train with a repetition frequency of 240 kHz. This output is fed to a lead d via a pair of cascaded flip-flops I07, 108, to another lead 3 by way ofa single flip-flop 109, and to a chain of additional dividers (stepdown ratio 3:1) and 190, 191, 192(stepdown ratio 2: l
The output of flip-flop 109 is further supplied, by way of two cascaded dividers I17 and 118 of respective stepdown ratios 3: l and 2: 1, to a lead c which carries a pulse train having a repetition frequency of 20 kHz.
The output of flip-flop l9], a pulse train of repetition frequency 12 kHz., appears on a lead a and also triggers a further divider 106 of stepdown ratio 3:l producing a pulse train of repetition frequency 4 kHz.
An AND-gate receives on its inputs 151, I52, I53 the outputs of dividers I20, I90 and 191 to energize a lead e with a pulse train having a repetition frequency of 12 kHz. (corresponding to that of flip-flop Hill) and a pulse width equal to that of the output of divider I20. Lead e has two branches e e, and also extends to inputs 16!, 17I of two AND-gates I60 and 170 in parallel therewith; AND-gate I70 further receives at its input 172 the output of flip-flop 192 to energize a lead )1 with a pulse train of repetition frequency 6 kHz., whereas AND-gate has inputs 162, 163 respectively supplied by dividers I10 and I02 to produce a pulse train of repetition frequency 12 kHz. on a lead 1' split into five branches i,i,,. Finally, a lead j is energized from lead 1' and from the output of divider 106 via inputs 181, 182 of an AN D-gate 180 to carry a pulse train of repetition frequency 4 kHz.
Leads a-j include respective filters, generally designated 130. working into individual amplifiers 200.
Leads a, b and c include identical low- pass filters 131, 132. 133 with a cutoff frequency of 22 kHz. to deliver the frequencies F F F representing the fundamentals of their respec tive pulse trains. Leads d, f, g are also provided with low- pass filters 134, 136 and 138 having a cutoff frequency at 122 kHz.; since the last stage of the network branch feeding the lead 4' (as well as the leads a, b, c) is a flip-flop. the pulse train on that lead is a square wave which has no even harmonics so that the filter 134 is required to suppress only the third and higher harmonics. Like filters 131433, therefore, filters 134, 136 and 138 pass respective sine waves whose frequencies F F,, and F, correspond to the fundamentals of the incoming pulse trains. The use of similar filters with substantially identical cutoff frequencies is, of course, possible only where the highest frequency (F or F,,) is not more than about double the lowest frequency (F I or F The remaining leads 2,, e it, i,i and j include respective band- pass filters 135, 137 and 139-145 designed to select higher harmonics of the corresponding repetition frequencies. Thus, filters 135 and 137 are tuned to the 7th and the 9th harmonic of the pulse cadence of 12 kHz., thereby generating sine waves offrequencies F =84 kHz. and F IOS kHz. Filter 139 selects the 19th harmonic of a pulse train of 6 kHz. to produce a sine wave of frequency F,,=l14 kHz. Filters 140-144 are adjusted to the 15th, th, th and th harmonics of a pulse train of l2 kHz. cadence delivered to them via leads i,, i i i, and i respectively, to pass sine waves of frequencies F =180 kHz., F -240 kHz., F,,=200 kHz., F, 360 kHz., F, ,=420 kHz. Filter 145 picks the 139th harmonic ofa pulse train of 4 kHz. cadence, arriving over lead g, to yield a sinusoidal pilot wave of frequency F =556 kHz.
FIG. 2 shows in graphs (a)(j) the pulse trains appearing on the correspondingly designated leads of FIG. 1. It will be noted that trains (a), (b), (c) and (d) are square waves, with pulse widths equal to half their periods, owing to the bistable nature of the terminal divider stages 191, 105, 118 and 108. Thus, the pulses of these four trains have widths 1',,=60T,,, r,,= T,,, r =36T,, and r =l2T,,; their periods are T,,=l2(lT,,, T,,= 90T,,, T,=72T,,, T,,==24T,,. Train (e) has pulses of width 1,,=6T,, and period T,,=l 20 T,,. The pulses of train (I) have a width 1 T,, and a period T,=l5T,,. Pulse train (3) is another square wave of pulse width 1,,=6T,, and period T,=l2T,,. Train (H) comprises pulses of width -r,,=6T,, and period T,,=24OT,. The pulse widths r, and r; oftrains (i) and (j) are both equal to T the former train having a period T,=l20T,, whereas the period T] ofthe latter is three times as long.
FIG. 3 shows the three pulse trains fed into the inputs 151, 152, 153 of AND-gate 150, together with the pulse train (e) issuing therefrom. The first pulse train (151), supplied by the frequency divider 120 of FIG. I, has a pulse width of6T, and a repetition period of 311T corresponding to a frequency of 48 kHz. The second and third pulse trains (152) and (153) are square waves of frequencies 24 kHz. and 12 kHz. with pulse widths of 311T, and GOT, corresponding to periods of T,, and 120T,,, respectively. The logical product of these three pulse trains is the train (e) described above with reference to FIG. 2.
FIG. 4, similarly, shows pulse trains (161), (162) and (163) appearing on the correspondingly designated inputs of AND- gate 160, together with the resulting pulse train (i). Train (161) has a pulse width of 61, and a period 120T,,, its frequency being thus 12 kHz. Train (162) has a pulse width of 2T, period of 6T,,, corresponding to a frequency of 240 kHz. Train (163) is a square wave of frequency 720 kHz. with a pulse width equal to T, and a period of 2T,,. Again, the logical product of these three pulse trains is the train (i) discussed above with reference to FIG. 2.
In FIG. 5 there are shown the pulse trains (171) and (172) appearing on inputs I71, 172 of AND-gate 170 to generate the outgoing pulse train ()1). Train 171 has a frequency of l2 kHz., a pulse width of 6T, and a period of 120T,,. Train (172) is a square wave of half the frequency and therefore twice the period of train (171). Pulse train (h) is identical with the one so designated in FIG. 2.
In FIG. 6, similarly, there are illustrated the pulse trains (181) and (182) fed to the inputs I81. 182 of AND-gate 180 to produce the pulse train (j) of FIG. 2. Train (181) has pulses of width T, and period 120T,,, its frequency being 12 kHz. Train (182) has a pulse width equal to the period of train (181 and a period of 360T,,, its frequency being 4 kHz.
FIG. 7 illustrates an embodiment of frequency dividers I10 and 120 of FIG. 1. Divider comprises three cyclically interconnected flip-flops 111, 112, 113 with setting inputs connected in parallel to the set output of the divider 102 and with resetting inputs connected to the set outputs of the respective preceding flip-flops in the cycle. Divider is a similar cyclic array of flip-flops 121, 122, 123, 124, having setting inputs energized in parallel from divider 110, specifically from the reset output of its flip-flop 113. Each flip-flop 121 125 has its set output connected on the one hand to an enabling input of the next-following flip-flop and on the other hand to a resetting input of the next-but-one flip-flop preceding it in the chain. The set outputs of two consecutive flip-flops, here the stages 121 and 122, are combined in an AND-gate 126 feeding the divider 190 and the AND-gate of FIG. 1.
The operation of the two frequency dividers 110, 120 will now be described in detail with reference to FIG. 8 where graph P represents the pulse train arriving from divider 102, i.e., a square wave of pulse width T and period 21",. Graph P shows the periodic setting and resetting of flip-flop 11] in response to periodic stepping pulses P With this flip-flop reset at a given instant, the next pulse P sets it and causes the substantially concurrent resetting of flip-flop 112 (assumed to have been set before) whereby the next pulse P sets the latter flip-flop without affecting the condition of flipflop 111. The setting of flip'flop 112 resets the previously set flip-flop 113, thus enabling same to be set again in response to a third stepping pulse P with resulting resetting of flip-flop 11]; the cycle is then repeated. Thus, as shown in graphs P P P of FIG. 8, the three flip-flops of divider 110 are set during mutually staggered intervals of length 4T, and reset during similarly staggered intervals of length 2T,,. Graph 1 shows the inversion of pulse train P as obtained from the reset output of flip-flop 113, its pulses occupying one-third of a cycle of 6T,,. The first pulse of this graph is assumed to set the flip-flop 121 of divider 120, as shown in graph P This setting enables the second flip-flop 122 which is therefore set by the next pulse P see graph P and in turn enables the t hird flip-flop 123 for setting by the following stepping pulse P as indicated in graph P In the same manner, flip-flops 124 and 125 are successively set as indicated in graphs P and P On the other hand, the setting of flip-flop 123 resets the flip-flop 12]; flip-flop 122 is reset upon the occurrence of a pulse P and so forth. As a result, the set intervals of flip flops 121-125 have a duration of 12T,, and are relatively staggered by half that duration, their spacing within each pulse train being 1ST, for a total period of 30T,,. The overlapping portions of pulses P and P open the AND-gate 126 to give rise to a pulse train P with pulses of width 6T, and period 30T,,. The latter pulse train is, of course, identical with the train (151) delivered to input 151 of AND-gate 150 and shown in FIG. 3.
Thus, all the frequencies traversing the amplifiers 200 of FIG. 1 are obtained with the aid of bistable elements, AND gates and filters which in many instances can be of simple construction with only a moderately sharp cutoff, These components can be readily realized as integrated circuits in accordance with conventional techniques. Oscillator 100 is advantageously of the quartz-stabilized type as is well known per se.
Naturally, different combinations of such bistable elements may be used to provide the same or different groups of frequencies. Thus, for example, a transposition of dividers 104 and 105 (with the former of a construction similar to that of divider 110) would give rise to a pulse train on lead b of the same frequency 16 kHz. as the one shown in FIG. 2 but of a pulse width reduced to 3011,. Also, narrower pulses on leads 2 and h, for example, could be obtained by the insertion of an AND gate, similar to gate 180, receiving on its other input a pulse train of a period equal to at least 6T and a width smaller than T,,. e.g., as available at input 151 or l62, provided, of course, that the frequency of that pulse train be equal to or a multiple of the frequency of the pulses whose width is to be reduced.
it will also be readily apparent that frequency divider 103 with its stepdown ratio of can be readily derived from the combination of units 110 and 120 (FIG. 7) by simply providing the AND-gate 126 with a third input directly connected to the reset output of flip-flop 113. By the same token, a stepdown ratio of, say, (with a like ratio of pulse width to repetition period) can be realized with the aid of the divider [20 followed by, or bracketed between, two simple flip-flops whose outputs are also fed into AND-gate 126.
Thus, the simultaneous feeding of two or more pulse trains of harmonically related cadences but different pulse widths will result in an outgoing train of pulses not wider than the narrowest of the input pulses and of repetition period equal to the lowest cadence of the generating trains. With stepdown ratios Nzl where N is a power of 2, frequency division can be carried out simply by cascaded bistable circuits (flip-flops); if n=2kl is an odd number (k being an integer) or a multiple of such number, one or more of the dividers may be generally similar to those illustrated in FIG. 7 for N=3 (unit 1 l0) or N=5 (unit l20).
I claim:
1. A system for producing several high-frequency waves derived from a common source, comprising:
oscillator means for generating a square wave of elevated basic frequency;
a frequency-dividing network connected to said oscillator means for stepping down said basic frequency, said network including a plurality of dividers with output frequencies related to said basic frequency by different stepdown ratios;
filter means connected to certain of said dividers for converting the outputs thereofinto sine waves; and coincidence-gate means connected to a combination of said dividers for deriving from the outputs thereof a train of relatively narrow pulses with relatively wide spacing;
said filter means including a plurality of band-pass filters connected in parallel to said coincidence-gate means for selecting different higher harmonics of the fundamental frequency of said pulse train.
2. A system as defined in claim I wherein said dividers include cascaded bistable elements.
3. A system as defined in claim 2 wherein certain of said bistable elements are cyclically interconnected for staggered operation to yield a frequency stepdown of(2kl l A- being an integer.
4. A system as defined in claim 3, further comprising logical circuitry for gating the outputs of at least some of the cycli cally interconnected bistable elements to generate a train of outgoing pulses whose repetition period is related to their width by the ratio (ZR-1 l 5. A system as defined in claim 1 wherein said network has at least one branch terminating in a bistable element for producing a square wave output, said filter means including a low-pass filter for converting said square wave output into its fundamental sine wave.
6. A system as defined in claim 1 wherein said network has a plurality of branches terminating in respective bistable elements for producing square-wave outputs of different frequencies with a highest frequency substantially not more than double the lowest frequency, said filter means including a plurality of low-pass filters of substantially identical cutoff frequencies in said branches for converting said square-wave outputs into their respective fundam ntal Sll'lfi waves.

Claims (6)

1. A system for producing several high-frequency waves derived from a common source, comprising: oscillator means for generating a square wave of elevated basic frequency; a frequency-dividing network connected to said oscillator means for stepping down said basic frequency, said network including a plurality of dividers with output frequencies related to said basic frequency by different step-down ratios; filter means connected to certain of said dividers for converting the outputs thereof into sine waves; and coincidence-gate means connected to a combination of said dividers for deriving from the outputs thereof a train of relatively narrow pulses with relatively wide spacing; said filter means including a plurality of band-pass filters connected in parallel to said coincidence-gate means for selecting different higher harmonics of the fundamental frequency of said pulse train.
2. A system as defined in claim 1 wherein said dividers include cascaded bistable elements.
3. A system as defined in claim 2 wherein certain of said bistable elements are cyclically interconnected for staggered operation to yield a frequency step-down of (2k-1):1, k being an integer.
4. A system as defined in claim 3, further comprising logical circuitry for gating the outputs of at least some of the cyclically interconnected bistable elements to generate a train of outgoing pulses whose repetition period is related to their width by the ratio (2k-1):1.
5. A system as defined in claim 1 wherein said network has at least one branch terminating in a bistable element for producing a square wave output, said filter means including a low-pass filter for converting said square-waVe output into its fundamental sine wave.
6. A system as defined in claim 1 wherein said network has a plurality of branches terminating in respective bistable elements for producing square-wave outputs of different frequencies with a highest frequency substantially not more than double the lowest frequency, said filter means including a plurality of low-pass filters of substantially identical cut-off frequencies in said branches for converting said square-wave outputs into their respective fundamental sine waves.
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US4551682A (en) * 1983-01-03 1985-11-05 Commodore Business Machines, Inc. Digital sine-cosine generator
US5408135A (en) * 1994-01-25 1995-04-18 Texas Instruments Incorporated Rectangular-to-sine wave converter
US20070286328A1 (en) * 1999-08-06 2007-12-13 Molnar Alyosha C Frequency Dividing Systems and Methods

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GB1287480A (en) 1972-08-31

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