DE2022328A1 - Circuit arrangement for generating frequencies for a communication system containing a large number of channels - Google Patents

Description

8139-69 / H
DB 187

SOCIETA ITALIANA TELECOMUNICAZIONI SIEMENS S.p.a.,

Milan, Italy

Circuit arrangement for generating frequencies for a communication system containing a plurality of channels

The invention relates to a circuit arrangement for generation of frequencies, especially the carrier frequencies, for a multitude of channels containing Communication system based on the frequency division multiplex principle from an output frequency signal.

In the known arrangement for generating the for a frequency division multiplex system for the transmission of messages The frequencies required for a large number of channels are assumed to be a low-frequency signal whose Frequency is generally 4 kHz · Bandpass filters are then used to remove the signal distortion caused by generated harmonics are filtered out the desired frequencies. It is also known to use higher frequencies (e.g. 612 kHz) cannot be obtained by distorting the fundamental frequency signal, because it was required for this Harmonics (e.g. the 153rd harmonic) would be too high, but by distorting a harmonic of the fundamental frequency of a relatively high order (e.g. 12 kHz). Furthermore are Circuit arrangements known, with which by combining two or more harmonics of the fundamental

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frequency Frequencies are obtained that are not multiples of the basic frequency.

In contrast to this, in a circuit arrangement for the supply of a multi-channel system according to Invention based on a comparatively very high frequency signal through the desired frequencies Frequency division generated. The frequencies which are not are integer fractions of the fundamental frequency and therefore cannot be generated by division, are obtained as harmonics of one of the integer fractions

In a preferred embodiment of the invention becomes the fundamental frequency as a right-hand oscillation of a crystal controlled oscillator supplied. The frequency division takes place in the usual way, for example by binary counters. If these counters are not fed back, they also deliver square waves with a Pause / pulse ratio of 1: 1 · As with this rectangular shape the even-numbered harmonics are missing, one can determine from each square wave by means of a simple filter each generate a sinusoidal oscillation with the same frequency as the fundamental frequency of the Corresponds to Fourier series expansion. The use of binary frequency parts also has the advantage of that you get the freqvenzen in a simple and safe way, which are the harmonics of one of the integer Fractions of the fundamental frequency have been obtained. If in the Fourier series a square-wave signal with the Frequency f and the pulse duration V is developed, has as is well known, the amplitude spectrum shows the course

, where η is an integer.

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So the smaller V, i. lüjje, the shorter the pulse, the more harmonics there are in the spectrum, and the flatter the course of the spectrum in the vicinity of the origin. If, therefore, the pulse signal with the frequency f _{Q is} fed to a series of bandpass filters that are tuned to its harmonics, a series of sinusoidal signals with the frequency nf _{Q are obtained} , the amplitude of which is more uniform the shorter the duration t of the pulse signal .

With an arrangement according to the invention, very short Pulses are generated particularly easily in that a coincidence circuit (AND gate) some of the signals of the frequency divider arrangement are fed from a pulse signal of frequency fρ is controlled and a signal with the frequency f., supplies that at the output the coincidence circuit as a pulse signal with the frequency f- and a duration of 1 / ^> f ") appears. The choice of signals depends on the particular embodiment of the Frequency divider arrangement from.

In comparison with the known arrangements for generating frequencies, the circuit arrangement according to FIG essential advantages of the invention. As is well known, it is very important to reduce the interference signals contained in the input signal, as this reduces the signal-to-noise ratio Substantially worsen the transition from the basic frequency to the harmonics · This applies in particular to agitation disturbances of 50 or 100 Hs or the lines of + 50 Hz and introduced into the signals previously generated + -100 Hz, which are calibrated as lines of + 50 or + 100 Hz noticeable in the harmonics and no longer filtered out can be. Another problem is the interference caused by the operating voltage in the Distortion device can be introduced.

In a circuit arrangement according to the invention the signal-to-noise ratio is significantly improved, and the circuit arrangement can be made independent of network disturbances will. In contrast to the known arrangements, the circuit arrangement according to the invention does not require any Calibration because it is very stable. It can be built up as an integrated circuit, creating a considerable Saving of space and power loss and a corresponding reduction in costs can be achieved Finally, very short periodic pulses can be generated that have a very flat amplitude spectrum have in a wide frequency range. Using band pass filters such frequencies, which cannot be obtained by division, can have practically the same amplitudes be generated. This in turn enables uniformly designed amplifiers for the carrier frequencies.

An arrangement according to the preferred embodiment of Invention essentially consists of a square wave generator of high frequency and stability, for example one Quartz-controlled oscillator with a square-wave pulse shaping circuit is coupled, from a number of frequency divider chains and from some circuits for decoding of output signals of certain stages of the frequency divider arrangement, whereby very short pulses with a predetermined frequency can be generated.

The preferred embodiment of the invention will now be explained in more detail arikknd the drawing.

1 shows a block diagram of a circuit arrangement for generating sequences according to the invention;

Flg. 2 shows an embodiment of a frequency divider circuit to divide by 20 and a deciphering circle; and

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BATH

Pig. 3 output signals of the individual stages of the divider circuit and the decryption circuit according to FIG.

Btbi of the circuit arrangement shown schematically in FIG. 1 generates a (not shown) quartz-controlled Oscillator a square wave signal with a frequency of 1440 kHz (all frequencies indicated in the drawing understand each other in kHz). With frequency divider circuits known per se some of the required frequencies are obtained from this signal, namely the channel carrier frequencies with 12, 16 and 20 kHz, the pilot frequency with 60 kHz and two of the pre-group carrier frequencies of 96 and 120 kHz To obtain the corresponding sinusoidal signals, you can use filters that are not very complex (those shown in the drawing are not shown), since the signals appearing at the filter input only come from the useful frequency and the corresponding harmonics are composed. The second harmonic is also eliminated in a simple manner by means of known circles that produce a square wave at the output with a pause / pulse ratio van 1 deliver.

In particular for the frequencies of 12, 16 and 20 kHz, low-pass filters with a cut-off frequency are sufficient is little more than 20 kHz and is the same for all three frequencies. Also for the two pre-group frequencies of 96 and 120 kHz, low-pass filters are sufficient, their cut-off frequency for both frequencies slightly above 120 kHz. The other two sub-carrier frequencies of 8t and 10Ö kHz and the five main subcarrier frequencies are selected (by means of a filter, not shown) the harmonics of the pulse signals with a Frequency of 12 kHz gained. The pulse width is equal to the period of the 240 kHz signals for extraction of the two sub-carrier frequencies (decoding A)

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and equal to the period of the 1440 kHz signals for generating the main subcarrier frequencies (decryption B). The reverse carrier frequency of the main group, 114 kHz, is made up by means of a filter (like the 19th harmonic) a pulse signal obtained, which has a frequency of 6 kHz and the same pulse duration as the pulses of the Opening act (decryption A). This pulse signal is obtained by halving the frequency of a 12 kHz pike wave, which is fed to an AND element together with the pre-group signal (decryption A).

As an example of extracting any other harmonic frequency from 4 kHz, it will now be explained how to generate a Receives frequency of 556 kHz that can be used as a pilot frequency · The frequency of the 12 kHz square wave is divided by three and the signal obtained is combined with the main group pulses that are output of the desoling circle B appear, applied to an AND gate. In this way one receives impulses with a frequency of 4 kHz and a duration equal to that of the pulses of the main group, and & Leraus one can obtain the 139 · harmonic · the complexity of the filter by means of a filter (not shown) is compensated for by the fact that the pulses are generated in a very simple way.

Another advantage of the invention is that in addition to the amplifiers of the three channel carrier frequencies and the corresponding filters, the amplifiers of the four sub-carrier frequencies and those of the five main sub-carrier frequencies can be the same as one another. Daduroh the circuit arrangement is very simplified ·

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Pig. 2 shows a schematic circuit arrangement of a by 20 dividing frequency divider, which consists of a 5 dividing divider (three fed-back bistable stages) and two bistables connected in cascade There are steps · The counter that divides through 5 is one of various types of divider that can be used.

The at the output of the three bistable stages of the frequency plate dividing by 5 according to Flg. 2 appearing visual waveforms B, C and D are in Pig. 3 shown. if If a frequency divider of a different type is used, the waveforms will of course change. The frequency divider dividing by 20 according to FIG. 2 generates a square wave F with a frequency which 1st 20 times lower than the input frequency (signal A). This result does not change even if you have the The sequence shown of the divider dividing duroh 5 and the first bistable stage interchanged

Minn a certain number of appropriately selected signals of the 20 dividing frequency divider applied to an AND gate, one receives a signal whose Width equal to the period of the input signal · let and whose period is one 20th of the period of the input signal amounts to. In the arrangement according to FIG. 2, the signals C, D, E and F are applied to the AND gate, its shape from Fig. 3 ersMhtlioh is «

Without changing the frequency of the signal that appears at the output of the UHD element, the width or Halve the pawn of the signals «A if you add the signal A to the decoding, or reduce it to a third if you divide one by three Upstream frequency plate and its suitable output

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BATH ORIGINAL

signals in the decryption, or on a Fifth of its original value if you connect a frequency divider that divides by 5 and that Introduces output signals into decryption, etc. The practical application of this method is shown in FIG shown (decryption B)

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Claims (6)

Patent claims Circuit arrangement for generating frequencies for a multitude of channels containing, communication system based on the frequency division multiplex principle from an output frequency signal, characterized in that part of the required frequencies is obtained by dividing the frequency of a high-frequency output signal and the remaining frequencies by filtering out harmonics of at least one of those obtained by division Frequencies are generated. 2. Circuit arrangement according to claim 1, characterized in that the high-frequency output signal and the Signals with the frequencies obtained by division are square waves. 3. Schaltungsanaflnung according to claim 1 or 2, characterized in that Intschlungskreise provided which are coupled to selected stages of the division arrangement and generate short pulses, from which such frequencies are obtained by filtering out the harmonics that cannot be obtained by dividing the Output frequency are available. 4. Circuit arrangement according to one of claims 1 to 3 »characterized in that the entire division arrangement and the decoding circuits from digital working integrated circuits exist. 5. Circuit arrangement according to one of claims 1 to 4 » characterized in that amplifiers and filters of the same type for all frequencies generated 009-848 / 1166 - ίο - are used, and that the amplifiers and filters each have the same one-piece units for these frequencies form. 6. Circuit arrangement according to one of claims 1 to 4-, characterized in that several groups of frequencies are generated that for each group respectively Amplifiers of a single, unique type and corresponding filters of the same type are used, and that the amplifiers and filters each form one-piece units that are uniform within each group « Λί L e r s e i t e