US3638209A - Escapement mechanisms - Google Patents

Abstract

Escapement mechanisms for use with apparatus having a reading member, such as a reading head, and a record member such as a magnetic storage device and which members are shiftable relative to each other. In one embodiment of the apparatus, the escapement mechanism carries a reading head on a support member which is shiftable longitudinally relative to a base member. A ratchet means enables intermittent shifting of the support member and the reading head along the base so that the reading head is sequentially positioned with respect to various adjacent elements on the storage member. A first solenoid actuable member is connected to the ratchet-type means for actuating the ratchettype means upon receipt of a first control signal. A shifting member is also located on the base means for intermittently shifting the head in a second direction toward and away from the storage member. The second solenoid actuable member is capable of actuating the shifting means upon receipt of a second control signal. A mechanism is provided for causing the head to shift toward and away from the storage member immediately upon termination of the shifting of the support member longitudinally with respect to the storage member. A second escapement mechanism is provided for shifting the storage member with respect to the reading head and includes a shaft retaining the storage member and enabling rotation of the storage member with respect to a base member. A plurality of escapement elements are associated with the shaft and receive various engageable elements normally biased into engagement with the escapement elements to prevent axial movement of the shaft. A follower mechanism controls the engageable elements and sequentially biases the engageable elements into and out of engagement with the escapement elements to thereby enable axial shifting movement of the shaft.

Description

United States Patent Snook Jan. 25, 1972 [54] ESCAPEMENT MECHANISMS [72] Inventor: Richard K. Snook, Bridgeton, Mo.

[73] Assignee: Research Systems Corporation, Bridgetion,

[52] U.S. Cl. .....340/174.1 C, 179/1002 MD, 179/1002 CA [51] Int. Cl. ..Gllb 21/08 [58] Field of Search ..l79/l00.2 MD, 100.2 CA;

[56] References Cited UNITED STATES PATENTS 3,025,710 3/1962 Muttley ..340/174.1 C 3,124,789 3/1964 Wasylenko.... .....340/l74.l C 3,538,779 11/1970 Yamamoto ..340/l74.1 C

Primary ExaminerTerrell W. Fears Assistant Examiner-Vincent P. Canney An0rneyRobert J. Schaap [57] ABSTRACT Escapement mechanisms for use with apparatus having a reading member, such as a reading head, and a record member such as a magnetic storage device and which members are shiftable relative to each other. In one embodiment of the apparatus, the escapement mechanism carries a reading head on a support member which is shiftable longitudinally relative to a base member. A ratchet means enables intermittent shifting of the support member and the reading head along the base so that the reading head is sequentially positioned with respect to various adjacent elements on the storage member. A first solenoid actuable member is connected to the ratchet-type means for actuating the ratchet-type means upon receipt of a first control signal. A shifting member is also located on the base means for intermittently shifting the head in a second direction toward and away from the storage member. The second solenoid actuable member is capable of actuating the shifting means upon receipt of a second control signal. A mechanism is provided for causing the head to shift toward and away from the storage member immediately upon termination of the shifting of the support member longitudinally with respect to the storage member. A second escapement mechanism is provided for shifting the storage member with respect to the reading head and includes a shaft retaining the storage member and enabling rotation of the storage member with respect to a base member. A plurality of escapement elements are associated with the shaft and receive various engageable elements normally biased into engagement with the escapement elements to prevent axial movement of the shaft. A follower mechanism controls the engageable elements and sequentially biases the engageable elements into and out of engagement with the escapement elements to thereby enable axial shifting movement of the shaft.

16 Claims, 23 Drawing Figures PATfNlEnJmzsusvz 3,638,209 SHEET 01 0F 10 o B J CONTROLS DATA INPUT BAD CARD ADVISORY CROUIT c y y y y SHIFT REGISTER AND ASSOCIATED CONTROLS DATA S Z RECIRCULATION COMPARISON STORAGE CIRCUlT CONTROLS CIRCUIT \E F/ F|G.I

INVENTOR RICHARD K. SNOOK BYW% W ATTORNEY PATENTED .mnzs I972 SHEET 03 0F 10 INVENTOR RICHARD K. SNOOK ATTORNEY FATENTCDJAHZ'JIER 3.638.209 SHEET 05 0F 10 T p T 25' T I II I 1 2O 2| 22 r. 23 F? "0 23 24 \25 26 22' TRIGGER RESET l4 5 l6 7 M82 327 MEMORY 32' 323 325 START F. F.

32 HALF R 324 ADDE ERROR 0.5. I 29 32B 320 LOGIC F IG. l4 PULSE INVENTOR RICHARD K. SNOOK law/0 ATTORNEY mamwmzsmz 3,638,209 sum as or 10- lllll FIG. I0

I am 207 III!!! lalallllllollllllllll FIGII INVENTOR RICHARD K SNOOK rn-rr111-1r r1 ATTORNEY PAIENIEB Jmaszszz 3,638,209

sum 08 or 10 COMPUTER ADDRESS 8- C ONTROL BUFFER MEMORY TAPE RECORDER SHIFT REGISTERS COUNTERS FIG. 23

INVENTOR RICHARD K. SNOOK BYW% W ATTORNEY PATENTED M25192 SHEET OSUF 10 INVENTOR RICHARD K. SNOOK E UI Hill av ONQ N ATTORNEY FIG. 22

CLEAR I I T MOTOR SYNC HEAD LAMP REGISTERS ON DOWN OFF CLEARED ENTER DECIMAL INHIBIT f" DIGIT RECIRCULATION START 4 BIT COUNT SHIFT RIGHT 4 PLACES NO LAST YES GI DECIMAL START gg DIGIT I DATA HEAD PERMIT IN RECIRCULATION ADD DATA BIT ENABLE SHIFT TO SR. BIT T PULSE LAMP YES YES STOP INHIBIT REPOSITION SHIFT HEAD ATTORNEY NO B ESCAFEMENT MECHANISMS This application is a division of my copending application Ser. No. 692,975, filed Dec. 22, 1967.

This invention relates in general to certain new and useful improvements in credit card verifying apparatus, and more particularly, to an apparatus which is capable of comparing a given credit card number with a stored list of invalid card numbers and providing an advisory signal upon comparison thereof.

In our present day economy, purchases of goods and services on a credit basis has become a commonly accepted manner of doing business and accounts for a large part of the gross national product. Almost every available commodity can be purchased on a credit transaction. The number of companies and firms which now employ credit cards as a means of recording such transactions has significantly increased in the past few years. While many of these companies employ rigorous investigation procedures on each of the applicants for credit cards, there is nevertheless a number of credit cards issued to parties who are bad credit risks. Notwithstanding the initial issuance of the card based on investigations, many people may later be classified as poor or bad credit risks. This problem is even more acute in the case of stolen credit cards where the possessor thereof may purchase large quantities of goods and services to the financial detriment of the equitable card owner or to the company issuing the card. However, attempts to discover and repossess the invalid credit card are not only difficult and costly, but oftentimes futile.

Accordingly, many of the companies which issue credit cards have had to resort to the frequent and periodic issuance of lists of bad credit card numbers. In the case of oil companies whose customers transact a great portion of the total business on a credit basis, the bad number list often reaches several thousand numbers. It is, therefore, incumbent upon the retailer to check each customer credit card against the list of bad numbers. To make a careful comparison of the customer card with the list of bad card numbers may take several minutes and is always subject to observational error on the part of the party making the comparison. Due to the inefficiency of this type of comparison and cost of time involved, many'establishments will only make a cursory comparison at best. In addition, established comparison practice often falls into a state of disuse.

Many of the establishments issuing the goods or services on a credit transaction will not benefit themselves of the service of the bad card list due to the possible alienation of the customer. Many customers feel that the necessity of checking their credit card implies a lack of credibility to the customer. Furthermore, many customers become irritated at the delay while the investigation is being made. As a result of these problems, many retail establishments deem that it is feasible to forego the desirability of checking the credit card and suffering the risk. Notwithstanding, the losses incurred by the retail establishment and in many cases the company issuing the credit cards are very significant.

In order to obviate this problem, there has been a recent introduction in the market of a number of commercially available apparatus such as that described in US. Pat. No. 3,184,714 for electronically comparing customer credit cards with a stored list of invalid card numbers. However, in each of the electronically operable commercially available devices, the electronic components are oversophisticated and the costs of purchasing such devices are prohibitive. In other types of devices such as that described in U.S. Pat. No. 3,315,230, a large number of mechanical components are employed which makes the deice excessively large. In addition, devices of this type usually have a low dynamic range and a long response time.

In all of the presently available devices the periodic removal and replacement of the stored list of invalid credit cards involves an intricate and time consuming replacement procedure. Furthermore, unless extreme care is exercised in changing the stored list of invalid credit card numbers, the intricate mechanisms of the device can be misaligned and knocked out of adjustment. In those devices which employ optical films with the stored list optically recorded thereon, any contact of the film with a foreign surface will materially interfere with the correct scanning of the numbers on the list.

OBJECTS It is, therefore, the primary object of the present invention to provide a credit card verifying apparatus which is capable of comparing customer credit card numbers with a stored list of invalid credit card numbers and providing an indication whenever a favorable comparison occurs.

It is a further object of the present invention to provide a credit card verifying apparatus of the type stated which has a high dynamic range and short response time.

It is another object of the present invention to provide an apparatus of the type stated which involves a minimum number of expensive mechanical and electrical components thereby lending itself to construction at a low unit cost on a mass-production basis.

It is an additional object of the present invention to provide an apparatus of the type stated which is relatively simple, but highly efficient and reliable in its operation.

It is also an object of the present invention to provide a method of rapidly comparing a customer credit card number with a stored list of invalid credit card numbers in a binary coded decimal form.

It is another salient object of the present invention to provide an apparatus of the type stated which can be manufactured in the form of a small compact unit and which is rigid in its construction.

It is yet another object of the present invention to provide an apparatus of the type stated, which is designed so that the invalid credit card list can be updated without necessitating the disassembly of the apparatus and in such manner that it will not present any danger of damage to the internal components of the apparatus.

With the above and other objects in view, my invention resides in the novel features of form, construction, arrangement and combination of parts presently described and pointed out in the claims.

FIGURES In the accompanying drawings 10 sheets):

FIG. 1 is a schematic illustration of a functional block diagram showing the major components forming part of the credit card verifying apparatus of the present invention;

FIG. 2 is a perspective view of the credit card verifying apparatus of the present invention;

FIG. 3 is a horizontal sectional view taken along line 33 of FIG. 2.

FIG. 4 is a vertical sectional view taken along line 4-4 of FIG. 3;

FIG. 5 is a vertical sectional view taken along line 55 of FIG. 4;

FIG. 6 is a fragmentary vertical sectional view taken along line 66 of FIG. 5;

FIG. 7 is a fragmentary sectional view showing the means of attaching a data tape to a drum forming part of the present invention;

FIG. 8 is a schematic logic diagram illustrating the electrical circuitry forming part of the apparatus of the present invention;

FIG. 9 is a perspective view of a modified form of credit card verifying apparatus of the present invention;

FIG. 10 is a vertical sectional view taken along line 10-10 of FIG. 9;

FIG. 11 is a vertical sectional view, partially broken away, taken along line 11-ll of FIG. 10;

FIG. 12 is a schematic logic diagram illustrating the electrical circuitry forming part of the apparatus of FIG. 9;

FIG. 13 is a schematic logic diagram illustrating an AND gate matrix and modified form of bit counter which can be substituted for the entrance register in FIG. 8;

FIG. 14 is a schematic logic diagram illustrating a parity circuit which can be optionally used with the apparatus of the present invention;

FIG. 15 is a schematic logic diagram illustrating a circuit used with nonreturn-to-zero-mark data in the apparatus of the present invention;

FIG. 16 is a vertical sectional view showing a modified form of escapement mechanism used in the apparatus of the present invention for shifting a drum relative to a reading head;

FIG. 17 is a vertical sectional view taken along line 17-17 of Hg. 16;

FIGS. l8, 19, 20 and 21 are side elevational views showing the various positions of escapement cams and escapement discs forming part of the mechanism of FIG. 16, and showing the positional relationships of these components for enabling operation of such mechanism;

FIG. 22 is a schematic view of a flow diagram showing the steps in the process of verifying a credit card in accordance with the present invention; and

FIG. 23 is a diagrammatic view showing a mechanism for recording magnetic tapes used in the apparatus and process of the present invention.

DEFINITIONS The recent advances in the field of cybernetics and more particularly in the field of data processing has created a condition of multiple uses of terms which has led to some confusion. In view of the fact that there is no accurate standardization of terms, the following definitions are set forth for purposes of clarity. It should be recognized that these definitions are only exemplary and, therefore, nonlimiting.

As used herein: 3

Charactera conventional or nonconventional mark, symbol, number or digit such as a decimal digit or letter of the alphabet or similar indicia.

Workone or more characters such as a group of decimal digits to form a number, as for example, 10 decimal digits may represent one work.

Bi!a binary decimal or binary coded decimal or similar digital or analog element which is generated through conversion of a character to another type of character system or language; as for example, for bits generated from a decimal digit.

Set-the number of bits required to represent one character, as for example, the four bits generated to represent one decimal digit would constitute a set.

Digital Recorded Data-data recorded by techniques commonly used in digital computers as a pulse recorded signal, generally using two discrete flux levels.

Analog Recorded Datadata recorded by techniques such that flux levels are an analog of current or voltage signals.

Reading-the process of discerning and acquiring data from a member (the term reading is generally applied in digital arts and the term rep'roducing" is generally applied in analog arts, but have synonymous meanings herein).

Recordingthe process of registering data in some temporary, permanent or semipermanent form (the term recording" is generally applied in analog arts and the term writing" is generally applied in digital arts, but have synonymous meanings herein).

The remaining terms used herein are deemed to have their commonly accepted art recognized meanings.

GENERAL DESCRIPTION The device of the present invention includes eight basic components which are a memory storage unit for retaining the stored list of invalid credit card numbers; a keyboard for entering the card number to be compared with the numbers on the stored list; a control system for operating the various mechanical and electrical components to be hereinafter described in detail; a tape reader including a head and amplifier system for reading the list of card numbers on the stored list and providing proper timing signals; a shift register and associated controlling mechanism for accepting the number entered into the device from the keyboard; a recirculation control system for recirculating the entered number in the shift register during the comparison function; adders and comparitors for comparing the entered card number with the list of invalid card numbers; and a bad card energization circuit for providing advisory signals upon detection of a bad card number. A parity circuit may be optionally provided with the device.

The keyboard includes 10 decimal digit labeled keys I through 9 and 0 connected to a diode matrix for converting the decimal input to a four-bit binary coded decimal system. The apparatus of the present invention preferably operates on a one-two-four-eight-bit code. The diode matrix includes a series of diodes for conversion of the input and four bit lines which are connected to a two section shift register. The diode matrix also includes an enabling pulse line which is connected to a four-bit pulse counter.

The shift register includes a jam register containing four flip-flops and a recirculating register. The four bit lines are respectively connected to each of the four flip-flops in the jam register. A shift bus from the four-bit counter carries a trigger signal to the input of each of the four flip-flops. The information which is generated in the form of four individual bit pulses is transferred to and jammed into the four flip-flops. The trigger signals or shift signals metered by the four-bit counter processes the data out of the jam register and into the recirculating register. Differentiating capacitors are interposed in each of the bit lines. A one-shot is provided to hold the shift pulses for a time sufficient to insure setting of the jam register.

The four-bit counter includes a modulo four counter which serves as an off-on switch. This counter is connected to an AND gate which receives a series of timing pulses from a synchronizing gate. The AND gate is connected to a first counter which is, in turn, connected to a second counter. Both counters are connected to a summing gate and to a threesignal summing gate. The output of the summing gate is connected to a reset gate which is in turn connected to the modu- 10 four counter. The three-signal summing gate is also connected to the modulo four counter. In essence, the four-bit counter counts the number of shift pulses and meters four shift pulses to shift the four hits of information located in the jam register into the recirculating register.

Shift pulses are received at a shift gate to shift the data jammed into the jam register into the recirculating register through a pair of load gates. The shift pulses will be metered four at a time by the four-bit counter as indicated above. This operation will be repeated until all of the information on the credit card has been entered into the apparatus. During the jamming of the information in the jam register, a pair of recirculating gates on the output of the recirculating register will be closed.

The apparatus also includes a motor which is energized by a start switch and a drum which is rotatable thereby. A removable magnetic tape is connected to the drum by means of pins protruding from the drum. The drum is mounted in the apparatus housing for easy and convenient changing of the drum tape. A head escapement mechanism is also employed and carries a sync head which is normally disposed in reading position against the first or sync track of the tape. The remaining tracks of the tape all contain data pulses and logic pulses. A logic pulse is inserted between each 40 bits of information and serves as a spacer. The head escapement mechanism is capable of shifting the data head into and out of engagement or reading position against each of the data tracks on the tape. Furthermore, the head escapement mechanism is capable of shifting the head from track to track after each complete revolution of the drum. The drum enables generation of a cam pulse by means of a cam on the drum surface and a limit switch actuable thereby. The cam pulse will actuate the head escapement mechanism to shift the data head to the next adjacent track.

Each of the heads is connected to an amplification system and the sync head is also connected to a level normalizing circuit. This normalizing circuit is then connected to a head position gate. The head position gate is connected to a sync pulse gate and to a track shift flip-flop. The sync pulse gate is connected to the shift gate for feeding shift pulses at synchronization rate to the shift register. The sync pulse gate is also connected to a number of other components of the apparatus hereinafter described to insure complete operation at sync pulse time.

The data head is connected through the amplification system to the track shift flip-flop and to the sync gage. The data from the data head is transferred to a filter for assorting the signals read into a one pulse, a zero" pulse and a logic pulse. The logic pulse is transferred to the track shift flip-flop. When the drum rotated it will generate a cam pulse which will enable the track shift flip-flop which will, in turn, enable the head escapement mechanism to shift the data head to the next adjacent track.

Each work recorded on the tape is spaced by a logic pulse and a logic pulse precedes the first word. The logic pulse is transferred to a logic pulse gate which is also connected to the source of sync pulses to operate a latching circuit. Actuation of the head escapement mechanism will not take place and transference of information from the logic pulse gate will be prevented until the start key has been actuated.

The one and zero" outputs of the filter is transferred to an optionally provided read error circuit. This circuit employs an exclusive OR gate to determine if an error occurred in the reading process. This circuit is connected to an error flip-flop for actuating the same in the event of a reading error. This latter flip-flop is connected to an error light which will be energized upon actuation of the error flip-flop. The error flipflop can be reset by the start switch. The one" signal output of the filter is connected to a half adder for comparison with recirculated information from the shift register. The comparison is performed serially on a bit-by-bit basis.

The half adder is connected to a memory flip-flop which is, in turn, connected to a bad card flip-flop. The memory flipflop will keep track of all of the actual comparisons. After a complete reading of all of the information on the tape between two logic pulses and comparing the same with that in the shift register, the bad card flip-flop will be actuated if a complete equality of information was determined. As indicated, all comparisons of the informational bits will take place serially and on a bit-to-bit basis, and evaluation of words is performed at logic pulse time. in other words, an evaluation is only performed after all of the bits between two logic pulses have been serially compared with the bits on the tape. In the event that a complete equality of bits was detected, the bad card flip-flop will energize a bad card light. A latching circuit is provided to maintain energization of the bad card light until resetting of the entire apparatus. A clear switch is provided for resetting some of the components in the apparatus prior to the commencement of each use of the apparatus. In the event that the comparison did not detect a complete equality, then the bad card light will not be energized.

A parity circuit may be provided with the apparatus for determining if any informational bit in the shift register was lost during the process. This circuit will count the number of bits which are recirculating in the recirculating register. During the recirculation process, the load gates will be closed and the recirculation gates will be opened. A parity gate is also interposed between the half adder and the memory flip-flop, in the event that a parity circuit is employed. In essence, the parity circuit examines for odd or even numbers of pulses at a rate of four at a time. An arithmetic addition is performed to the least significant digit so that the sum is either odd or even. This sum is then compared to the number of bits in the recirculating register.

A modified form of credit card verifier is also provided and which is capable of automatically reading the bar code on a credit card. A card reader comprising a card retaining plate pulls the credit card and an invoice slip disposed thereon under a printing roller, to imprint the information contained on the card onto the invoice slip. Thereafter, a light source is energized and directs a beam of light through a prism onto the bar code. The bar code which is in the form of a two-out-offive code is read by a series of photocells and the information transferred to a conversion matrix. The two-out-of-five code is converted to a four-bit BCD code for transference to the shift register. A pair of one-shots are provided for insuring that the credit card is properly aligned before the actual reading process is initiated. A slightly modified form of four-bit counter is employed which enables the elimination of capacitors used at the set input of each of the jam register flip-flops.

The present invention also provides a modified form of shift register which includes a recirculating register substantially similar to the previously described recirculating register and an AND gate matrix in place of the jam register. The AND gate matrix includes an AND gate for each bit line and each AND gate is connected to an OR gate, the latter being connected to the recirculating register through a pair of load gates. This shift register operates on a temporal relation whereas the shift register using a jam register operates on a position relation.

An apparatus employing a pulse recorded tape as opposed to FSRK recording is also provided. This apparatus employs an input of NRZM (nonretum to zero mark) data and employs a tape having a similar data form recorded thereon. The tape also includes a sync track and a plurality of tracks with the data and logic signals. However, the tape is designed with an inherent redundancy. The data is recorded simultaneously and read simultaneously with two adjacent heads on two adjacent tracks bearing the same information. A circuit is provided to ascertain whether or not any information was lost or unread in the reading process. If there is not a detected redundancy in the information read from two adjacent tracks then the error flip-flop is actuated, and this will energize the error light. If the redundancy is detected, then the information is transferred to the half adder for comparison with the information recirculating in the recirculating register. The remainder of the apparatus is substantially similar to the previously described apparatus.

The present invention also provides a verifier apparatus which employs a drum escapement mechanism in place of the head escapement mechanism. The drum escapement mechanism comprises a shaft for shiftably supporting the drum. A plurality of escapement cams are mounted on the shaft and are intermittently engageable by a pair of escapement rollers to cause sequential shifting movement of the shaft when the escapement rollers are disengaged from the cams. The escapement rollers are mounted on pivotal arms which also carry cam followers. When the cam followers are shifted through the action of a cam, the escapement rollers will become disengaged from the escapement cams. Each of the positions is so located so that the drum is positioned to align a stationary data head with the next adjacent track on the drum surface. A resetting mechanism is also provided for shifting the drum back to its initial starting position at the end of each cycle.

An apparatus and method is provided for recording either the analog or digital signals on the magnetic tape or drum. A conventional computer having a data storage with the invalid credit card information stored therein is operatively connected to or interfaced with a buffer-memory. The information in the computer is transferred in parallel to the buffer memory which is, in turn, connected to a shift register. The output of the shift register is connected to a conventional tape recorder. A counter will provide the timing signals or sync pulses for the clock or sync track. The counter is also responsible for introducing the logic pulse on the tracks for separation of the words. As the logic pulse is being recorded the buffer memory transfers the next group of data into the shift register. After a word is read in the buffer memory, it is recycled and the address thereof is recorded.

When recording analog information, a number of shift registers may be employed. In addition, a level shifter would assign a DC voltage to each of the three states, logic, zero and "one"; and F.M. electronics would assign a a frequency to the corresponding voltage levels.

DETAILED DESCRIPTION Referring now in more detail and by reference characters to the drawings, which illustrate practical embodiments of the present invention. A designates a credit card verifying apparatus, hereinafter referred to as the verifier. The verifier A is provided with eight major units or systems which are schematically illustrated in FIG. 1 and include a data input B. The data input B may be in the form of a keyboard more fully described in detail hereinafter, or in the form of an automatic card reader, also more fully described in detail. The verifier A also includes a shift register C which is connected to the data input B by means of four bit lines. The shift register retains the input data in binary coded decimal form for comparison with stored information.

A control system D is connected to the data input B through an inhibit pulse line and is connected to the shift register C through a pair of timing inputs. A tape reader including a heads and amplifier system E is connected to the controls D for providing timing signals thereto and is also connected to a recirculation control system F, the latter, in turn, being connected to the shift register C. The recirculation control system F is designed to shift the data in the register and recirculate the same during the comparison with the stored data. The recirculation control system F is also connected to the output of the shift register C in the manner as illustrated in FIG. 1. The output of the shift register C is, in turn, connected to a comparison circuit G which also receives an input from the heads and amplifier system B. The comparison circuit G also has an output connected to the recirculation control system F.

The heads and amplifier system B is also connected to a data storage system H in the form of a drum which accepts a removable tape having the list of invalid numbers stored thereon. The heads and amplifiers system E picks up the data on the tape and transmits the same to the recirculation control system F and the comparison circuit G. The output of the comparison circuit G is connected to an indicator system J capable of providing an advisory signal, thereby informing the attendant whether the input number compared with any invalid number on the stored list. A parity circuit, not illustrated in FIG. 1, may also be provided for detecting internal error in the verifier A.

Each of the aforementioned units or systems is more fully illustrated in the succeeding drawings and described in terms of their internal components hereinafter.

The verifier A generally comprises an outer housing I having a top wall 2, a pair of opposed sidewalls 3, and a rear wall 4 which integrally merges into the top wall 2. The front wall of the housing is partially inclined and serves as a control panel 5 in the manner illustrated in FIG. 2. The housing 1 may be fabricated from sheet metal such as steel or aluminum and may be of welded or brazed construction, or it may be unitarily cast. In addition, the housing 1 may be formed of any suitable plastic or synthetic resin material. The housing 1 is also mounted on a baseplate 6 and retained thereon by means of spot welds or other suitable fastening means 7.

Rigidly mounted on the control panel 5 is a keyboard 8 having l0 depressable keys or input buttons 9 which are labeled 1 through 9 and 0. The data input B, illustrated in FIG. 1 comprises the keyboard 8. The keyboard 8 is operated in a manner similar to that of an adding machine and can be conveniently and simply operated by an attendant or user of the apparatus A. The numbers appearing on the keys 9 are the conventional digits to the base (10), and the number appearing on a credit card is the number that the operator enters into the apparatus through the keyboard 8.

The apparatus of the present invention operates on the binary coded decimal system and converts each decimal digit into a four-bit binary-coded decimal through a number converter 10. The converter 10 includes a diode matrix 11 forming part of the keyboard 8. In the present invention, the binary coded decimal system is a system of number representation in which each decimal digit is represented by a group of binary digits and usually refers to the four-position binary code 0000 to 1001 (decimal l to 9). Each decimal digit is therefore represented by four bits. In the preferred method of the present invention, a one-two-four-eight-bit code is employed. However, other four-bit codes, such as the gray code could also be employed as well. Each of the keys 9 is spring biased to the unactuated position so that a simple momentary closure of each of the keys will generate a four-bit pulse.

The diode matrix 11 includes a series of diodes 12 for converting the decimal digits to the four-bit code. The binary coded decimal equivalent of the numeral 10 actually represents the decimal digit 0 and three diodes 12 are associated with the key labeled 0. The decimal digit 0 in this system can be represented by 1010 in order to eliminate any ambiguity which might arise in the case where no hits are present. The diode I2 is connected to an enabling pulse line 13. The keyboard 8 also includes four bit lines l4, l5, l6 and 17 and which are also I, 2, 4, and 8," respectively. The bit line 14 labeled 1 actually represents the binary coded decimal digit 2; the bit line 15 labeled 2" represents the binary coded decimal digit 2; the bit line 16 labeled 4" represents the binary coded decimal digit 2; and the bit line 17 labeled 8 represents the binary coded decimal digit 2. The 1" key 9 has a pair of diodes 12, one of which is connected to the enabling pulse line 13 and one of which is connected to the 1 line 14. The 2" key 9 has a pair of diodes 12, one of which is connected to the enabling pulse line 13 and one of which is connected to the "2 line 15. The 3 key has three diodes 12, one of which is connected to the enabling pulse line 13, one of which is connected to the 1 line 14 and the last of which is connected to the 2" line 15. The remaining keys 9 are connected through the diode matrix 11 to the bit lines l4, l5, l6 and 17 in the manner as illustrated in FIG. 8. It should be noted that each of the keys 9 has one diode 12 connected to the enabling pulse line 13. It can also beseen that each of the keys 9 has the proper number of diodes 12 which are connected to the proper bit lines so that the binary coded decimal number which is produced is equivalent to the decimal number represented by the particular key 9.

It is also possible to use a number converter employing a series of OR gates in place of the diodes for conversion of the decimal number to the equivalent binary coded decimal number. For example, four gates representing the BCD equivalents of 2 ,'2 ,2 ,and gL could be employed. These gates would each represe nt respectively, the decimal number equivalent of 1, 2, 4, and 8 An enabling pulse OR gate would also be employed. Each of the four OR gates would have individual outputs and would also have outputs connected in common to an OR gate. These various gates would be connected in such manner that the binary coded decimal number which is produced is equivalent to the decimal number represented by any particular key 9. For example the 4" key 9 would have one line connected to the clear gate and one line connected t0 the2 OR gate The four informational bits created by the actuation of one key 9 are generated in parallel. The BCD information is then transferred to a shift register 20 through the four bit lines l4, 15, 16, 17 in the manner as illustrated in FIG. 8. The shift register 20 is included in the shift register and associated control system C, illustrated in FIG. 1. The shift register 20 comprises an entrance register or so-called jam register 21 and a recirculating register 22. The jam register 21 includes four bistable circuits or so-called flip- flops 23, 24, 25 and 26. Each of the bit lines l4, 15, 16, 17 are connected to the set or S input of each of the flip- flops 23, 24, 25 and 26 respectively. The flipflops used in the apparatus of the present invention are preferably of the J K type. As used herein the JK flip-flops are of the type which are described in more detail hereinafter.

The four flip-flops 23-26 each include a set input S, a reset input R, 1" and K" inputs and a trigger input T."

The flip-flops 23-26 each include a Q and T outputs. In these fliptflops the R and S inputs are unequivocal inputs, and if a pulse is placed on S, becomes 1, andTf becomes 0. Similarly, if a pulse is placed on R, 0 becomes 0 andfi becomes 1. The .l and K inputs are gated inputs so that the flipflop will not be actuated with input signals in J or K until the T input receives a trigger pulse. Thus, it can be seen that the 0 output will become true when the corresponding J input and trigger input T are rendered true, and in like manner, the Q output becomes true when the corresponding K input and trigger input T are rendered true. By further reference to FIG. 8, it can be seen that the four flip-flops 23-26 are properly labeled 2, 2, 2 and 2" respectively, representing the 2 biy Significance for l gt iatal s es maldisit- V .7

Differentiating capacitors 27, 27, 28 and 28 are interposed in each of the bit lines 14, 15, 16 and 17 respectively, to prevent jamming of the shift register 20-after one bit of information has been inserted into each of the flip-flops and before the register has been shifted. In essence, the presence of the differentiating capacitors prevents the jamming of the register 20 with the same signal. A pair of one- shots 29,30 are interposed in the enabling pulse line 13 and provide a time delay which is sufficient to permit the four hits to be jammed into the jam register 21 before actuation of a four-bit counter hereinafter described in detail. The first one-short 29 actually provides the delay for settling time in the jam register 21 and the second one-shot 30 dispenses a standard pulse. The four binary coded decimal informational bits in the four flip-flops 23-26 are then transferred to the recirculating register 22 in a ma neti h were tdtxdessribest s 1633. ltsreina tet- The jam register 21 also includes an OR-gate 31 which serves as a shift gate and is connected to each of the flip-flops 23-26 by means of a shift bus 32. The shift bus 32 is connected to a trigger bus 32 which carries the trigger signal and which is connected to the trigger or T input of each of the flipflops 23-26. Furthermore,-it can be seen that with the exception of the first flip-flop 23, the Q output of one flip-flop is connected to the J input of the next succeeding flip-flop through an input bus 23' and which will carry a logical one signal. The Goutput of each flip-flop, with the exception of the flip-flop 26 is connected to the K input of the next succeeding flip-flop through an input bus 24' and carries a logical zero" signal. The inputs .1 and K of the first flip-flop 23 are connected to the recirculating register in a manner described .insma lhe n r The enabling pulse line 13 is connected to a four-bit counter 1 33 which is designed to shift the four informational bits placed in the jam register 21 to the right and into the recirculating register 22. The controls D illustrated schematically in FIG. 1 include the four-bit counter 33, (often referred to as a modulo four counter), recirculation control gates and other control features hereinafter described and illustrated in more detail for controlling the main components of the verifier. This action will leave room for the next four binary coded decimal informational bits generated from depressing a key 9 for representation of the next decimal digit. The four-bit counter 33 includes a flip-flop 34 which serves as a receiver of the enabling pulses in the enabling pulse line 13 generated by actuation of one of the keys 9. One output of the receiver flipflop 34 is connected to an AND-gate 35, the latter serving as a type of on-off switch. The gate 35 allows a stream of pulses from a synchronizing gate 36 to be turned on and off, the signals from the gate 36 being transmitted to the AND-gate 35 .s hQ hasmslaf The AND-gate 35 has an output connected to a first counter 38 .which is labeled 2, and to one input of a three-signal summing gate 39. The output of the three-signal summing gate 39 is, in turn, connected to the shift gate 31 by means of a count signal bus 40. One output of the counter 38 is connected to the trigger input or T input of a second counter 41 which is labeled 2. Each of the counters 38, 41 have one output tied to one of their respective inputs for feedback signals. ln addition, the counters 38,41 have their 0 outputs connected to the two inputs respectively of a summing gate 42 in the manner as illustrated in FIG. 8. The output of the summing gate 42 is, in turn, connected to one input of the three-signal summing gate 39. The other input of the three-signal summing gate 39 is connected to one output of the receiver flip-flop 34. The output of the summing gate 42 is also connected to the input of an AND-gate 43 which serves as a reset gate. The output of the reset gate 43 is inverted and is connected to one input of the receiver flip-flop 34.

In order to understand the operation of the four-bit counter 33, it may be assumed that each of the counters 38,41 is initially in a 0" state. When the first counter 38 receives a pulse, it will change state to a l condition. The counter 41, however, will not change states. On the next pulse to the counter 38, it will change back to a 0 state and this will cause the counter 41 to change states to a 1 condition. On the third pulse, the counter 38 will again change states to a l condition and' the counter 41 will remain static. in other words, every other pulse will cause the counter 41 to change states of condition. Upon entry of the fourth pulse to the counter 38,

both counters 38, 41 will change state back to a 0 condition. After four pulses from the synchronizing gate 36 have been counted, the summing gate 42 causes the reset gate 43 to generate a reset pulse causing the modulo four counter 33 to be turned to the off condition.

7 The fourth pulse to the summinggate42 would detect a i condition in each of the counters 38, 41. Prior to the fourth generated by depression of each key 9, four pulses are also generated and counted by the four-bit counter 33 for transmission to the shift gate 31. After the four BCD bits for each decimal digit are generated and inserted in parallel into the shift register 20, they are shifted four places to the right by t the four pulses from the four-bit counter 33. The precessing of the four binary digits four places to the right enables a new gffg fi llli smw -WMM i- While the keyboard 8 has been illustrated and described decimal digit to be entered into the shift register in the form with keys having decimal digit indicia, it should be understood that any type of informational code could be entered into the shift register 20. For example, it is possible to enter codes in the form of alphabetic symbols. It is also possible to enter codes having combinations of decimal digits and symbols of the alphabet. In order to accomplish this latter type of information input system, it would be necessary to have a keyboard having keys for each symbol and for the decimal digits. If it were desired to use an input system for both decimal digits and alphabetic symbols, it would be necessary to enlarge the jam register 21 to six flip-flops. It would also be necessary to enlarge the recirculating register 22. While a six-bit jam register could be employed, the preferred embodiment of the present invention encompasses a four-bit jam register.

As indicated above, the apparatus of the present invention is not limited to the employment of the four-bit binary coded decimal system. It is also possible to adapt the apparatus A for a five-bit binary coded decimal system for a cyclic binary system. in addition, it is also possible to employ a grey code, an excess threes code, an alpha numeric system or a hexdecimal system, etc. The apparatus of the present invention is also adapted for use with a two-out-of-five code," (often referred to as a bar code), as will be seen hereinafter.

The shift recirculating register 22 includes 40 individual flip-flops 44 which are substantially identical to the flip-flops employed in the jam register 21. It should be understood that any number of flip-flops 44 could be employed in the recircuflip-flops 44 would be employed. The Q and Ooutputs of the flip-flop 26 are each connecaE OR- gates 45,46, respective-' ly, which serve as load gates. The outputs of each of the OR- gates 45,46 are connected to the J and K inputs of the first flip-flop 44 in the recirculating register 22. The Q andfioutputs of the last flip-flop 44 in the recirculating register 22 are each connected to AND- gates 47,48, respectively, which serve as recirculating gates. The outputs of each of the AND- gates 47,48 are respectively connected to one input of each of the OR- gates 45,46 in the manner as illustrated in FIG. 8.

In essence, the recirculating register 22 is similar to the jam register 20, except that it has no provision for parallel information entry. The information entered into the jam register is only entered into the recirculating register 22 through the action of the load gates 45,46. The informational data which is transferred out of the last flip-flop 44 of the recirculating register 22 is then compared to data from an input tape to be described in more detail hereinafter; and this data from the recirculating register is also recirculated to the input of the first flip-flop 44 of the recirculating register 22. The binary zeros are gated out of the recirculating gate 47 and the binary ones are gated out of the recirculating gate 48. The

recirculation will take place at a rate equal to the rate of data transfer from the input tape. The data in the recirculating register 22 will be compared serially bit by bit with the information from the tape, and each bit from each of the outputs will be examined for equality.

The load gates 45,46 permit entry of data into the recirculating register 22 from either of the two sources, namely either the jam register 20 or from the recirculating register 22 itself in the form of recirculated data. The recirculating gates 47,48 prevent the transfer of recirculated data during the transference of data from the jam register 20. Recirculation is inhibited by resetting the receiver flip-flop 34, through a resetting line 49 connecting the output of the recirculating gate 48 to an input of the receiver flip-flop 34.

The output of the recirculating register 22 is connected directly to one input of a half adder 50 or so-called equality comparator." The other input of the half adder 50 is connected to a magnetic tape reader 51 as illustrated in FIG. 8. The magnetic tape reader 51 is included in the tape reader circuit E illustrated schematically in FIG. 1. The data from the tape reader 51 will necessarily be of the same type as the data input from the credit card. Inasmuch as the apparatus of the present invention has been described as operating on the basis of a four-bit binary coded decimal system, the data from the tape will also be in the form of a four-bit binary coded decimal system. If during the recirculation period, between logic pulses, the bits from the tape reader 51 and register 22 compared in the half adder 50 have been equivalent, then the sum in the half adder 50 will be zero. The inputs to the half adder 50 from the tape reader 51 and the recirculating register 22 will be either in the form of a zero or a one, and will be added as follows:

l+l=+(a generated carry) The carry output in the one plus one addition is not used. If a sum of one" is never obtained in the half adder 50, it is a recognition that the two bits or words being compared are identical.

The equality comparator 50 is generally conventional in its construction and comprises a pair of flip-flops and gates necessary to achieve a summing function or a carry function. If the half adder were recognizing the characters X and Y then the sum would be X )=X$ and a carry function would be The half adder 50 output is connected to the reset input of a memory flip-flop or so-called sum flip-flop 52, which actually serves as a type of memory unit. The flip-flop 52 maintains a memory of lack of equality conditions, or the presence flop 52 are connected to two of the inputs of a bad card flipflop 53. The output of the bad card flip-flop 53 is connected to a bad card lamp 54 which is mounted on the control panel 5. Accordingly, if therewas an equivalence of all bits compared in the shift register 20 with the output of the tape reader 51,

the bad card light 54 will be energized. It should be recognized that any other type of advisory signal such as a bell could be employed as the means to generate advisory signals, either audible or visible signals. Furthermore, a valid card light may be optionally provided to advise of a valid credit card.

The output of the bad card flip-flop 53 is also connected to a motor deenergization gate 55 which is, in turn, connected to an off switch forming part of a motor to be hereinafter described in detail. The output of the bad card flip-flop 53 is additionally connected to the inhibit input of an AND-gate 56, the output of which is connected to the set input of the memory flip-flop 52. This type of construction serves as a type of holding or latching circuit to maintain energization of the bad card light 54, inasmuch as a new logic pulse would deenergize the light. Furthermore, these flip- flops 52, 53 will inhibit logic pulses and inhibit the apparatus from performing any other function when the bad card lamp 54 is energized until a resetting thereof. The flip-flop 53, the light 54, gates 55,56, the latching circuit and associated components are all included in the bad card advisory circuit illustrated in FIG. 1. The half adder 50 and the flip-flop 52 are included in the comparison circuit G.

The data storage section H retains the list of invalid credit card numbers for ultimate comparison. The data storage section H is generally mounted on the baseplate 6 and generally comprises a conventional AC electric motor having a drive shaft 101 which is directly connected to a speed reducer 102. The motor 100 may also be structurally connected to the reducer 102. The motor 100 may also be structurally connected to the reducer 102 and the latter may be provided with a base flange 103 for rigid mounting to the baseplate' 6.,The output of the speed reducer 102 is connected to a data storage drum 104.

The drum 104 which is more fully illustrated in FIGS. 3 and 4 may be cast from steel or aluminum or other suitable metal or it may be machined. Furthermore, the drum may be formed of any suitable plastic or synthetic resinous material such as polystyrene or polyvinylchloride. The drum 104 may be conveniently injection molded or thermoforrned. The drum 104 is generally constructed with an annular sidewall 105 and a relatively flat end wall 106. An outwardly struck integrally formed annular flange 107 is formed with the sidewall 105 on the opposite margin thereof with respect to the end wall 106. The flange 107 is optionally provided and serves as an indexing means. The annular sidewall 105 is provided with a transversely extending recess 108 having transversely extending tapered walls 109 which integrally merge into the annular sidewall 105. A pair of outwardly extending, transversely spaced tape retaining pins 110 are mounted on one of the tapered walls 109, and a single outwardly extending tapered pin 111 is mounted on the opposite tapered wall 109. The pins 110,111 are designed to removably retain a data storage tape 112, the latter to be hereinafter described in more detail. The pins 1 10,1 1 1 are offset with respect to the end wall 106 so that the tape 112 may only be mounted on the drum 104 in one position as illustrated in FIG. 7. The tape 112 is provided with apertures 113 sized and located to accept the pins 110,111. Furthermore, the tape 112 may be optionally provided on its underside with a foamed rubber surface in order to enable the tape to become taut when mounted and account for any nonlinearities in the tape.

It should be recognized that the present invention is not annular sidewall of the drum and provide the tape with a laterally extending pin which may be removably disposed in the aperture. However, the particular system described herein has been found to be most suitable.

The tape reader 51 is fully illustrated in FIGS. 36 and comprises a head escapement mechanism 114 or so-called head carriage which is disposed in proximate relation to the drum 104. The head escapement mechanism 114 generally comprises a metal frame housing 115 having a bottom wall 116 with depending legs 117 for shiftable securement to the baseplate 6 in a manner to be hereinafter described. Rigiclly secured to the front wall 118 of the housing 115 is a bearing block 119 having a longitudinal groove 120 on its upper face which serves as a trackway. A rectangularly shaped metal head supporting frame 121 is loosely disposed in and shiftable along said trackway 120. The horizontal lower rail of the frame 121 should be sized so that it is capable of being shiftable longitudinally between each sidewall 3 in the trackway 120 and so that it is capable of being slightly pivotal in a forward and rearward direction, that is a direction transverse to the lengthwof the trackway 121.

Welded or otherwise rigidly secured to an upstanding strut 122 forming part of the frame housing 12] is a laterally struck head retaining flange 123 for retaining a data head or socalled reading head 124. The head 124 is a single track head of conventional construction and is designed to engage the data surface (outwardly presented surface) of the tape 112 when the frame housing is shifted rearwardly, reference being made to FIG. 4. The frame housing 122 and hence the reading head 124 is shifted to the reading position, that is the laterally extended rearward position by means of an actuating solenoid 125, where the head 124 engages the drum tape 112. This solenoid 125 also controls the movement of the head 124 to the forward or disengaged position.

The actuating solenoid 125 is mounted on an L-shaped mounting bracket 126 which is, in turn, secured to a top wall 127 integrally formed with the front wall 118. Pivotally mounted on the upstanding arm of the L-shaped bracket 126 by means of a pivot pin 127 is an actuating plate 128 which is controlled by the solenoid 125. The plate 128 includes a depending leg 129 which retains a leaf spring 130. The leaf spring 130 is provided with a U-shaped sleeve 131 which loosely engages the top rail of the frame 121. The plate 128 is normally biased to the unactuated position or upper position in FIG. 4 by means of a coil spring 132 disposed about the pivot pin 127. Thus, when the actuating plate 128 is in the unactuated position, the head 124 will be normally biased to the disengaged position. When the actuating solenoid 125 is energized, in a manner to be hereinafter described in more detail, the actuating plate 128 will be urged downwardly to the actuated position against the action of the spring 132. This action will cause the frame 121 and data head 124 to be shifted to the reading" position.

Mounted on the bottom wall 116 and extending transversely thereacross is a support plate 133 and secured to the support plate 133 is a stepping mechanism 134 which comprises a stepping or so-called advancing" solenoid 135. The frame housing 115 also includes a backwall 136 which pivotally retains a stepping plate 137. The plate 137 is normally biased upwardly by means of a coil spring 138 secured to the rearward end of the plate 137 and to an outwardly struck flange 139 formed with the frame housing 115. The plate 137 carries a contact bar 140 on its upper surface which is engageable by a contact arm 141 forming part of an advancing switch 142, when the plate 137 is normally biased upwardly. The advancing switch 142 is supported by a U-shaped bracket'l43 which is secured to the backwall 136. The forward end of the stepping plate 137 is bent 90? in the provision of a finger 144 which is engageable with the teeth of a ratchet 145. Upon energization of the solenoid 135, the stepping plate 137 will be urged downwardly against the action of the spring 138 and the finger 144 will engage a tooth on the ratchet 145 and cause the same to rotate through a predetermined arc. By reference to FIG. 5, it can be seen that the ratchet is caused to rotate in a clockwise direction upon actuation by the finger 144. A clock spring 146 is disposed about a ratchet shaft 147 upon which the ratchet 145 is mounted and will bias the shaft 147 and ratchet 145 in a counterclockwise direction.

A pinion gear 148 is mounted on the outer end of the ratchet shaft 147 and is disposed in meshing engagement with a rack 149, the latter being formed with or otherwise rigidly secured to the upper surface of the lower rail forming part of the head supporting frame 121. Thus, upon actuation of the stepping solenoid 135, the entire frame 121 will be intermittently shifted to the left, reference being made to FIG. 5. The frame 121 will be shifted for a short predetermined distance each time that the ratchet is shifted through its predetermined arc. The head supporting frame 121 is designed to shift through 13 individual shifts, which is one less than the total number of tracks on the tape 112. Each shift is designed to cover the distance between tracks on the tape 112. Furthermore, the head 124 is located on the frame housing 115, so that it will be positioned over each track on the tape 112 as the head supporting frame 121 is shifted through one complete cycle. One complete cycle is attained when the head supporting frame 121 shifts from one end position to the other and back to the initial end position. A limit switch 150 located at the far end of the block 119 will stop all further energization of the stepping solenoid 135, until the head supporting frame 121 has been reset to its initial end position. The finger 144 extends through a clearance aperture 151 formed in the front wall 118 and which is sized to accept the vertical movement and a slight horizontal movement as it engages the ratchet 145. in addition, the finger 144 is also biased upwardly by means of a spring 152.

A locking pawl 153 is pivotally mounted on the front wall 118 by means of a pivot pin 154 and is biased into engagement with the teeth of the ratchet 145 by means of a clock spring 155 disposed about the pin 154. The head supporting frame 121 is, therefore, prevented from being shifted back to its initial position through the action of the locking pawl 153.

A resetting mechanism 156 also forms part of the head escapement mechanism 114 and generally comprises a resetting solenoid 157 which is mounted on the plate133. The resetting solenoid 157 actuates a plate 158 which is pivotally mounted on the backwall 136 and which is biased to an upward position by means of a spring 159 secured to the plate 158 and to a flange 160 formed with the frame housing 115. The plate 158 carries a retaining arm which engages the pawl 153 and urges the same out of engagement with the teeth of the ratchet 145 when the resetting solenoid 157 is energized. The pawl 153 is normally disposed in the position as illustrated in FIG. 5 when the advancing solenoid 135 is being actuated, and is shifted to the upper position when the resetting solenoid 157 is energized.

A lifting arm 161 is pivotally mounted on the front wall 118 by means of a pivot pin 161' and is pivotally mounted to the upper position as illustrated in FIG. 6 by means of a clock spring 162 disposed about the pivot pin 161'. When in the upper position, the arm 161 will engage the finger 144 and hold it out of engagement with the ratchet 145. However, the lifting arm 161 is normally held in the down position as illustrated in FIG. 5 by means of a flange 163 formed on one end thereof. It can be seen that the flange 163 is held in such position when the resetting solenoid 157 is unenergized and the plate 158 is in the upper position, that the lifting arm 16] does not interfere with normal operation of the advancing solenoid 135 and the finger 144. However, when the resetting solenoid 157 is energized, the plate 158 will be shifted downwardly holding the locking pawl out of engagement with the ratchet 145. This will permit the ratchet to be biased to its initial position by the action of the spring 146. Furthermore, the flange 163 will be shifted over the plate 158 through the action of the spring 162 and will engage the finger 144 and hold the same out of engagement with the ratchet 145. When the resetting solenoid 157 is deenergized, the plate 158 will be biased upwardly permitting each of the aforementioned components to return to their normal position as illustrated in FIGS. and 6. As an alternative, the drum 104 can be stepped along a drum supporting shaft past a fixed data head, in the manner hereinafter described in detail.

Also mounted on the bearing block 119 in proximate relation to the drum 104 is an upstanding leaf spring 163' and carried by the leaf spring 163' is a synchronizing head or socalled sync head" 164. By reference to FIG. 6, it can be seen that the sync head 164 is normally disposed against the magnetic tape 1 12 and will read only one track thereon, inasmuch as the head 164 is not shiftable. In the preferred embodiment of the invention, the tape employed is normally a 14 track tape carrying FSK or frequency shift keyed data in 13 tracks and synchronizing data on the 14th track. However, it should be recognized that any multiparallel track system could be employed.

At the beginning of any reading cycle, the data head 124 and the sync head 164 are separated by their maximum separation distance. The sync head 164 which is stationary with respect to the tape 112, will read the innermost track or last track on the tape. At the start of a cycle, the data head 124 is offset with respect to the first track of the tape 112 and the creation of a cam pulse will shift the data head 124 into alignment with the first track. At the end of a reading cycle, the data head 124 will have read the second last track and will be located in almost abutting relationship with respect to the sync head 164.

As indicated above, the 13 tracks will contain the invalid credit card numbers in F SK format. If desired, it is possible to list all of the valid credit cards on the tape and compare a specific credit card against the valid card numbers. However, the practicalities of apparatus size and recordation problems may limit the feasibility of this latter type of system. Inasmuch as the tapes are easily interchangeable, it is possible to conveniently and frequently change the tapes for updated lists of invalid numbers.

The right sidewall 3, reference being made to FIG. 2, and the rear wall 4 of the housing 1 is cut away to accommodate a swingable door 165, providing access to the interior of the housing 1 and to the drum 104. The door 165 is hinged to the baseplate 6 by means of conventional leaf hinges 166 and can be locked in closurewise position by means of a conventional manually operable lock 167. The drum 104 is located in the housing 1, so that convenient access thereto is afforded when the door 165 is opened. The head escapement mechanism 114 is operatively connected to the door 165 through a shift linkage 168, so that the head escapement mechanism 114 is shifted away from the drum 104 when the door 165 is opened.

The shift linkage 168 is more fully illustrated in FIGS. 4, 5 and 6 and generally comprises a link 169 which is pivotally secured to the door 165. The other end of the link 169 is pivotally secured to one leg of a bellcrank 170, the latter being pivotally secured at its pivot point to the baseplate 6. The other leg of the bellcrank 170 is pivotally connected to an actuating rod 171 which extends through an aperture 172 formed in a depending flange 173 on the frame housing 115. The depending legs 117 of the frame housing 115 are secured to a shift plate 174 for shiftable movement along a pair of spaced guide blocks 175, toward and away from the drum 104. The rails 175 are generally circular in cross section. The actuating rod 171 is provided with a pin 176 which engages the flange 173 and urges the frame housing 115 away from the drum 104 when the door 165 is opened. A compression spring 177 is disposed on the opposite side of the actuating rod 171 with respect to the pin 176 and bears against the flange 173 for shifting the shift plate 174 and frame housing 115 toward the drum 104 when the door 165 is shifted to the closed position.

The guide blocks 175 may be welded or otherwise rigidly secured to the upper surface of the baseplate 6. The baseplate 6 is provided with positionally adjustable blocks 178 which serve as forward stops. The blocks 178 are provided with setscrews 179 for adjusting the position thereof with respect to the drum 104. Thus, when the door 165 is shifted to the closed position, the spring 177 will bear against the flange 173 and urge the frame housing toward the drum 104 until the housing 115 engages the forward stops 178. A limit switch 180 is positioned adjacent one of the sleeves 178 and is actuable by the frame housing 115 to enable energization of the apparatus when the switch 180 is closed. Thus, if the frame housing 115 is not shifted to its forward position upon closing of the door 165, energization of the device will not be enabled.

The comparison of the data in the shift recirculating register 22 with the data read from the tape 112 in the half adder 50 is performed at synchronizing bit time. When the bad card number data is originally recorded on the tape 112, a logic pulse which serves as a word spacer is recorded between each word. Accordingly, the data head 124 will read the logic pulses as well as the data pulses on each of the individual tracks.

Also mounted on the keyboard 5 is a start switch 181 and a clear switch 182. Each of the switches 181,182 is a momentary switch and is normally biased to the open position. The start switch 181 is connected directly to the on" terminal of the motor 100 and will initiate operation of the apparatus A. The start switch 181 is mechanically connected to or ganged" to an input switch 181' so that in essence, the start switch is a double pole switch. The input switch is interposed between the pushbutton switches 9 and the source of electrical current. A capacitor 182' is also interposed in the input line. By reference to FIG. 8, it can be seen that when the input switch 181' is open, the start switch 181 will be closed, and when the input switch 181' is closed, the start switch 181 will be opened. The switch 181 breaks the circuit to the keyboard 8 and prevents entry of more information into the apparatus until the present cycle is completed. The clear switch 182 is connected to the bad card flip-flop 53, the memory flip-flop 52 and each of the flip-flops in the shift register 20 for resetting each of these components. Resetting of these components is performed by means of an initialization pulse transmitted through a resetting or initialization line 183.

When it is desired to commence operation, the clear switch 182 is actuated for energizing the motor 100, which will, in turn, cause rotation of the drum 104. Actuation of the clear switch 182 will also initialize or clear the various components connected to the initialization line 183. The drum 104 is provided with a cam 184 on its annular surface located near one peripheral margin thereof which is capable of causing the generation of cam pulses, through the escapement mechanism 114. After the card number has been entered in the manner previously described, the start switch 182 is actuated. The cam 184 is capable of causing actuation of the advancing switch 142 located on the escapement mechanism 114. Actuation of the start switch 182 will enable the transference of cam pulses to the head escapement mechanism 114. Each revolution of the drum 104 will cause the cam 184 to actuate the advancing switch 142, thereby generating the cam pulse. The cam pulse will energize the advancing solenoid thereby actuating the stepping switch 134. The frame 121 will be shifted to a position where the data head 124 is disposed in alignment with the next adjacent track, in the manner described hereinabove. After the frame 121 has been shifted so that the head 124 has been positioned over the last of the 13 tracks, the frame 121 will cause actuation of the limit switch which will enable deenergization of the motor 100. By reference to FIG. 8, it can be seen that the switch 150 is connected to one input of the OR-gate 55 which is connected to the off terminal of the motor 100. The OR-gatc 55 serves as the deenergization gate and has the other input connected to the output of the bad card flip-flop 53.

The cam 184 must be sufficiently long to allow enough time for the advancing solenoid 135 to be energized; generally 18 to 20 milliseconds. The synchronizing head 164 is always in engagement with the tape 112 and will continuously read synchronizing pulses during the rotation of the drum 104. When the data head 124 is shifted into engagement with the tape 112, it will read an initial logic pulse and then 40 bits of information, followed by another logic pulse. The synchronizing head 164 is connected to a preamplifier 186 which is, in turn, connected to a synchronizing amplifier 187. The output of the synchronizing amplifier 187 is connected to one input of the gate 35. The output of the synchronizing amplifier 187 is also connected to one input of a head position gate 188. The other input of the gate 188 is inhibited and connected to the switch 142. The output of the head position gate 188 is connected to the synchronizing gate 36; It can be seen that the synchronizing pulses read from the tape 112 are transferred directly to the shift gate 31; and four pulses which then serve as shift pulses will be admitted to the shift register 20 through the action of the four-bit counter 33.

The preamplifier 187 is preferably a level normalizing type of amplifier. A conventional Schmidt trigger may be substituted for the preamplifier 187. The synchronizing track will preferably have a sinusoidal recording and the preamplifier 187 will enable the creation of a synchronizing pulse or socalled clock pulse which provides proper timing for the operation.

The data head 124 is connected to a preamplifier 189 which is, in turn, connected to a filter 190. The filter 190 is provided with three outputs which represent a one signal, a zero signal and a logic signal or pulse. in the employment of the FSK system where FSK recording is placed on the tape 112, a separate frequency is assigned to each output of the filter 190. These three frequency levels will then represent the binary one level, the binary zero level and the logic pulse, respectively. The filter 190 will pass only these three frequencies and eliminate any extraneous noise from the system. Furthermore, the filter 190 will eliminate any amplitude instability.

The logic output of the filter 190 is connected to the input of an AND-gate 191 and the output of the head position gate 188 is connected to the other input of the AND-gate 191. The AND-gate 191 is connected directly to a track shift flip-flop 192 and the switch 150 is connected to a pair of inputs of the flip-flop 192. The output of the track shift flip-flop 192 is connected to one input of the synchronizing gate 36. The logic output of the filter 190 and the output of the track shift flipflop 192 is connected to a logic pulse gate 193. The sync bus 37 is also connected to the third input of the logic pulse gate 193.

The synchronizing head which is normally in engagement with the sync track of the tape 1 12 will send sync pulses to the head position gate 188.- When the switch 142 is closed and the data head 124 is being shifted from track to track, the head position gate 188 will remain closed. However, when the head 124 is aligned with and shifted to the reading position at the next track, the head position gate 188 will open passing sync pulses to the AND-gate 191. The gate 191 will also remain closed until receipt of the next logic pulse. When a logic pulse is received at the AND-gate 191 from the filter 190, the track shift flip-flop will be actuated. Actuation of the flip-flop 192 is an indication that the data head 124 is in the reading position. This will set the track shift flip-flop 192 and inhibit the pulse output of the logic gate 193. The setting of the track shift flipfiop 192 takes place at the logic pulse time. Furthermore, the reading of the logic pulses will take place at sync pulse time.

Upon initiation of a cam pulse, the advancing switch 142 will close and index the data head 124 into alignment with the first information track on the tape 112, and this enables the head position gate 188. A sync pulse is passed through the gate 188 and this is gated with the logic output to'the track shift flip-flop 192. When the head-124 is in reading position,.a logic pulse and sync pulse is received in the gate 191, and in the logic pulse gate 193. The first pulse after the logic pulse is the first digit of the first word. Accordingly, the contents of the shift register 20 must be shifted to enable comparison in the half adder 50. In essence, the first logic pulse enables synchronization of the apparatus with the sync pulse. At this time, the shift gate 31 is opened and allows a shift pulse to pass into the shift register 20. When the head 124 is in reading position, the track shift flip-flop 192 remains in the set state until the next cam pulse is generated. it should be recognized that the sync pulse is used to gate the logic pulse gate 193 in synchronizing time. The logic pulse gate 193 is enabled only after the first logic pulse and then on receipt of every subsequent logic pulse. lf the first logic pulse did pass there would be no comparison in the half adder 50 since the information in the shift register 20 is not recirculating at the time of the first logic pulse, and the flip- flops 52,53 were reset by the previous logic pulse prior to the cam pulse.

The binary one and binary zero pulse outputs of the filter 190 are connected to an exclusive OR-gate 194 forming part of a read error circuit 195. The output of the exclusive OR- gate 194 is connected to one input of an AND-gate 196 which also forms part of the read error circuit 195. The other input of the AND-gate 196 is connected to the sync bus 37, and the output of the gate 196 is inverted. The read error circuit 195 is designed to determine if an error occurred in the reading process and is an optional circuit. The exclusive OR-gate 194 should detect only a one" or a zero" pulse condition. When a sync pulse is received at the gate 196, if neither a zero" nor a one pulse condition or both a "zero" and one" pulse condition existed at the OR-gate 194, then an error exists.

The output of the read error circuit 195 is connected to OR-gate 197 which is, in turn, connected to an error flip-flop 197'. The reset terminal of theerror flip-flop 197' is con nected to the on" terminal of the motor 100. The output of the error flip-flop 197' is connected to an error light 198- which is mounted on the control panel 5. The error light 198 is also an optional component. If an error is detected by the read error circuit 195, the error flip-flop 197 is actuated and this will cause energization of the error light 198. The error flipflop 197' is also connected at its reset terminal to the clear switch 182 and can be reset by merely actuating the clear switch 182. This action will also deenergize the error light 198. It is to be noted that examination of the conditions of the exclusive OR gate will only take place at the time of existence of a sync pulse. V

The one pulse output of the filter l is connected to the half adder 50 for comparison with the recirculating information in the shift register 20. The output of the logic pulse gate 193 is connected to a one-shot 199. The signal from the filter is compared to the recirculation output from the recirculating register 22 in the half adder 50. if the two words examined are not identical, then a pulse in the one-shot 199 will reset the memory flip-flop 52. The one-shot 199 delays the transference of clear pulses to the flip-flop 52 when comparison is made at logic pulse time and prevents actuation of the latching circuit during the time delay.

ln actual construction, the components forming part of the electrical circuit as illustrated in the logic diagram of FIG. 8 are made by printed circuits in the form of printed circuit boards and are so illustrated in FIGS. 3 and 4. It should also be recognized that other bistable storage elements could be substituted for any of the flip-flops used in any of the apparatus of the present invention. For example, image storage tubes, cross coupled NAND gates or magnetic cores could be substituted for the flip-flops.

OPERATION In use, the attendant operating the apparatus A will, upon receipt of the customer credit card, actuate the clear key 182 which will reset each of the flip-flops in the entire shift register '20. This action will also reset the bad card flipflop 53 and deenergize the bad card light 54, if the latter had been energized. Furthermore, it will break any action in the latching circuit. After each of the aforementioned components has been reset, the operator will actuate the various keys 9 to insert the decimal digits representing the card number into the apparatus A. Actuation of any one key 9 will generate four informational bits which are transferred to the four flip-flops of the jam register 21 through the four bit lines 14-17. The dif-

Claims (16)

1. An escapement mechanism for shifting a first member into intermittent proximity with selected elements of a second member, said mechanism comprising: a. base means, b. support means retaining said first member and being shiftably movable along said base means in a first direction, c. ratchet-type means for intermittently shifting said support means and first member along said base means in a said first direction so that said first member is sequentially positioned with respect to certain of the adjacent elements of said second member, d. first solenoid actuable means operatively connected to said ratchet-type means and being energizable to actuate said ratchet-type means upon receipt of a first control signal, e. shift means on said base means for intermittently shifting said first member in a second direction toward and away from said second member, f. second solenoid actuable means operatively connected to said shift means and being energizable to actuate said shift means upon receipt of a second control signal, g. and cooperating means operatively connected to said ratchettype means and said shift means for shifting said first member away from said second member when said ratchet-type means is actuated to move said first member in the first direction for positional location with respect to the next adjacent element on said second member, said cooperating means being actuable upon termination of the actuation of said ratchet-type means to shift said first member with respect to said second member.

2. The escapement mechanism of claim 1 further characterized in that the first member is a reading head and the second member is a storage member of the type capable of having digital or analog data stored thereon and further that the selected elements of the second member constitute tracks of information thereon.

3. The escapement mechanism of claim 1 further characterized in that the first member is a mechanism retaining a pair of reading heads and the second member is a storage element of the type capable of having digital or analog data recorded thereon, the selected elements of said second member constitute tracks of information thereon, and said first member is sequentially positioned in the first direction so that it is shifted for a distance of two tracks during each sequential movement.

4. The escapement mechanism of claim 1 further characterized in that the first member is movable in a trackway formed in said base means and is provided with a rack segment, said ratchet-type means including a pinion gear operable by said ratchet-type means and which is in engagement with said rack segment for shifting said head supporting member.

5. The escapement mechanism of claim 1 further characterized in that a resetting means is provided for disengagement of said ratchet-type means to shift said first member in the first direction to its initial position.

6. The escapement mechanism of claim 5 further characterized in that a resetting solenoid is provided for actuating said resetting means upon receipt of a signal.

7. An escapement mechanism for shifting a first member into intermittent proximity with selected elements of a second member, said mechanism comprising base means with said first member being shiftable along said base means, first solenoid actuable means for shifting said first member into intermittent proximity with the selected elements of the second member and into remote position with respect thereto, second solenoid actuable means cooperating with said first solenoid actuable means to shift said first member selected distances along said base means to be positionally located with respect to the selected elements of the second member, third solenoid actuable means for shifting said first member along said base means to its initial position, and cooperating means operatively connected to said first and second solenoid actuable means for preventing movement of said first member along said base means when said first member is located in proximity with the second member.

8. An escapement mechanism for shifting a first member with respect to a second member wherein the second member has a plurality of spaced selected elements, said mechanism comprising: a. base means, b. a shaft supporting said first member and enabling rotational movement of said first member and sequential axial shifting of said first member, c. a plurality of escapement elements operatively associated with said shaft, d. an actuating element operatively associated with said shaft, e. a plurality of engageable elements normally biased into engagement with said escapement elements preventing axial movement of said shaft, f. and follower means operatively associated with said engageable elements and said actuating element and sequentially biasing each of said engageable elements out of engagement with said escapement elements enabling axial shifting movement of said shaft.

9. The escapement mechanism of claim 8 further characterized in that the first member is a data element and the second member is a data reading element, and that the spaced selected elements of the second member are a plurality of tracks with data recorded thereon.

10. The escapement mechanism of claim 8 further characterized in that the escapement elements are escapement cams, the actuating element is an actuating cam, the engageable elements are escapement rollers, and that the follower means is a cam follower.

11. The escapement mechanism of claim 10 further characterized in that the escapement rollers are located on shiftable arms which are individually biased into and out of positions where the rollers are engageable with the escapement cams.

12. The carriage mechanism of claim 10 further characterized in that a resetting mechanism is operatively associated with said escapement cams for enabling said shaft to be reset to its initial position.

13. The carriage mechanism of claim 10 further characterized in that an individual cam follower is operatively associated with each of said rollers and sequentially biases each of said rollers out of engagement with said escapement cams so that the shift only shifts axially for the distance between two adjacent escapement cams.

14. The carriage mechanism of claim 13 further characterized in that said escapement cams have a flat surface preventing axial shifting movement when in contact with said rollers and an oppositely disposed camming surface.

15. An escapement mechanism for shifting a first member into intermittent proximity with selected elements of a second member, said mechanism comprising: a. base means, b. support means retaining said first member and being shiftably movable along said base means in a first direction from an initial position to a terminal position, c. ratchet-type means for intermittently shifting said support means and first member along said base means in a said first direction toward said terminal position so that said first member is sequentially positioned with respect to certain of the adjacent elements of said second member, d. shift means on said base means for intermittently shifting said first member in a second direction toward and away from said second member, e. cooperating means operatively connected to said ratchet-type means and said shift means for shifting said first member away from said second member when said ratchet-type means is actuated to move said first member in the first direction for positional location with respect to the next adjacent element on said second member, said cooperating means being actuable upon termination of the actuation of said ratchet-type means to shift said first member with respect to said second member, f. biasing means normally biasing said support means in said first direction toward its initial position against the action of said ratchet-type means, g. and locking means cooperating witH said ratchet-type means to prevent said biasing means from shifting said support means toward said initial position until said support means has reached its terminal position.

16. The escapement mechanism of claim 15 further characterized in that a resetting means is provided for disengagement of said ratchet-type means and said locking means to permit shifting of said first member in the first direction to its initial position.

Images