US3567908A

US3567908A - Drive circuits for solid state clock displays

Info

Publication number: US3567908A
Application number: US793492*A
Authority: US
Inventors: Michael J Ingenito
Original assignee: General Time Corp
Current assignee: General Time Corp
Priority date: 1969-01-23
Filing date: 1969-01-23
Publication date: 1971-03-02
Anticipated expiration: 1988-03-02

Abstract

The disclosed solid state clock drive circuit comprises cascaded ring counters, whose stages comprise at least one heater element and one thermistor. A bistable switch, in response to timing pulses, alternately connects alternate stages of each ring counter to a current source such that energizing current flows through only one stage of each ring counter. Thermal coupling between the heater element and thermistor of adjacent stages controls the transfer of energizing current flow from stage to stage upon operation of the switches. A material applied to each heater element produces a visual effect when heated, thus developing a time display.

Description

United States Patent Inventor Michael J. Ingenito Bronx, N.Y.

Appl. No. 793,492

Filed Jan. 23, 1969 Patented Mar. 2, 1971 Assignee General Time Corporation Stamford, Conn.

DRIVE CIRCUITS FOR SOLID STATE CLOCK DISPLAYS Primary Examiner-Bernard A. Gilheany Assistant Examiner-F. E. Bell AttarneysRichard A. Joel, Stephen A. Roen and H. H. Hulse ABSTRACT: The disclosed solid state clock drive circuit comprises cascaded ring counters, whose stages comprise at least one heater element and one thermistor. A bistable switch, in response to timing pulses, alternately connects al- 25 Claims 9 Drawing Figs temate stages of each ring counter to a current source such US. Cl. 219/486, that energizing current flows through only one stage of each 250/209 ring counter. Thermal coupling between the heater element Int. Cl H05b 3/10, nd thermistor of adjacent stages controls the transfer of ener- H01 j 39/ 12 gizing current flow from stage to stage upon operation of the Field of Search 250/213 switches. A material applied to each heater element produces (A), 209; 219/486 a visual effect when heated, thus developing a time display.

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SHEET 3 [IF 5 Tfi SE C gNDS 6O FREQUENCY DIVIDER PATENTEDMR 2am SHEET u 0F 5 80125 340/ i L J 1:1 EB 70 MINUTES r7 3 1 44 76 J r73 1 76 PA IENIEI] IIIR 2 I97I SHEET 5 [IF 5 I l I I l I I I I I l I I I I I I I I l I I I I I I I I I I I I I I I l I I I FIG 60 FIG FIG DRIVE CIRCUITS FOR SOLID STATE CLOCK DISPLAYS BACKGROUND OF THE INVENTION Considerable research effort has been and is presently being devoted to the development of solid state display devices. Applications for such display devices are manifold, such as clock and meter faces, and optical readouts for electrical instrumentation and computers, to name only a few. Solid state display devices are attractive because of the absence of moving parts, thereby promising a long, maintenance free operating life. Typically, solid state displays are extremely rugged and relatively insensitive to vibration, gravity and other external forces. Moreover, they are typically more accurate, stable and versatile than their nonsolid state counterparts. Further the novelty aspects of solid state display devices, together with their susceptivity to unique and spectacular designing, make them particularly suited for advertising and promotional purposes.

The present invention has particular application to display devices employing materials which are thermally actuated pursuant to developing a visual display. An example of a solid state display of this type is disclosed in the copending application of Heinz A. deKoster, Ser. No. 718,823, filed Apr. 4, 1968 and entitled Smectographic Display. This copending application is assigned to the assignee of the instant application and relates to the use of crystalline liquids in solid state display devices. Crystalline liquids are a group of organic materials which at low temperatures have a microstructure consisting of long molecular chains. In this state they have the consistency of petroleum jelly and are'similarly essentially transparent in thin layers. However upon heating, the long molecular chains break up into shorter segments. Within a relatively narrow band of temperatures known as the smectic (colored) range, the molecules orient themselves in a diffraction grid-like pattern, causing the previously transparent crystalline liquid to become brightly colored.

Another example of a thermally actuated solid state display is disclosed in U.S. Pat. No. 3,323,241 to Blair et al. I-Iere, various thermochromic materials are applied to heating elements and, when heated, exhibit a color change. In this case, the color change is attributed to changes in energy absorption caused by alterations of the crystallographic structure of the material itself, brought about by temperature variations.

In addition to crystalline liquids and thermochromic materials, thermoluminescent materials are also capable of producing a visual display in response to temperature variations and thus have application to the present invention.

Thus, there are numerous materials or substances which are capable of generating a visual display by selectively controlling their temperatures. The problem remains however to provide suitable means for selectively controlling the temperatures of such material in a manner to generate an intelligible display. Typically, the information to be displayed changes from time to time, and consequently the display must change accordingly. Consequently, the means controlling a thermally actuated display must necessarily be of a character capable of converting a varying informational input into appropriate thermal control of the display generating material in order to produce a visual display of the information to be conveyed to the viewer.

It is therefore an object of the present invention to provide an electrical drive circuit for solid state display devices employing thermally actuated display generating materials.

A more basic object is to provide a stepping circuit consisting of a serial array of stages, wherein thermal coupling between stages is utilized to determine circuit operation.

A further, more specific object is to provide a solid state clock drive circuit employing cascaded ring counters having interstage thermal coupling for determining the operating sequence pursuant to accumulating and displaying a time count.

Other object will in part be obvious and will in part appear hereinafter.

LII

SUMMARY OF THE INVENTION Generally stated, the present invention provides various stepping circuit embodiments, each consisting of a serial array of stages. Each stage includes at least one heater element and one thermistor having either a positive temperature coefficient or a negative temperature coefficient. Alternate stages of the stepping circuit are connected in separate parallel circuits which are alternately connected to a current supply through a bistable switch.

A heater element of each stage is thermally coupled to a thermistor of the next adjacent stage in a given direction. When energizing current flows through a heater element of one stage, the heat generated by it is coupled to a thermistor of the next adjacent stage, altering'its resistance. When the bistable switch changes state, the effective electrical resistance of this next adjacent stage is less than that of the other alternate stages now connected with it to the current supply by the switch. As a result, a predominate portion ofthe current from the source flows through this next adjacent stage, energizing the heater element thereof. It is thus seen that energizing current flow can be transferred from stage to stage in a given direction determined by the nature of the thermal coupling therebetween, each time the bistable switch changes statef When the state of the bistable switch is alternated in response to a series of timing pulses, the stepping circuits of the invention become, in effect, pulse counters. By cascading a series of such stepping circuits, connected as ring counters, a drive circuit for a thermally actuated solid state clock display is achieved. In accordance with the invention, three such ring counters are cascaded, a seconds ring counter, a minutes ring counter, and an hour ring counter. Each ring counter is controlled by its own bistable switch, with the bistable switch of the seconds ring counter receiving pulses at the rate of one per second. The seconds ring counter has 60 stages, and thus at the end of 60 input pulses, i.e., 1 minute, the seconds ring counter has made a complete cycle, whereupon it supplies a timing pulse to the bistable switch of the minutes ring counter, to be counted by the minutes ring counter. The seconds ring counter thus acts as a divide by 60 pulse divider for the minutes ring counter. At the end of one hour the minutes ring counter will have made a complete cycle through its 60 stages, whereupon it generates a pulse which is counted by the 12 stage hour ring counter.

To render the drive circuit of my invention applicable to a clock display, the heater element of each stage of each ring counter is coated with or thermally coupled to a heat actuated display material, which is thermochromic, crystalline liquid, or thermoluminescent. Such display materials produce a visual indication when heated by its associated heater element due to energizing current flow therethrough. With the stages of the various ring counters physically arranged at equal increments about separate circles, the movements of second, minute and hour hands are simulated, pursuant to producing a time display. I

The invention accordingly comprises the features of construction, combinations of elements, an arrangement of parts, which will be exemplified in the constructions hereinafter set forth, and the scope of the invention will be indicated in the claims.

DESCRIPTION OF THE DRAWINGS For a fuller understanding of the nature and objects of the invention, reference should be had to the following detailed description taken in connection with the accompanying drawings, in which:

FIG. 1 is a circuit schematic diagram of several stages of a stepping circuit constructed according to one embodiment of my invention employing one heater element and one negative temperature coefficient thermistor in each stage;

FIG. 2 is a circuit schematic diagram of several stages of a stepping circuit constructed according to another embodiment of my invention employing in each stage a heater element and a positive temperature coefficient thermistor connected in parallel;

FIG. 3 is a circuit schematic diagram ofseveral stages of a stepping circuit constructed according to still another embodiment of my invention employing in each stage two negative temperature coefficient thermistors, one in series and the other in parallel with a heater element;

FIG. 4 is a circuit schematic diagram of a stepping circuit constructed according to an additional embodiment of my invention employing ineach stage a heater element connected in series with parallel negative temperature coefficients thermistors; and

FIG. 5 isafjcircuit schematic diagram of several stages of a stepping circuit constructed according to an additional embodimentof my invention employing in each stage a heater element connected in series with parallel negative temperature coefficients thenni stors; and

FIGS. 6A, 6B and 6C, when correlated in the manner shown in 6D, constitute an overall circuit schematic diagram of a drive circuit for a solid state clock display; the drive circuit of plural cascaded ring counters having an individual stage configuration corresponding to that of the stepping circuit of FIG. 4.

Similar reference numerals refer to corresponding parts throughout the several FIGS. of the drawings.

DETAILED DESCRIPTION OF THE INVENTION The basic principles of the invention are illustrated in FIGS. 1 through 5, which disclose stepping circuits having some of the stage configurations contemplated by the invention. While only four stages of each basic stepping circuit embodiment are shown, it will be understood that any number of stages may be employed without departing from the spirit of the invention.

Referring first to FIG. 1, the upper ends of stages 1 through 4 are connected in common to a buss 10, which is in turn connected to one terminal of a current supply designated at B+. The lower ends of the

odd stages

1 and 3 are connected in common to a bus 12, while the lower ends of the even stages 2 and 4 are connected in common to a buss 14. Buss 14 is connectable to ground (common to the other terminal of the current supply) through one contact 160 of a bistable switch, generally indicated at 16. Bus 12 isconnectable to ground through bistable switch contact 16b.

Contacts

16a and 16b of bistable switch 16 are mechanically interconnected, as indicated at 16c, such that when one is closed, the other is open.

It is seen that when, for example, contact 16a is closed as is indicated in FIG. 1, bus 14 is connected to ground, and the even numbered

stages

2 and 4 are connected to the current supply. Since contact 16b is open, the odd numbered

stages

1 and 3 are disconnected from the current supply. When contact 16a is open and contact 16b is closed, the reverse situation obtains. While a DC current supply is indicated, it will be appreciated that an AC current supply may also be employed.

Each stage of the stepping circuit of FIG. 1 includes a resistive heater element R connected in series with a thermistor R having a negative temperature coefficient (NTC). Thus, the resistance of the thermistors R decreases when they are heated. The ratio of cold to hot resistance should beat least 50:1, and preferably 100:1 or higher. A suitable NTC thermistor material is vanadium oxide. The heater elements R on the other hand, generate heat in response to current flow therethrough. Preferably, the resistance of the heater elements remain substantially constant at a value approximately one-tenth that of the thermistors cold resistance.

Since alternate stages of the stepping circuit are connected in parallel with each other, if one of the thermistors R of a particular stage included in the parallel circuit connected to the current supply is heated, the series resistance of this stage is less than that of the others. Consequently this stage will pass a predominant portion of the current from the source. Thus, for example, in the situation illustrated in FlG. l, if resistor R2 is heated to lower its resistance, stage 2 will pass a predominant portion of the current from the source, as compared to the other even numbered stages, which pass leakage current. The odd numbered stages pass no current since contact 16b is open. Since stage 2 passes more current than the other even numbered stages, its heater element R2 H is energized to generate a significant amount of heat, while the heater elements of the other even numbered stages generate very little heat.

The heat generated by heater element R2 is coupled to its series connected thermistor R2,, to maintain it heated, thus sustaining the low resistance condition of stage 2. This thermal coupling between heater elements R and thermistors R is indicated at 18 for each stage. Alternatively, thethermistors R may be of the self heating type, such that they heat up in response to energizing current flow therethrough, thus sustaining an established low resistance condition. In this case, thermal coupling 18 is not required.

It will be seen that if thermal coupling is also provided between the heater element R of one stage and the thermistor R of the next stage to the right, as indicated at 20 in FIG. 1, then upon operation of bistable switch 16 energizing current flow is transferred to the right from stage to stage. For example, assume that the bistable switch 16 is in the condition shown in FIG. 1 and that stage 2 receives energizing current flow. Either due to thermal coupling 18 or self heating, thermistor R2- is maintained heated so as to sustain its low resistance condition. The heat generated by heater element R2 is coupled to thermistor R3,, of stage 3. This thermistor is also heated to lower its resistance; however no current flows through stage 3 since contact 16b of bistable switch 16 is open. Since there is no thermal coupling between heater element R2 and thermistor R1 N of stage 1, this thermistor is not heated and its resistance remains high. The thermistors of the odd numbered stages other than stage 3 are not heated to any significant degree, since the heater elements of the even numbered stages to the left thereof only pass leakage current source and thus generate very little heat.

When the condition of the bistable switch 16 is reversed, such that contacts 16b is closed and Contact 16a is opened, it is seen than energizing current flow through stage 2 is terminated. The odd numbered stages are now connected to the source, but energizing current passes only through stage 3 since its series resistance is less than any of the other odd numbered stages. Consequently, by operation of the bistable switch 16, energizing current flow is transferred from stage 2 to stage 3. The direction of this transfer is determined by thermal coupling 20. When the condition of bistable switch 16 is again changed, stage 4 passes energizing current while the other even numbered stages pass only leakage current.

It will be appreciated that if thermal coupling 20 is reversed such that the heater element of one stage heats the thermistor of the stage immediately to the left thereof, then shift of energizing current flow is to the left rather than the right.

In the stepping circuit of FIG. 2, the thermistors of each stage have a positive temperature coefficient (PTC), rather than a negative temperature coefficient. Suitable PTC thermistor materials are semiconducting titanates, such as barium titanate. As a consequence, the heater element R of each stage is connected in parallel with its PTC thermistor R Preferably, each stage also includes an isolating resistor R, connected in series with the parallel combination of heater element R and resistor R The heater element R of each stage is thermally coupled to its own thermistor as indicated at 18, and also thermally coupled to the thermistor of the stage immediately to the right thereof, as indicated at 20. 1

In this embodiment, the isolating resistors R, establish a substantially uniform current distribution between those stages connected to the current source by'bistable switch 16. Of those stages receiving current, the PTC thermistors which are cold have a relatively low resistance, thus effectively shunting their heater elements. If one of the thermistors, for example thermistor R2,. of stage 2 is heated to increase its resistance, a greater proportion of the current through this stage is routed through heater element R2,, The heat generated by heater eIementRZ resulting from energizing current flow therethrough, is coupled to thermistor R2, by thermal coupling 18 to maintain its resistancehigh, thus sustaining stage 2. In addition, the heat generated by heater element R2,, is coupled by thermal coupling 20 to thermistor R3, of stage 3, increasing its resistance. At this point however, stage 3 is disconnected from the current source by bistable switch 16.

When the condition of bistable switch 16 is reversed, connecting the odd numbered stages to the current source, heater element R3,, will receive more current than any of the heater elements of the other odd numbered stages since its thermistor R3,, Is hot, and thus a high resistance. All other corresponding thermistors are cold thus shunting energizing current around their associated heater elements.

It is thus seen that, as in the embodiment of FIG. 1, alternating operation of bistable switch 16 causes energizing current to flow through the heater elements of successive stages in sequence from left to right.

In the stepping current embodiment of FIG. 3, each stage includes a heater element R,, connected in series with a negative temperature coefficient thermistor R as in the embodiment of FIG. 1. In addition however, the heater element of each stage is shunted by a second negative temperature coefficient thermistor R,,,,. The heater element of each stage is thermally coupled to its thermistor R as indicated at l8,'and also, as indicated at 20, to the thermistor R of the stage immediately to the right thereof. Alternatively, the thermistors R may be self heating, in which case coupling 18 maybe eliminated.

In addition, the stepping circuit of FIG. 3 includes an interstage thermal coupling, indicated at 22, by which the heat generated by a heater element of one stage is coupled to the thermistor R shunting the heater element of the stage immediately to the left.

The operation of the embodiment of FIG. 3 is essentially that of the stepping circuit of FIG. 1 with the added feature that the heater element being activated by energizing current flow therethrough perfects a low resistance shunting path around the heater element of the stage immediately to the left thereof. This insures that when the bistable switch operates to transfer energizing current flow to the next stage to the right, the low resistance state of the thermistor R of the stage to the left will prevent any appreciable current flow through its associated heater element which might otherwise occur because the associated thermistor R has not sufficiently cooled to its high resistance stage. Thus, the provisions of the thermistor R and the. thermal coupling 22 serve to prevent any ambiguity in the operation of the stepping circuit in FIG. 3, as might occur with fast stepping rates.

The stepping circuit embodiment of FIG. 4 is analogous to that of FIG. 1, except that two heater elements rather than one are incorporated in each stage. As seen in FIG. 4, each stage includes heater elements R, and R connected in parallel. When a particular stage receives energizing current flow, it divides substantially equally between the two parallel heater elements R, and R,,,,. Heater element R, is thermally coupled to the NTC thermistor R connected in series therewith; this thermal coupling being indicated at 18. Heater element R,,,,, on the other hand, is thermally coupled, as indicated at 20, to the thermistor R,, of the next stage to the right.

The principal advantage of the stepping circuit of FIG. 4 resides in the simplification of the geometry of the circuit. That is, the heater element of one stage does not have to be heat sinked with or thermally coupled both to its own series NTC thermistor and the corresponding thermistor of the next stage to the right. By providing two separate heater elements in each stage, one heater element R,,,,, can be placed in close proximity to its own series thermistor, while the other heater element R,,,, may be placed in close proximity to the thermistor of the succeeding stage, thus simplifying the requisite thermal coupling provisions. This physical arrangement is particularly advantageous if there is considerable physical spacing between stages.

The stepping circuit embodiment of FIG. 5 is somewhat analogous to that of FIG. 4, except that instead of providing each stage with two parallel heater elements, each stage is provided to parallel NTC thermistors R and R-,,. The two parallel thermistors in each stage are connected in series with the heater element R Each heater element is thermally coupled, as indicated at 18, to the thermistor R of its own stage and, as indicated at 20, to the thermistor R of the stage immediately to the right the right. I

Considering the operation of the stepping circuit of FIG. 5, assume that energizing current flow is passing through heater element R2,, of stage 2. This condition is sustained by coupling some of the heat generated by heater element R2,, to thermistor RZ making its resistance low. Since heater element R2,, and thermistor R2, are in the same stage, they may be placed physically close together to simplify thermal coupling 18.

At the same time, some of the heat generated by heater element R2,, is coupled to thermistor R3 of stage 3. Thermistor R3 may be positioned ,in close physical relationship to heater element R2,,, simplifying thermal coupling 20.

When the condition of bistable switch 16 reverses, only thermistor R3, of the various odd numbered stages has been heated to its low resistance state. Consequently, energizing current flow is transferred from stage 2 to stage 3, flowing through heater element R3,, and thermistor R3, Heater element R2,, cools down, as does thermistors R2, and R3, However, heater element R3,, has in the meantime been heating up thermistor R3 lowering its resistance as the resistance of thermistor R3 rises. Consequently, the low series resistance condition of stage 3 is preserved, thermistor R3, taking over from thermistor R3 It will be appreciated that in the embodiment of FIGS. 1 through 5, suitable means are provided to, in the first instance, initiate energizing current flow through one of the stages. It will be understood that none of the embodiments are selfstarting in the sense that, when the current supply is first connected to the stepping circuits, energizing current flow will be initiated in one of the stages. Instead, the alternate stages connected to the current supply through the bistable switch 16 will receive an equal share of the current, and thus no one stage will receive energizing current flow. This equal distribution must be upset by altering the resistance of one of the stages connected to the current supply.

In the embodiment of FIG. 1, for example, this may be done by applying heat from an external source to one of the NTC thermistors of a stage connected to the current supply through the bistable switch 16. Thus, energizing current flow through stage 2 may be induced in the first instance by supplying heat from an external source to thermistor R2 Alternatively, thermistor R2,, is shunted by a switch to always establish energizing current flow through stage 2 after the stepping circuit of FIG. 1 is, in effect, turned on. In the embodiments of FIGS. 3 through 5, the NTC thermistor of a particular stage connected to the current supply is similarly either shorted or heated to start circuit operation. In the embodiment of FIG. 2 the PTC thermistor of a stage connected to the current supply may also be heated to start circuit operation. However, if a start switch is used, it must momentarily break the parallel connection between a heater element and a PTC thermistor in order to initiate circ'uit operation.

To adapt the stepping circuit embodiments of FIGS. 1 through 5 to a solid state display, a heater element of each stage is coated with or thermally coupled to a heat actuated material producing a visual effect when heated. Such materials may be classified generally as thermochromic, crystalline liquid and thermoluminescent materials. A suitable thermochromic material, disclosed in the above noted US. Pat. No. 3,323,241, is Cu Hgl,, having a convenient color transition temperature of C. Suitable crystalline liquid materials are those mentionedin the above noted copending application, Ser. No. 718,823, such as thallium stearate, thallium oleate, cholesterine derivatives, and certain unsaturated aliphatic carbon acids, to name only a few. So adapted, the

FIGS. 1 through is to drive a solid state clock display. This application is shown in FIGS. 6A, 6B and 6C, correlated in the manner shown in FIG. 6D to form an overall circuit schematic diagram of a solid state clock display drive circuit, constructed according to the invention. The drive circuit is formed of three cascaded ring counters, a form of stepping circuit whose first and last stages are coupled together to form a ring or loop. One ring counter, indicated at 30 in FIG. 6A, is devoted to counting out and presenting visual indication of seconds. The ring counter, indicated at 46 in FIG. 6B, is devoted to counting minutes and presenting a visual indication thereof, while the other, indicated at 50 in FIG. 6C, is devoted to counting hours and presenting a visual indication of the hour count. While the particular structural configuration of the clock display face does not form a part of this invention, it will be appreciated that the three ring counters would typically be formed as separate laminae units, superimposed one on the other.

While the configuration of the stages of the ring counters of FIGS. 6A through 6C correspond to the stage configuration of the stepping circuit embodiment of FIG. 4, it will be appreciated that other stage configurations, including those of FIGS. 1 through 3 and 5 may be utilized without departing from the invention.

It will be further appreciated that, in order to present a visual presentation of the second, minute and hour counts, a heater element of each stage of each ring counter is coated with or thermally coupled to a suitable thermally actuated display generating material, such as a thermoluminescent, thermochromic, or crystalline liquid materials. The presence of such material is indicated diagrammatically at 38 in FIGS. 6A, 6B and 6C.

Referring first to FIG. 6A, the seconds ring counter 30 consists of 60 stages, of which only every fifth stage is shown for the sake of simplicity. The stages are angularly positioned at equal increments about a circle, i.e., 6 apart. The heater elements R, are in close proximity to their stage associated NTC thermistors R to achieve thermal coupling 18, while heater elements R are stationed in close proximity to the thermistors R of the next stage in the clockwise direction to achieve thermal coupling (FIG. 4).

The stages of the seconds ring counter 30 have their one ends connected in common to a buss 31a, which is in turn connected over lead 32 to the B+ terminal of the current supply. The other ends of the odd numbered stages are connected in common to a buss 34a while the other ends of the even numbered stages are connected in common to a buss 36a. Buss 36a is connected to the collector of a transistor Q2, while buss 34a is connected to the collector of a transistor Q1. These transistors are cross coupled by resistors R1 and R2 to form a flip-flop, generally indicated at 4011. Positive supply voltage for flip-flop 40a is derived from B+ buss 31a over connection 41, and resistors R3 and R4, to the collectors of transistors Q1 and Q2. The emitters of these transistors are connected in common to a B- buss 44, common to the other terminal of the current supply.

Thus, it is seen that if transistor O1 is conducting, buss 34a is coupled to bus 44, placing the odd numbered stages of the seconds ring counter 30 across the output of the current supply. Alternatively, when transistor O2 is conductive, buss 36a is coupled to bus 44 to connect the even numbered stages across the current supply. As is well understood, the operation of flip-flop 40a is such that only one of the transistors 01 and 02 can be conductive at any one time, and thus this flip-flop is the equivalent of the bistable switch 16 of FIGS. 1 through 5.

Turning to FIG. 6B, the minutes ring counter 46 also consists of 60 stages, again only every fifth stage being shown. Stages 1--60 are connected in common to a buss 31b which, in turn, is connected to the B+ terminal of the current supply by a lead 48. The other ends of the odd numbered stages of the minutes ring counter 46 are connected in common to a buss 3417, while the other ends of the even numbered stages are connected in common to a buss 36b. Busses 34b, 36b are respectively connected to the collectors of transistors Q1 and Q2 of a flip-flop, generally indicated at 40b. The emitters of these transistors are connected in common to the negative buss 44. Thus, the odd numbered stages of the minutes ring counter 46 are connected across the current supply when transistor O1 is conducting, while the even numbered stages are connected across the current supply when transistor 02 is conducting.

Turning now to FIG. 6C, the hours ring counter 50 is shown as having 12 stages. However, by supplementing the minutes ring counter 46 in a manner to be described, additional stages may be positioned between those shown for the hours ring counter 50 present half hour and even quarter-hour positions for the hour hand display.

One side of the hours ring counter stages are connected in common to a buss 31C, which is in turn connected to the 13+ terminal of the current supply by a lead 52. The other ends of the odd numbered stages are connected in common to a buss 34c, which is in turn connected to the collector a transistor Q1 included in a flip-flop 400. The other ends of the even numbered stages are connected in common by buss 360 to the collector of transistor O2 in flip-flop 400. The emitters of these transistors are connected in common to the negative buss 44. Thus, by operation of flip-flop 40c either the even or the odd numbered stages of the hours ring counter 50 are connected across the current supply.

The flip-flops 40a, 40b and 400 of FIGS. 6A through 6C are triggered alternately to one state and the other by pulses applied to separate diode steering gates, generally indicated at 56. These steering gates each include a pair of diodes D1 and D2 whose anodes are connected together to receive pulse inputs. The anodes of these diodes are referenced to the voltage on the negative buss 44 through a resistor R5. The cathode of diode D1 is connected to the base of transistor 01, while the cathode of diode D2 is connected to the base of transistor Q2 of each flip-flop. One or the other of diodes D1 and D2 is conditioned to pass a positive pulse calculated to change the state of the flip-flops depending upon their states prior to receipt of the pulse. More specifically, if transistor 02 is conducting, its collector is at a relatively negative voltage which is effective through resistor R2 to forward bias diode D1 for passage of a positive pulse to the base of transistor Q1, driving it into conduction. Diode D2, on the other hand, is back biased through resistor R1 by the relatively positive voltage at the collector of the nonconducting transistor Q1.

Returning to FIG. 6A, the pulse input to flip-flop 40a may be derived from cycle line current applied at input terminal 60. It will be appreciated that 60 cycle line current may also be suitably rectified and regulated to provide the current source to which the B+ and B terminals are associated. Input terminal 60 is connected to a divide by 60 frequency divider 61 which in conjunction with the associated pulse shaping circuitry supplies positive pulses at the rate of one per second to the arm 62 of a gang switch, generally indicated at S2. The frequency divider 61 may take the form of an MOS shift register with a suitable rectifying and pulses shaping input stage.

It is seen from FIG. 60, that when the switch arm 62 of gang switch S2 is in its number one position, the pulse output from the frequency divider is supplied through a capacitor C1 to the input of the steering gate 56 for flip-flop 40a. The state of flipflop 40a is thus changed every second, with the result that the seconds ring counter 30 makes a complete cycle through its 60 stages. At the completion of each cycle seconds ring counter stage 60 is passing energizing current from the current source. Heater element R60 is hot and the thermally actuated material 30 associated therewith produces a visual indication that the second hand is at the 12 o'clock position. As the seconds ring counter 30 is stepped to stage 60, the increase in current therethrough causes the junction 64 between the heater element R60 and thermistor R60 to fall negatively. This negative going voltage at junction 64 is supplied to the base of a transistor Q3 through resistor R6. The emitter of transistor O3 is connected to 13+ buss 31a, while its collector is connected over lead 66 to contact arm 68 of the gang switch S2. The collector of transistor Q3 is also referenced to B by a resistor R8 connected between lead 66 and negative buss 44.

When the seconds ring counter 30 is stepped to stage 60, the increase in current flow therethrough drives transistor Q3 into conduction. This puts a positive going voltage transition on line 66 which is routed by contact arm 68 of gang switch S2, when in its one position, and lead 70 to the input of the flip-flop 40b (FIG. 6B). This positive going voltage transition on lead 70 is transformed by capacitor C1 at the input of steering gate 56 to a positive triggering pulse for flip-flop 40b. As a result, the minutes ring counter 46 executes a step, transferring energizing current flow from one state to the next adjacent stage in the clockwise direction.

It is thus seen that the seconds ring counter serves as a divide by 60 p7lse divider, generating a pulse output to the minutes ring counter 46 for every 60 pulses it receives from frequency divider 61.

The minutes ring counter 46 also functions as a divide by 60 pulse divider for the pulses issuing from seconds ring counter 30. To this end, the junction 64 between the heater element R60, and thermistor R60 is connected by a resistor R6 to the base of another transistor Q3 (FIG. 6B). The emitter of transistor O3 is connected to the B+ buss 31b while its collector is connected over lead 72 to contact arm 74 of the gang switch S2 (FIG. 6A). Thus, when the minutes ring counter 46 steps to its stage 60, giving off a visual indication of the minute hand in the 12 oclock position, transistor O3 is biased into conduction. This puts a positive-going voltage transition on lead 72, which is routed by contact arm 74, when in the number one position, and lead 76 to the input of steering gate 56 for flip-flop 400 (FIG. 6C). This positive-going voltage transition is converted into a triggering pulse by capacitor C1 to change the state of flip-flop 400. It is thus seen that the hours ring counter 50 is stepped from one stage to the next stage in the clockwise direction with each pulse issuing from the minutes ring counter 46, occurring at the rate of l per hour.

As in the case of the seconds ring counter 30. the heater elements R of the minutes ring counter 46 and the hours ring counter 50 are coated with or thermally coupled to thermally actuated display generating material, diagrammatically indicated at 38, so as to simulate the positions of the minute and hour hands on a clock display face.

While the hours counter 50 is shown having only 12 stages, it will be appreciated that it can have a greater number, such as 24. With 24 stages, half hour positions of the hour hand may be simulated. In this case, the base of transistor Q3 of the minutes ring counter 46 (FIG. 6B) is also connected to the junction between the heater element R30 and the thermistor R30- of stage 30. As a consequence, the transistor O3 is effective to generate a pulse to be counted by the hours ring counter 50 at half hour intervals, rather than hour intervals. Having 24 stages, the hours ring counter counts two pulses each hour, but still makes a complete cycle in 12 hours. It will be appreciated that the hours ring counter 50 may be further expanded such as, for example, to present quarterhour positions for the hour hand.

As was previously pointed out in connection with the stepping circuit embodiment of FIGS. 1 through 5, when the circuits are first connected to the current supply, none of the stages receive energizing current. Instead, the current is equally divided between those stages which are connected to the current supply by the bistable switch. To start the ring counters of FIGS. 6A-6C, a switch S1 is provided having a first contact 800 connected to short out thermistor R60 in stage 60 of the seconds ring counter 30. A second cbntact, contact 8012 of switch S1 connects the collector of transistor O2 in flip-flop 40a to the negative buss 44, thus forcing the flip-flop into the state whereby transistor 02 is conducting and transistor Q] is cut off. Consequently, when the switch S1 is momentarily closed, the even numbered stages, including stage 60 of the seconds ring counter are connected to the current supply, and since thermistor R60- is shorted, energizing current flow is initiated through stage 60. Switch S1 has corresponding contacts associated with the minutes ring counter 46 and the hours ring counter 50, so as to initiate energizing current flow through stage 60 and stage 12, respectively.

As is seen in FIGS. 6A through 6C, additional provision is made for readily setting the clock display drive circuit to generate a particular initial time indication. Initially, the

switch arms

62, 68 and 74 of gang switch S2 are moved to their number 4 positions. In this condition, pulses from the frequency divider 61, applied to switch arm 62, terminate on dead contact 4. Switch S1 is then operated so as to start the various ring counters at their 12 oclock positions. This is a static display since frequency divider 61 is effectively disconnected from the drive circuit.

The switch arms of gang switch S2 are then shifted to their number 3 positions. The pulses from the frequency divider 61 are then routed through switch arm 62 to conductor 76 leading to flip-flop 400 of the hours ring counter 50. The hours ring counter 50 is thus stepped at the rate of one stage per second to the appropriate hour hand setting. When'this is achieved, the switch arms of the gang switch S2 are shifted to their number 2 positions. The pulses from the frequency divider 61 are then routed over switch arm 62 and conductor to the flip-flop 40b, controlling the minutes ring counter. The minutes ring counter is thus stepped at a rate of one state per second to the appropriate minute hand setting, whereupon the arms of gang switch S2 are shifted to position 1, the normal run position. As a practical matter, there would be no necessity in presetting the seconds ring counter to a particular second hand position, although this could be done.

From the foregoing description, itis apparent that the combined heater and thermistor invention provides a novel drive circuit having particular application to controlling a solid state display utilizing thermally actuated materials as discrete display generating elements. It will be noted however, that the presence of thermally actuated display generating materials is not necessary to the effective operation of the disclosed drive circuits. Thus, the invention is applicable for purposes other than displaying generation. The disclosed circuits, in addition to functioning as pulse counters, may be operated as shift registers capable of registering and processing discrete thermal inputs, as well as pulse inputs.

While the specifically disclosed stepping circuit embodiments all employ positive temperature coefficient or negative temperature coefficient thermistors, it will be appreciated that other elements whose circuit parameters vary with temperature may also be used. Also, rather than using a separate heater element and thermistor in each stage, the functions of each may be combined in a single element.

It will thus be seen that the objects set forth above, among those made apparent from the preceding description, are efficiently attained and, since certain changes may be made in the above constructions without departing from the scope of the invention, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

I claim: i

l. A stepping circuit comprising:

A. a plurality of first stages electrically interconnected in a first parallel circuit;

B. a plurality of second stages electrically interconnected in a second parallel circuit; 1. said first stages alternating with said second stages to form a serial array of stages;

C. each said stage including:

1. a heater element generating heat in response to energizing current flow therethrough;

2. an impedance element whose impedance varies with temperature;

3. said heater element of each said stage being thermally coupled to said impedance element the next adjacent stage in a given direction; and

D. switching means alternatelyconnecting said first and second parallel circuits to a current source, whereby heat generated in energizing current flow through the heater element of one stage alters the impedance of the impedance element of the next adjacent stage in said given, direction such that, when said switching means connects the parallel circuit including said next adjacent stage to the current source, energizing current fiow is transferred only to said next adjacent stage for flow through the heater element thereof.

2. The stepping circuit defined in claim 1 wherein:

1. said impedance element is a positive temperature coe ffi-' cient themistor.

3. The stepping circuit'defined in clairn2 wherein:

1. one said positive temperature coefficie'nt thermistor is connected in parallel with the heater element in each said stage. j

4. The stepping circuit defined in claim 1 wherein:

1. said impedance element is a negative temperature coefficient thermistor.

5. The stepping circuit defined in claim 4 wherein:

1. one said negative temperature coefficient thermistor is connected in series with said heater element in each said stage.

6. The stepping circuit stage includes: V

1. a first negative temperature coefficient thermistor connected in series with said heater element;

a. said first thermistor being thermally coupled to the heater element of the next adjacent stage in the direction opposite to said predetermined direction; and

a 2. a second negative temperature coefficient thermistor connected in parallel with said heater element;

a. said second thermistor being thermally coupled to the heater element of the next adjacent stage in said predetermined direction. a

7. The stepping circuit defined in claim 4 wherein said negative temperature coefficient thermistor is connected in series with a first heater element in each stage, and each said stage further including: I v

1. a second heater element connected in parallel with said first heater element;

a. said second heater element being thermally coupled to said thermistor thereof.

8. The stepping circuit defined in claim 4 wherein each said stage includes:

1. first and second negative temperature coefficient thermistors connected in parallel with each other and in series with said heater element thereof;

a. said first thermistors being thermally coupled to the heater element of the next adjacent stage in the direction opposite to said given direction; and

b. said second thermistor being thermally coupled to the heater element thereof.

9. The stepping circuit defined in claim 1 wherein said impedance elements are thermistors:

1. each said thermistor is also thermally coupled to said heater element included in the same stage;

2. whereby to maintain one of said stages in condition for continued acceptance of energizing current flow in preference to the other of those stages connected to said current source by said switching means.

10. The stepping circuit defined in claim 1 wherein said impedance elements are thermistors:

1. each said thermistor self-heats in response to energizing current flow therethrough;

defined in claim 4 wherein each said 11. The stepping circuit defined in claim 1 wherein the heater element of each said stage is thermally coupled to a thermally actuated display generating material.

12. The stepping circuit defined in claim 1 which further includes:

A. a start switch electrically connected in a particular one of said stages; said switch;

1. operating to temporarily electrically remove said impedance element from said particular stage to initiate energizing current flow through the heater element thereof.

13. Counter apparatus comprising in combination:

A. a first counter having:

l. a plurality of stages each including:

a. a heater generating heat in response to energizing current flow therethrough;

b. a thermistor;

c. said heater of one stage being thennally coupled to said thermistor of the next adjacent stage in a given direction to modify the resistance thereof; and

2. a bistable switch operating in response to a series of first pulses to be counted to alternately connected alternate stages of said first counter to a current source; a. whereby to transfer energizing current flow from stage to stage in said given direction;

B. a second counter having:

1. a plurality of stages, each including:

b. a thermistor;

c. said heater of one stage being thermally coupled to said thermistor of the next adjacent stage in a predetermined direction to modify the resistance thereof; and

2. a bistable switch operating in response to a series of second pulses to be counted to alternately connect stages of said second counter to the current source;

a. whereby to transfer energizing current fiow from stage to stage in said predetermined direction; and

C. means electrically connecting a particular stage of said first counter to said bistable switch of said second counter for developing, in response to energizing current flow through said particular stage said second pulses.

14. The counter apparatus defined in claim 13 wherein:

1. said heater of the last stage of said first counter is thermally coupled to said thermistor of the first stage of said first counter such as to form a'ring counter.

15. The counter apparatus defined in claim 13 wherein said first and second counters each further include:

1. a start switch operating to momentarily electrically remove said thermistor from a given stage of each said first and second counters so as to initiate energizing current flow through said given stages.

16. The counter apparatus defined in claim 9 wherein:

1. said thermistor and said heater of each stage are thermally coupled together such as to maintain said thermistor heated during the time energizing current flows through said heater.

17. The counter apparatus defined in claim 16 wherein said thermistors have negative temperature coefficients.

18. A drive circuit for a solid state clock display face, said drive circuit comprising, in combination:

A at least first and second ring counters each including a plurality of stages with each said stage having:

1. a heater generating heat in response to energizing current flow therethrough;

2. a thermistor;

3. said heater of one stage being thermally coupled to said thermistor of the next adjacent stage of the same counter in a given direction to modify the resistance thereof;

B. first and second bistable switches respectively connected with said first and second ring counters;

C. means deriving a series of timing pulses forapplication to said first bistable switch;

1. said first bistable switch operating in response thereto to alternately connect alternate stages of said first ring counter to a current source; 2." whereby to transfer energizing current flow from stage to stage of said first ring counter in said given direction; and

D. means electrically connected to a predetermined stage of said first ring counter and operating to generate to transfer pulse to said second bistable switch each time energizing current flow is transferred to said predetermined stage;

1. said second bistable switch operating in response to a series of said transfer pulses to alternately connect alternate stages of said secondary counter to the current source so as to transfer energizing current flow from stage to stage thereof in said given direction.

19. The drive circuit defined in claim 18 wherein said first ring counter counts said timing pulses such as to accumulate a seconds count and said second ring counter counts said transfer pulses such as to accumulate a minutes count, said drive circuit further including:

A.'a third ring counter having a plurality of stages, each ineluding:

l. a heater generating heat in response to energizing flow therethrough;

2. a thermistor;

3. said heater of one stage being thermally coupled to the thermistor of the next adjacent stage in a given direction to modify the resistance thereof;

B. a third bistable switch; and

C. means electrically connected to a particular stage of said second ring counter and operating'each time energizing current flow is transferred to said particular stage to develop a second transfer pulse for application to said third bistable switch;

. said third bistable switch operating in response to a series of said second transfer pulses, to alternately con-- 20. The drive circuit defined in claim 19 which further includes:

A. switching means associated with said ring counters and said bistable switches, said switching means being operable to;

l. temporarily electrically remove said thermistors from a particular one stage of each of said counters such as to initiate energizing current flow through said particular stages; and

2. concurrently condition said bistable switches to connect said particular stages to the current source.

21. The drive circuit defined in claim 19 which is energized from 60 cycle per second line current, said drive circuit furtherincluding:

A. a divide by 60 frequency divider for converting the 60 cycle per second line current to said timing pulses occurring at the rate of one per second'for application to said first bistable switch.

22. The drive circuit defined in claim 21 wherein said first and second counters each have 60 stages, and said third counter has a multiple of 12 stages.

23. The drive circuit defined in claim 19 which further includes:

of each stage of each said ring counter is thermally coupled to a thermally actuated display generating material, said material adapted to generate a display in response to energizing current flow through the heater thermally coupled thereto;

1. the stages of each said ring counter being arranged in a circular array, spaced at equal angular increments.

25. The drive circuit defined in claim 19 wherein:

each said stage includes a pair of heaters, one thermally coupled to said thermistor of the next adjacent stage of the same counter in said given direction and the other thermally coupled to said thermistor of its own stage.

Claims

1. A stepping circuit comprising: A. a plurality of first stages electrically interconnected in a first parallel circuit; B. a plurality of second stages electrically interconnected in a second parallel circuit; 1. said first stages alternating with said second stages to form a serial array of stages; C. each said stage including: 1. a heater element generating heat in response to energizing current flow therethrough; 2. an impedance element whose impedance varies with temperature; 3. said heater element of each said stage being thermally coupled to said impedance element the next adjacent stage in a given direction; and D. switching means alternately connecting said first and second parallel circuits to a current source, whereby heat generated in energizing current flow through the heater element of one stage alters the impedance of the impedance element of the next adjacent stage in said given, direction such that, when said switching means connects the parallel circuit including said next adjacent stage to the current source, energizing current flow is transferred only to said next adjacent stage for flow through the heater element thereof.

2. an impedance element whose impedance varies with temperature;

2. a thermistor;

2. said third ring counter counting said second transfer pulses to accumulate an hours count.

2. a second position routing said timing pulses to said second bistable switch; and

2. a thermistor;

2. a bistable switch operating in response to a series of second pulses to be counted to alternately connect stages of said second counter to the current source; a. whereby to transfer energizing current flow from stage to stage in said predetermined direction; and C. means electrically connecting a particular stage of said first counter to said bistable switch of said second counter for developing, in response to energizing current flow through said particular stage said second pulses.

2. a bistable switch operating in response to a series of first pulses to be counted to alternately connected alternate stages of said first counter to a current source; a. whereby to transfer energizing current flow from stage to stage in said given direction; B. a second counter having:

2. a second negative temperature coefficient thermistor connected in parallel with said heater element; a. said second thermistor being thermally coupled to the heater element of the next adjacent stage in said predetermined direction.

2. The stepping circuit defined in claim 1 wherein:

3. said heater element of each said stage being thermally coupled to said impedance element the next adjacent stage in a given direction; and D. switching means alternately connecting said first and second parallel circuits to a current source, whereby heat generated in energizing current flow through the heater element of one stage alters the impedance of the impedance element of the next adjacent stage in said given, direction such that, when said switching means connects the parallel circuit including said next adjacent stage to the current source, energizing current flow is transferred only to said next adjacent stage for flow through the heater element thereof.

3. The stepping circuit defined in claim 2 wherein:

3. a third position routing said tIming pulses to said third bistable switch.

3. said heater of one stage being thermally coupled to the thermistor of the next adjacent stage in a given direction to modify the resistance thereof; B. a third bistable switch; and C. means electrically connected to a particular stage of said second ring counter and operating each time energizing current flow is transferred to said particular stage to develop a second transfer pulse for application to said third bistable switch;

3. said heater of one stage being thermally coupled to said thermistor of the next adjacent stage of the same counter in a given direction to modify the resistance thereof; B. first and second bistable switches respectively connected with said first and second ring counters; C. means deriving a series of timing pulses for application to said first bistable switch;

4. The stepping circuit defined in claim 1 wherein:

5. The stepping circuit defined in claim 4 wherein:

6. The stepping circuit defined in claim 4 wherein each said stage includes:

7. The stepping circuit defined in claim 4 wherein said negative temperature coefficient thermistor is connected in series with a first heater element in each stage, and each said stage further including:

8. The stepping circuit defined in claim 4 wherein each said stage includes:

11. The stepping circuit defined in claim 1 wherein the heater element of each said stage is thermally coupled to a thermally actuated display generating material.

12. The stepping circuit defined in claim 1 which further includes: A. a start switch electrically connected in a particular one of said stages; said switch;

13. Counter apparatus comprising in combination: A. a first counter having:

14. The counter apparatus defined in claim 13 wherein:

16. The counter apparatus defined in claim 9 wherein:

18. A drive circuit for a solid state clock display face, said drive circuit comprising, in combination: A at least first and second ring counters each including a plurality of stages with each said stage having:

19. The drive circuit defined in claim 18 wherein said first ring counter counts said timing pulses such as to accumulate a seconds count and said second ring counter counts said transfer pulses such as to accumulate a minutes count, said drive circuit further including: A. a third ring counter having a plurality of stages, each including:

20. The drive circuit defined in claim 19 which further includes: A. switching means associated with said ring counters and said bistable switches, said switching means being operable to;

21. The drive circuit defined in claim 19 which is energized from 60 cycle per second line current, said drive circuit further including: A. a divide by 60 frequency divider for converting the 60 cycle per second line current to said timing pulses occurring at the rate of one per second for application to said first bistable switch.

23. The drive circuit defined in claim 19 which further includes: A. switching means having:

24. The drive circuit defined in claim 19 wherein said heater of each stage of each said ring counter is thermally coupled to a thermally actuated display generating material, said material adapted to generate a display in response to energizing current flow through the heater thermally coupled thereto;

25. The drive circuit defined in claim 19 wherein: each said stage includes a pair of heaters, one thermally coupled to said thermistor of the next adjacent stage of the same counter in said given direction and the other thermally coupled to said thermistor of its own stage.