US3562507A

US3562507A - Pure fluid shift register

Info

Publication number: US3562507A
Authority: US
Inventors: Robert Arvid Kantola
Original assignee: General Electric Co
Current assignee: General Electric Co
Priority date: 1968-11-27
Filing date: 1968-11-27
Publication date: 1971-02-09
Anticipated expiration: 1988-02-09

Abstract

A pure fluid shift register including a pair of series connected circuit elements, each of which comprises an amplifier gate and a binary storage stage with each gate having two opposed control inlets which act upon a clocked power stream inlet and two outlets which are in communication with the control inlets of the corresponding storage portion of the respective circuit elements, and with each storage portion having a constant power supply stream, two outlets, and the usual attachment wall configuration, the latter outlets of the storage portion of the first circuit element being connected to the gate portion inputs of the second circuit element of the shift register.

Description

United States Patent (72] lnventor Robert Arvid Kantola Scotia. NY. [21 1 Appl. No. 779.423 [22] Filed Nov. 27, 1968 [45] Patented Feb. 9, 1971 [73] Assignee General Electric Company a corporation of New York [54] PURE FLUID SHIFT REGISTER 9 Claims, 6 Drawing Figs.

[52] US. Cl 235/201 [51] lnt.Cl G06d 1/08 [50] Field of Search 235/201; 137/815 [56] References Cited UNITED STATES PATENTS 3,114,390 12/1963 Glattli 235/201 3,201,041 8/1965 Welsh.... 235/201 3,240,220 3/1966 Jones 137/81.5

3,244,370 4/1966 Colston 235/201 3,250,471 5/1966 Gobhai et a1. 235/201 3,410,312 11/1968 Cogar 235/201 Primary Examiner-Richard B. Wilkinson Assistant Examiner-Lawrence R. Franklin Att0rneysArthur E. Foumier, Jr., David M. Schiller, Melvin M. Goldenberg, Frank L. Neuhauser and Oscar B. Waddell ABSTRACT: A pure fluid shift register including a pair of series connected circuit elements, each of which comprises an amplifier gate and a binary storage stage with each gate having two opposed control inlets which act upon a clocked power STORAGE STORAG E PATENTED FEB 9 I97! SHEET 1 BF 2 GATE STORAGE l'la FI G. l

4' /A/VA/70/? ROBERT A /\/ANTOM BY M M 9,.

ATTORNEY PATENIEU FEB 9 I971

sum

2 or 2 STORAGE GATE STORAGE l STORAGE I GA E FIG-6 ATTORIVEY aymf'f PURE FLUID SHIFT REGISTER BACKGROUND OF THE INVENTION l Field of the Invention My invention relates to fluid control devices, and more particularly to a fluid amplifier circuit which functions as a pure fluid shift register.

2. Description of the Prior Art I As evidenced by the known prior art, a wide variety of pure fluid shift register circuits have been devised in recent years. These circuits conventionally include a number of fluidic elements which are interconnected in a working arrangement whereby data is temporarily stored in a portion of the shift register as the data is being stepped along through the shift register. Following the nomenclature utilized by the prior art, pure fluid shift register circuits are commonly classified according to their principles of operation, i.e., delay time or secondary storage.

Insofar as pure fluid shift registers of the delay time type are concerned, they may be characterised generally speaking as devices in which the delayed application of an input control signal is utilized for the purpose of causing the data being passed through the shift register to move to the next succeed-. ing portion or stage of the said shift register. The primary disadvantage of this type of shift register stems from the fact that the delay time of the input control signal must be greater than the clock pulse width. That is, the operation of this type of shift register requires that the clock pulse be terminated before the effect of the application of the aforesaid input control signal can be realized. Thus, obviously, pure fluid shift registers of the delay time type are limited in their application to only those uses wherein speed of operation is not essential, or more particularly to those uses wherein it is acceptable to have a speed of operation for the shifi register which is less than the period of elapsed time required for the delayed application of the input control signal.

For those applications wherein the required speed of operation precludes the employment of pure fluid shift registers of the delay time type, it has sometimes been found feasible to utilize shift registers which operate in accordance with the principle of secondary storage. Shift registers of the latter type as in the case of delay time shift registers also require the application of a series of input control signals to step data through the shift register. However, the application of the aforesaid input control signals in a secondary storage shift register is not restricted by any element of time delay. That is, there is no specific requirement insofar as secondary storage shift registers are concerned that the input control signals have a delay time greater than the clock pulse width.

Although secondary storage shift registers are free from the aforementioned disadvantage with respect to time which characterizes delay time shift registers, they nevertheless have in the past suffered from the disadvantage that they have been of relatively complicated construction. This is most evident when one considers the relatively large number of elements and/or components which must necessarily be included in merely one stage of prior art pure fluid shift registers of the secondary storage type. In addition, the nature of the operation of such prior art secondary storage shift registers has been such as to require that the individual elements thereof themselves for the most part be of differing construction than the other elements thereof.

OBJECTS OF THE INVENTION It is therefore an object of the present invention to provide a novel and improved pure fluid shift register wherein the application therein of input signals is not restricted by virtue of delay time considerations.

It is another object of the present invention to provide such a pure fluid shift register which is substantially less complicated in construction than prior art shift registers of similar type.

A still further object of the present invention is to provide such a pure fluid shift register which is characterized by its simplicity of operation.

Yet a further object of the present invention is to provide such a pure fluid shift register which is relatively easy to manufacture and assemble, but yet one which is reliable in use.

SUMMARY OF THE INVENTION In accordance with a preferred embodiment of the present invention there is provided a pure fluid shift register comprising a pair of circuit elements each of which in turn comprises a gate portion and a binary storage portion. Each gate portion has two opposed control inlets which act upon a clocked power stream inlet, and two outlets which are in communication with the control inlets of the corresponding storage portion of the respective elements. Each storage portion has a constant power supply stream and the usual attachment wall configuration with two outlets. The two outputs from the storage portion of the first element are fed to the gate portion inputs of the second element of the shift register. The second element is identical to the first except for the phase of the clock signal to the gate portion which is an inversion of the clock signal to the first gate portion.

The invention will be more fully understood from the following detailed description and its scope will be pointed out in the appended claims.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a diagrammatic view in top plan of a pure fluid shift register constructed in accordance with my invention;

FIG. 2 is a diagrammatic view in top plan of the gate portion of the first circuit element of the pure fluid shift register of FIG. 1;

FIG. 3 is a schematic representation of the gate portion of the first circuit element of the pure fluid shift register illustrated in FIG. 2;

FIG. 4 is a table which illustrates the logic developed within the gate portion of FIGS. 2 and 3 for a particular sequence of input signals applied thereto;

FIG. 5 is a schematic representation of the pure fluid shift register of FIG. 1 but with the output ports of the shift register illustrated as being parallel connected to corresponding input ports thereof to provide in accordance with one embodiment of the invention a shift register in which pulses are continuously recirculated therethrough; and

FIG. 6 is a schematic representation similar to FIG. 5 of the pure fluid shift register of FIG. I but with the output ports of the shift register illustrated as being cross-connected to corresponding input ports thereof in accordance with another embodiment of the invention.

DESCRIPTION OF A PREFERRED EMBODIMENT Referring now to FIG. 1 of the drawing there is illustrated therein a pure fluid shift register generally designated by reference numeral 10 comprising first and second circuit elements generally designated by reference numerals II and !2, respectively. Each of the circuit elements 1 I and 12 includes a

gate portion

13 and 14, respectively, and a

binary storage portion

15 and 16, respectively. The legends GATE and STORAGE and the dash lines associated therewith are employed in FIGS. 1, 5 and 6 of the drawing to indicate the approximate separation point between adjacent gate and storage portions of the circuit elements 11 and 12 of the shift register 10.

As best seen with reference to FIG. 1 of the drawing, the first and second circuit elements II and 12, respectively, are essentially identical in construction. In accordance however with the embodiment of the invention depicted therein, the respective corresponding ends of circuit elements II and I2 are positioned in relation relative to each other. Since circuit elements 11 and 12 are essentially identical in construction, for simplicity of description the same numerals will be employed hereinafter to designate corresponding parts of circuit elements 11 and 12 with the letters a and b being added to the aforesaid numerals to designate whether the described part is found in circuit element 11 or 12 of the shift register 10.

Now proceeding with a description of the construction of the shift register 10, circuit elements 11 and 12 as illustrated in FIG. 1 of the drawing each includes a flat plate 17a and 17b respectively, formed of any suitable nonporous, structurally rigid material, such as metal, glass, plastic, or the like, which is slotted in a specific configuration to provide passage for fluid. The various passages in plates 17a and 17b may be formed in any suitable manner and may extend entirely through the plates 17a and 17b or may be of lesser depth as desired. it is to be understood that the material from which the plates 17a and 17b are formed must be nonreactive with the fluid material flowing through the shift register 10. The fluid flow in plate 17:: of first circuit element 11 is confined within the passage therein by means of a cover plate (not shown) and plate 17b of second circuit element 12 which are positioned on opposite sides of plate 17a. In accordance with the embodiment of the invention illustrated in FIG. 1 of the drawing. plate. 17b is preferably positioned in juxtaposedrelation to plate 17a but with the formers ends, i.e., those of plate 17b being reversed end-for-end with respect to the corresponding ends of plate 17 a as previously mentioned hereinabove. Similarly, the fluid flow in plate 17b is confined within the passages therein by means of a suitable cover plate (not shown) and plate 17a which are positioned on opposite sides of plate 17b. The slots which define the fluid passages are preferably rectangular in cross section, although other cross sections, such as circular, may be employed.

Gate portions

13 and 14 each includes a clock power stream inlet means which provides circuit elements 11 and 12 with clocked fluid pulses in a manner to be more fully described hereinafter. The respective clocked power stream inlet means, as illustrated in FIG. 1 of the drawing, in turn each includes a passage or

conduit

18a and 18b, respectively, having a first end connected to suitable means (not shown) capable of producing the aforesaid clocked fluid pulses.

Conduits

18a and 18b extend in a direction preferably perpendicular to the plane containing the fluid flow configuration of circuit elements 1! and 12 for ease in arranging the aforesaid circuit elements in a stacked fashion as previously described whereby to provide a compact device. Alternatively, conduits 18a and 1812 may comprise a slot within plates 17a and 17b, respectively, extending outwardly to an edge of the corresponding plate 17a or 17b.

The second end of each of

conduits

18a and 18b is in fluid communication with a fluid passage 19a and 19b, respectively, terminating in a restricted zone forming a nozzle 20a and 20b, respectively, adapted to generate a clocked power fluid flow in the form of a clocked power jet of fluid issuing therefrom. The clocked power fluid jet issuing from each of nozzles 20a .and b. respectively, passes into an interaction chamber 21a and 21b, respectively, which is defined by a pair of diverging

sidewalls

22a, 23a, and 22b, 23b, respectively. The clocked power jet issuing from nozzles a and 20b, respectively, normally attached to one or the other of its corresponding sidewalls and remains in such state of attachment as long as a signal remains present.

A pair of fluid flow outlet means or receivers are disposed downstream from each of the clocked power stream inlet means andare adapted to selectively receive the fluid of the corresponding clocked power jet, the particular receiver obtaining the fluid being determined by the attached position of the corresponding clocked power jet. The fluid outlet means of

gate portions

13 and 14 each comprises two elongated diverging fluid receiving passages 24a, Mb, and 25a, 25b which are separated by a barrier 26a, 26b having an indentation 27a, 27b positioned symmetrically with respect to the central axis of nozzle 20a, 20b. As explained in U.S. Pat. No.

3,181,546, assigned to the assignee of the present invention,

the indentation 27a, 27b establishes a vortex flow which operates to compress the corresponding clocked power jct against the sidewall to which it is attached resulting in both improved jet stability and an appreciable increase in the fluid pressure recovered at

receivers

24a, 24b, and 25a, 25b over the obtainable without the indentation. lndentations having configurations other than the rectangular one illustrated may similarly be employed. The

fluid receiving passages

24a, 24b, and 25a, 25b convey the respective outputfluid flow of

gate portions

13 and 14 to the

control fluid passages

28a, 28b, and 29a, 29b of the corresponding

storage portion

15 and 16 of circuit elements 11 and 12, respectively, in a manner to be fully described hereinbelow.

Vent passages

30a, 30b, and 31a, 31b are symmetrically positioned adjacent the entrance to fluid receivers 24a, 24b. and 25a, 25b, respectively, and extend outwardly to the edge of corresponding plate 17a and 17b to provide communication either to the atmosphere or a return path to a suitable pressurized fluid supply as desired.

Vents

30a, 30b, and 31a, 31b act to relieve the fluid pressure in the receivers which results from unusual loading conditions. The vents also operate to stabilize the corresponding clocked power jet against a sidewall and provide an increase in pressure recovery.

A pair of control fluid flow input means are provided for the purpose of switching or flipping the corresponding clocked power jet from one sidewall to the opposite wall and thus from one to the other of the aforementioned fluid receivers 24 0, 24b, and 25a, 25b. The control fluid flow input means comprise a pair of control

fluid passages

32a, 32b, and 33a, 33b, each terminating in a restricted

slot forming nozzles

34a, 34b, and 35a, 35b, respectively, each of which is adapted to generate a control fluid flow in the form of a control jet of fluid emitted therefrom. Control

fluid passages

32a and 33a of gate portion 13 are in communication with a source or sources of pressurized fluid such that successive fluid pulses are applied alternately thereto. The fluid pulses are conveyed from the supply means (not shown) to passages 32a and 330 by suitable means (not shown). Control fluid passages 32b and 33b of gate portion 14 receive their fluid input from corresponding fluid output receivers of storage portion 15 of circuit element 1 l in a manner more fully described hereinafter.

Proceeding now to a description of the

storage portions

15 and 16 of circuit elements 11 and 12, respectively, it is seen with reference to FIG. 1 of the drawing that insofar as structure is concerned the

storage portions

15 and 16 are constructed substantially the same as their associated

gate portions

13 and 14, respectively. The major difference between

gate portions

13 and 14 and

storage portions

15 and 16 resides in the nature of the fluid flow therein rather than in the specific construction thereof. Thus, as has been described hereinabove the power jet flowing in gate portions 13 and 14 i is in the form of clocked fluid pulses whereas the

storage portions

15 and 16 have a constant power supply stream. The latter issues from conduit 36a, 36b which has a first end connected to a source (not shown) of pressurized primary or power fluid, and a second end which is in fluid communication with a fluid passage 37a 37b terminating in a restricted zone forming a nozzle 38a, 38b. The nozzle 38a, 38!) which is adapted to generate a power fluid flow in the form of a power jet of fluid issuing therefrom passes into

interaction chamber

39a, 39b, which is defined by a pair of diverging sidewalls 40a, 40b, and 41a, 41b. The fluid jet issuing from nozzle 38a, 38b normally attaches to one or the other of the sidewalls and remains in such state of attachment if left undisturbed.

Previously described control

fluid passages

28a, 28b, and 29a, 29b which are in fluid communication with the

corresponding receivers

24a, 24b, and 25a, 25b of

gate portions

13 and 14 of circuit elements 11 and 12, respectively, constitute the conveying means for the control fluid flow which,

functions to detach the associated power jet from one sidewall and switch or flip it to the opposite wall. Each of the control fluid flow in the form of a control jet of fluid emitted therefrom. The aforesaid nozzles are positioned within the sidewalls of interaction chamber 39a, 3%, adjacent power nozzles 36a, 36b, and on opposite sides of the center line thereof. By virtue of the action of the control jet issuing from the nozzles associated with control

fluid passages

28a, 28b, and 29a, 29b power jet 36a, 36b is diverted to

receivers

43a, 43b, and 42a, 42b, respectively, which are disposed downstream from the corresponding power jet inlet means. Each of the

receivers

42a, 42b, and 43a, 43b is adapted to selectively receive the fluid of the corresponding power jet 36a, 36b, the particular receiver obtaining the fluid being determined by the attached position of the power jet, the latter position in turn being dependent upon whether a control fluid flow is present in

control fluid passage

29a, 2% or control

fluid passage

28a, 28b.

Preferably the pairs of

receivers

42a, 42b, and 43a, 43b are separated by a barrier 44a, 44b having an indentation 45a, 45b positioned symmetrically withrespect to the central axis of the corresponding power nozzle 36a, 36b the function of the latter indentation being the same as that previously mentioned in connection with the description of indentations 27a, 27b of

gate portions

13 and 14, respectively. In addition,

vent passages

46a, 46b and 47a, 47b are normally provided symmetrically positioned adjacent the entrance to the respective

fluid receivers

42a, 42b, and 43a, 43b, and extend outwardly to the edge of the corresponding plate 17a, 17b to provide communication either to the atmosphere or a return path to the pressurized fluid supply as desired. The aforesaid vents act to relieve the fluid pressure in the receivers which results from unusual loading conditions, and also operate to stabilize the jet against a sidewall and provide an increase in pressure recovery.

Receivers

42a, and 43a of storage portion of circuit element 11 as illustrated in FIG. I of the drawing are interconnected by means of

conduits

46 and 47 to the control fluid input passages 32b and 33b, respectively, of gate portion 14 of circuit element 12 whereby the fluid output of circuit element 11 and more particularly storage portion 15 thereof is passed on to the next succeeding gate portion, i.e., gate portion 14 of shift register 10. On the other hand,

receivers

42b and 43b of storage portion 16 of circuit element 12 convey the output of shift register 10 externally thereof which output may be utilized in a variety of different manners later to be described.

The manner of operation of the shift register 10 is believed to be best understandable by considering the functioning of the gate portions 13 and I4. Inasmuch as the latter are identical in construction and function, the aforesaid description thereof will be limited to a description of gate portion 13 as illustrated in FIGS. 2 and 4 of the drawing, and reference to the table of logic therefor as tabulated in FIG. 4 of the drawing. For purposes of this description, control

fluid input passages

32a and 33a of gate portion 13 have been designated 0, and c, in accordance with the nomenclature conventionally employed by those skilled in the art. Similarly, the fluid output from

receivers

24a and 25a of gate portion 13 are designated 0 and 0,, respectively, while the clocked power jet which issues from power input means 18a is designated by the letter T.

Asume therefore the condition wherein fluid flow is present in 0 but no clocked fluid power flow T is being applied. As depicted in the first line of the logic table of FIG. 4 wherein the symbol x represents the presence and the symbol 0 the absence of fluid flow, under the aforesaid condition neither o nor a, will receive a fluid flow. However, under the same condition, i.e., flow in 0," but with a clocked pulse T applied to

gate portion

13, 0,, Le, receiver 25a will receive fluid flow as long as clocked pulse T and fluid flow in C continue to occur. Receiver 25a, which as illustrated in FIG. 1 of the drawing is in communication with control input nozzle 29a of storage portion 15, will convey the aforesaid fluid flow received by it to nozzle 29a wherein it is utilized to divert to or maintain the power flow issuing from power inlet means 36a in receiver 42a and by means of conduit 46 the latter flow is conveyed to control fluid input passage 32b of gate portion 14 of second circuit element 12. Similarly, when fluid flow is present in c and no clocked power pulse T is applied, i.e., the condition depicted in line 3 of the logic table of FIG. 4, neither 0 nor 0 receives fluid flow. When clocked power pulse T is next applied thOLigh, the control fluid input flow c will divert the aforesaid clocked power pulse T to o wherein by means of receiver 24a and nozzle 28a the fluid flow received thereby is employed to divert the power jet of storage portion 15 to receiver 43a, and through conduit 47 thereby applies a fluid pulse to control fluid input passage 33b of gate portion 14.

Although not illustrated in the interest of simplicity of description, it is to be understood that gate portion 14 of circuit element 12, which is a mirror image of gate portion 13 as depicted in FIG. 1 of the drawing, functions in the same manner as the latter, the function of the latter having been previously described hereinabove. The only major differences therebetween insofar as function is concemed are that the control fluid inputs to gate portion 14 are received from the receivers of storage portion I5 of circuit element 11 rather than from a source external of shift register 10, and the fact that the phase of the clocked power fluid flow to gate portion 14 is an inversion of the clock signal to gate portion I3. That is, in the intervals when a clock power flow T is being applied to gate portion 13 no clocked power flow is being applied to gate portion 14 and vice versa.

Thus, it is seen that information which is applied to gate portion 13 of first circuit element 11 is passed therefrom to storage portion 15 when the clocked power flow T is present concurrently with a fluid flow in either c, or 0 From the storage portion is the information received thereby is passed to the gate portion 14 of second circuit element l2 and by virtue of the application of a clocked power flow to gate portion 14 is stepped along to storage portion 16 of second circuit element 12 from whence it issues from either output receiver 42b or receiver 43b and thereby from shift register 10.

As mentioned earlier hereinabove, the output of the single stage shift register 10 illustrated in FIG. I of the drawing may be employed in a variety of different ways. Thus, for example, a multitude of pure fluid shift register stages each identical to that illustrated in the aforesaid FIG. I may be cascaded by applying the output from a given stage to the inputs of a succeeding stage. On the other hand, as illustrated in FIGS. 5 and 6 of the drawing, the output of the shift register may be used to drive the input.

More particularly, referring to FIG. 5 of the drawing, a parallel connection may be made between the output port designated B of storage portion 16 and the input port designated A of gate portion 13 and between the other output port of storage portion 16 designated as D and the input port designated C of gate portion 13 by suitable means such as by

conduits

48 and 49. In this manner, continuously circulating signals of a prescribed pattern may be achieved.

Similarly, with respect to the embodiment of the invention illustrated in FIG. 6 of the drawing, a cross connection may be made by means of

conduits

50 and 51 between the output ports of storage portion 16 of second circuit element 12 and the input ports of gate portion 13 of first circuit element 11 whereby output ports C and D of storage portion 16 are connected to input ports B and A, respectively, of gate portion 13. By cross connecting the outputs to theinputs, different combinations of pulses can be circulated from those which can be circulated when the aforesaid outputs and inputs are parallel connected.

There has thus been provided a pure fluid shift register which in not being dependent upon any delay time considerations for its operation is capable of use in a variety of different applications wherein speed of operation may or may not be important. Further there has been provided a pure fluid shift register which is substantially less complicated in construction than prior art shift registers of similar type, and one which is capable of being constructed by utilizing only two dissimilar fluidic elements thereby reducing considerably the manufacturing and parts storage costs involved in the production thereof. Finally, pure fluid shift registers constructed in accordance with the teachings of the instant invention are characterized by their simplicity of operation which has bee achieved while at the same time maintaining in the design the desirability of having a very compact arrangement of parts.

While essentially only one embodiment of my invention has been illustrated, it will be appreciated that many modifications thereof may readily be made by those skilled in the art. I therefore intend by the appended claims to cover any such modifications which fall within the true spirit and scope of my invention.

l claim:

1. A pure fluid shift register for shifting and storing informa tion in fluid form comprising:

a. a first fluidic circuit element having first and second longitudinally extending outer surfaces, and including a first fluidic gate means and a first fluidic storage means;

b. a second fluidic circuit element having first and second longitudinally extending outer surfaces, and including a second fluidic gate means and a second fluidic storage means;

c. said first and second fluidic circuit elements being positioned in side-by-side relation with said second longitudinally extending outer surfaces of said first fluidic circuit element positioned in juxtaposed reversed end-toend relation with said first longitudinally extending outer surfaceof said second fluidic circuit element to provide a compact arrangement of parts;

d. said first fluidic gate means comprising a single gate portion having means for converting successive clocked fluid power pulses into fluid flow which represent information introduced thereto;

e. first fluid transmission means for transmitting said information in fluid form at periodic intervals from said first fluidic gate means to said first fluidic storage means;

f. said first fluidic storage means including means for temporarily storing therein said information received from said first fluidic gate means;

g. fluidic conveying means interconnecting said first fluidic storage means and said second fluidic gate means for conveying said information from said first fluidic storage means to said second fluidic gate means;

h. said second fluidic gate means comprising a single gate portion including means for receiving successive clocked fluid power pulses having a different phase relationship relative to said successive clocked fluid power pulses applied to said first fluidic gate means;

i. second fluid transmission means for transmitting to said second fluidic storage means said information received by said second fluidic gate means upon each application of said successive clocked fluid power pulses to said second fluidic gate means; and

j. said second fluidic storage means including means for conveying therefrom said information received thereby.

2. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 1 wherein:

a. said single gate portion of said first fluidic means comprises a first clocked fluid power flow inlet means for providing a first clocked fluid power'pulse, a first pair of fluid flow outlet means located downstream from said first clocked fluid power inlet means, and a first pair of opposed fluid control means positioned intermediate said first clocked fluid power flow inlet means and said first pair of fluid flow outlet means for selectively diverting said first clocked fluid power pulse to said first pair of fluid flow outlet means;

b. said first fluidic storage means comprises first power fluid flow inlet means for providing a first continuous power fluid flow, a second pair of fluid flow outlet means located downstream from said first power fluid flow inlet means, and a second pair of opposed fluid control means positioned intermediate said first power fluid flow inlet means and said second pair of fluid flow outlet means for selectively diverting said first continuous power fluid flow to said second pair of fluid flow outlet means; and

c. said first fluid transmission means transmits said information from said first pair of fluid flow outlet means to said second pair of opposed fluid control means.

3. A pure fluid shift register for shifting and storing informain fluid form as set forth in claim 2 wherein:

a. said single gate portion of said second fluidic gate means comprises a second clocked fluid power inlet means for providing a second clocked fluid power pulse, a third pair of fluid flow outlet means located downstream from said second clocked fluid power inlet means, and a third pair of opposed fluid control means positioned intermediate said second clocked fluid power inlet means and said third pair of fluid flow outlet means for selectively diverting said second clocked fluid power pulse to said third pair of fluid flow outlet means;

b. said fluidic conveying means interconnects said second pair of fluid flow outlet means with said third pair of opposed fluid control means;

0. said second fluidic storage means comprises second power fluid flow inlet means for providing a second continuous power fluid flow, said means for conveying said information from 'said second fluidic storage means constitutes a fourth pair of fluid flow outlet means located downstream from said second power fluid flow inlet means, and a fourth pair of opposed fluid control means positioned intermediate said second power fluid flow inlet means and said fourth pair of fluid flow outlet means for selectively diverting said second continuous power fluid flow to said fourth pair of fluid flow outlet means; and

d. said second fluid transmitting means transmits said information from said third pair of fluid flow outlet means to said fourth pair of opposed fluid control means. i y

4. A pure fluid shift register for. shifting and storing information in fluid form as set forth in claim 3 further comprising third fluid transmission means parallel connecting said fourth pair of fluid flow outlet means to said first pair of opposed fluid control means for continually recirculating fluid pulses in a prescribed pattern through said first and second fluidic circuit elements.

5. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 3 further comprising third fluid transmission means cross connecting said fourth pair of fluid flow outlet means to said first pair of opposed fluid control means for continually recirculating fluid pulses in a prescribed pattern through said first and second fluidic circuit elements.

6. A pure fluid shift register for shifting and storing information in fluid form comprising:

a. a first fluidic circuit means including a first fluidic gate means and a first fluidic storage means;

b. a second fluidic circuit means including a second fluidic gate means and a second fluidic storage means;

c. said first fluidic gate means comprising a single gate portion having means for converting successive clocked fluid power pulses into fluid flows which represent information introduced thereto, said single gate portion including a first clocked fluid power inlet means for providing a first clocked fluid power pulse, a first pair of fluid flow outlet means located downstream from said first clocked fluid power inlet means, and a first pair of opposed fluid control means positioned intermediate said first clocked fluid power flowinlet means and said first pair of fluid flow outlet means for selectively diverting said first clocked fluid power pulse to said first pair of fluid flow outlet means;

d. said first fluidic storage means comprising first power fluid flow inlet means for providing a first continuous power fluid flow, a second pair of fluid flow outlet means located downstream from said first power fluid flow inlet means, and a second pair of opposed fluid control means positioned intermediate said first power fluid flow inlet means and said second pair of fluid flow outlet means for selectively diverting said first continuous power fluid flow to said second pair of fluid flow outlet means; said first pair of fluid flow outlet means of said first fluidic gate means being fluidically interconnected to said second pair of opposed fluid control means of said first fluidic storage means to permit said information to be transmitted at periodic intervals from said first fluidic gate means to said first fluidic storage means; f. said second fluidic gate means-comprising a single gate portion for receiving said information from said first fluidic storage means, said single gate portion including a second clocked fluid power inlet means for providing a second clocked fluid power pulse, a third pair of fluid flow outlet means located downstream from said second clocked fluid power inlet means and a third pair of opposed fluid control means positioned intermediate said second clocked fluid power flow inlet means and said third pair of fluid flow outlet means for selectively diverting said second clocked fluid power pulse to said third pair of fluid flow outlet means;

g. said second pair of fluid flow outlet means of said first fluidic storage means being fluidically interconnected to said third pair of opposed fluid control means of said second fluidic gate means for conveying said information from said first fluidic storage means to said second fluidic gate means; 7

h. said second fluidic storage means comprising second power fluid flow inlet means for providing a second continuous power fluid flow, a fourth pair of fluid flow outlet means located downstream from said second power fluid flow inlet means, and a fourth pair of opposed fluid control means positioned intermediate said second power fluid flow inlet means and said fourth pair of fluid flow outlet means for selectively diverting said second continuous power fluid flow to said'fourth pair of fluid outlet means; and

i. said third pair of fluid flow outlet means of said second fluidic gate means being fluidically interconnected to said fourth pair of opposed fluid control means of said second fluidic storage means to permit said information to be transmitted at periodic intervals from said second fluidic gate means to said second fluidic storage means.

7. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 6 wherein:

a. said second clocked fluid power pulse has an inverse phase relationship relative to said first clocked fluid power pulse; and

b. said information is received by said second fluidic storage means upon-the application of said second clocked fluid power pulse to said second fluidic gate means.

8. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 6 further comprising fluid transmission means parallel connecting said fourth pair of fluid flow outlet means to said first pair of opposed fluid control means for continually recirculating fluid pulses in a prescribed pattern through said first and second fluidic circuit elements.

9. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 6 further comprising fluid transmission means cross connecting said fourth pair of fluid outlet means to said first pair of opposed fluid control means for continually recirculating fluid pulses in a prescribed pattern through said first and second fluidic circuit elements.

Claims

1. A pure fluid shift register for shifting and storing information in fluid form comprising: a. a first fluidic circuit element having first and second longitudinally extending outer surfaces, and including a first fluidic gate means and a first fluidic storage means; b. a second fluidic circuit element having first and second longitudinally extending outer surfaces, and including a second fluidic gate means and a second fluidic storage means; c. said first and second fluidic circuit elements being positioned in side-by-side relation with said second longitudinally extending outer surfaces of said first fluidic circuit element positioned in juxtaposed reversed end-to-end relation with said first longitudinally extending outer surface of said second fluidic circuit element to provide a compact arrangement of parts; d. said first fluidic gate means comprising a single gate portion having means for converting successive clocked fluid power pulses into fluid flow which represent information introduced thereto; e. first fluid transmission means for transmitting said information in fluid form at periodic intervals from said first fluidic gate means to said first fluidic storage means; f. said first fluidic storage means including means for temporarily storing therein said information received from said first fluidic gate means; g. fluidic conveying means interconnecting said first fluidic storage means and said second fluidic gate means for conveying said information from said first fluidic storage means to said second fluidic gate means; h. said second fluidic gate means comprising a single gate portion including means for receiving successive clocked fluid power pulses having a different phase relationship relative to said successive clocked fluid power pulses applied to said first fluidic gate means; i. second fluid transmission means for transmitting to said second fluidic storage means said information received by said second fluidic gate means upon each application of said successive clocked fluid power pulses to said second fluidic gate means; and j. said second fluidic storage means including means for conveying therefrom said information received thereby.

2. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 1 wherein: a. said single gate portion of said first fluidic means comprises a first clocked fluid power flow inlet means for providing a first clocked fluid power pulse, a first pair of fluid flow outlet means located downstream from said first clocked fluid power inlet means, and a first pair of opposed fluid control means positioned intermediate said first clocked fluid power flow inlet means and said first pair of fluid flow outlet means for selectively diverting said first clocked fluid power pulse to said first pair of fluid flow outlet means; b. said first fluidic storage means comprises first power fluid flow inlet means for providing a first continuous power fluid flow, a second pair of fluid flow outlet means located downstream from said first power fluid flow inlet means, and a second pair of opposed fluid control means positioned intermediate said first power fluid flow inlet means and said second pair of fluid flow outlet means for selectively diverting said first continuous power fluid flow to said second pair of fluid flow Outlet means; and c. said first fluid transmission means transmits said information from said first pair of fluid flow outlet means to said second pair of opposed fluid control means.

3. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 2 wherein: a. said single gate portion of said second fluidic gate means comprises a second clocked fluid power inlet means for providing a second clocked fluid power pulse, a third pair of fluid flow outlet means located downstream from said second clocked fluid power inlet means, and a third pair of opposed fluid control means positioned intermediate said second clocked fluid power inlet means and said third pair of fluid flow outlet means for selectively diverting said second clocked fluid power pulse to said third pair of fluid flow outlet means; b. said fluidic conveying means interconnects said second pair of fluid flow outlet means with said third pair of opposed fluid control means; c. said second fluidic storage means comprises second power fluid flow inlet means for providing a second continuous power fluid flow, said means for conveying said information from said second fluidic storage means constitutes a fourth pair of fluid flow outlet means located downstream from said second power fluid flow inlet means, and a fourth pair of opposed fluid control means positioned intermediate said second power fluid flow inlet means and said fourth pair of fluid flow outlet means for selectively diverting said second continuous power fluid flow to said fourth pair of fluid flow outlet means; and d. said second fluid transmitting means transmits said information from said third pair of fluid flow outlet means to said fourth pair of opposed fluid control means.

4. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 3 further comprising third fluid transmission means parallel connecting said fourth pair of fluid flow outlet means to said first pair of opposed fluid control means for continually recirculating fluid pulses in a prescribed pattern through said first and second fluidic circuit elements.

6. A pure fluid shift register for shifting and storing information in fluid form comprising: a. a first fluidic circuit means including a first fluidic gate means and a first fluidic storage means; b. a second fluidic circuit means including a second fluidic gate means and a second fluidic storage means; c. said first fluidic gate means comprising a single gate portion having means for converting successive clocked fluid power pulses into fluid flows which represent information introduced thereto, said single gate portion including a first clocked fluid power inlet means for providing a first clocked fluid power pulse, a first pair of fluid flow outlet means located downstream from said first clocked fluid power inlet means, and a first pair of opposed fluid control means positioned intermediate said first clocked fluid power flow inlet means and said first pair of fluid flow outlet means for selectively diverting said first clocked fluid power pulse to said first pair of fluid flow outlet means; d. said first fluidic storage means comprising first power fluid flow inlet means for providing a first continuous power fluid flow, a second pair of fluid flow outlet means located downstream from said first power fluid flow inlet means, and a second pair of opposed fluid control means positioned intermediate said first power fluid flow inlet means and said second pair of fluid flow outlet means for selectively diverting said fiRst continuous power fluid flow to said second pair of fluid flow outlet means; e. said first pair of fluid flow outlet means of said first fluidic gate means being fluidically interconnected to said second pair of opposed fluid control means of said first fluidic storage means to permit said information to be transmitted at periodic intervals from said first fluidic gate means to said first fluidic storage means; f. said second fluidic gate means comprising a single gate portion for receiving said information from said first fluidic storage means, said single gate portion including a second clocked fluid power inlet means for providing a second clocked fluid power pulse, a third pair of fluid flow outlet means located downstream from said second clocked fluid power inlet means, and a third pair of opposed fluid control means positioned intermediate said second clocked fluid power flow inlet means and said third pair of fluid flow outlet means for selectively diverting said second clocked fluid power pulse to said third pair of fluid flow outlet means; g. said second pair of fluid flow outlet means of said first fluidic storage means being fluidically interconnected to said third pair of opposed fluid control means of said second fluidic gate means for conveying said information from said first fluidic storage means to said second fluidic gate means; h. said second fluidic storage means comprising second power fluid flow inlet means for providing a second continuous power fluid flow, a fourth pair of fluid flow outlet means located downstream from said second power fluid flow inlet means, and a fourth pair of opposed fluid control means positioned intermediate said second power fluid flow inlet means and said fourth pair of fluid flow outlet means for selectively diverting said second continuous power fluid flow to said fourth pair of fluid outlet means; and i. said third pair of fluid flow outlet means of said second fluidic gate means being fluidically interconnected to said fourth pair of opposed fluid control means of said second fluidic storage means to permit said information to be transmitted at periodic intervals from said second fluidic gate means to said second fluidic storage means.

7. A pure fluid shift register for shifting and storing information in fluid form as set forth in claim 6 wherein: a. said second clocked fluid power pulse has an inverse phase relationship relative to said first clocked fluid power pulse; and b. said information is received by said second fluidic storage means upon the application of said second clocked fluid power pulse to said second fluidic gate means.