US3487364A - Digital comparator utilizing magnetic logic - Google Patents

Digital comparator utilizing magnetic logic Download PDF

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Publication number
US3487364A
US3487364A US523983A US3487364DA US3487364A US 3487364 A US3487364 A US 3487364A US 523983 A US523983 A US 523983A US 3487364D A US3487364D A US 3487364DA US 3487364 A US3487364 A US 3487364A
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contacts
module
value
unknown
winding
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English (en)
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Wyman L Deeg
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IXYS Integrated Circuits Division Inc
Arris Technology Inc
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IXYS Integrated Circuits Division Inc
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • G06F7/026—Magnitude comparison, i.e. determining the relative order of operands based on their numerical value, e.g. window comparator

Definitions

  • the application discloses a digital comparator module and circuit.
  • the module includes a pair of magnetic reed switches operated by a pair of differential windings producing oppositely poled and equal fields. One reed switch is biased closed by a permanent magnet of the same polarity as the field produced by one of the windings.
  • the normally closed contacts of the modules are connected in series to an indicator, and the normally open contacts in each module are connected between the closed contacts and the input terminal to one of the windings in the module.
  • Input signals representing equivalent bits of two digits or numbers to be compared are applied to the two winding input terminals.
  • This invention relates to a digital comparator using a binary half subtractor module and, more particularly, to a digital comparator system and half subtractor module using magnetic flux logic.
  • one object of the present invention is to provide a new and improved digital comparator.
  • a further object is to provide a digital comparator using magnetic logic.
  • a further object is to provide a digital comparator using a binary half subtractor formed by a bilar winding and a pair of sealed magnetic switches.
  • a further object is to provide a binary half subtractor using a pair of sealed magnetic switches, one of which is polarity responsive, and a pair of windings providing oppositely poled magnetic fields of comparable value.
  • an embodiment of the invention comprises a digital comparator using as a modular element a binary half subtractor module formed of a pair of sealed magnetic switches, a diode, a bililar winding, and a bias magnet for normally holding one of the magnetic switches in a closed condition and for rendering this closed switch polarity responsive.
  • the two windings provide oppositely poled magnetic fields of comparable strength, and an in- 3,487,364 Patented Dec. 30, 1969 ice put terminal to one of the windings is connected to a common output terminal through the diode and the normally open switch.
  • the normally closed switch provides means for coupling the output of the module to the output of another module.
  • the binary module is to be used to determine whether a value is greater than a known value
  • the signal representing the unknown value is connected to the input terminal of the coil providing a field of the same polarity as the bias magnet, and the known value is connected to the terminal of the other coil. If the known and unknown value are the same, i.e., both a 1 or 0, the status of the sealed switches is not altered, a borrow output is not provided from the module, and the module remains in a condition to transmit a borrow from a less significant digit through the normally closed switch in the module.
  • the normally closed switch is opened, and the normally open switch is closed to couple the output terminal to the unknown input terminal through the diode.
  • the unknown value 0 is represented by an absence of signals, and the module does not provide a borrow output.
  • the normally open switch is again closed to couple the unknown input terminal to the output terminal through the diode. Since the binary l at the unknown input terminal is represented by the presence of a signal, this signal is now transferred to the output to provide a borrow output and an indication that the value of the unknown exceeded the known value.
  • the binary half subtractor module can be used to detect the fact that the unknown has a value less than a known value by reversing the connections of the signals representing the known and unknown values to the input terminals of the bilar coil.
  • FIG. l is a schematic diagram of a binary half subtractor module useful in a digital comparator.
  • FIG. 2 is a schematic circuit diagram of a digital comparator using the half subtractor module shown in FIG. l.
  • FIG. 1 of the drawings therein is illustrated a binary half subtractor module 10 including a bilar coil including a pair of windings 12 and 14 providing oppositely poled fields of substantially the same value.
  • a pair of sealed magnetic reed switches of known construction are subjected to the inuence of the fields produced by the coils 12 and 14 and are represented in FIG. l of the drawings as two pairs of contacts 16 and 18.
  • the contacts or switch 16 is normally open, and the contacts or switch 18 is normally biased to a closed condition by a biasing magnet providing a lield of the same polarity as the winding 14.
  • the normally closed contacts 18 are connected in series between a borrow input terminal 20 and a borrow output terminal 22 while the contacts 16 are connected in series between an input terminal 24 for the winding 14 and the borrow output terminal 22 through a diode 26 which is of the polarity shown when a positive potential is used to represent the presence of a binary bit or l and an open circuit or ground is used to represent the absence of a binary bit or 0.
  • the other winding 12 in the bililar coil is provided with an input terminal 28.
  • a single module 10 is provided for comparing each binary weight in a binary or binary coded decimal value.
  • the terminal 28 is connected to the source of signals representing the known value, and the terminal 24 is connected to a source of signals representing the unknown value.
  • the terminal 20 is connected to the output terminal of a module 10 representing the less signicant digit, and the output terminal 22 is connected to either an output terminal or the input terminal of a module 10 for comparing a more significant digit.
  • polarity of the diode 26 a binary l is represented by a more positive potential, and a binary is represented by an open circuit condition or a near ground potential.
  • the windings 12 and 14 produce a zero resultant iield due to the failure to energize either of the windings 12 or 14 or the energization of both of the windings 12 and 14.
  • the normally open contacts 16 remain in an open condition, and any input signal supplied to the unknown input terminal 24 cannot be supplied through the diode 26 to the output terminal 22. Since the contacts 18 remain closed because the net field resulting from the signals applied to the input terminals 24 and 28 is negligible, a borrow signal from the less significant module coupled to the terminal 20 is passed through the closed contacts 18 to the output terminal 22.
  • the unknown value is less than the known value, i.e., an open circuit supplied to the terminal 24 and a positive signal supplied to the terminal 28, only the winding 12 is energized.
  • the iield produced by the energization of the winding 12 closes the contacts 16 and opens the contacts 18 by nullifying the biasing iield applied to the contacts 18 by the biasing magnet. This disconnects the input terminal 20 from the output terminal 22 and prevents a carry from a less significant digit through the module 10.
  • the contacts 16 are closed, but since a binary 0 is applied to the input terminal 24, the output terminal 22 does not receive an output signal.
  • an open circuit is connected to the terminal 28, and a more positive signal is connected to the terminal 24.
  • This energizes the winding 14 to produce a field for closing the normally open contacts 16. Since the iield produced by the winding 14 aids the field of the bias magnet, the contacts 18 remain closed. Since the contacts 16 are now closed, the positive signal supplied to the input terminal 24 is coupled through the diode 26 to the output terminal 22 to provide a borrow output indicating that the unknown value is greater than the known value. Since the module 10 provides a signal at the output terminal 22, the fact that the contacts 18 remain closed to couple this module to a module for comparing a less signiiicant digit is of no consequence.
  • the signals representing the unknown value are coupled to the terminal 28, and the signals representing the known value are coupled to the terminal 24.
  • the known and unknown values are the same, i.e., both are either Os or 1s
  • the net etective eld produced by energizing the windings 12 and 14 is negligible, and the contacts 16 and 18 remain in their normal states so that a borrow signal is not produced by the module 10, but the module remains in a condition to transmit a borrow signal from the comparison of a less signiiicant digit.
  • the terminal 24 is connected to an open circuit, and a more positive signal is applied to the terminal 28.
  • This signal energizes the winding 12 to close the contacts 16 and to open the contacts 18 by producing a iield in opposition to the iield normally holding the contacts 18 in a closed condition.
  • the closure of the contacts 16 does not result in the application of a borrow output signal to the output terminal 22.
  • the more positive signal supplied to the terminal 24 is now transmitted through the closed contacts 16 and the diode 26 to the output terminal 22. This provides a lborrow output representing the fact that the unknown value is less than the known value.
  • FIG. 2 of the drawings illustrates ra digital comparator 30 lfor determining whether la three digit decimal value falls within a range between a high limit value and a low limit value, exceeds the high limit value, or lis less than the low limit value.
  • the three digit decimal limit of known values and the unknown values are expressed in binary coded form using binary weights 1, 2, 4, and 8.
  • twelve modules -10 are used for the high limit evaluation, and twelve modules 10 are used yfor the low limit evaluation for a total of only twenty-tour billar windings and forty-eight sealed magnetic switches to provide a high and low limit evaluation of a three digit decimal number.
  • the system also requires only a single low -Voltage potential source with ya nominal low voltage source 0f, for instance, twentyfour ⁇ volts with a tive percent regulanon.
  • modules 41, 42, 44, and 48 each .identical to the module 10, are provided for comparing the 1, 2, 4, and "8 bits of the hundreds digit of the unknown value against the high limit value
  • four modules 71, 72, 74, and 78, each identical to the module 10 are provided for comparing the 1, 2, 4, and 8 bits of the hundreds digit of the unknown -value with the low limit value.
  • each of two comparator circuits and 90 in which yare compared, respectively, the bits of the tens and 4units digits of the unknown yand low limit Ivalues.
  • the output terminal 22 of the "8 bit module 10 in the tens digit comparison circuit 50 is connected to the input terminal 20 of the module 41 for comparing the l bit of the hundreds digit.
  • the output terminal 22 of the most significant bit 8 in the module 48 for the most significant hundreds digit is connected directly to a winding 92 of a relay for indicating a high limit violation, and through a decoupling diode 94 to the winding of an :alarm relay 96 which provides an indication of either 1a high or low limit violation.
  • the output terminal 22 of a modulue 10 for comparing a less signiiicant bit is connected to the input terminal 20 of the module 10 for comparing the next most significant bit, proceeding in an ascending digital order.
  • the output terminal 22 from the modulue 10 for evaulating the "8 bit of the tens digit in the circuit 80 is connected to the input terminal 20 for the module 71 in which the comparison of the l bit of the hundreds digit is made.
  • the output terminal 22 from the highest digit, highest bit comparator 78 is directly connected to the winding of a relay 98 for providing an indication of ia low limit violation and through a diode 100 to the winding of the lalarm relay 96.
  • the signals providing the high limit values and the low limit values can be provided by any suitable means such as switches, pin connectors, patch panels, or controlled conduction devices.
  • a high limit signal source 102 fand a low limit signal source 104 are shown in simplified form Vas comprising groups of switches for connecting the related terminals of the modules to a source of positive potential.
  • the high limit signal source i102 is shown :as including four switches 106, 108, 110, and 112 representing the binary bits 1, "2, 4, and "8 of the value of the hundreds digit of the high limit value.
  • the switches 106, 108, and 110 are opened, and the switch y112 is closed to continuously energize the winding 12 in the module 4-8.
  • Similar means are provided for selectively supplying positive potentials to the windings 12 in the units :and tens digital comparators 60 and 50, respectively, in accordance with the binary coded value of the units 'and tens digits of the high limit value.
  • the switches may -be continuously closed to continuously energize the related windings in the half subtractor modules
  • the signal source 102 can comprise any of the many circuits of known constructions for synchronizing the supply of these signals with the application of signals representing the unknown value.
  • the source 102 can also supply successive different limit values.
  • the low limit signal source 104 is shown as including four switches 114, 11-6, 118, and 120 representing the binary weights 8, 4, 2, and 1 of the hundreds digit of the low limit value. If the value of the hundreds digit of the low limit is assumed to be 6, the switches 114 and 120 are opened, and the switches 116 and 118 are closed to energize the windings 114 in the modules 74 and 72 to provide a binary coded designation of the value of the hundreds digit 6. Simi-lar means are provided in the signal source 104 for supplying signals to the related modules in the tens and units digital comparators ⁇ 80 and 90.
  • a signal source 122 provides signals representing the unknown value to be compared against the high limit Ivalues Iand the low limit values.
  • the signal source i122 can comprise any known suitable source of signals such as an analog-to-digital lconverter including controlled conduction devices, this signal source is shown in simplified form :as including a group of switches -for selectively supplying positive potentials to the half subtractor modules representing ls in the binary coded values of the decimal digit comprising the unknown value.
  • the signal source 122 includes four switches 124, 126, 128, and 130 representing the binary weights 1, 2, 4, and 8, respectively, of the hundreds digit of the unknown value.
  • Similar switching means can be provided for supplying binary coded signals to the -comparator circuits 50, 60, 80, and 90.
  • the signal sources 102, 104, and 122 are shown as supplying signals representing a single high limit value, a single low limit value, and 1a single unknown value, in many or most applications these signal sources will include commutating or scanning means synchronized w-ith each other for providing a series of unknown values to the comparator circuit in syn chron-ism with corresponding sets of high land low limit values so that a single comparator circuit 30 can be used with a variety 0f points or values to be monitored.
  • the switches 124 126 and 128 are closed to energize the windings 14 in the modules 41, 42, and 44 and the windings 12 in the modules 71, 72, and 74.
  • the closed switch 112 in the signal source 102 continuously energizes the winding 12 in the module 48, and the closed switches 116 and 118 continuously energize the windings 14 in the modules 72 and 74.
  • the value of the unknown in the modules 41, 42 arid 44 is greater than the known value, i.e., the unknown value includes the lbit 1, 2, and 4 -whereas the high limit value does not include these bits.
  • a positive signal is forwarded to the normally closed contacts 18 in the module 48.
  • the winding 12 in this module is energized representing the pire-.sence of the bit 8 in the hundreds digit of the high limit value and the winding 14 in this module is not energized, the contacts 18 are opened, and the contacts 16 are closed. The opening of the contacts 18 in the module 48 prevents the transmission of a positive signal in the modules 41, 42 and 44 to the output terminal 22 of the module 48.
  • the closed switch 124 in the unknown value source lrepresenting the binary l in the hundreds digit energizes the winding 12 in the module 71 so that the contacts 18 in this module are opened to prevent the transfer of a borrow signal from the. tens digit and units digit comparison circuits and 90. This signal also closes the contacts 16 in the module 71. The does not result in a bo-rrow output signal because an open circuit is connected to the terminal 24 in this module.
  • both of the windings 12 and 14 are energized representing identity between the 2 and "4 bits in the coded designation of the unknown hundreds digit "7 and the low limit digit 6. Since neither of the windings 12 and 14 in the module 78 are.
  • the three normally closed contacts 18 in the modules 72, 74, and 78 remain closed, but the contacts 16 in these three modules also remain open so that a borrow output signal cannot be provided.
  • the interruption in the borrow bus provided by the open contacts 18 in the module 71 indicates that the value of the. hundreds digit 7" is greater than the value of the low limit hundred digit 6, and a violation signal may not be supplied by either the less significant digit comparator circuits 80 and 90 or the four modules 71, 72, 74, and 78 for comparing the value of the hundreds digit.
  • the failure to operate any of the relays 92, 96, and 98 indicates that the unknown value. fell in the range between the high limit value and the low limit value.
  • the value of the hundreds digit of the unknown value is "9 which is represented by the closure of the switches 124 and 130 to energize the windings 14 in the modules 41 and 48 and the windings 12 in the modules 71 and 78.
  • energization of the winding 12 in the module 78 closes the contacts 16 and opens the contacts 18 therein. Since the terminal 24 in the module 78 is connected to an open circuit, the. closure of the contacts 16 cannot provide a borrow signal, and the opening of the contacts 18 prevents a borrow signal generated by the comparison of lower yalue bits or lower value digits from providing an operating signal to either of the detecting relays 96 or 98.
  • the energization of the winding 14 in the modules 41 by the closed switch 124 closes the contacts 16 therein and holds the contacts 18 therein closed.
  • the closure of the contacts 16 in the module 41 forwards the positive potential provided by the closed switch 124 through the diode 26 in the module 41 and the closed contacts 18 in the modules 42 and 44 to the input terminal 20 to the module 48.
  • both of the windings 12 and 14 are energized so that a negligible effective field is applied to the switches 16 and 18 therein.
  • the switch or contact 18 in the module 48 remains closed and forwards positive potential supplied from the module 41 to the winding of the relay 92 to operate. this relay to close a pair of normally open contacts 92A.
  • the positive potential from the module 41 is also forwarded through the diode 94 to energize the winding of the relay 96 so that a pair of normally open contacts 96A are closed to energize a lamp 142 which provides a visible indication of the alarm condition.
  • the relays 92, 96, and 98 can be latching and require manual restoration to clear the alarm indication so as to prevent release of these. relays and the removal of the alarm indication when the signal representing the unknown value disappears.
  • the hundreds digit of the unknown value has a value which is represented by the closed switches 124 and 128 representing the binary weights l and 4, respectively.
  • the closure of the contacts 124 energizes the winding 14 in the module 41 and the winding 12 in the module 71, whereas the closure. of the switch 128 energizes the winding 14 in the module 44 and the winding 12 in the module 74.
  • the energization of the winding 12 in the module 48 by the closed switch 112 representing the high limit hundreds digit "8 opens the contacts 18 in the module 48 so that an output or borrow signal cannot be supplied to the relays 92 and 96. Thus, no overvalue indication is provided.
  • the low limit checking operation only the winding 112 in the module 71 is operated, and the contacts 16 and 18 in this module are operated to open he contacts 18 and to close the contacts 16.
  • the opening of the contacts 18 in the module 71 prevents the transmission of a borrow signal resulting from the comparison of less significant digits in the circuits 80 and 90.
  • the closure of the contacts 16 does not result in the transmission of a positive signal representing a borrow to the output terminal of the module 71 because the terminal 24 of the module 71 is connected to an open circuit at the switch 120.
  • the winding 14 in the module 72 is energized by the closed switch 118 representing the binary bit 2 in the ⁇ hundreds digit of the low limit so that the contacts 16 in this module are closed.
  • the closure of the contacts 16 in this module 72 connects the positive potential provided by the closed switch 118 to the normally closed contacts 18 in the module 74.
  • both of the windings 12 and 14 are energized by the closed switches 128 and 116, respectively, representing the presence of the binary bit 4 in the binary coded designation of both the unknown hundreds digit 5 and the known low limit hundreds digit 6.
  • the net field produced by the bifilar winding in the module 74 has a negligible value, and the contacts 16 therein remain open and the contacts 1-8 therein remain closed.
  • the closed contacts in the rnodule 74 forward the positive potential provided by the module 72 to the normally closed contacts 18 in the module 78.
  • the digital comparator 30 is shown in an illustrative example in which an unknown is compared against high and low limit values defining a desired range for the unknown value, it is obvious that the system 30 can be used in many other applications.
  • a xed value representing an address in storage or memory can be supplied by either the high limit signal source 102 or the low limit signal source 104, and the unknown value signal source 122 can supply a series of different decremented or incremented numbers representing successive addresses of scanned storage locations. Because of a lack of identity between the unknown value and the values presented by either the high limit signal source 102 or the low limit signal source 104, the relays 92, 96, and 98 will remain operated.
  • the corresponding output relays are released and can be used to provide a control indication representing identity.
  • This signal can be used, for instance, to control the transfer of data from the accessed memory location. If the ⁇ addresses supplied by the signal source 22 are in a random order, both of the sources 102 and 104 must provide the desired address.
  • a comparator module for use with two Signal sources comprising a differential winding means including a first winding and a second winding each having a winding input terminal to be coupled to one of the signal sources, the first and second windings providing oppositely poled magnetic fields which are combined to produce a resultant magnetic field;
  • first circuit means connecting the second contacts in series between the comparator input and output terminals
  • the comparator module set forth in claim 1 including a diode connected in series in the second circuit means.
  • a comparator module for use with two input signal sources comprising first and second windings providing oppositely poled magnetic fields of generally equal value which are combined to provide a resultant field, the first and second windings having winding input terminals to be individually coupled to the input signal sources,
  • first and second magnetic contacts operated between open and closed circuit conditions under the control of the resultant field developed by the windings
  • biasing means for applying a magnetic bias to the first magnetic contacts to hold the first magnetic contacts in a normally closed condition, the polarity of the field provided by the biasing means being the same as the polarity of the field of the second winding, the second magnetic contacts being in a normally open condition,
  • first circuit means connecting the first contacts between a comparator input terminal and a Comparator output terminal
  • a digital comparator circuit for comparing plural digit entries comprising a plurality of individual comparator stages each representing a single digit and each including a pair of differential windings producing oppositely poled fields, a pair of normally closed rst contacts opened by the energization of only one of said pair of differential windings, and a pair of normally open second contacts closed by the energization of either but not both of the pair of differential windings, each of the pair of differential windings having an individual input terminal;
  • first circuit means connecting the normally closed iirst contacts in a series with the indicating means with the first contacts in the stage corresponding to the most signiiicant digit connected closest to the indicating means in the series connection and with the remaining iirst contacts disposed progressively more remote from the indicating means in the series connection in descending order of significance;
  • a digital comparator circuit as set forth in claim 4 including permanent magnet biasing means for holding the rst contacts normally closed, the permanent magnet biasing means having a polarity the same as the polarity of the field produced by one of the pair of diferential windings. 6.
  • a digital comparator circuit as set forth in claim 4 in which a diode is connected in series with each of the second contacts in each of the stages of the comparator.

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  • Physics & Mathematics (AREA)
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  • Engineering & Computer Science (AREA)
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  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
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  • Keying Circuit Devices (AREA)
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US523983A 1966-02-01 1966-02-01 Digital comparator utilizing magnetic logic Expired - Lifetime US3487364A (en)

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US (1) US3487364A (de)
BE (1) BE693221A (de)
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GB (1) GB1159062A (de)
SE (1) SE324589B (de)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4760374A (en) * 1984-11-29 1988-07-26 Advanced Micro Devices, Inc. Bounds checker
US4852038A (en) * 1985-07-02 1989-07-25 Vlsi Techology, Inc. Logarithmic calculating apparatus
US4857882A (en) * 1985-07-02 1989-08-15 Vlsi Technology, Inc. Comparator array logic
US4862346A (en) * 1985-07-02 1989-08-29 Vlsi Technology, Inc. Index for a register file with update of addresses using simultaneously received current, change, test, and reload addresses

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2539043A (en) * 1943-02-22 1951-01-23 Cie Ind Des Machines Automatiq Number comparing device
US2984821A (en) * 1958-06-06 1961-05-16 Gen Electric Logical binary comparison circuit
US3105155A (en) * 1960-03-24 1963-09-24 Daystrom Inc Magnetic comparator
US3289159A (en) * 1963-03-18 1966-11-29 Gen Electric Digital comparator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2539043A (en) * 1943-02-22 1951-01-23 Cie Ind Des Machines Automatiq Number comparing device
US2984821A (en) * 1958-06-06 1961-05-16 Gen Electric Logical binary comparison circuit
US3105155A (en) * 1960-03-24 1963-09-24 Daystrom Inc Magnetic comparator
US3289159A (en) * 1963-03-18 1966-11-29 Gen Electric Digital comparator

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4760374A (en) * 1984-11-29 1988-07-26 Advanced Micro Devices, Inc. Bounds checker
US4852038A (en) * 1985-07-02 1989-07-25 Vlsi Techology, Inc. Logarithmic calculating apparatus
US4857882A (en) * 1985-07-02 1989-08-15 Vlsi Technology, Inc. Comparator array logic
US4862346A (en) * 1985-07-02 1989-08-29 Vlsi Technology, Inc. Index for a register file with update of addresses using simultaneously received current, change, test, and reload addresses

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DE1549390B1 (de) 1970-07-23
BE693221A (de) 1967-07-03
GB1159062A (en) 1969-07-23
SE324589B (de) 1970-06-08

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