US3378697A

US3378697A - Frequency dividers adjustable over a wide range of division factors

Info

Publication number: US3378697A
Application number: US438980A
Authority: US
Inventors: Preston Brian; Carroll Anthony Denis
Original assignee: Marconi Co Ltd
Current assignee: BAE Systems Electronics Ltd
Priority date: 1964-03-18
Filing date: 1965-03-11
Publication date: 1968-04-16
Anticipated expiration: 1985-04-16
Also published as: GB1041143A; SE327222B

Description

B. PRESTON ET AL April 16, 1968' 3,378,697

FREQUENCY DIVIDERS ADJUSTABLE OVER A WIDE RANGE Filed blarchl l, 196s OF DIVISION FACTORS 2 Sheets-Sheet 1,

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ATTORNEYS April? 16, 1968 a PRESTON ET AL 3,378,697

FREQUENCY DIVIDERS ADJUSTABLE OVER A WIDE RANGE OF DIVISION FACTORS 2 Sheets-Sheet 2 Filed March 11, 1965 W g I .8) ddwm 4: 7%

ATToem-zvs United States Patent 3,378,697 FREQUENCY DIVIDERS ADJUSTABLE OVER A WIDE RANGE OF DIVISION FACTORS Brian Preston, Chelmsford, and Anthony Denis Carroll, Writtle, England, assignors to The Marconi Company Limited, London, England, a British company Filed Mar. 11, 1965, Ser. No. 438,980 Claims priority, application Great Britain, Mar. 18, 1964,

11,415/64 Claims. (Cl. 307-225) ABSTRACT OF THE DISCLOSURE An adjustable frequency divider is provided which may readily be adjusted to give any desired factor of division over a wide range. The divider consists of a frequency dividing unit of the staircase voltage type which, if undisturbed, will provide a predetermined count. A control arrangement is provided whereby either the staircase voltage reached by the unit may be returned to its initial value after the unit has made a count which is less than its normal predetermined count, thereby causing the unit to commence a new count or the staircase voltage reached by the unit may be increased after the unit has made a count less than its normal predetermined count to the value of voltage which would normally be reached only at the end of the units predetermined count. The unit is connected to apply output pulses to a further frequency dividing unit of the staircase voltage type, this second unit being adjustable in count and the control means for disturbing the count of the first-mentioned unit being activated -by pulses derived from the second, adjustable unit.

This invention relates to frequency dividers and has for its object to provide improved and relatively simple adjustable frequency dividers which can readily be adjusted to give any desired factor of division over a wide range.

According to a feature of this invention an adjustable frequency divider includes at least one frequency dividing unit of the staircase voltage type adapted to give, if undisturbed, a predetermined count; an adjustable frequency dividing unit of the staircase voltage type and adapted to give, in dependence upon its adjustment setting, any desired count within a predetermined range of possible counts said adjustable frequency dividing unit being fed with pulses derived from the first mentioned unit; and adjustable means actuated by pulses derived from said adjustable unit, for returning to its initial value the staircase voltage reached by said first mentioned unit after it has made a desired, adjustable, count less than said predetermined count, thereby causing it to start a new count.

According to another feature of this invention an adjustable frequency divider includes at least one frequency dividing unit of the staircase voltage type adapted to give, if undisturbed, a predetermined count; an adjustable frequency dividing unit of the staircase voltage type and adapted to give, in dependence upon its adjustment setting, any desired count within a predetermined range of possible counts said adjustable frequency dividing unit being fed with pulses derived from the first mentioned unit; and adjustable means actuated by pulses derived from said adjustable unit, for increasing the staircase voltage reached by said first mentioned unit after it has made a desired, adjustable, count less than said predetermined count to the final value which said staircase voltage would normally reach only at the end of said predeter' mined count.

By the expression frequency dividing unit of the staircase voltage type as herein employed is meant a frequency dividing unit of the type in which in normal operation, each applied input pulse produces in the unit an increment of voltage until a predetermined voltage is reached, whereupon said voltage is returned to an initial value (usually, though not necessarily, zero voltage).

Preferably the frequency dividing units of the staircase voltage type are of a type wherein each unit is in the form of a frequency divider comprising two condensers of predetermined magnitude connected in series across input terminals, a unilaterally conductive device interposed between them; a transistor with its baseemitter circuit connected across said device and its collector returned to a point of predetermined anchored potential to discharge one of said condensers at the end of each input pulse; a trigger circuit comprising two complementary transistors connected together in a positive feed-back circuit across the other of said condensers; and means for taking off divided frequency output from across one of said complementary transistors. In the case of an adjustabl frequency dividing unit adjustability is obtained by providing means for adjusting the initial base potential of one of the two complementary transistors.

Preferably there is provided a frequency dividing unit adapted to give, if undisturbed, a predetermined count of ten and an adjustable frequency dividing unit adapted to give, in dependence upon its condition of adjustment, any count up to ten.

Preferably, where the frequency dividing unit adapted to give, if undisturbed, a predetermined count is in accordance with the foregoing description thereof, the means for returning the staircase voltage to its initial value or increasing it to its final value (as the case may be) include a circuit of controllable conductivity connected across the condenser included in said unit and across which the staircase voltage is generated.

A preferred arrangement in accordance with the invention comprises, in cascade between input and output terminals, a plurality of frequency dividing units each adapted to give, if undisturbed, a count of ten and each fed with pulses from the preceding unit and, fed from the last of said units, an adjustable frequency dividing unit adapted to give, in dependence upon its condition of adjustment, any count up to ten, there being also provided independently adjustable means, actuated by output pulses from said adjustable frequency dividing unit, for altering effective counts given by the aforesaid units which are adapted to give, if undisturbed, counts of ten.

In one embodiment of the invention there are provided, in cascade between input and output terminals a plurality of frequency dividing units each adapted to give, if undisturbed, a count of ten and each fed with pulses from the preceding unit and, fed from the last of said units, an adjustable frequency dividing unit adapted to give, in dependence upon its condition of adjustment, any count up to ten; a plurality of bistable circuits, one for each of the units preceding the adjustable unit; means actuated by output pulses from the adjustable unit for changing over the condition of the bistable circuits from their original condition; a plurality of normally inoperative additional frequency driving units one for each of said units preceding said adjustable unit and each adapted to give, in dependence upon its condition of adjustment, any count up to ten; means for supplying to each of said normally inoperative units input pulses applied to a different one of said units preceding said adjustable unit; means actuated by a different one of said bistable circuits for rendering a different one of said normally inoperative units operative to count; and means actuated by each of said normally inoperative units when it has reached the count set by its condition of adjustment, for altering the effective count given by the unit which receives the pulses which are also fed to said normally inoperative unit and at the same time resetting the bistable which rendered it operative to count.

The invention is illustrated in the accompanying drawings which show diagrammatically a preferred embodiment thereof.

In the drawings:

FIGURE 1 is a diagrammatic showing of a portion of a frequency divider according to the invention; and FIGURE 2 is a diagrammatic showing of another portion of the frequency divider. It is intended that FIG- URES 1 and 2 be considered together as though joined along the dot-dash line X-X of each figure.

The frequency divider represented in the accompanying drawing receives input from input terminal 1 via an amplitude limiting amplifier and supplies frequency divided output to an output terminal 2 via another output limiting amplifier. These amplitude limiters form no part of the invention and are as known per se. They are accordingly represented by blocks LA and will not hereinafter be referred to. Also the illustrated apparatus has amplifiers inserted at various points in its circuitry. These also form no part of the invention and are as well known per se. They are accordingly represented by blocks AA and will not hereinafter be referred to.

The main dividing channel from input to output comprises the three dividing units A, B and C. Unit A is a staircase type frequency divider. It comprises two condensers A1, A2 in series across the input with a unilaterally conductive device A3 between them; a transis'tor A4 with its base-emitter circuit across diode A3 and its collector returned to a point of anchored potential to discharge condenser A1 at the end of each input pulse, and a trigger circuit comprising the two cornplementary transistors A5, A6 connected together in a positive feedback circuit across the other condenser A2, output from the unit being taken from across one of the complementary transistors, namely the transistor A6. This divider unit A may be regarded as comprising a staircase voltage generator and a trigger circuit, the former consisting of the condensers A1 and A2, the diode A3 and the transistor A4. A rising staircase voltage is produced across condenser A2 with an equal step or increase at each input pulse. The trigger circuit comprises the transistors A5 and A6.

When the voltage across A2 is large enough to make transistor A'S conduct, transistor A6 also conducts, causing the collector voltage of A6 and the base voltage of A5 to fall with cumulative rapid and heavy conduction of both transistors. Condenser A2 is discharged and an output pulse occurs. The number of input pulses required to produce an output pulse, i.e., the division factor, is determined (having given a predetermined peak-toapeak signal at the input condenser A1) by the base potential applied to transistor A5 and the ratios of condensers Al and A2. In unit A the base potential applied to transistor A5 is set to give a division factor of 10.

Unit A will divide by 10 if, during a count, no extraneous circuit is connected across condenser A2. If however, at some point in the count (for example at the fourth input pulse) condenser A2 is discharged, a count of 10 will commence anew, giving a larger total count (for example of 14). Similarly if, at some point during a count (for example at the fourth input pulse), the potential across condenser A2 is suddenly increased by external action to the value at which A5 conducts, the count will cease at that point and a reduced count will be obtained (for ex ample, of 4).

Unit D, the operation of which will be described later, comprises circuits designated generally D1 and D2 whereby the count by unit A may be increased or decreased, respectively, by a desired amount. As will be apparent one or other of these circuits D1 and D2 may be brought into use by moving the switch D3 to one or other of its two positions.

As Will also be apparent, assuming circuit D1 to be in use, the application of a suitable positive-going pulse to the base of the transistor in that circuit will cause dis charge of condenser A2 and unit A to start a new count of 10 thus adding 10 to whatever count (less than 10) it may already have made. Similarly, assuming switch D3 to be in the position in which circuit D2 is in use, the application of a negative-going pulse to the transistor in said circuit D2 will cause the potential across condenser A2 to increase from whatever value it may have reached to the potential which would have been reached at the end of a normal undisturbed count of 10 by unit A.

Output from unit A is fed to unit B which is also designed to make a count of 10 if undisturbed. It is in essence the same as unit A and corresponding parts in units A and B are indicated by corresponding reference numerals preceded by the letter A (in unit A) or B (in unit B). As will be seen unit B differs from unit A only in that it is the equivalent inverse circuit, corresponding transistors in the two units being of opposite types, the condenser B2 being taken to the positive supply instead of to earth and the sense of connection of the diodes being, of course, also reversed. Unit E, with its circuits E1 and E2 and switch E3, performs the same function with respect to unit B as unit D performs with respect to unit A. The references employed for the parts in unit E are the same as those used in the parts of unit D except for the initial letter.

Output from unit B is passed to unit C which is also a counter similar in principle to counters A and B but differing therefrom in being adjustable as to the count it makes. This is arranged to be adjustable to any value from 0 to 10. Adjustment is achieved by setting the switch C7 to one or other of its eleven possible positions. As will be seen switch C7 is in efifect the step-by-step slider of a potentiometer the resistance of which is connected across the supply potential source. The position of the arm of switch C7 determines the value of potential supplied from the potentiometer to the base of transistor C5 and thus, by determining the value of voltage across condenser C2 at which said transistor CS conducts, determines the maximum attained value of the staircase voltage and thus the number of pulses in a count. When the arm of the switch C7 is on the unconnected contact of the switch, a count of 0 is obtained. The remaining contacts, considered clockwise (as drawn), give counts of 1 to 10 respectively. Except for the switch C7 the references employed for the parts in unit C are the same as those used for the corresponding parts in unit A, apart from the initial letter.

Final output pulses from unit C are fed to one input lead F1 of an ordinary transistor bistable circuit F and changes it over from a first, normal, condition of stability to its other condition of stability. The resulting output pulse from unit F operates a clamp or trigger circuit in unit G to remove a short circuit normally provided by the transistor in said unit G across the condenser H2 in an adjustable counter H which is similar to the adjustable counter C and can be set to make any count from 1 to 10 as determined by the setting of its switch H7. The counters C and H are alike and corresponding parts are indicated by corresponding reference numerals preceded by the letter C orH as the case may be.

The counter H, when rendered operative to count by unit G actuated by bistable F, counts input pulses supplied to unit A and fed to condenser H1. When the staircase voltage across condenser H2 has reached a value determined by the setting of switch H7, i.e., when unit H has made the required (adjustable) count, it supplies an output pulse to the arm of switch D3 and thus operates circuit D1 or D2 in dependence upon the position of switch D3, exercising the count control on unit A already explained. At the same time the output pulse from unit H is also supplied over lead F2 to the bistable F and resets it to its original condition of stability.

Units J, K and L are similar to and correspond in action with units F, G, and H, respectively, the circuits in units K and L being the equivalent inverse circuits to those in units G and H, respectively. Bistable J receives over lead J1 output pulses from unit C and actuates unit K to start the adjustable counter L counting. This counter counts input pulses to unit B which are supplied to its condenser L1. When it has made a count determined by the setting of its switch L7 it actuates circuit E1 or E2 in dependence upon the position of switch E3 and also resets bistable J by a pulse supplied to it over lead I 2. Since corresponding parts in units L and H are given the same reference numerals preceded by the appropriate identifying letter, further description of units I, K and L is thought unnecessary.

Although, for convenience in drawing, all the switches are shown as independently operable, in practice it would be convenient to interlink switches E3 and C7 and also to interlink D3 and L7 so that, when switch C7 was moved to the zero count position, E3 was moved automatically to the lower position shown in the drawing and when L7 was moved to the zero count position, D3 was moved to the upper position shown in the drawing.

As will now be appreciated, the illustrated embodiment can be readily adjusted to give any factor of division up to one thousand. Adjustment of switch C7 determines the number of hundreds in the factor; switch L7 determines the number of tens in the factor and switch H7 determines the number of units in the factor.

We claim:

1. An adjustable frequency divider including at least one frequency dividing means of the staircase voltage type for giving, when undisturbed, a predetermined count; an adjustable frequency dividing means of the staircase voltage type for giving, in dependence upon its adjustment setting, any desired count within a predetermined range of possible counts, said adjustable frequency dividing means being fed with pulses derived from the first mentioned dividing means; and adjustable means actuated by pulses derived from said adjustable dividing means, for returning to its initial value any staircase voltage differing from the initial value and reached by said first mentioned dividing means after it has made a desired, adjustable count less than said predetermined count to cause said first-mentioned dividing means to start a new count.

2. An adjustable frequency divider including at least one frequency dividing means of the staircase voltage type for giving, when undisturbed, a predetermined count; an adjustable frequency dividing means of the staircase voltage type for giving, in dependence upon its adjustment setting, any desired count Within a predetermined range of possible counts, said adjustable frequency dividing means being fed with pulses derived from the first mentioned dividing means; and adjustable means actuated by pulses derived from said adjustable dividing means, for increasing to its final value any staircase voltage differing from the final value and reached by said first mentioned dividing means after it has made a desired, adjustable count less than said predetermined count.

3. An adjustable frequency divider as claimed in claim 1 and comprising at least one frequency dividing means of the staircase voltage type comprising two condensers of predetermined magnitude connected in series across input terminals, a unilaterally conductive device interposed between said condensers; a transistor with its baseemitter circuit connected across said device and its collector returned to a point of predetermined potential to discharge one of said condensers at the end of each input pulse; a trigger circuit comprising two complementary transistors connected together in a positive feedback circuit across the other of said condensers; and means for taking off divided frequency output from across one of said complementary transistors.

4. An adjustable frequency divider as claimed in claim 3 wherein adjustability is obtained by providing means for adjusting the initial base potential of one of the two complementary transistors.

5. An adjustable frequency divider as claimed in claim 1 and wherein said count given by said first mentioned frequency dividing means comprises a predetermined count of ten and said adjustable dividing means comprising means for giving, in dependence upon its condition of adjustment, any count up to ten.

6. An adjustable frequency divider as claimed in claim 3 wherein the means for returning the staircase voltage to its initial value includes a circuit of controllable conduc tivity connected across the condenser included in said at least one divider means and across which the staircase voltage is generated.

7. An adjustable frequency divider as claimed in claim 1 and comprising in cascade between input and output terminals thereof, a plurality of frequency dividing unit means for giving, when undisturbed, a count of ten and each fed with pulses from the preceding unit and an adjustable frequency dividing means fed from the last of said frequency dividing means for giving, in depend once upon its condition of adjustment, any count up to ten, there being also provided independently adjustable means actuated by output pulses from said adjustable frequency dividing means, for altering effective counts given by the aforesaid plurality of means for giving, when undisturbed, counts of ten.

8. An adjustable frequency divider as claimed in claim 1 and compn'sing in cascade between input and output terminals thereof a plurality of frequency dividing means for giving when undisturbed, a count of ten and each fed with pulses from the preceding unit and an adjustable frequency dividing means fed from the last of said frequency dividing means for giving in dependence upon its condition of adjustment, any count up to ten; a plurality of bistable circuits, one for each of said plurality of dividing means preceding the adjustable dividing means; means actuated by output pulses form the adjustable unit for changing over the condition of the bistable circuits from their original condition; a plurality of normally inoperative additional frequency dividing means one for each of said units preceding said adjustable unit and each for giving, in dependence upon its condition of adjustment, any count up to ten; means for supplying to each of said normally inoperative means input pulses applied to a different one of said means preceding said adjustable unit; means actuated by a different one of said bistable circuits for rendering a different one of said normally inoperative means operative to count; and means actuated by each of said normally inoperative means when it has reached the count set by its condition of adjustment, for altering the effective count given by the means which receives the pulses which are also fed to said normally inoperative unit and at the same time resetting the bistable circuit which rendered said normally inoperative means operative to count.

9. An adjustable frequency divider as claimed in claim 2 and comprising at least one frequency dividing means of the staircase voltage type comprising two condensers of predetermined magnitude connected in series across input terminals, a unilaterally conductive device interposed between said condensers; a transistor with its baseernitter circuit connected across said device and its collector returned to a point of pre-determined potential to discharge one of said condensers at the end of each input pulse; a trigger circuit comprising two complementary transistors connected together in a positive feed-back circuit across the other of said condensers; and means for taking off divided frequency output from across one of said complementary transistors.

19. An adjustable frequency divider as claimed in claim 9 wherein adjustability is obtained by providing means for adjusting the initial base potential of one of the two complementary transistors.

11. An adjustable frequency divider as claimed in claim 2 and wherein said count given by said first mentioned frequency dividing means comprises a predetermined count of ten and said adjustable dividing means comprises means for giving, in dependence upon its condition of adjustment, any count up to ten.

12. An adjustable frequency divider as claimed in claim 9 wherein the means for increasing the staircase voltage to its final value includes a circuit of controllable conductivity connected across the condenser included in said at least one divider means and across which the staircase voltage is generated.

13. An adjustable frequency divider as claimed in claim 2 and comprising a cascade between input and output terminals thereof a plurality of frequency dividing means for giving, when undisturbed, a count of ten and each fed with pulses from the preceding unit and an adjustable frequency dividing means fed from the last of said frequency dividing means for giving, in dependence upon its condition of adjustment, any count up to ten, there being also provided independently adjustable means actuated by output pulses from said adjustable frequency dividing means for altering effecting counts given by the aforesaid plurality of means for giving, when undisturbed, counts of ten.

14. An adjustable frequency divider as claimed in claim 2 and comprising in cascade between input and output terminals thereof, a plurality of frequency dividing means for giving, when undisturbed, a count of ten and each fed with pulses from the preceding unit and an adjustable frequency dividing means fed from the last of said frequency dividing means for giving, in dependence upon its condition of adjustment, any count up to ten; a plurality of bistable circuits, one for each of said plurality of frequency divider means preceding the adjustable dividing means; means actuated by output pulses from the adjustable unit for changing over the condition of the bistable circuits from their original condition; a plurality of normally inoperative additional frequency dividing means, one for each of said units preceding said adjustable unit and each for giving, in dependence upon its condition of adjustment, any count up to ten; means for supplying to each of said normally inoperative means input pulses applied to a different one of said means preceding said adjustable unit; means actuated by a different one of said bistable circuits for rendering a differing one of said normally inoperative means operative to count; and means actuated by each of said normally inoperative means when it has reached the count set by its condition of adjustment, for altering the effective count given by the means which receives the pulses which are also fed to said normally inorperative means and at the same time resetting the bistable circuit which rendered said normally inoperative means operative to count.

15. An adjustable frequency divider including at least one frequency dividing means of the staircase voltage type for providing, when undisturbed, a predetermined count; an adjustable frequency dividing means of the staircase voltage type for providing, in dependence upon its adjustment setting, any desired count within a predetermined range of possible counts, said adjustable frequency dividing means being fed with pulses derived from the first-mentioned dividing means; and adjustable means actuated by pulses derived from said dividing means selectively operable for returning to its initial value any staircase voltage differing from the initial value and reached by said first mentioned dividing means after it has made a desired, adjustable count less than said predetermined count and for increasing to its final value any staircase voltage differing from the final value and reached by said first dividing means after it has made a desired, adjustable count less than said predetermined count.

References Cited UNITED STATES PATENTS 2,487,191 11/1949 Smith 32-8-39 2,595,124 4/1952 Campbell 32829 2,767,313 10/1956 Martinelli 32848 X ARTHUR GAUSS, Primary Examiner.

S. D. MILLER, Assistant Examiner.