US3290513A - Logic circuit - Google Patents

Description

Dec. 6, 1966 J. P. SWEENEY 3,290,513

LOGIC CIRCUIT Filed May 24, 1963 2 Sheets-Sheet 1 T'PUT IIII P LIIT M M F 0 A d E v oflsyur O APPUED ZI LT M31 1: g L :uun's CI T Mum-s E RESET-23 CL. 1 SET CL 0 M EI, 'L' ADV. 4.0 :11. ET; I 5E1 "7 Am? E-ZZ CU SET CL INPUT-Z6 SET SET W L ADV. 0-20 CL cf c1. 0 -3 Aw. E22 cs. SET m. 1 SET SET (.L.

ADV- O-ZZ GL I CL. I 11. 0 0-50 Aw E-zz cL SET mo |HPUT-Z6 cL. SET 6L.

AD -9'2 CL 0 CL I SET I I-So Axw B22. CL SET CL INVEN TOR.

JOSEPH P SWEENEY Dec. 6, 1966 J. P. SWEENEY 3,

LOGIC CIRCUIT Filed May 24, 1963 2 Sheets-Sheet 2 O\ OUTPUT OUTPUT s r ADV E INPUT TO 0'; OUTPUT r E411 Ex DYNAMl ourP T INVENTOR.

Jose PH 1? SWE ENE) BY magnetic cores and the like.

United States Patent 3,290,513 LOGIC CIRCUIT Joseph I. Sweeney, Harrisburg, Pa., assignor to AMP Incorporated, Harrisburg, Pa. Filed May 24, 1963, Ser. No. 282,918 18 Claims. (Cl. 307-88) This invention relates to an improved magnetic core device useful in performing logical functions and particularly to a device operable with MADR (multi-a-perture device resistance) systems of the type shown in US. Patent No. 2,995,731, to the inventor.

The logical function termed negation operates with respect to the transfer of binary intelligence in the form of one and zero to produce a given output which is the complement of a given input. Thus, the negation device will produce a zero responsive to a one input and will produce a one responsive to a zero input. The frequent use of the negation function in logic systems has sponsored the development of a wide variety of negation devices employing solid state components including transistors, More often than not, the negation devices of the prior art are quite complicated with respect to number of components and pulse requirements.

One approach of the prior art has been to utilize specially shaped magnetic cores which must be manufactured by hand in order to achieve the core geometry necessary to perform the negation function. Another approach has been to use magnetic cores in conjunction with unilateral transfer elements such as diodes, accepting at the same time a unit more costly and less reliable than the remaining components of the system. Ye-t another approach employs standard magnetic colres, but calls for additional peripheral pulse sources over and above the pulse sources available for the operation of the basic system.

Accordingly, it is one object of the present invention to provide a negation circuit comprised of standard magnetic cores and conductive Wire only, which circuit is adapted to be driven by a cycle of pulses available in the system in which the device is used.

It is a further object of invention to provide a simple and inexpensive negation circuit utilizing only two magnetic cores and conductive wire.

It is another object of invention to provide a magnetic core negation circuit fully compatible in range of operation with standard MADR systems.

It is yet another object of invention to provide a novel negation circuit having distinctive outputs with respect to intelligence discrimination.

The foregoing objects are attained by the present invention through the use of one multi-aperture core, a single small toroidal core and a receiver core in conjunction with windings supplied by the standard advance and prime circuits of a MADR system. The multi-aperture, toroidal and receiver cores are linked by a coupling iloop each in a respective sense to produce, responsive to standard advance pulses, an output from the receiver core which is the complement of the input to the multiaperture core. The device of the invention may be incorporated into any standard MADR system by the inclusion of but two additional cores, a single coupling loop appropriately threading the last core of the system and threading the two additional cores, and with continuations of the standard advance circuits of the system appropriately wound through the two additional cores. The circuit of the invention employs only magnetic material and copper wire and thereby achieves the degree of reliability with respect to component failure achieved by standard MADR units. The particular windings employed in the unit of the invention are such as to permit the unit to achieve the range of operation of the standard MADR device and to produce output pulses representative of binary intelligence having a literally infinite degree of discrimination between one and zero with the output pulses being of a sufficient current level to operate the usual utilization devices employed and driven by standard MADR systems.

Other objects and attainments of the present invention will become apparent to those skilled in the art upon a reading of the following detailed description when taken in conjunction with the drawings in which there are shown and described illustrative embodiments of the invention; it is to be understood, however, that these embodiments are not intended to be exhaustive nor limiting of the invention, but are given for purpose of illustration in order that others skilled in the art may fully understand the invention and the principles thereof and the manner of applying it in practical use so that they may modify it in various forms, each as may be best suited to the conditions of a particular use.

In the drawings:

FIURE l is a schematic diagram of the negation unit showing the cores and windings appropriately wound therethrough;

FIGURE 2 is a diagram of the sequence of operation including the various magnetic states and flux unit outputs achieved as the unit of the invention performs a sample series of negation functions;

FIGURE 3 is a schematic diagram showing duplicate output circuits to provide two outputs with different discrimination;

FIGURE 4 is a diagram of the pulses produced at the duplicate outputs of the circuit of FIGURE 3; and

FIGURE 5 is a diagram showing a portion of a circuit similar to that of FIGURE 1, but including additional outputs.

The device depicted in FIGURE 1 may be considered as a separate entity repackaged for incorporation and use with any standard MAD-R system or it may be considered as directly incorporated into a standard MADR system with the left hand multi-aperture core being any odd core of a shift register or other such MADR unit. The cores shown in FIGURE 1 are of saturable magnetic material of the type having a relatively square hysteresis characteristic loop. Cores 1t) and 16' each have a symmetrically disposed central aperture 12 and four minor apertures 14, centrally disposed in the core body to define equal cross-sectional areas of magnetic material on either side of the apertures. The inclusion of the bulges .or ears along the outsideof each minor aperture assures that the cross-sectional area of core material through a section of any aperture is substantially equal to the cross-sectional area of the body of the core apart from the minor apertures. For the purpose of explanation, two of the minor apertures have been labeled R and T to represent receiver and transmitter apertures, respectively. The remaining two apertures are not shown as utilized, but may, alternatively, be used as input or readout apertures in practice. Cores 10 are of a type manufactured and sold by the Indiana General Corporation of Valparaiso, Indiana, utilizing their magnetic material No. 5209. Further included is a core 11, having a single central aperture and a thickness to define a flux capacity substantially equal to the flux capacity of the outer leg adjacent the minor aperture of core 10. Core 11 is of the same material as cores It) and 10, in order to achieve a similar response relative to operational changes in the presence of temperature changes. As Will be hereinafter demonstrated, core 11 may alternatively be replaced by a plurality of smaller cores having net flux content equal to that of core 11, and core 10' may alter- J natively be replaced by a single toroid of a flux capacity equal to that of core 11.

The various leads forming the driving windings and transfer loops of the circuit of FIGURE 1 are of Forrnvar insulated solid copper wire. The various turns N, linking portions of the cores, are shown only schematically in FIGURE 1, in manner of application and number. Such turns should be applied fairly tightly about the core portions linked thereby with care being taken not to penetrate the insulation thereof.

Linking each of the cores 10, 10" and 11, are leads 20 and 22 forming the advance portion of the circuit. Leads 20 and 22 are supplied by standard ADV. O and ADV. E pulses of current I from any suitable source. A prime lead 24 is included, threading the core Ill as shown. Prime current pulses I for lead 24 may be developed from any suitable source or, alternatively, may be supplied from a DC. source. Linking cores 10, 10 and 11 is a reset lead 23 adapted to be energized by a pulse similar to I on command as by closure of a switch 25 connected to a suitable pulse source. The switch 25 is, of course, a schematic representation and would normally be a solid state device.

The operation of the advance and prime circuits is, as generally explained in the above mentioned Sweeney application, such as to sequentially provide a clearing M.M.F., N I N I followed by a priming M.M.F., N I to the core denominated followed by the application of a clearing M.M.F., N I (N =N +N to the core denominated E. This standard MAD-R cycle includes a pulse spacing permitting an input to the core denominated 0 following or during each ADV. E pulse. The reset lead 23 includes turns and a current supply to provide M.M.F.s sufficient to clear cores 0 and E", i.e. equal to N I With respect to the O and E cores, the terms clear and set are used in accordance with the conventional representation of full negative saturation and half negative, half positive saturation (a full MAD set), respectively.

' As will be apparent from the circuit in FIGURE 1, both ADV. O and ADV. E pulses will also produce M.M.F.s operating on the core denominated A. Core A will thus experience M.M.F.s, N I N I responsive to each ADV. O and ADV. E pulse, respectively. Core A will thus be cleared by the application of the ADV. 0 pulse through turns N and set responsive to the application of the ADV. E pulse through turns N using the conventional representation of clear as related to full negative saturation and using set as related to full positive saturation with respect to core A. Lead 23 couples A in a sense to set the core by an similar to N I Further linking the cores are transfer or coupling loops 26, 2S and 30. Loop 26, which may be either from a preceding core or some other input device, couples core 0 by receiver turns N threading the R aperture 14 and aperture 12 to serve as an input loop. The application of an input i will operate to set core 0 if the current i is of a level sufficient to define a one input, through the N i Coupling loop 30 links the major leg of core E by transmitting turns N to respond to flux changes in the core to produce an output pulse i from the representative of the intelligence state of the core. Coupling loop 28 links cores 0, E and A including, turns N coupling the outer leg adjacent transmitting aperture T of core 0, the inner leg of core E through receiver aperture R thereof by turn N and the body of core A by turns N The senses of turns N and N linking the cores 0, E, A are such as to provide current i developed by the flux switched in the outer leg adjacent aperture T by the application of ADV. O

and currents i and i which are in senses dependent upon the orientation of flux switched by ADV. O and ADV. E in core A.

Considering that the flux capacity of each of the legs encircled by coupling loop 28 is substantially the same and that the rate of flux change is substantially the same responsive to identical M.M.F.s N I N I permits normalizing the units of flux developed under each of the turns N and N for the purpose of explanation. Consider, for example, that it takes one unit of flux operating on the core material about R by turns N to set core E and consider that flux losses (air and impedance losses) occurring in loop 28 are ignored, the quantity of flux necessarily switched in the outer core leg adjacent T may considered as a unit of one. The quantity of flux switched under N, linking core A may also be be considered as normalized one, 41 :1.

With this consideration, the operation of the circuit of FIGURE 1 may now be reviewed. The schedule called out in FIGURE 2 is intended to exemplify the operation of the circuit of FIGURE 1, wherein for each one input to core 0 there will occur in an advance cycle an output from core E equal to the exact complement of the input signal. Thus, if through N i a one is transferred into core 0, a current i substantially equal to zero will be generated .in winding 30 during the ADV. 0 phase. If N i represents a zero level input, an output pulse of a current level i equal to one will be developed on output loop 30 during the application of ADV. O.

For the purpose of clarity in describing the operation of FIGURE 1, the prime phase of the advance cycle is left out, it being understood that preceding each ADV. 0 phase, a prime pulse or DC. prime current I will be supplied to generate an M.M.F., N I which will switch the flux in the outer leg adjacent aperture T If the core 0 is set, the application of N I will operate to prime the 0 core. If the 0 core is not set, the application of N I will not operate to disturb the core, the quantity of N I being maintained below the core set threshold.

In FIGURE 2 distinct sequential inputs of zero-oneone-zero are selected to explain the operation of the circuit of FIGURE 1. In conjunction with each of these inputs, the sense of M.M.F applied and the resultant states of O, A and E cores are depicted along with the normalized flux units transmitted from each core. The output for each of the select-ed inputs is also shown.

Considering now that the reset lead 23 has been energized and the cores 0, A and E are in the initial state of clear, set and clear, respectively, the application of a zero on lead 26 will not disturb core 0 and the cores will remain in the initial states shown in FIGURE 2. The following ADV. O'will operate to clear core A and will, of course, operate to drive core 0 further into negative saturation. As indicated in FIGURE 2, clearing of core A by the application of ADV. 0 will operate to generate a normalized unit of flux equal to one =1) switched to produce a current flow in winding 28 in the direction shown by the current i which is in a sense to set c-ore E and produce an output on winding 30 of one due to the flux switched under loop 30. The intelligence state of cores 0 and E will then be zero and one, respectively. Core A may be considered to have generated a one not present in the intelligence train fed into core 0. Thus, core A may be considered as a source of flux, or a source core.

The application of ADV. B will operate to set core A and clear core E. The flux switched under winding N of lead 30 during ADV. E time will produce a current opposite to the i shown, which will normally be blocked by a unilateral device or by the characteristics of the utilization device.

Considering now the case of a one input on winding 26; with the cores in states previously established core 0 will then be set; cores A and E remaining set and clear, respectively. The application of ADV. O on winding will result in states with core 0 being cleared, core A being cleared and core E remaining cleared. The clearing of cores 0 and A will result in each such core producing a flux unit output of one, =1, =L The relative sense of turns N on cores 0 and A will produce resulting currents i and i opposing each other in coupling loop 28 and of equal quantity to thus cancel the effect of the transfer of the one from core 0 to core E. Core E will then re main in the clear state and the output loop will produce an output current i of zero level. The following ADV. B will drive the cores into the states shown in FIGURE 2 of clear, set and clear, respectively.

Following the operation of the circuit shown in FIG- URE 1 further in the schedule of FIGURE 2 shows that the input of a one following a one will produce states in the respective cores of set, set and clear. The application of ADV. 0 will produce states of clear, clear and clear, With normalized units of flux of one being developed at cores 0 and A. The cancellation, as above described, will be repeated such that core E is not set and an output on loop 3!) of i equal to zero will result. The application of ADV. B will then drive the cores into the respective states of clear, set and clear.

The following application of a zero input will leave the cores in states of clear, set, clear. The application of ADV. 0 will operate to drive the cores into the states of clear, clear and set; core A producing a normalized one flux output to core E and thereby a one output from the circuit. The application of ADV. E will then drive the cores into clear, set and clear states, whereupon the device is prepared for the next cycle.

As will be apparent from the above description, core A is swiched back and forth from the clear to the set state, and visa versa by the application of ADV. O and ADV. E. It will be perceived that the core will accordingly produce a normalized flux output of one as it goes from the clear to the set state and from the set to the clear state. The senses of the turns N and N are not such as to prevent core 0 from being disturbed by the flux change occurring when core A is driven from the clear to the set state by ADV. E. Thus, as core A is driven into the set state, a flux unit of one and a current i will be produced, operating through turns N on core 0. This might result in core 0 being set since the current i is in the proper sense to drive the core into positive saturation. This is particularly true when DC. prime is being used, since N I tends to aid N i in disturbing O. The turns N formed from lead 22 of ADV. E circuit are, however, in a sense, with respect to the core material about T to supply an M.M.F. opposing the developed by i AE and in phase therewith to block core 0 from being set. Turns N will, of course, have no effect on the ability of core 0 to transmit, since the transmission phase of the 0 core occurs during ADV. O. The turns N will also prevent core 0 being disturbed when E is driven from the set to the cleared state.

While the particular output has been shown as developed during ADV. O, a further output may be obtained from the E core by the addition of a coupling loop threading any of the unused minor apertures 14, such as T in standard MAD-R fashion. In such event, the ADV. E, lead would be threaded through T to provide turns N as shown with respect to turns N through aperture T of core 0. The prime lead would also be threaded through aperture T in a sense to provide N turns as shown with respect to core 0. With this modification, the E core could therefore serve as any E core of a series of cores in a shift register or like device to provide a transfer of the intelligence state of the core. The particular current developed would, of course, occur during normal ADV. E time and would be in an opposite sense to the i shown; being developed in the outer leg adjacent aperture T as E is cleared. It is cointemplated that, in addition to providing a dynamic output as above described, an additional static output could be provided at any available E core minor aperture utilizing the RF readout scheme as shown in US. patent application, Serial Number 249,466, filed January 4, 1963, in the name of the inventor and J. C. Mallinson. FIGURE 5 depicts the foregoing more clearly.

From the operational sequence shown in FIGURE 2, it should be apparent that the reset lead 23 is necessary only to establish the initial states of clear, set and clear in the cores 0, A and E and that once these states are established the reset circuit could be dispensed with, insofar as the operation thus far described is concerned. In fact, if the cores 0, A and E are separately driven to the initial states by some suitable temporarily placed windings, many circuit applications would be satisfied without a reset lead such as winding 23. The importance of lead 23 is in systems wherein there is a requirement for output from an 0 core within half an advance cycle when there has been no preceding ADV. E phase; i.e. in systems wherein the 0 core is supplied from a transistor or similar source either not requiring ADV. E or occurring before the first ADV. E pulse as, for example, when a device is first energized.

Turning now to a further aspect of the circuit of the invention, FIGURE 3 shows an embodiment adapted to produce two outputs which are each the complement of a single input. This circuit is generally identical to that shown in FIGURE 1, with the output portion thereof duplicated.

' The operation of the circuit is also generally identical to that of the circuit shown in FIGURE 1, with respect to cycle of operation including input, prime, advance and output phases.

Included in the circuit of FIGURE 3, are three cores 1h, 10 and It) of the type heretofore described and two cores 11 and 11', core 11 being identical to the core 11 heretofore described and core 11' being of the same magnetic material, but slightly smaller than core 11. The cores are arranged and labeled 0 A A2, E and E in accordance with the transfer cycle and mechanism above decribed with each core driven in the same relative phase as the O, A and E cores notwithstanding subscript.

The significance of cores 11 and 11' is that core 11 includes a flux capacity substantially different from the flux capacity of the leg of core 0 coupled by the coupling loop. In terms of the normalized flux quantities heretofore described, the 0 core leg adjacent T has a flux capacity of qb l and core 11 has a flux capacity of =L The core 11' is slightly smaller than core 11 and has a flux capacity 1, but still sutficient to set a succeeding core; i.e. core E Considering now the operation of the circuit of FIGURE 3 and referring to the schedule of FIG- URE 2, the particular core states and flux units transferred are similar and cores A A E and E may be considered to follow exactly the schedule in FIGURE 2 shown for cores A and E. Thus, with the cores in an initial state of clear, set and clear for O, A and E cores, respectively, the input of a zero via loop 46 to core 0 followed by prime on lead 44 and by the ADV. 0 pulse on lead 40 will result in the cores E and E being set by the units :l and 1 with the core 0 and the cores A and A being cleared. Since core A has a normalized unit flux equal to one, the input via loop 48 into core E may be considered as a sufficient for a full MAD set as above described, to thus produce an output of one on loop 50. The setting of core E however, is due to the unit of flux A 1 switched in core A coupled by loop 49 and therefore core E will be driven to have a quantity of flux switched less than that of a full MAD set and thereby produce an output of one on loop 51 of a reduced voltage level. The following application of ADV. E via lead 42 will operate to clear cores E and E and set cores A and A FIGURE 4 depicts the pulse levels for input and output pulses occurring responsive to the above half cycle. Thus, it will be seen that the input of a zero produces an output at core E of a slightly lower level than that at core E, but still representative of a one. In essence, the unit flux transfer is such that the outputs are proportionately different.

Considering now the input of a one such as the level shown for one input to core 0 in FIGURE 4, the following application of prime on lead 44 will prime core 0 and the application of ADV. O on lead 40 will clear core 0 and at the same time produce flux units operating on loops 48 and 49 of =l. Cores A and A will be driven by ADV. 0 into the clear state to produce flux units =1 and l. As a result of this core E will receive substantially zero flux and core E will receive a quantity of flux which is the difference between the normalized units 5 and The flux transferred to core E is however, in the clearing sense because loop 49 is wound with respect to core 0 to produce a clearing responsive to a transfer from core 0 to E This means that core E will, if anything, be driven further into negative saturation than it would have been if core A were of substantially the same flux capacity as the outer leg of core 0. The outputs on loops S0 and 51 linking cores E and E would be of the levels indicated in FIGURE 4. As will be apparent, the output on loop 51 is a negative output and the output on loop 50 is a typical zero output. The significance of this is that the discrimination between one and zero levels for the output on loop 51 from the E core is far better than the discrimination between the one and zero output on loop 50 of core E Actual use shows that by having the flux capacity of core A ten to twenty percent less than the flux capacity of core A and the outer leg of core 0, the discrimination between one and zero can be improved from four or five to one up to infinity insofar as may be determined by measuring the difference on an oscilloscope or driving any unilateral device.

It will be readily appreciated by those skilled in the art that the degree of one-zero discrimination required for different uses is an important consideration. For example, with respect to utility devices such as certain lamps, types of relays or semi-conductors, the most significant requirement is that the one voltage level be as large as possible with one-zero discrimination being of secondary importance. With respect to certain other applications, the one level need not be particularly high and the important consideration is that of discrimination between one and zero. It should be readily appreciated that if the actual output zero is a negative quantity, the discrimination with respect to a positive one of a slightly reduced amplitude becomes, practically speaking, absolute.

FIGURE 5 shows an alternative embodiment providing a plurality of different outputs occurring at different times and having different degrees of discrimination. The cores A and E are identical to the cores shown in FIGURE 1 and the operation of the cores with respect to providing a complement of the output from a preceding 0 core may be taken to be the same. The advance turns N, and N linking core A have been left out for clarity.

The core E is threaded by an ADV. E lead 60 having turns N linking the core major aperture 12 and turns N linking the output minor aperture T to provide clearing M.M.F.s about the core major path and about the path surrounding aperture T A prime lead 6?. is provided, linking aperture T in a sense to apply priming from turns N The coupling loop from the U preceding 0 core shown as 64, is identical to the coupling loop 28, shown with respect to the circuit of FIG- URE 1.

Further linking core E are output coupling loops 66, 76 and 74 to provide complement outputs of distinctly different characteristics. Loop 66 threads aperture T about the outer leg thereof to provide a standard MAD-R or dynamic output occurring at ADV. E time. In the manner heretofore indicated, the output on loop 66 is preceded by ADV. O transferring the complement of the intelligence state stored in the preceding 0 core to the E core and by the energization of prime lead 62. Since the priming applied via lead 62 substantially saturates the material in the outer leg adjacent T in a positive sense, the application of ADV. E on lead 60 produces an output pulse on 66 wherein the one-zero discrimination is approximately that of the standard MAD-R system.

The drive lead 68 and the output loop 70 associated therewith, are threaded in FIGURE 8 fashion through an available minor aperture 14, to provide a static output, which appears continuously to indicate the instantaneous intelligence state of core E, which is the complement of the intelligence train being fed through the preceding core 0. The particular drive turns and operation associated with 68 and 70 are preferably as described in application Serial Number 249,466 above mentioned. The turns of leads 68 and 70- are such that the instantaneous state of core E is available as long as the RF is applied to 68. The utility device 72 shown here as a signal lamp, could of course be some other utilization device including a relay or the like. The RF applied to 68, may be gated to, in effect, sample the state of core E at any time on command.

Considering that the RF is constantly applied and that a train of one-zero intelligence pulses is being fed through the preceding 0 core, lamp 72 is lighted each time the ADV. 0 phase transfers a zero from the preceding 0 core to thus indicate the zero complement of one. Lamp 72 remains lighted until the following ADV. E phase which clears core E. The transfer of a one from the preceding 0 core to the E core causes lamp 72 to be extinguished and remain extinguished until the next transfer of a zero from the preceding 0 core by the ADV. 0 phase.

The output winding 74 provides a dynamic output each time core E is driven by ADV. O in the same manner :as the output loop 30, 50 and 51, heretofore described. As indicated in FIGURE 5, the polarities of output currents from loops 66 and 74 are in an opposite sense as well as at different times. This in itself has been found to be highly useful in order to drive different utilization devices at different times.

The operation of the circuit of FIGURE 5 would thus provide the possibility of a dynamic complement output occurring at ADV. 0 time on loop 74 with excellent discrimination between one and zero and a reduced one voltage level, a dynamic output on loop 66 of standard discrimination occurring at ADV. E time with slightly greater maximum voltage level and a static output from loop 76 constantly monitoring the state of the E core. As will be appreciated by those familiar with intelligence transfer problems, the availability of duplicate complements at the same time or at different times can be quite useful; particularly with respect to error checking codes.

The embodiments in FIGURE 1 and 3, with respect to the flux content of the auxiliary core, should make it apparent that the invention contemplates providing auxiliary cores of a particular flux content relative to the flux content of the preceding core transmitting leg dependent upon the discrimination required and the gain characteristics of the circuit. In the first example shown, the auxiliary core included a flux content substantially equal to the outer leg of the preceding 0 core, and the second example indicated the use of two auxiliary cores wherein one core has flux content substantially the same and the other core has a flux content slightly less than that of the preceding core. With respect to the circuit of the invention, it is contemplated that the auxiliary core could have a flux content greater than that of the transmitting leg of the preceding 0 core in order to boost the one output level even higher with a concomitant sacrifice of discrimination with respect to a boosted zero level. For example, in FIGURE 1, the flux content of core A could be ten to twenty percent higher than that of the outer leg of core 0. It is also fully contemplated that a given A core may be made up of a plurality of cores having the net flux content or capacity required. For

example, a core having a twenty maxwells flux content could be replaced by five cores each having a flux content of four maxwells with the five linked by drive and coupling windings in the same manner as the single core.

From the description heretofore given, it should also be apparent that E core or cores need not be multiaperture cores unless dynamic (ADV. E-prime) or RF output is required. The E core or cores could otherwise be simple torroids having a flux content similar to core A; i.e. sufficient to produce a one level similar to standard MADR outputs.

Changes in construction will occur to those skilled in the art and various apparently different modifications and embodiments may be made without departing from the scope of the invention. The matter set forth in the foregoing description and accompanying drawings is offered by way of illustration only. The actual scope of the invention is intended to be defined in the following claims when viewed in their proper perspective against the prior art.

I claim:

1. A negation device for producing the binary complement output of a binary input comprised of cores of magnetic material having square loop hysteresis characteristics including an input core, an output core and a source core with winding means linking the input and output cores for transferring intelligence states into and out of said device, respectively, advance windings linking said cores to sequentially clear and set the input and source cores and set and clear the source and output cores, a coupling loop linking the input, output and source cores in a sense such that upon the input core being cleared from a set state the source core will be set from a clear state to produce a net flux change in the output core representative of zero and upon the input core being cleared from a clear state, the source core will be cleared from a set state to produce a net flux switched in the output core representative of one whereby the output core will produce an output which is the complement of the input to the input core.

2. The device of claim 1, wherein the cores are of substantially identical magnetic material.

3. The device of claim 1, wherein the cores are threaded by a reset winding linking the input, source and output cores in a sense to drive such cores into respective states of clear, set and clear response to energization of said reset winding.

4. The device of claim 1, wherein the source core has a flux content substantially equal to the flux content of that portion of the input core linked by the coupling loop.

5. The device of claim 1, wherein the source core has a flux content less than the flux content of that portion of the input core linked by the coupling loop.

6. The device of claim 1, wherein the source core has a flux content greater than that portion of the input core linked by the coupling loop.

7. The device of claim 1, wherein the advance winding, which is operable to set the source core, threads the input core in a sense to oppose magnetomotive forces developed in the coupling loop linking the input core with the output core during phases of the advance cycle wherein the said output core is cleared and the source core is set.

8. The device of claim 1, wherein there is further included an additional source core and an additional output core threaded by the advance windings and linked by a further coupling loop in a sense such that upon the input core being cleared from the set state, the additional source core will be set from a clear state to produce a net flux change in the additional output core representative of zero and upon the input core being cleared from a clear state, the additional source core will be cleared from a set state to produce a net flux switched in the additional output core representative of one whereby the additional output core will produce an output which is the complement of the input to the input core.

9. The device of claim 8, wherein the first mentioned source core has a flux content substantially equal to the flux content of that portion of the input core linked by the coupling loop, and the additional source core has a different flux content whereby the one-zero discrimination output from the output cores is different.

16. The device of claim 9, wherein the flux content of the additional source core is less than that of the first mentioned source core such that the one-Zero discrimination of the output from the additional output core is greater than that from the first mentioned output core.

11. An improved logic device operable to produce an output which is the complement of a zero or one binary intelligence input comprising in combination, an input core, a source core and an output core, advance windings linking said cores adapted to drive the magnetic material thereof into cleared states of magnetization responsive to advance pulses applied thereto, a portion of said advance winding linking said source core adapted to drive the magnetic material thereof into clear and set states of magnetization responsive to said advance pulses, an input winding linking said input core adapted to drive said core into one or zero intelligence states of magnetization, an output winding linking said output core adapted to produce one or zero output pulses responsive to flux switched in said output core, a coupling winding linking said input core, said source core and said output core in a respective sense to produce magnetomotive forces operating on said output core proportional to the net flux switched in the input core and the source core responsive to the application of an advance pulse whereby responsive to the input of a one, the output core will be left cleared by the cancellation of flux switched in the input core and in the source core and whereby responsive to the input of a zero, the output core will be set responsive to the flux switched in the source core.

12. The device of claim 11, wherein the said advance windings linking the cores include separate advance circuits linking respectively, the input core and the output core with a source of phased advance pulses to drive said cores into cleared states of magnetization at intervals.

13. The device of claim 12, wherein the said output winding linking the output core is threaded through a major aperture thereof to produce a One or zero output pulse responsive to the advance pulse clearing the input core.

14. The device of claim 13, wherein there is further included a prime winding linking the input and output cores through a transmitting aperture thereof and adapted to at times prime the flux into the outer leg adjacent said transmitting aperture responsive to the application of prime pulses and there is included a further output winding linking the said outer leg adapted to produce one or zero output pulses responsive to the output core being cleared by the advance pulse applied to the output core.

15. The device of claim 14, wherein there is further included linking another minor aperture, an RF drive winding and a further output winding adapted to produce a static output representative of the particular intelligence state of the output core.

16. An improved logic circuit of cores of similar magnetic material and copper wire only, including an input core, an output core and a source core, the input and output cores having a major aperture and a plurality of minor apertures, a first winding threading the input core and the source core in a sense to clear both cores responsive to a first advance pulse, a second winding threading the output core and the source core in a sense to clear the output core and set the source core responsive to a second advance pulse, a coupling loop threading a minor aperture of the input core and a minor and major aperture of the output core in a sense to clear the output core responsive to flux switched under such loop as the input core is cleared, the said coupling loop threading the source core in a sense .to develop a flux switched producing a current in a sense to set the output core responsive to the source core being cleared, and set the input core responsive to the source core being set, an output Winding linking said output core whereby, upon the input core being set and cleared, the output core will be driven by a magnetomotive force leaving the output core in a clear state to produce a zero output on said output winding responsive to flux switched during the application of an advance pulse and upon the input core being left in the clear state by the input of a zero and the output core will be set by the source core to produce -a one output on said output winding responsive to flux switched during the application of an advance pulse.

17. The circuit of claim 16, wherein the second winding threads .the said minor aperture of the input core in a sense to produce a magnetomotive force opposing the magnetomotive force developed by the coupling loop as the output core is cleared from the set state and the source core is set from the clear state.

18. The circuit of claim 16, wherein the said output winding threads a further minor aperture of said output core and there is included a prime Winding adapted to prime flux under said Winding if the output core is set, the said output core producing one or zero outputs on said output winding during the application of said second advance pulse.

No references cited.

BERNARD KONICK, Primary Examiner.

G. LIEBERSTEIN, Assistant Examiner.

Claims (1)

1. A NEGATION DEVICE FOR PRODUCING THE BINARY COMPLEMENT OUTPUT OF A BINARY INPUT COMPRISED OF CORES OF MAGNETIC MATERIAL HAVING SQUARE LOOP HYSTERESIS CHARACTERISTICS INCLUDING AN INPUT CORE, AN OUTPUT CORE AND A SOURCE CORE WITH WINDING MEANS LINKING THE INPUT AND OUTPUT CORES FOR TRANSFERRING INTELLIGENCE STATES INTO AND OUT OF SAID DEVICE, RESPECTIVELY, ADVANCE WINDINGS LINKING SAID CORES TO SEQUENTIALLY CLEAR AND SET THE INPUT AND SOURCE CORES AND SET AND CLEAR THE SOURCE AND OUTPUT CORES, A COUPLING LOOP LINKING THE INPUT, OUTPUT AND SOURCE CORES IN A SENSE SUCH THAT UPON THE INPUT CORE BEING CLEARED FROM A SET STATE THE SOURCE CORE WILL BE SET FROM A CLEAR STATE TO PRODUCE A NET FLUX CHANGE IN THE OUTPUT CORE REPRESENTATIVE OF ZERO AND UPON THE INPUT CORE BEING CLEARED FROM A CLEAR STATE, THE SOURCE CORE WILL BE CLEARED FROM A SET STATE TO PRODUCE A NET FLUX SWITCHED IN THE OUTPUT CORE REPRESENTATIKVE OF ONE WHEREBY THE OUTPUT CORE WILL PRODUCE AN OUTPUT WHICH IS THE COMPLEMENT OF THE INPUT TO THE INPUT CORE.

Images