US3117304A - Matrix with reflected wave energy crosspoints - Google Patents

Matrix with reflected wave energy crosspoints Download PDF

Info

Publication number
US3117304A
US3117304A US66819A US6681960A US3117304A US 3117304 A US3117304 A US 3117304A US 66819 A US66819 A US 66819A US 6681960 A US6681960 A US 6681960A US 3117304 A US3117304 A US 3117304A
Authority
US
United States
Prior art keywords
line
pulse
elements
matrix
energy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US66819A
Other languages
English (en)
Inventor
Ivars G Akmenkalns
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to NL270943D priority Critical patent/NL270943A/xx
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to US66819A priority patent/US3117304A/en
Priority to GB32974/61A priority patent/GB969920A/en
Priority to DEJ20722A priority patent/DE1190983B/de
Priority to CH1243861A priority patent/CH398699A/de
Priority to FR877692A priority patent/FR1304892A/fr
Application granted granted Critical
Publication of US3117304A publication Critical patent/US3117304A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/36—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using diodes, e.g. as threshold elements, i.e. diodes assuming a stable ON-stage when driven above their threshold (S- or N-characteristic)
    • G11C11/38—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using diodes, e.g. as threshold elements, i.e. diodes assuming a stable ON-stage when driven above their threshold (S- or N-characteristic) using tunnel diodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/005—Arrangements for selecting an address in a digital store with travelling wave access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/58—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being tunnel diodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/313—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of semiconductor devices with two electrodes, one or two potential barriers, and exhibiting a negative resistance characteristic
    • H03K3/315—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of semiconductor devices with two electrodes, one or two potential barriers, and exhibiting a negative resistance characteristic the devices being tunnel diodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/15026—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with asynchronously driven series connected output stages
    • H03K5/15046—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with asynchronously driven series connected output stages using a tapped delay line

Definitions

  • This invention relates to matrices and more particularly to an improved means of selecting a particular element in a matrix.
  • two coordinate matrices are commonly employed; such matrices also generally comprise elements having at least two stable states of energization.
  • the elements may be considered to be arranged in rows and columns and a plurality of drive lines pass through the rows and columns of elements, that is, the drive lines in the rows cross the drive lines in the columns and a binary element is located at each intersection.
  • To energize any one of the elements in a matrix it is necessary to coincidentally energize a drive line in one of the rows and a drive line in one of the columns.
  • the magnitude of the current at the intersection of the drive lines which are energized is suflicient to drive the element located at said intersection to one or the others of its stable states.
  • the invention provides a matrix comprising a plurality of binary elements arranged in a plurality of groups; for simplicity in description, the elements are considered to be arranged in rows.
  • Each of the elements is connected to a distinct position in each of the drive lines.
  • One end of each of the drive lines is connected to a pulse generating means and the other end of each of the drive lines is terminated such as to reflect pulses sent down a line by the generator.
  • An element is selected by actuating a pulse generating means to send a pulse down the respective drive line and then actuating the pulse generating means to send a second pulse down the drive line to meet the reflected first pulse at a desired point.
  • the reflected first pulse will reinforce the second pulse and total energy will be of suflicient amplitude to energize the binary element positioned at the selected point.
  • FIGS. 1 and 1a are schematic drawings of an open circuited transmission line useful in describing the concept of the invention
  • FIGS. 2 and 2a are schematic drawings of a short cir- 3,1113634 Patented Jan. 7, 1964 cuited transmission line also useful in describing the concept of the invention
  • FIG. 3 is a schematic diagram of a drive line comprising a microwave strip line to which are connected a plurality of spaced elements in accordance with the invention
  • FIG. 4 is a graph showing the operation of the binary elements comprising Esaki diodes of the circuit of FIG. 1;
  • FIG. 5 shows a plurality of microwave strip lines as shown in FIG. 4 arranged in a matrix.
  • FIG. 6 shows a schematic diagram of a word memory array in accordance with the invention.
  • an ideal lossless transmission line 7 is properly terminated at the driver 8 end, and if the other or receiving end 9 of the line is open circuited, no energy can be dissipated at the receiving end. Therefore, a pulse generated at the driver end will propagate down the line and upon reaching the receiving end will be reflected back toward the driver end. Upon reaching the driver end of the transmission line, the energy will be dissipated in the characteristic impedance Z0 and driver internal resistance. If the transmission line is short circuited at the receiving end, again no energy can be dissipated in the termination and the energy will be reflected and finally absorbed in the generator resistance.
  • the first pulse after being reflected from the termination, will meet the second pulse at some point on the transmission line. If the two pulses have finite pulse widths, they will overlap over some finite length or region of the transmission line. Over this finite length of line, the energy per unit length of line will be doubled due to coincidence of the two energy pulses.
  • the region of the transmission line over which the pulse overlap occurs is controlled by the pulse width and spacing of the pulses, as will be described hereinbelow.
  • a magnetic field activated device may be controlled by the field if placed in series with the transmission line, as shown in FIG. 2 at the region where the current magnitude is doubled.
  • the circuit of the element 6 should present a minimum series impedance; a properly designed matching network, as known in the art and as shown in FIG. 2a may be used to minimize any disturbance presented by the load to the line.
  • circuits according to the invention have been constructed to selectively control elements, for example, binary elements or devices, by using only one set of drive lines, as will hereinafter be described in some detail.
  • a group of similar binary elements or devices comprising Esaki diodes 11, 12, 13 and 14 are connected through similar respective resistors, indicated generally as R, to spaced points on a drive line comprising a microwave strip line 19 commonly referred to as a microstrip line.
  • a voltage pulse generating means or driver 24 is connected through a suitable line terminating (matching) resistor 25 across one end of the micro strip line 19. The other end of the microstrip line 19 is open circuited.
  • the Esaki diode may be said to be a P-N junction diode wherein both the P region and the N region contain a very high concentration of the respective impurities resulting in a current versus voltage characteristics which exhibit a short circuit stable negative resistance region. As seen from FIG.
  • the Esaki diode may also be defined as exhibiting a first region of positive resistance over a low range of potentials and adjoining at a peak current value, a second region of negative resistance, and then a third region of positive resistance.
  • a bistable element may be obtained.
  • the Esaki diode is particularly suitable for circuits formed in accordance with the invention since its response time is in the order of millimicroseconds and its operating potentials are relatively low in the order of 0.05 volt at the beginning of the negative resistance region to 0.4l.2 volts, depending on the diode material used at the end of the negative resistance region.
  • the Esaki diodes 11-14 are each biased for bistable operation by a voltage +E coupled thereto through a resistor r.
  • Diodes 11-14 are coupled to the microstrip line 19 through the resistor R having a resistance which is large compared to the characteristic impedance of the line.
  • a capacitor and resistor series network instead of resistor R can be used for coupling, if the direct current fed back by the diode circuit creates problems.
  • a conventional three-way matching network may also be used to couple the diode circuit to the line.
  • Driver 24 is a bipolar voltage generator to provide opposite polarity pulse to thus effect set and reset states to the bistable Esalti diodes.
  • the outputs of the Esaki diodes may be connected to an OR circuit of any suitable known type such as backward diode and capacitance type for output sensing.
  • the microwave strip line 19 comprises a solid dielectric microwave strip conductor 21, a dielectric 22, and a ground plane 23.
  • the characteristics of solid-dielectric strip lines are known in the art and have been described in numerous publications, for example, in one place in the March 1959 issue of The Proceedings of the Institution of Electrical Engineers in an article entitled Parallel-Plate Transmission System for Microwave Frequencies by A. F. Harvey. It has been found that a pulse inserted at one end of a microwave strip line is propagated down the line and the velocity of propagation is determined by the properties of the dielectric material which separates the strip conductor 21 and the ground plane 23. However, as the velocity of propagation (V) is decreased, the attenuation which is due to the conductor, dielectric and radiation losses is increased.
  • a pulse of pulse width w when propagating through a transmission line with a velocity of propagation v, will have its energy contained in a region of d units length along the transmission line.
  • the region d corresponding to the maximum overlap of the pulses will be equal to the length of region d of the shorter of the two pulses. This then establishes the minimum distance s between any two devices connected to the transmission line.
  • the wider pulse may have a maximum width of
  • the minimum pulse width is determined by the minimum time of pulse overlap required in order to control the binary device.
  • the time interval between two selection and control operations depends on the time it takes to reflect the sec ond pulse and absorb said pulse .at the receiving end. The longest time interval will be required for the selection of the first unit.
  • the minimum required overlap is therefore 1 millimicrosecond. Assuming that the pulse width w+10% tolerance may be maintained on the drive pulse, the maximum pulse Width of the shortest pulse will be 1.2 millimicroseconds.
  • the drive pulse width is 1 millimicrosecond and the total length of the line is 22 inches
  • the first and third pulses must be separated in time by at least 20.4 millimicroseconds in order to selectively energize the diodes.
  • the first and second pulses are considered as one control operation, as are each subsequent pair of pulses.
  • the reflected pulse and the incident pulse need not exactly coincide, -i.e., need not completely overlap, at the region across which the elements are connected; only portions of the pulses need to overlap at the region across which the element is connected.
  • FIG. 5 shows a relatively simple form of a twocoordinate matrix 31 formed in accordance with the invent-ion.
  • Matrix 31 comprises a group of similar microstrip lines and associated diodes, as shown in FIG. 1.
  • a total of sixteen Esaki diodes are thus arranged in the two-coordinates system and, more specifically, in four rows and four columns.
  • the columns of the Esaki diodes are designated alphabetically as A, B, C and D; the rows are designated as l, 2, 3 and 4.
  • Each diode may be designated by its coordinate; for example, diode 2B is positioned at the intersection of row 2 and column B.
  • a driver connected to the associated microstrip line is activated to send a first pulse of a given polarity down the line at a controlled later time and a second pulse of said given polarity the line to meet the reflected first pulse at the point on the microstrip line across which the selected diode is connected.
  • driver 24 would be activated to send pulses time spaced, as discussed hereinabove, along line 19b to energize diode 23.
  • the drivers are bipolar devices. During the reading operation, pulses of opposite polarity to the first mentioned pulses are propagated down the line to shift the states of the selected binary elements to their initial state.
  • control cycle time depends on the time required for the resistor connected to the driver to absorb the reflected second pulse
  • some cycle time reduction is possible by placing the driver at some other point on the line, such as the center of the line, and terminating both ends of the line either by an open or short circuit.
  • one or two elements connected to the same line can be selected. For example, two elements may be selected by spacing the elements on either side of the line the same distance from the driver while different elements may be selected by spacing the elements on one side of the driver differently from the elements on the other side of the driver and selectively controlling the timing of the driver pulses.
  • a word memory array may be constructed using conventional ferrite cores.
  • the memory is arranged such that in each single plane, generally indicated as 42, only the cores 41 on the plane that are to be addressed simultaneously are threaded by an associated drive line 43. Due to the relatively long control signal required by ferrite cores, the width of pulses necessary to energize the cores would overlap over a considerable, not along the entire length of the drive line.
  • the groups of cores representing groups of digits are separated electrically by using delay lines 44 between planes, as shown in FIG. 6.
  • the delay line 4-4 at the end of the drive line 43 will be terminated, as discussed hereinabove, to reflect the pulse energy.
  • the last delay line 44 is short circuited to provide an increase of current at the desired location.
  • a transmission line means for coupling a plurality of energizable elements to spaced points on said line, said line being terminated to reflect energy propagated through said line, and pulsed energy generating means for providing time spaced pulses to said line, succeeding ones of said pulses supplementing the reflected preceding ones of said pulses at selected regions along said line to energize predetermined ones of said elements.
  • a transmission line means for coupling a plurality of energizable elements to spaced points on said line, pulsed energy generating means controlled to provide selectively spaced pulsed energy to said line, said line being terminated to reflect energy propagated through said line, and said generating means during a control opration providing an initial pulse and a time spaced later pulse which supplements the energy of the reflected initial pulse at a predetermined region along said line to energize a selected one of said elements.
  • a plurality of energizable elements each having at least two stable states, a transmission line, said elements being coupled in parallel to spaced points on said line, pulsed energy generating means being controlled to provide selectively spaced pulses to one end of said line, the other end of said line being open circuited to reflect pulse energy propagated through said line, and during each control operation said generating means providing a first voltage pulse and a time spaced later voltage pulse which supplements the energy of the reflected first pulse at a determined region along said line to shift a selected one of said elements to one of its stable states.
  • a plurality of energizable elements each having at least two stable states, a transmission line, said elements being coupled in series to spaced points on said line, pulsed energy generating means being controlled to provide selectively spaced pulses to one end of said line, the other end of said line being short circuited to reflect pulse energy propagated through said line, and during each control said generating means providing a first current pulse and a time spaced later current pulse which supplements the energy of the reflected first pulse at a determined region along said line to shift a selected one of said elements to one of its stable states.
  • a matrix comprising a plurality of energizable elements each having at least two stable states, a plurality of drive lines each arranged to reduce the velocity of propagation of energy therethrough, means for coupling said elements to spaced points on respective ones of said drive lines, pulse energy generating means being controlled to provide spaced pulses to respective ones of said lines, each of said lines being terminated to reflect pulse energy propagated through said line, and during each control operation one of said generating means selectively providing a first pulse and a time spaced second pulse which overlaps at least a portion of the reflected first pulse at a determined region along the associated line to energize a particular one of said elements to one of its stable states.
  • a matrix comprising a plurality of bistable cores arranged as groups in distinct planes, drive lines, one such drive line passing through corresponding groups of cores in each of said planes, delay networks comprising a portion of said line extending between planes, pulse energy generating means connected to one end of respective ones of said lines and controlled to provide selectively spaced current pulses thereto, the other end of each of said lines being short circuited to reflect pulses propagated through said lines, during each control operation a selected generating means providing a first pulse and a time spaced second pulse which overlaps at least a portion of the reflected first pulse at a determined region along the associated line to shift a group of cores in one plane to one of their stable states.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
US66819A 1960-11-02 1960-11-02 Matrix with reflected wave energy crosspoints Expired - Lifetime US3117304A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
NL270943D NL270943A (en(2012)) 1960-11-02
US66819A US3117304A (en) 1960-11-02 1960-11-02 Matrix with reflected wave energy crosspoints
GB32974/61A GB969920A (en) 1960-11-02 1961-09-14 Improvements in and relating to electrical circuits controlled by electrical pulses
DEJ20722A DE1190983B (de) 1960-11-02 1961-10-26 Verfahren zur Ansteuerung (Auswahl) eines Speicherelements aus einer Mehrzahl bistabiler Speicherelemente eines Impulsspeichers
CH1243861A CH398699A (de) 1960-11-02 1961-10-27 Verfahren zur Ansteuerung eines aus einer Mehrzahl bistabiler Speicherelemente und Vorrichtung zur Durchführung des Verfahrens
FR877692A FR1304892A (fr) 1960-11-02 1961-11-02 Matrice

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US66819A US3117304A (en) 1960-11-02 1960-11-02 Matrix with reflected wave energy crosspoints

Publications (1)

Publication Number Publication Date
US3117304A true US3117304A (en) 1964-01-07

Family

ID=26677746

Family Applications (1)

Application Number Title Priority Date Filing Date
US66819A Expired - Lifetime US3117304A (en) 1960-11-02 1960-11-02 Matrix with reflected wave energy crosspoints

Country Status (6)

Country Link
US (1) US3117304A (en(2012))
CH (1) CH398699A (en(2012))
DE (1) DE1190983B (en(2012))
FR (1) FR1304892A (en(2012))
GB (1) GB969920A (en(2012))
NL (1) NL270943A (en(2012))

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3482227A (en) * 1966-11-25 1969-12-02 Sperry Rand Corp Common mode choke for plural groups of memory array drive-return line pairs
US4310816A (en) * 1979-05-14 1982-01-12 Sanders Associates, Inc. Dispersive delay lines

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2795775A (en) * 1955-07-01 1957-06-11 Itt Pulse repetition rate selector
US2907000A (en) * 1955-08-05 1959-09-29 Sperry Rand Corp Double base diode memory
US2989732A (en) * 1955-05-24 1961-06-20 Ibm Time sequence addressing system
US2991394A (en) * 1954-12-23 1961-07-04 Philips Corp Method of and apparatus for positionselection, scanning and the like

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1036319B (de) * 1956-04-03 1958-08-14 Tesla Np Schaltung einer elektronischen Reihen-Speicheranlage

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2991394A (en) * 1954-12-23 1961-07-04 Philips Corp Method of and apparatus for positionselection, scanning and the like
US2989732A (en) * 1955-05-24 1961-06-20 Ibm Time sequence addressing system
US2795775A (en) * 1955-07-01 1957-06-11 Itt Pulse repetition rate selector
US2907000A (en) * 1955-08-05 1959-09-29 Sperry Rand Corp Double base diode memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3482227A (en) * 1966-11-25 1969-12-02 Sperry Rand Corp Common mode choke for plural groups of memory array drive-return line pairs
US4310816A (en) * 1979-05-14 1982-01-12 Sanders Associates, Inc. Dispersive delay lines

Also Published As

Publication number Publication date
CH398699A (de) 1966-03-15
NL270943A (en(2012))
FR1304892A (fr) 1962-09-28
GB969920A (en) 1964-09-16
DE1190983B (de) 1965-04-15

Similar Documents

Publication Publication Date Title
US3218613A (en) Information storage devices
US3383526A (en) Current driver circuit utilizing transistors
EP0018739B1 (en) A decoder circuit for a semiconductor memory device
US3117304A (en) Matrix with reflected wave energy crosspoints
US3077591A (en) Capacitor matrix
US3710147A (en) Transistor switches for high voltage applications
US2851675A (en) Magnetic core transfer circuit
US2987625A (en) Magnetic control circuits
CA1079817A (en) Data bus arrangement for josephson tunneling device logic interconnections
US3107345A (en) Esaki diode memory with diode coupled readout
US3154763A (en) Core storage matrix
US3619642A (en) Multiphase binary shift register
US3686516A (en) High voltage pulse generator
US3496545A (en) Switching matrix
US2955211A (en) Bistable circuit
US3927365A (en) Switch operating device
US2908893A (en) Magnetic-switch cross-coupling minimization system
US3651497A (en) Dynamically terminated memory line selection scheme
US3427470A (en) Multiple level logic circuits
US3395404A (en) Address selection system for memory devices
US3484767A (en) Memory selection system
US3011074A (en) Transistor bilateral switching circuit
GB1059593A (en) Transmission line network
US3487372A (en) High-speed memory device with improved read-store circuits
US3126530A (en) Energy