US3004172A - Switch core matrix - Google Patents

Switch core matrix Download PDF

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Publication number
US3004172A
US3004172A US824505A US82450559A US3004172A US 3004172 A US3004172 A US 3004172A US 824505 A US824505 A US 824505A US 82450559 A US82450559 A US 82450559A US 3004172 A US3004172 A US 3004172A
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Prior art keywords
core
switch
current
cores
windings
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Expired - Lifetime
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US824505A
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English (en)
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Bader Edgar
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Telefunken AG
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Telefunken AG
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/06—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element
    • G11C11/06007—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit

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  • the present invention relates to a switch core matrix having cores made of magnetizable material of approximately rectangular hysteresis curves. At every kcross point of such matrix hereinafter referredr to as intersections of the columns and rows, a positive and a negative current pulse is to be produced and to be conveyed to an associated load, which load may be the row or the column wire of a storage matrix.
  • the switch core matrices known in the art have a si-ngle switch core at each intersection, and this core has an output winding connected to an associated load. A core is excited upon column and row coincidence and a positive and a negative output pulse succession is produced, providedthe output circuit contains an appreciable ohmic component besides the inductive component.
  • the impedance of a storage matrix thusr controlled by a switchv core matrix is predominantly inductive when either one of its row or its column wires is excited at about half of the current necessary yfor saturation.
  • every output switch matrix circuit (which is an input circuit lfor the storage matrix) must contain an additional ohmic resistance. Further disadvantages of the -known switch core matrices will Abe discussed later. y
  • t is another object of the invention to provide a novel and improved wiring circuit yfor the excitation Vof cores in a switch core matrix.
  • each intersection in a switch core matrix is provided with a pair of cores, whereby one core produces the positive pulse and the other one produces the negative pulse, and
  • ⁇ FIGURE 1a is acircuit diagram of a single core in a prior art switch core matrix
  • FIGURE lb is a diagram of the hysteresis curve of the core used in FIGURE la; t
  • FIGURE 1c is a diagram of the output pulse succession of the circuit shown in FIGURE la, plotted against time;
  • FIGURE 1d is another diagram of the output pulse succession of the circuit shown in FIGURE la, operated in another way than shown in FIGURE 1c, also plotted against time;
  • FIGURE Za' is a circuit diagram of apair of cores used in a switch core matrix in accordance with the present invention.
  • FIGURE 2b is a diagram showing the combined hysteresis loops of the cores shown in FIGURE 2a;
  • FIGURE 2c is a diagram showing the output of the circuit shown in FIGURE 2a, plotted against time;
  • FIGURE 3 illustrates schematically a switch core matrix in accordance with the invention
  • FIGURE 4a illustrates schematically a modified switch core matrix in accordance with the invention
  • FIGURE 4b shows the winding circuits on a pair of cores used in a switch core matrix as shown in FIG- f URE 4a; t
  • FIGURE ⁇ 5 shows an arrangement of the output circuits o-f the pairs of cores shown in'FIGURE 4a, to attenuate noise pulses.
  • W is an output winding of a switch core K, said winding being connected in series with an inductance L and an additional ohmic resistor R.
  • the core K may be biased magnetically by means of a current iv owing through a winding Wv connected to an -appropriate voltage source.
  • the core is thus pre-saturated, as indicated Iby O in FIGURE 1b. f
  • this ratio shall have at least a value of a- 2 i 2 t1 3 5 the total ux between saturation AI 1
  • die pulse width ratio is the flux difference between saturation of the switch cores is to be four times (or six times) the ilux A1111 requiredq to satisfy the power requirement of the inductive load L. This rule for proportioning the core circuits results in a considerable increase of the primary driving power and in a considerable increase in the height of the disturbance pulses.
  • the irreversible branches of the hysteresis loop have a nite slope.
  • the hysteresis loss current increases from ih to h during the time of a positive current pulse (when the flux changes by AI 2.
  • the current in the winding W decreases from I2 to 12.
  • the latter decrease is the greater the higher the ilux variation A1 2 during this time interval t1.
  • a I 2 is three times (five times) the nx A111 required by the inducance L when the pulse width ratio is The thus produced slope of the output pulse is very undesirable because of the very narrow tolerance of half of the excitation current for a storage matrix.
  • every core is designed in such a manner, that it becomes demagnetized completely upon every positive current pulse and it will be re-magnetized upon the following negative current pulse.
  • FIGURE ld shows the secondary current i2 through the inductive load L during the time of one cycle.
  • the magnetization of the core is shifted into the reverse branch of the hysteresis loop designating the saturation of the core.
  • the current in the inductance L fades out from I2 (or, more exactly, from 12') in accordance with an exponential function having the time constant L/R.
  • the current is almost zero and the core has a saturation indicated at '7.
  • the primary current i1 is shut olf.
  • the magnetization of the core is shifted to point 4 of the hysteresis loop, and it produces the ilux Aol, whereby a current I2 ows through the inductive load L.
  • the remaining ux AQ. equals the ux A P2.
  • the negative current pulse has a width equal to the width of the positive current pulse.
  • the current again fades out along exponental function in the inductive load and, after approximately L aelias a magnitude of about zero.
  • FIGURE 2a a core circuitthereof and the diagrams of FIGURES 2c and 2b illustrate its mode of operation.
  • InFIGUR'E 2a, KI and KII are two cores positioned at yeach intersection of a switch core matrix.
  • the input excitation windings are not shown, but their eifect will be described explicitly in the following.
  • the output windings WT and WII are connected .in series.
  • Each core is provided with a premagnetization winding and primary excitation windings (not shown), An example of a complete circuit will be explained with reference to FIGURE 4b; it will be understood, however, that the means to produce particular fluxes, as called for in the following, can
  • the exciter currentr i1 of the core KI is turned off and the exciter current i1, for the core KH is turned on.
  • the ilux A 1 3 2Ad necessary toreverse the current in the inductiver loadcL from +12 to -I2.
  • the core KI produces the flux NPH-Ala2* and attenuates thereby the current +12 causing a current -I20 to ow through the inductance (dashed lines in FIG- URES 2b and,2c).
  • the core KH only needs to produce a ux of Adr-no2* to negatively increase the current in the inductance L from -120 to 12, whereby the magnetization of the core K11 is shifted to point 5 of the hysteresis loop.
  • the core KH After the time interval t2 has elapsed, the core KH has a magnetization indicated by point 6 and the current i1 of the core KII is turned off.
  • the core KH returns directly to saturation point O and the negative current pulse obtains a steep trailing edge, as shown'in FIGURE 2c.
  • the core KH is proportioned only yto produce a flux Aol.
  • the pulse width ratio amounts to and the trailing edge of the negative current pulse slopes down steeply and the slope does not follow a relatively slow exponential function having a time constant of L/R.
  • FIGURE 3 shows n-m arrangements, are shown in FIG. URE 2a.y Furthermore, there are provided n electronic timing switches S21, S22, Szm, adapted to turnon and off the current in column excitation wires 311, 31H; 321, 32H; 31,1, 31,11, respectively. These column wires pass throughthe cores, as shown, and it is to be understood that they have appropriate windings connected inseries to excite the said wires.
  • Line wire 31I, 321 K. 3,11 terminate at va common conductor 41 which is connected to the negative terminal 46 of a voltage source via an electronic time switch SI, while column wires 31H, 3211, 31,11 terminate 'at a common conductor 42 which is also connected to the negative terminal 46 of the said voltage source.
  • diode DzlI Dzln DzzI Dzn DznIs Dann NSI-e9 tively.
  • the wire 31I is connected in series with the diode D211 -and ywith the switch S1
  • the wire 3111 is connected in series with the diode D5111 and with the switch S11, while these two series circuits are connected in parallel and are further connected in series with the electronic switch S5, the latter being connected to a positive terminal 47 of the voltage source via a conductor 43.
  • the cores K111, K211 to K111 ⁇ 11 are passed by a common row wire 511, cores K121, K221, to K11121 are penetrated by a common row wire 521 and, correspondingly, cores K151, K2111 to K111111 are penetrated by a common wire 5111. Cores forming the in-between rows are correspondingly penetrated by common wires. Furthermore, cores K1111, K2111 to K11111I are penetrated by a common row wire 5111 connected to wire 511; cores K1211, K2211 to 1(1112114 are penetrated by a common row wire 5211 which is connected to wire 521.
  • the cores of the following rows are penetrated by common row wires which are, in turn, connected to the corresponding wires penetrating the cores marked with I.
  • Wires 511, 521 to 5111 are connected to a common line 44 which, in turn, is connected to line 41 and to switch S1.
  • the wires 5111, 5211 to 51111 are connected to a common line 4S which, in turn, is connected to line 42 and switch S11.
  • T-he wires 511, 5111, 521, 5211, to 5111, 5511 are connected in series with diodes D511, D5111, D521, D5211, to D551, D51111, respectively.
  • the wire 511 is connected in series with the diode D51, said wire 511 being connected with the diode D511 and these two series circuits are connected in parallel yand are further connected to the positive terminal of the voltage source via an electronic switch S51.
  • the wire 521 with diode D521 is connected in parallel to the wire 5211 with diode D5211 and both are connected in series with the switch S5211 which, in turn, is connected to the positive terminal of the voltage source.
  • the other row wires are connected correspondingly and, 4finally, wire 5111 with diode D551 is connected in parallel to the wire 51111 and the diode D51111, while both are connected to the positive terminal via an electronic switch S511.
  • core K111 and K1111, K121 and K1211 form pairs of switch cores and the entire device becomes a double-core matrix arrangement.
  • switch S1 When, for example, the core pair Km21 and K5121 1 selected by closing the switches S5111 and S52, the switch S1 is closed for a rst time interval and switch S1:1 is
  • the cores K11121 and K111211 are enengized thereby in a manner explained with reference to FIGURES 2a to 2c and, upon selection of any core pair, similar excitation will result.
  • FIGURE 4a illustrates a modification of the device shown in FIGURE 3.
  • the matrix shown has three columns and three rows, but it is to be understood that this number is in no way a limitation of the concept of the invention and any other number of columns and rows may be used, whereby the number of rows may not necessarily be equal to the number of columns.
  • Oore pairs are shown in related position and they are penetrated by common column wires 61, 62 and 63.
  • each wire pair penetrates each core of its associated row.
  • Diodes are inserted only in the row wires because the diodes in the column Wire may be omitted.
  • the designation rows and columns is arbitrary. lThus, either the row diodes orl the column diodes -in FIGURE 3 may be omitted.
  • the arrangement of FIGURE 4a has the advantage over that in FIGURE 3, that a compensation of the noise pulses can be provided, said compensation being explained more fully with reference to FIGURE 5.
  • the exact circuit of the windings for every one of the core pairs is shown in FIGURE 4b.
  • the cores are generally designated by K1111 and K11111 in general. Every core has tive windings W151,11,W151,21, W111'31, W151'41, W151151, 'and Wirtin, Wkrzn, Wirren, Wat-sn, Weten, respectively- W11111 and W151'111 are connected in series and tothe voltage source via ⁇ a switch S5111 to produce a pre-magnetization, shifting the two cores into the position of negative remanence (point 0 in FIGURE 2b).
  • windings Wkl21 and W151211 are also connected in series, but they produce fluxes in the two cores of equal magnitude but yopposite to the iluxes produced by windings W15111 and W111'111. These windings Wk121 and W151211 are inserted in the column wire which would be designated in FIGURE 4a with GIk1 controlled by switch S51, wherein k can be an integer from l to 3 and l can also be any integer from 1 to 3.
  • windings Wk121 and W111111 are connected in series, but in such a manner that winding Wk131 produces a flux of the same magnitude in the same direction of the linx produced by winding W111'21, while winding W111311 produces a flux of equal magnitude in the same direction yas the flux produced by winding W151'111.
  • the premagnetization of core Wk11 by winding W11111 is compensated to zero, while the pre-magnetization of core Kk11 by- Winding W151111 is increased towards negative saturation.
  • FIGURE illustrates how the noise pulses are cancelled which pulses are produced by the half-way excited cores of a switch core matrix in accordance with the invention.
  • 'I'his figure shows the output windings of the iirst row of the matrix shown in FIGURE 4a, W115' Wlnsn Waus, Wznsn, Wausl, W31.5H Winding Win51 is the output winding (the fifth winding according to the circuit shown in FIGURE 4b), of core Kul and is connected in'series with windings Wun of core KMU, in
  • windings W215I and W215H of cores Wgl and WmI respectively of FIGURE 4a are connected in series with output inductance L21.
  • windings WQMI and W3151'f are connected in series with output inductance L31.
  • lAll three series circuits are connected in parallel and they ⁇ are all connected in series with an inductance L1.
  • the windings of the second and third row are connected correspondingly and have series inductances L2 and L3, respectively.
  • the series circuits of the output windings and the inductive output load of each of these circuits are connected in parallel and they are connected in series with a common inductance.
  • the latter compensation inductances are designed in such a manner that, upon a current pulse therethrough, the voltage drop produced thereby equals the disturbance pulse produced in any one of the output windings of any row when the cores, as described above, are initially half-wayy excited.
  • FIGURES 4a, 4b and 5 illustrate that the switch core matrix in accordance with the present invention provides for a theoretically complete cancellation of noise pulses. Even though in practice one can reduce the lnoise currents to a fraction of their signal magnitude, the invention provides for a considerable improvement along the same line as the possible reduction of all the core columns, as outlined above.
  • a switch core matrix having intersecting column and row conductors andhaving a core circuit at each intersection of a column and a row, said core circuits each comprising a pair of permeable cores each having a substantially rectangular hysteresis loop, an output winding on each core of the pair and connected in series with means for producing first a positive and thereafter a negative pulse in a predominantly inductive load connected thereacross; 4first and second exciter windings on each core of the pair, one of the windings on each core being excited by a column conductor and the other winding on each core being excited by a row conductor; bias windconductor and the column conductor to be excited, and
  • exciter switch means successively energizing one core to produce in the output winding a pulse of one polarity and then energizing the other core of the pair to produce in its output winding a pulse of the opposite polarity.
  • a core circuit to be inserted at each column and row conductor intersection in a switch core matrix comprising 'a iirst and a second core each having a substantially rectangular hysteresis loop, bias winding means to pre-magnetize said first and said second cores, rst exciter winding means connected to a column conductor to selectively magnetize said first and said second cores in opposition to said pre-magnetization, second exciter winding means connected to a row conductor to selectively magnetize said first core in opposition to said premafgnetization and said second core in opposition to the magnetization caused by said first exciter winding means, third exciter windingfmeans actuated in positive relationship with and immediately after operation of said second exciter winding means and adapted to magnetize said first core in opposition to said magnetization caused by said first exciter winding means and to magnetize said second core in opposition to said pre-magnetization, an inductive load, first output winding means adapted to derive an output from said
  • a switch core matrix including at each column and row intersection a core circuit las set forth in claim 4, and the output winding and load circuits of each core circuit in one conductor being connected mutually in parallel; and the parallelly connected circuits being connected in series wtih a common load induetance, the common load inductance being so proportioned that the voltage drop caused by a current pulse in one of the output circuits cancels the noise pulses from the other output circuit associated with the same selected conductor.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Electronic Switches (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Coils Or Transformers For Communication (AREA)
US824505A 1958-07-03 1959-07-02 Switch core matrix Expired - Lifetime US3004172A (en)

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Application Number Priority Date Filing Date Title
DET15348A DE1142713B (de) 1958-07-03 1958-07-03 Schaltkernmatrix

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US (1) US3004172A (enrdf_load_stackoverflow)
DE (1) DE1142713B (enrdf_load_stackoverflow)
FR (1) FR1225399A (enrdf_load_stackoverflow)
GB (1) GB900780A (enrdf_load_stackoverflow)
NL (1) NL240756A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3088401A (en) * 1961-04-28 1963-05-07 Burroughs Corp Temporary information storage for high speed printers
US3413617A (en) * 1964-07-20 1968-11-26 Bell Telephone Labor Inc Waffle-iron magnetic memory access switches
US3417384A (en) * 1964-07-20 1968-12-17 Bell Telephone Labor Inc Magnetic memory

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3394357A (en) * 1963-12-13 1968-07-23 Bell Telephone Labor Inc Magnetic memory wiring organization

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2734182A (en) * 1952-03-08 1956-02-07 rajchman
US2907986A (en) * 1953-05-26 1959-10-06 Rca Corp Magnetic switch assembly

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2734182A (en) * 1952-03-08 1956-02-07 rajchman
US2907986A (en) * 1953-05-26 1959-10-06 Rca Corp Magnetic switch assembly

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3088401A (en) * 1961-04-28 1963-05-07 Burroughs Corp Temporary information storage for high speed printers
US3413617A (en) * 1964-07-20 1968-11-26 Bell Telephone Labor Inc Waffle-iron magnetic memory access switches
US3417384A (en) * 1964-07-20 1968-12-17 Bell Telephone Labor Inc Magnetic memory

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NL240756A (enrdf_load_stackoverflow)
DE1142713B (de) 1963-01-24
GB900780A (en) 1962-07-11
FR1225399A (fr) 1960-06-30

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