US3004172A - Switch core matrix - Google Patents

Description

Oct. 10, 1961 E. BADER.

SWITCH CORE MATRIX Filed July 2, 1959 4 Sheets-Sheet 1 oct. 1o, 1961 E. BADER 3,004,172

SWITCH CORE MATRIX Filed July 2, 1959 4 Sheets-Sheet 2 Oct. l0, 1961 Filed July 2, 1959 E. BADER SWITCH CORE MATRIX 4 Sheets-Sheet 3 Oct. 10, 1961 E. BADER 3,004,172

SWITCH CORE MATRIX Filed July 2, 1959 4 Sheets-Sheet 4 Jn venor:

fdyarader United States Patent() 3,004,172 y SWITCH CORE MATRIX Edgar Bader, Backnang, Germany, assignor to Telefunken G.m.b.H., Berlin, Germany Filed July 2, 1959, Ser. No. 824,505 Claims priority, application Germany July 3, 1958 n 5 Claims. (Cl. 307-88) The present invention relates to a switch core matrix having cores made of magnetizable material of approximately rectangular hysteresis curves. At every kcross point of such matrix hereinafter referredr to as intersections of the columns and rows, a positive and a negative current pulse is to be produced and to be conveyed to an associated load, which load may be the row or the column wire of a storage matrix.

The switch core matrices known in the art have a si-ngle switch core at each intersection, and this core has an output winding connected to an associated load. A core is excited upon column and row coincidence and a positive and a negative output pulse succession is produced, providedthe output circuit contains an appreciable ohmic component besides the inductive component. The impedance of a storage matrix thusr controlled by a switchv core matrix is predominantly inductive when either one of its row or its column wires is excited at about half of the current necessary yfor saturation. Thus, in the switch core matrices known per se, every output switch matrix circuit (which is an input circuit lfor the storage matrix) must contain an additional ohmic resistance. Further disadvantages of the -known switch core matrices will Abe discussed later. y

It is an object of the present invention to provide a novel and improved switch core matrix.

t is another object of the invention to provide a novel and improved wiring circuit yfor the excitation Vof cores in a switch core matrix.

It is a further object of the invention to provide a switch core matrix using cores of considerably smaller saturation ux than the ux required k'forsaturaticm of the cores in known switch core matrices. f

It is a still further object of the yinvention to reduce the power input requirements of switch core matrices.

It is another object of the invention-to reduce noise pulses in the output circuits of switch core matrices.

It is a further object of the invention to reduce the time interval between operation cycles in'switch core matrices.

It is an additional object of the invention to equalize the positive and the negative pulse lengths in `the output circuits of switch core matrices. n

It is another obiect of `the invention to improve -the shape of output pulses of a switch core matrix.

According to a primary embodiment of the invention, each intersection in a switch core matrix is provided with a pair of cores, whereby one core produces the positive pulse and the other one produces the negative pulse, and

the common output load of the two cores is almost exolusively inductive.

Still further objects and the entire scope of applicability of the present invention will become apparent from the detailed description given hereinafter; it should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments ofthe invention, `are given by way of illustration only, since various changes and modilications within `the spirit and scopegof the invention will become apparent to those skilled yin the art from this detailed description.

In the drawings:

`FIGURE 1a is acircuit diagram of a single core in a prior art switch core matrix;

Vice

FIGURE lb isa diagram of the hysteresis curve of the core used in FIGURE la; t

FIGURE 1c is a diagram of the output pulse succession of the circuit shown in FIGURE la, plotted against time;

FIGURE 1d is another diagram of the output pulse succession of the circuit shown in FIGURE la, operated in another way than shown in FIGURE 1c, also plotted against time;

FIGURE Za'is a circuit diagram of apair of cores used in a switch core matrix in accordance with the present invention;

FIGURE 2b is a diagram showing the combined hysteresis loops of the cores shown in FIGURE 2a;

FIGURE 2c is a diagram showing the output of the circuit shown in FIGURE 2a, plotted against time;

FIGURE 3 illustrates schematically a switch core matrix in accordance with the invention;

FIGURE 4a illustrates schematically a modified switch core matrix in accordance with the invention;

FIGURE 4b shows the winding circuits on a pair of cores used in a switch core matrix as shown in FIG- f URE 4a; t

FIGURE `5 shows an arrangement of the output circuits o-f the pairs of cores shown in'FIGURE 4a, to attenuate noise pulses.

Referring in detail to the drawings, in lFIGURE 1a, W is an output winding of a switch core K, said winding being connected in series with an inductance L and an additional ohmic resistor R. The core K may be biased magnetically by means of a current iv owing through a winding Wv connected to an -appropriate voltage source. The core is thus pre-saturated, as indicated Iby O in FIGURE 1b. f

Upon coincidence of the actuation of the row and the column of the matrix to which the core K pertains, a resultant current il is passing through a common winding W1 and the core K is thus energized. This current which actually is a resultant of row and column excitation overcomes the bias current iv and produces the hysteresis loss current ih 'and the secondary current i2 in the winding W. (In FIGURE lb, an equal number of windings of W, Wv and W1 is assumed.) In order to produce a current I2 in the inductive load L, the core must produce a ux kAsr=L-I2, bringing the saturation of the core up to point 2 k(See FIGURE 1b), whereby the secondary current ki2 reaches this value I2 (see FIGURE 1c). During the time interval of a positivecurrent pulse in the winding W1, i.e., during the time from the initiation of a current ow in W1 until the current i1 is turned off (interval t1 in FIG- URE lc) the core must supply a flux AI 2=I2-R-t1 in kin the load and to produce a current of equal magnitude but of opposite polarity: 12. The remaining flux A I 4=l2-Rt2 produces the energy loss in the resistance R during the timeof the negative current ilow 12. This remaining flux Ao, thus determines the length of the time interval t2 of the negative current pulse. n When the magnetic condition of the core reaches pointk 6 on the hysteresis loop, the current fades along an exponential function in timey containing the time constant L/R. This effects an undesired prolongation of the duration of the cycle of the entire system by approximately three times the time constant value L/R.

With A1I 1=L-l2 and Ad 2=I2Rt1, there is obtained for the time interval t1 the equation A I 2 L Patented Oct. l0, 1961` The time interval t2 can be calculated from A1=LI2 and This results in t2,

AI 2 L L t2= n 1 1 1 R=t1 R In other words, in such an arrangement as shown in FIGURE la, the time interval t2 of the negative current pulse is always shorter than the time interval t1 of the positive current pulse, and the diierence is precisely the amount of the time constant L/R. The ratio of these pulse widths is given by It is therefore necessary, for such arrangements, that a nite resistance R be used in order to make it possible to obtain `a negative pulse.

If, for example, this ratio shall have at least a value of a- 2 i 2 t1 3 5 the total ux between saturation AI 1|A1I 2 must be twice (or three times) the value of the flux ZAPl, necessary solely for the purpose of reversing the current in the indutance L from +12 to 12. In other words, if

is required, 50% of the entire ilux changes produced by the core is aloss. If f rent v,'only a row current or a column current 1/2.Y Thls occurs when the column to which the particularV core pertains is selected but not the row, or vice versa. The ratio Ls/L also determines the noise current in the secondary windings. But with a given magnetic material being used for a core,

All

*. NLB

where the total ilux A IJ=AI 1+A I 2- Furthermore, the current eliiciency as Well as the current I2 itself are predetermined, so that LB-A I Thus, the larger the total ux of the switch core, the larger must be the power delivered by the pnmary driving stages. This power is determined by the product of the maximum voltage and the maximum current at a given time for the current increase. Also, the larger the total ilux of the switch core, the higher will be the secondary noise current pulses which the half-excited cores supply to the corresponding row or column Wires of the storage matrix. Y

If die pulse width ratio is the flux difference between saturation of the switch cores is to be four times (or six times) the ilux A1111 requiredq to satisfy the power requirement of the inductive load L. This rule for proportioning the core circuits results in a considerable increase of the primary driving power and in a considerable increase in the height of the disturbance pulses.

The irreversible branches of the hysteresis loop have a nite slope. Thus, the hysteresis loss current increases from ih to h during the time of a positive current pulse (when the flux changes by AI 2. At the same time, the current in the winding W decreases from I2 to 12. The latter decrease is the greater the higher the ilux variation A1 2 during this time interval t1. In the example above, A I 2 is three times (five times) the nx A111 required by the inducance L when the pulse width ratio is The thus produced slope of the output pulse is very undesirable because of the very narrow tolerance of half of the excitation current for a storage matrix.

In another mode of operation of a known switch core matrix, having but one switch core at each of its intersections, every core is designed in such a manner, that it becomes demagnetized completely upon every positive current pulse and it will be re-magnetized upon the following negative current pulse.

FIGURE ld shows the secondary current i2 through the inductive load L during the time of one cycle. In a manner similar to the mode of operation explained above, a flux AII 1=LI2 is produced rst by the core upon a coincidence of row and column excitation. This is to produce a current I2 in the inductive load L. During the time interval t1 of the positive current pulse, the core nirst changes its magnetization along the irreversible branch of its hysteresis loop up to point 3, thereby producing a ux A I 2=I2'R-t. Thereafter, still during a portion of the interval t1, the magnetization of the core is shifted into the reverse branch of the hysteresis loop designating the saturation of the core. During the latter portion of the time interval t1, the current in the inductance L fades out from I2 (or, more exactly, from 12') in accordance with an exponential function having the time constant L/R. After a time period which is approximately 3L/R, the current is almost zero and the core has a saturation indicated at '7. At that time, the primary current i1 is shut olf. As a result, the magnetization of the core is shifted to point 4 of the hysteresis loop, and it produces the ilux Aol, whereby a current I2 ows through the inductive load L. The remaining ux AQ., equals the ux A P2. Thus, in this mode of operation,

the negative current pulse has a width equal to the width of the positive current pulse. Upon a magnetization indicated by 6 in the hysteresis loop, the current again fades out along exponental function in the inductive load and, after approximately L aelias a magnitude of about zero.

As one can see from this second mode of operation of a device as shown in FIGURE la, there is a loss in time of about cycle here is even longer than in the iirst mode of operation, as explained above. Or, when in the second mode of operation, the cycle equals the cycle ofthe iirst mode driving stage power and higher disturbance pulses from a half-way excited core and, furthermore, there would be a steeper slope of the output pulse at the beginning thereof. f f

Turning now to the matrix in accordance with the present invention, there is shown in FIGURE 2a a core circuitthereof and the diagrams of FIGURES 2c and 2b illustrate its mode of operation. InFIGUR'E 2a, KI and KII are two cores positioned at yeach intersection of a switch core matrix. There are two output windings WI and WU, each positioned on one core. The input excitation windings are not shown, but their eifect will be described explicitly in the following. The output windings WT and WII are connected .in series. Each core is provided with a premagnetization winding and primary excitation windings (not shown), An example of a complete circuit will be explained with reference to FIGURE 4b; it will be understood, however, that the means to produce particular fluxes, as called for in the following, can

,be carried out with conventional windings positioned on a core. An inductance L is connected in series with the windings WI and WH. have the magnetization indicated with O in FIGUREr 2b. During the time interval t1, incident to the occurrence of the positive current pulses inthe excitation windings occurring upon line and row coincidence, the total excitation current ifor the cores shifts the ux in the core KI by A11 1=LI2, thereby inducing a current I2 in the winding WI to ow through the inductance load L. During the time interval t1, the core KI has its magnetization shifted frompoint 2 to point 3, whereby a ilux A I 2*=I2r't1- is produced tocover the energy losses of the ohmic resistance r of the windings, themselves, which cannot be avoided. After the time interval t1 has elapsed, the exciter currentr i1 of the core KI is turned off and the exciter current i1, for the core KH is turned on. 'Both of the cores produce the ilux A 1 3=2Ad necessary toreverse the current in the inductiver loadcL from +12 to -I2. The core KI produces the flux NPH-Ala2* and attenuates thereby the current +12 causing a current -I20 to ow through the inductance (dashed lines in FIG- URES 2b and,2c). Thus, the core KH only needs to produce a ux of Adr-no2* to negatively increase the current in the inductance L from -120 to 12, whereby the magnetization of the core K11 is shifted to point 5 of the hysteresis loop. During the time interval 12:11 of the negative current pulse, the energy loss ofv the windings having the inherent resistance r is produced by a ilux change of lnd 4i1=lnl 2iil=|l2|-r-l2. After the time interval t2 has elapsed, the core KH has a magnetization indicated by point 6 and the current i1 of the core KII is turned off. The present iiux IA 11|=LII2I is just suilcient -to reduce the current I2 in the inductance L to` zero. In other words, the core KH returns directly to saturation point O and the negative current pulse obtains a steep trailing edge, as shown'in FIGURE 2c.

' In the Ifollowing, the two devices shown in FIGURES 1a and 2a are being compared.

(l) In an arrangement using two cores, the core KI (FIGURE 2a) is proportioned to merely produce a lux diiference Adri-hof, the latter sum exceeding the llux Aol, desired by the inductive load only by an amount A I 2*.=I2r-t1, due to the unaviodable energy loss inthe windings. y The core KH is proportioned only yto produce a flux Aol. Thus, the ux to be produced by the two cores totals 2AI 1+Ad 2i This sum is considerably smaller than the ux A I 1+ALI 2 to be produced by the single core of FIGURE la. In the assumed example, employing a single core, the required flux MoH-Mgr", where rg and, therefore, A I 2ii=0, is theoretically only 50% (or 33%), practically 60% (or 40%) of the required flux The bias causes both cores to 6 M11--i\ 2=4zl i 1y (or 6A1I 1) of one core in the present arrangement, if the ratio of the puse width i 2:2 o, i)

Consequently, 4ifa double-core arrangement is used, the switching power to be produced by the primary rdrivlng stage and the secondary .disturbance pulses of semi-excited cores are considerably smaller than they are in a single core arrangement, because the said power and the `said disturbance pulses increase with the total flux change of a core. y

This advantage shows oi particularly where the operation takes place wit-h a high current` eciency factor. of 212/11 which, in turn affects the driving power requirements. f n n (2) During the time interval t1,`the magnetization of the core KI of a double core arrangement merely shifts bythe small amount of A I2*=I2rt1 on the irreversible branch of the hysteresis loop having a iinite slope. Thus, the slope of the current kduring this interval t1 is considerably reduced as compared with the corresponding slope when a single core arrangement is used, wherein the long portion A b2=I2rl1=3A I l (or 5A I 1), on the irreversible branch of the hysteresis loop is required to be covered during the time interval t1.

(3) When a double core arrangement is used, the pulse width ratio amounts to and the trailing edge of the negative current pulse slopes down steeply and the slope does not follow a relatively slow exponential function having a time constant of L/R.

The time of one cycle totals only t1+t2=2t1, which is Having now fully disclosed the salient element used in the present invention, examples of complete arrangementsy thereof are being explained in the following with reference to FIGURES 3, 4a and 4b.

In FIGURE 3, there are illustrated m= lines and n rows of a switch core matrix having pairs kof cores Kul, Kun; KizI, Kizn L, Klar, Kinn; Kzil, Kzin K221i Kzzn 1111! mnl Every core is provided with a bias winding connected to an appropriate voltage source similar to the winding WV, shown lin FIGURE 1. Every core is further providedwith a pickup Winding corresponding to the winding W, shown in FIGURES 1a and- 2a. Pickup windings of corresponding cores are connected in series, as shown with the windings WI and Wn, as shown in FIG- URE 2a.

FIGURE 3 shows n-m arrangements, are shown in FIG. URE 2a.y Furthermore, there are provided n electronic timing switches S21, S22, Szm, adapted to turnon and off the current in column excitation wires 311, 31H; 321, 32H; 31,1, 31,11, respectively. These column wires pass throughthe cores, as shown, and it is to be understood that they have appropriate windings connected inseries to excite the said wires. Line wire 31I, 321 K. 3,11 terminate at va common conductor 41 which is connected to the negative terminal 46 of a voltage source via an electronic time switch SI, while column wires 31H, 3211, 31,11 terminate 'at a common conductor 42 which is also connected to the negative terminal 46 of the said voltage source. Every one of the wires has inserted diode DzlI: Dzln DzzI Dzn DznIs Dann NSI-e9 tively. It will be appreciated that, for example, the wire 31I is connected in series with the diode D211 -and ywith the switch S1, and the wire 3111 is connected in series with the diode D5111 and with the switch S11, while these two series circuits are connected in parallel and are further connected in series with the electronic switch S5, the latter being connected to a positive terminal 47 of the voltage source via a conductor 43. The cores K111, K211 to K111`11 are passed by a common row wire 511, cores K121, K221, to K11121 are penetrated by a common row wire 521 and, correspondingly, cores K151, K2111 to K111111 are penetrated by a common wire 5111. Cores forming the in-between rows are correspondingly penetrated by common wires. Furthermore, cores K1111, K2111 to K11111I are penetrated by a common row wire 5111 connected to wire 511; cores K1211, K2211 to 1(1112114 are penetrated by a common row wire 5211 which is connected to wire 521.

The cores of the following rows are penetrated by common row wires which are, in turn, connected to the corresponding wires penetrating the cores marked with I. Wires 511, 521 to 5111 are connected to a common line 44 which, in turn, is connected to line 41 and to switch S1. Correspondingly, the wires 5111, 5211 to 51111 are connected to a common line 4S which, in turn, is connected to line 42 and switch S11.

T-he wires 511, 5111, 521, 5211, to 5111, 5511 are connected in series with diodes D511, D5111, D521, D5211, to D551, D51111, respectively.

Thus, the wire 511 is connected in series with the diode D51, said wire 511 being connected with the diode D511 and these two series circuits are connected in parallel yand are further connected to the positive terminal of the voltage source via an electronic switch S51. Correspondingly, the wire 521 with diode D521 is connected in parallel to the wire 5211 with diode D5211 and both are connected in series with the switch S5211 which, in turn, is connected to the positive terminal of the voltage source. The other row wires are connected correspondingly and, 4finally, wire 5111 with diode D551 is connected in parallel to the wire 51111 and the diode D51111, while both are connected to the positive terminal via an electronic switch S511.

It will be appreciated that there are two matrices of cores which correspond to each other. Thus, core K111 and K1111, K121 and K1211 form pairs of switch cores and the entire device becomes a double-core matrix arrangement.

When, tfor example, the electronic column switch S517n is closed, column mis selected and, furthermore, when electronic switch S52 is closed, the second row is selected and the core pair K11121 and 1(111211 may be energized. This is caused by closing the switch S1 for the time of a positive current pulse and by closing the switch S11 for the time of a negative current pulse. Upon closing switch S11, the switch S1 is opened simultaneously. The switches S1 and S11 thus energize those cores which were selected by any of the switches S51 to S5m and by any one of the switches S51 to S511. The diodes avoid the excitation of the cores of group II during the positive current pulse and the excitation of the cores of group I during the negative currentV pulse via shunt paths. Considering, for example, the case discussed above, wherein the switch S52 was closed for selecting row 2, and wherein for the time of the positive current pulse switch S1 was closed. Thus, there was flowing a current through the wire 521. The switch S11 -was still open, because no current is supposed to ow through the wire 5211 during the time of a positive pulse. However, suppose diode D5111 were not there, a current would flow from the positive terminal via closed switch S52, wire 5211, wire 5111, wire S11, line 44, closed switch S1 to the negative terminal. Similar parallel currents could-flow through all other wires of group II if the diodes were omitted. Thus, without diodes, there would be a strong excitation' of the cores in group II during the time of a positivek pulse, even if the switch S11were open. 'i

When, for example, the core pair Km21 and K5121 1 selected by closing the switches S5111 and S52, the switch S1 is closed for a rst time interval and switch S1:1 is

closed immediately thereafter for a second time interval of a length equal to the tirst time interval. The cores K11121 and K111211 are enengized thereby in a manner explained with reference to FIGURES 2a to 2c and, upon selection of any core pair, similar excitation will result.

FIGURE 4a illustrates a modification of the device shown in FIGURE 3. For the sake of facilitation, the matrix shown has three columns and three rows, but it is to be understood that this number is in no way a limitation of the concept of the invention and any other number of columns and rows may be used, whereby the number of rows may not necessarily be equal to the number of columns. Oore pairs are shown in related position and they are penetrated by common column wires 61, 62 and 63.

There are three pairs of row wires 711, 7111; 721, 7211; 731, 7311; and each wire pair penetrates each core of its associated row. However, the iluxes produced in each core by dierent wires oppose one another. Diodes are inserted only in the row wires because the diodes in the column Wire may be omitted. It is to be understood that, in a given matrix, the designation rows and columns is arbitrary. lThus, either the row diodes orl the column diodes -in FIGURE 3 may be omitted. The arrangement of FIGURE 4a has the advantage over that in FIGURE 3, that a compensation of the noise pulses can be provided, said compensation being explained more fully with reference to FIGURE 5.

The exact circuit of the windings for every one of the core pairs is shown in FIGURE 4b. The cores are generally designated by K1111 and K11111 in general. Every core has tive windings W151,11,W151,21, W111'31, W151'41, W151151, 'and Wirtin, Wkrzn, Wirren, Wat-sn, Weten, respectively- W11111 and W151'111 are connected in series and tothe voltage source via `a switch S5111 to produce a pre-magnetization, shifting the two cores into the position of negative remanence (point 0 in FIGURE 2b). The windings Wkl21 and W151211 are also connected in series, but they produce fluxes in the two cores of equal magnitude but yopposite to the iluxes produced by windings W15111 and W111'111. These windings Wk121 and W151211 are inserted in the column wire which would be designated in FIGURE 4a with GIk1 controlled by switch S51, wherein k can be an integer from l to 3 and l can also be any integer from 1 to 3. The windings Wk121 and W111111 are connected in series, but in such a manner that winding Wk131 produces a flux of the same magnitude in the same direction of the linx produced by winding W111'21, while winding W111311 produces a flux of equal magnitude in the same direction yas the flux produced by winding W151'111. Upon closure of switches S51 and S1 during a positive pulse, the premagnetization of core Wk11 by winding W11111 is compensated to zero, while the pre-magnetization of core Kk11 by- Winding W151111 is increased towards negative saturation.. If both switches S511 and S51 are closed upon coincidence of row yand column for selecting core pair K1111fand K11111, the magnetization of core K1511is reversed and shifted into positive saturation. Thereby, a pulse is produced in an output winding W151,1 and in its load L51 which is an associated column or row wire of a storage matrix (not shown.) The fourth windings W15111 and W151411 are connected in parallel but in such a manner, as to oppose the liuxes produced by windings W15131 and W111'311. Upon. a negative current pulse, switches S51 and S11 are closed and the core K1511 is shifted even more into negative saturation. While in the second core KMU, the pre1 magnetization produced by winding W1511111 is cancelled to zero. Switch S515 is still closed, thus, core K1511 remainsv negatively saturated. The magnetization of core K15111 is shifted to positive saturation, whereby an output pulse is produced in winding W111511, connected in series with winding WkLI. Due to the direct series connection of the windings Wkl'z and Wkl'zn, the noise pulses compensate each other in the fifth windings, which are connected to produce oppositely directed pulses. The noise pulses occur, due `to the slight slope of the saturation branches of the hysteresis loop of half-way excited cones.

FIGURE illustrates how the noise pulses are cancelled which pulses are produced by the half-way excited cores of a switch core matrix in accordance with the invention. 'I'his figure shows the output windings of the iirst row of the matrix shown in FIGURE 4a, W115' Wlnsn Waus, Wznsn, Wausl, W31.5H Winding Win51 is the output winding (the fifth winding according to the circuit shown in FIGURE 4b), of core Kul and is connected in'series with windings Wun of core KMU, in

f a manner also shown in rFIGURE 4b. These two windings are connected with output inductance L11. Accordingly windings W215I and W215H of cores Wgl and WmI respectively of FIGURE 4a are connected in series with output inductance L21. Thus, windings WQMI and W3151'f are connected in series with output inductance L31. lAll three series circuits are connected in parallel and they `are all connected in series with an inductance L1. The windings of the second and third row are connected correspondingly and have series inductances L2 and L3, respectively.

Thus, in every one of the three rows of a matrix, the series circuits of the output windings and the inductive output load of each of these circuits are connected in parallel and they are connected in series with a common inductance. L1, L2, L3. The latter compensation inductances are designed in such a manner that, upon a current pulse therethrough, the voltage drop produced thereby equals the disturbance pulse produced in any one of the output windings of any row when the cores, as described above, are initially half-wayy excited.

The examples shown in FIGURES 4a, 4b and 5 illustrate that the switch core matrix in accordance with the present invention provides for a theoretically complete cancellation of noise pulses. Even though in practice one can reduce the lnoise currents to a fraction of their signal magnitude, the invention provides for a considerable improvement along the same line as the possible reduction of all the core columns, as outlined above.

I claim:

1. In a switch core matrix having intersecting column and row conductors andhaving a core circuit at each intersection of a column and a row, said core circuits each comprising a pair of permeable cores each having a substantially rectangular hysteresis loop, an output winding on each core of the pair and connected in series with means for producing first a positive and thereafter a negative pulse in a predominantly inductive load connected thereacross; 4first and second exciter windings on each core of the pair, one of the windings on each core being excited by a column conductor and the other winding on each core being excited by a row conductor; bias windconductor and the column conductor to be excited, and

exciter switch means successively energizing one core to produce in the output winding a pulse of one polarity and then energizing the other core of the pair to produce in its output winding a pulse of the opposite polarity.

4. A core circuit to be inserted at each column and row conductor intersection in a switch core matrix, comprising 'a iirst and a second core each having a substantially rectangular hysteresis loop, bias winding means to pre-magnetize said first and said second cores, rst exciter winding means connected to a column conductor to selectively magnetize said first and said second cores in opposition to said pre-magnetization, second exciter winding means connected to a row conductor to selectively magnetize said first core in opposition to said premafgnetization and said second core in opposition to the magnetization caused by said first exciter winding means, third exciter windingfmeans actuated in positive relationship with and immediately after operation of said second exciter winding means and adapted to magnetize said first core in opposition to said magnetization caused by said first exciter winding means and to magnetize said second core in opposition to said pre-magnetization, an inductive load, first output winding means adapted to derive an output from said iirst core, and second output winding means connected in series with said first output winding means through sad load and adapted to derive an output from said second core, said output windings producing successive positive and negative pulses in said inductive load.

5. A switch core matrix including at each column and row intersection a core circuit las set forth in claim 4, and the output winding and load circuits of each core circuit in one conductor being connected mutually in parallel; and the parallelly connected circuits being connected in series wtih a common load induetance, the common load inductance being so proportioned that the voltage drop caused by a current pulse in one of the output circuits cancels the noise pulses from the other output circuit associated with the same selected conductor. f

References Cited in the file of this patent UNITED STATES PATENTS

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