US2979695A - Comparator device - Google Patents
Comparator device Download PDFInfo
- Publication number
- US2979695A US2979695A US827650A US82765059A US2979695A US 2979695 A US2979695 A US 2979695A US 827650 A US827650 A US 827650A US 82765059 A US82765059 A US 82765059A US 2979695 A US2979695 A US 2979695A
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- US
- United States
- Prior art keywords
- potential
- signal
- transistor
- magnitude
- negative
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-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
- H04Q1/18—Electrical details
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/02—Comparing digital values
Definitions
- the subject invention relates to comparator devices and, more specificallyflto a comparator device of the type which produces an output signal only upon the simultaneous application of two binary code group signals having thesame polarity bits occupying the same respective positions within the groups
- comparator devices and, more specificallyflto a comparator device of the type which produces an output signal only upon the simultaneous application of two binary code group signals having thesame polarity bits occupying the same respective positions within the groups
- 'It is another object of this invention to provide an improved comparator device of the type which vwill produce an output signal only upon the simultaneous application of two binary code group signals having the same polarity bits occupying the same respective positions within the groups.
- an individual gating circuit is provided for each bit position within the binary code grou each of the typehaving first and second input terminals and first and second output terminals.
- Two binary code signal sources which may be, for example, conventional tape readers or conventional storage devices, are indicated in block form by reference numerals 1 and 2 in that thedetails of these sources form no part of this invention and may be any conventional device which is well known in the art.
- Each of binary signal sources 1 and 2 is provided with an output terminal for each bit position within the binary code group, as indicated.
- either of the two polarity bits may be selected to be the significant bits.
- the mark polarity bits will herein be assumed to be the significant bits.
- novel comparator of of these gate circuits is arranged to produce with the n coincident application to both terminals. thereof either mark or space binary signals, a ground potential signal upon both output terminals, with the coincident application to the first and second input terminals thereof amark and a space binary signal, respec terminals and a second reference potential signal having the same polarity and magnitude as the first reference potential signal in response to the presence of a ground potential signal in all of the second output circuits.
- Thcfirst and second reference potential signals are applied to the necessary circuitry for producing an output signal in response to the application thereto of. both the first and second referencepotjential signals.
- An individual gating circuit is provided" for each bit position within the binary code group signals, in this instance five, and are indicated herein by equal resistor pair 3,4 and diode pair 5,6 for the first bit position; equal resistor pair 7,8 anddiode pair 9,10 for the second bit position; equal resistor pair 11, 12 and diode pair 13, 5.4 for the third bit position;equal-resistor pair 15, 16 and diode pair 17, 18 forthe fourth bit position and equal resistor'pair'19,2tl and-diode pair,21, 22 for the fifth bit position.
- Eachofthesegating circuits is provided with first and second input terminals indicated by reference numerals 23 and 24, ,ZS'and 26,27 and 28, 29 and 3t), 31 and132, respectively, and first and second output terminals indicated by referencenumerals 67 and 68, 69 and 70, 71 and 72, 73 and 74 and 75 and 76, respectively.
- All of the output terminals 67,69, 71, ,73. and 75 are interconnected by bus 33 and are brought out to terminal 35, while; all of the other output terminals 68, 70,
- Each of the individual gating circuits previously described will produce, with the coincident application to both input terminals thereof either mar or space binary signals, a ground potential signal-upon both output terminals, with the coincident applicationto the first and second input terminals thereof a mar and La space binary signal, respectively, a positive or negative polarity potential signal, as selected, upon either output terminal and with the coincidentapplication to the first and second input terminals thereof a space and a mar 'binary signal, respectively, an opposite polarity potential signal upon the other output terminal.
- the gating circuit consisting of equal resistor pair a 3, 4 and diode pair 5, 6 will be described.
- mid-point 37 With the presence of a mark polarity bit upon both input terminals 23 and 24 thereof, mid-point 37 will be again at ground potential in that the equal and opposite signal potentials denoting the mark polarity bits, as
- bus 34 at a positive potential substantially equal in magnitude to the potential of point 37.
- the emitter 47 of transistor 43 is biased negatively by a source of negative potential 55 to a magnitude substantially equal and opposite to the magnitude of the positive potential of source 53.
- transistor 43 is not conducting.
- the potential of point 37 With traninput terminal 24 and a space polarity signal upon input terminal 23, the potential of point 37 will be negative and of amagnitude substantially one-half the magnitude of the negative potential signal selected to signify the presence of a mar polarity bit from binary signal source 1.
- This negative potential'signal present upon point 37 will forward bias diode 5 to conduction, thereby placing bus 33 at a negative potential, substantially equal in magnitude to the potential of point 37.
- bus 33 or 34 goes negative or positive, respectively, all of.
- V Connected to bus 34 through output terminal 36 is a pair of transistors 42 and 43 each having the usual base, emitter and collector electrodes indicated by reference numerals 44and 45, 46 and 47, and 48 and'49, respectively.
- transistor 38 With both buses 33 and 34 at ground potential, transistor 38 is nonconductive in that its emitter 40 is biased negativelyjfrom source of negative potential 50 to a magnitude equal to substantially one-third the maximum negativepotential which may appear on bus 33 to in sure proper operating potential relationship.
- the base 739 being at ground potential, is more positive than the emitter 40, a condition which does not satisfy the baseemitter'bias requirements for conduction through a type P-N-P transistor. Therefore, a negative reference potentialsignal is present at collector 41 of a magnitude substantially equal to the magnitude of source of supply potential 52 which may be-taken-oif point 51.
- the ground 7 potential of bus 34 is applied through terminal 36 to sistor 43 in a state of nonconduction, a second negative reference potential signal is present upon the collector 49 of a magnitude substantially equal to that of the source of supply potential 52 and may be taken oif point 56.
- the two reference signal potentials of the same polarity and magnitude, which appear at points 51 and 56, respectively, are applied to the base 66 of a typeP-N-P transistor 57 from the mid-point 58 of an equal seriesresistor pair 59 and 60.
- point 58 biases the base 66 of transistor 57 negatively in respect to the emitter 61 thereof which is biased negatively by source 62 of a magnitude substantially three-quarters of the greatest negative magnitude of the reference signal potentials.
- transistor 57 conducts and point 63 goes from a negative potential substantially equal in magnitude to that of supply potential 52 in a positive direction to a negative potential substantially equal to that of supply potential 62.
- This positive-going pulse may be taken off output terminals 64 and 65 and applied to externalequipment, not shown.
- the'ba'se 39 of transistor 38 With bus 33 at a negative potential, the'ba'se 39 of transistor 38 will be biased negatively through terminal 35 in respect to the emitter 40 inthat the magnitude of source 50 is arranged to be of a magnitude substantially onethird the magnitude of the negative potential which will appear on bus 33. As this condition satisfies the baseemitter bias requirements for conduction through'a type P-N-P, transistor 38 will begin conduction. As transistor 38 conducts, the reference potential signal of point 51 goes from a negative value substantially equal to that of supply potential 52 in a positive direction to a negative value substantially equal to that of source 50.
- This potential biases the base 45 of transistor 43 negatively in respect to the emitter 47 thereof in that the magnitude of source 55 is adjusted to be substantially equal to one-third the magnitude of that of source 52, a condition which satisfies the base-emitter bias requirements for conduction through a type P-N-P transistor.
- the reference signal potential upon point 56 goes to a negative magnitude substantially equal to that of source 55.
- the potential of point 58 is equal to substantially one-half the sum of the reference signal potentials present upon points 51 and 56.
- this potential is not great enough to forward bias transistor 57, which remains in a nonconducting condition. With transistor 57 nonconducting, the potential at point 63 remains unchanged and n0 positive-going output signal appears across output terminals 64 and 65.
- the reference signal potentials present upon points 51 and 56 will be of a negative value but of a magnitude substantially equal to that of sources 50 and 55, respectively, the magnitudes of these sources are arranged to be substantially equal to one-third the maximum negative and positive potential, respectively, which will appear on buses 33 and 34.
- These potential magnitudes are also much less negative than that of supply source 52, therefore, the potential at point 58 will not be of a negative magnitude great enough to cause conduction through transistor 57.
- the potential at point 63 remains negative and of a magnitude substantially equal to supply potential source 52, with no resulting positive-going output signal present on output terminals 64 and 65.
- biasing potentials of positive and negative polarities may be connected thereto through equal resistors 77 and 78, respectively, each of which is of a relatively high resistance value.
- VA comparator device of the type which produces an output signal only upon the simultaneousapplication of two binary code group signals having the same polarity bits occupying the same respective positions within the groups
- each of the type having first and second input terminals, first and second output terminals andwhich produces, with the coincident application to both terminals thereof either mark or space binary signals, a ground potential signal upon both output terminals, with the coincident application to the first and second input terminals thereof a mark and a space binary signal, respectively, a positive or negative polarity potential signal as selected upon either output terminal and with the coincident application to the first and second input terminals thereof a space and 21 mar binary signal, respectively, an opposite polarity potential signal upon the other output terminal; first bus means for interconnecting all of said first output terminals; second bus means for interconnecting all of said second output terminals; a first transistor device connected to said first bus means for producing a first reference potential signal having a selected polar
- a comparator device of the type which produces an output signal only upon the simultaneous application of two binary code group signals having the same polarity bits occupying the same respective positions within the groups comprisingindividual gating circuit means corresponding to each bit position within the binary code group signals to be compared, each of the type having first and second input terminals, first and second output terminals and which produces, with the coincident application to both terminals thereof either mark or space binary signals, a ground potential signal upon both output terminals, with the coincident application to the first and second input terminals thereof a mark and a space binary signal, respectively, a positive or negative polarity potential signal as selected upon either output terminal and with the coincident application to the first and second input terminals thereof a space and a mark binary signal, respectively, an opposite polarity potential signal upon the other output terminal; first bus means for interconnecting all of said first output terminals; second bus means for interconnecting all of said second output terminals; a first transistor device connected to said first bus means for producing a first reference potential signal having a selected
- a comparator device of the type which produces an output signal only upon the simultaneous application of two binary code group signalshaving the same polarity bits occupying the same respective positions within the groups comprising individual gating circuit means corresponding to each bit position within the binary code group signals to be compared, each of the type having first and second input terminals, first and second output "J terminals and which produces, with the coincident appli cation to both terminals thereof either mark or space binary signals, a ground potential signal upon both output terminals, with the coincident application to the first 7 t and second input terminals thereof a mar and space binary signal, respectively, a positive or negative polarity potential signal as selected upon either output terminal and with the coincident application to the first and second input terminals thereof a space and a mark binary signal, respectively, an opposite polarity potential signal upon the other output terminal; first bus means for interconnecting all of said first output terminals; second bus means for interconnecting all of said second output terminals; a first transistor device connected to sm'd first bus means for
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Logic Circuits (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BE503885D BE503885A ( ) | 1959-07-16 | ||
FR1106253D FR1106253A (fr) | 1951-06-06 | 1950-03-03 | Circuits comparateurs de grandeurs électriques telles que des codes de signalisation |
US213513A US2752489A (en) | 1950-03-03 | 1951-03-02 | Potential comparing device |
GB13417/51A GB730854A (en) | 1951-06-06 | 1951-06-06 | Improvements in or relating to code comparators |
DEI4298A DE884513C (de) | 1951-06-23 | 1951-06-23 | Vergleichsanordnung elektrischer Groessen |
US827650A US2979695A (en) | 1959-07-16 | 1959-07-16 | Comparator device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US827650A US2979695A (en) | 1959-07-16 | 1959-07-16 | Comparator device |
Publications (1)
Publication Number | Publication Date |
---|---|
US2979695A true US2979695A (en) | 1961-04-11 |
Family
ID=25249774
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US827650A Expired - Lifetime US2979695A (en) | 1950-03-03 | 1959-07-16 | Comparator device |
Country Status (2)
Country | Link |
---|---|
US (1) | US2979695A ( ) |
BE (1) | BE503885A ( ) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3067941A (en) * | 1956-10-06 | 1962-12-11 | Electricite De France | Apparatus for measuring the product of at least two factors and in particular for counting the consumption of electrical energy |
US3212058A (en) * | 1961-06-05 | 1965-10-12 | Sperry Rand Corp | Null dependent symbol recognition |
US3239815A (en) * | 1962-11-15 | 1966-03-08 | Alexander E Martens | Electronic security system |
US3274379A (en) * | 1963-04-15 | 1966-09-20 | Beckman Instruments Inc | Digital data correlator |
US3297986A (en) * | 1964-01-20 | 1967-01-10 | Control Data Corp | Strobed binary code comparator having an interrogation circuit which includes selectively biased diode pairs |
US3321743A (en) * | 1964-06-10 | 1967-05-23 | Northern Electric Co | Comparison circuit |
US3337849A (en) * | 1963-11-26 | 1967-08-22 | Bell Telephone Labor Inc | Matrix control having both signal and crosspoint fault detection |
US3467946A (en) * | 1962-10-25 | 1969-09-16 | Scm Corp | Binary numbers comparator circuit |
US3496539A (en) * | 1966-07-15 | 1970-02-17 | Itt | Comparator using resistor-diode logic |
US3504341A (en) * | 1967-01-20 | 1970-03-31 | Atomic Energy Commission | Shift register comparator |
US4361896A (en) * | 1979-09-12 | 1982-11-30 | General Electric Company | Binary detecting and threshold circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2752489A (en) * | 1950-03-03 | 1956-06-26 | Int Standard Electric Corp | Potential comparing device |
-
0
- BE BE503885D patent/BE503885A/xx unknown
-
1959
- 1959-07-16 US US827650A patent/US2979695A/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2752489A (en) * | 1950-03-03 | 1956-06-26 | Int Standard Electric Corp | Potential comparing device |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3067941A (en) * | 1956-10-06 | 1962-12-11 | Electricite De France | Apparatus for measuring the product of at least two factors and in particular for counting the consumption of electrical energy |
US3212058A (en) * | 1961-06-05 | 1965-10-12 | Sperry Rand Corp | Null dependent symbol recognition |
US3467946A (en) * | 1962-10-25 | 1969-09-16 | Scm Corp | Binary numbers comparator circuit |
US3239815A (en) * | 1962-11-15 | 1966-03-08 | Alexander E Martens | Electronic security system |
US3274379A (en) * | 1963-04-15 | 1966-09-20 | Beckman Instruments Inc | Digital data correlator |
US3337849A (en) * | 1963-11-26 | 1967-08-22 | Bell Telephone Labor Inc | Matrix control having both signal and crosspoint fault detection |
US3297986A (en) * | 1964-01-20 | 1967-01-10 | Control Data Corp | Strobed binary code comparator having an interrogation circuit which includes selectively biased diode pairs |
US3321743A (en) * | 1964-06-10 | 1967-05-23 | Northern Electric Co | Comparison circuit |
US3496539A (en) * | 1966-07-15 | 1970-02-17 | Itt | Comparator using resistor-diode logic |
US3504341A (en) * | 1967-01-20 | 1970-03-31 | Atomic Energy Commission | Shift register comparator |
US4361896A (en) * | 1979-09-12 | 1982-11-30 | General Electric Company | Binary detecting and threshold circuit |
Also Published As
Publication number | Publication date |
---|---|
BE503885A ( ) |
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