US2932012A - Signal phasing system - Google Patents

Description

April 5, 1960 o. A. JoRGENsEN 932912 SIGNAL PHASING SYSTEM Filed April 15, 1959 2 sheets-sheet 1 OTTO A. JORGENSEN F|G.3 Y @M599 ATTORNEY April 5, 1960 o. A. JoRGENsEN 2,932,012

SIGNAL PHASING SYSTEM Filed April 15. 1959 2 sheets-sheet 2 SIGNAL PnAsnsG SYSTEM Otto A. Jorgensen, Pittsford, N.Y., assigner to General Dynamics Corporation, Rochester, N.Y., a corporation Y of Delaware Application April 15, 1959, Serial No. 806,717 12 Claims. (Cl. 340-174) My invention relates generally to a system for phasing signals, i.e., for shifting signals into a definite relationship with respect to a particular time base.

In the past, apparatus has been provided for feeding signals occuring at random times into a system which requires that such input signals occur at regular intervals with respect to a time base. Such apparatus usually has employed a memory unit or units capable of accepting and storing each random-time input signal. The apparatus also has included means periodically operated from a clock, which defines the aforementioned time base, for applying readout signals to the memory units and thereby producing signals at the output of the apparatus which are in the required time position. Such output signals then may be applied to succeeding equipment for utilization.

The use of such apparatus presupposes that the memory units therein are capable of accepting input signals occurring at any time. However, some memory devices,

such as parametrically-excited resonators, do not have such a capability, but accept signals only when separate excitation signals are applied thereto, the memory dev vices being unresponsive to input signals applied at other times. Because the last-named type of memory devices has other features which may make their use in a signal phasing or rephasing system particularly apt, it is therefore desirable to provide a system by which randomlyoccurring signals may be written into at least one of the memory units which are capable only when excited of accepting such signals.

Accordingly, it is an object of my invention to provide a new and improved system for phasing or rephasing electrical signals.

Another object of my invention is to provide new and improved apparatus for controlling the phasing of signals wherein the memory units accept signals only upon the regular reoccurrence of exciting signals.

Another object of my invention is to provide new and improved apparatus for controlling the phasing of signals wherein the memory units accept signals only upon the application of exciting signals thereto.

Another object of my invention is to provide new and improved apparatus for phasing signals employing parametrically-excited resonators as storing units.

I accomplish these and other objects in a system having a source capable of producingV signals of uniform duration which may occur at random times. A shift register is provided having a plurality fof memory elements disposed in a series, each of the elements having a iirst signal input, an exciting input and an output, and each of the intermediate and last of the elements in the series having a second signal input. The elements of the series Vare arranged in such a manner that the output of each of the first and intermediate ones of the elements are coupled to the second signal input of the next succeeding one of the series elements. The output of the last series element also serves as an output for the register. The

2932,01? Patented Apr. 5, 1960 elements of the register are chosen to be responsive to the application of a signal to either of its signal inputs and to the exciting input for producing a signal on the output of that element only for the duration of the signal applied to the exciting input. An example of such an element is a parametrically-excited resonator, which is understood by those skilled in the art.

In order to lsupply signals to the exciting inputs of the various elements, VI provide driving means having outputs coupled to aforementioned exciting inputs of individual ones of the register elements and effective for supplying thereover signals in regularly recurring sequence, starting at the first of the register elements and proceeding element by element vthrough the register to the last. Each such exciting signal produced by the driving means slightly overlaps in time the exciting signals occuring immediately before and thereafter and the lastoccurring exciting signal in each frame overlaps in time the first-occurring signal in the nextl frame. Each exciting signal is the same or greater duration as the signals supplied by the aforementioned random time signal source. With this arrangement, any signal occurring (i.e.,

an information bit stored) in one of the elements is advanced from that element through the succeeding element in series and ultimately is produced at the register output as a useful signal in synchronism with the regularly occurring exciting signal applied to the'last element of the series.

In order to provide an input signal for any one of the elements, I furnish a plurality of signal producing means which correspond in number to the number of elements in the register. Each signal producing means is operative for generating signals in coincidence with the signals applied to the exciting input of the element to which the individual signal producing means corresponds. A plurality `of gates, each of which is individual to one of the signal producing means and register elements are provided, each gate being used for coupling the corresponding signal producing means to the first signal input of the next succeeding memory element in the aforementioned series. Each gate has a control input and is operative only in response to the application of a signal thereto for passing signals from its signal producing means to its register element. v

In order to control the gates, and therefore the admission of signals to the various register element inputs, I provide means for coupling the random time signal source to the control inputs of all the aforementioned gates. With this arrangement, a randomly-occuring signal applied to the control input of any one of the gates must occur in a time position which corresponds to the time position of at least one of the signals applied to the exciting inputs of the register elements. Therefore, an information bit is inserted at that time within one of the register elements and subsequently is advanced toward and arrives at the register output in coincidence with the excitation of the last element within the register. This rephased signal, occurring only when the last register element is excited, can thereafter be utilized within other, succeeding equipment. Y

In the description of the preferred embodiment of my invention which follows, reference is made to the drawings attached to' and forming a part of the present speciii- The memoryiunits or elements used in the preferred June, 1955. In order to simplify thevdescription of theV preferred embodiment of my invention, which employs many such resonators, I next describethe operation of a single parametrically-excited resonator, it being understood that allV resonators later referred to in this description function 'in substantially the same manner.

Fig. l shows a parametrically-excited resonator. A tank circuitin the resonatorV includes an inductance element consisting of series-connected, substantially electrically-equal windings 1a and 2a of transformers 1 and 2, respectively, and capacitor 3 coupled in parallel with the inductive element. ACapacitor 3 and the inductance element are chosen to make the tank circuit resonate at a particular frequency.

In order to excite the tank circuit, means including continuously operating generator 13 coupled in series with a blocking capacitor is connected through exciting signal input terminal 6 to the transformer 1 and 2 secondary windings 1b and 2b, which are substantially equal to each other in the electrical sense and are connected in series opposition with respect to windingsY 1a and 2.a. Generator 13 is selected so that its output signal is twice the resonant frequency of the above-described tank. Tne tank circuit exciting means also includes series-connected battery 12 and variable resistor 11 coupled in series with windings 1b and 2b, the direct current llow from battery 12 being adjusted to the point where the flux density in the cores of transformers 1 and 2 is just less than saturation. With this arrangement, the small, periodic changes in current within windings 1b and 2b of transformers 1 and 2 caused by generator 13 are effective for repeatedly driving the cores of transformers 1 and 2 between nonsaturated and saturated conditions, so that the inductance presented by windings 1a and 2a changes at frequency of the signals produced by generator 13. Since windings 1b and 2b are connected in opposition to each other with respect to windings 1a and 1b, no signal from generator 13 is detectable across the aforementioned tank and output terminal 7, which is connected across the tank. In the absence of an external signal applied across the aforementioned tank, the tank circuit does not resonate under the influence of signals applied to its excitation input from generator 13.

In order to start production of a signal in the parametrically-excited resonator, a plurality of signal inputs, such as terminal 4 and series-connected resistor 8, are provided. A momentary, ground-referenced signal of frequency substantially equal to the resonant frequency of the tank circuit from a source (not shown) applied to terminal 4 is coupled to the tank circuit by resistor 8.

resonator. It is to be seen, at the left-hand end of the Fig. 3h signal curve, that the small resonant frequency signal cross the tank circuit and resonator output, which occurs when a resonant frequency signal is applied to terminal 4, is built up within the tank circuit to 4a maximum upon and subsequent to the occurrence of the exciting signal on terminal 6. The output signal is thereafter maintained at the maximum level until the Fig. 3b exciting signal is removed from terminal 6, and, upon the disappearanceofr the exciting signal,.the output' signal decays'to zero.

Before leaving the consideration of the individual parametrically-excited resonator, it is pointed out that the resonator is bistable in the sense that it is capable of producing either first or second signals which are 180 degrees out-of-phase with each other when the phase of the input signal is regularly related to the phase of the exciting signal. The phase of the output signal appearing at terminal 7 (Fig. 3h) is the same phase as the input signalapplied to terminal 4 (Fig. 3f). In Fig. 3f, the solid and broken signal curves represent rst and second possible output signals at terminal 7. Thus, it is to be seen that by selectively applying to terminal 4 signals in 0 or 1r phase with reference to each other (represented by solid and broken lines, respectively), 0 or rr phase signals can be taken off at the output. It is this bistable characteristic which makes the parametrically-excited resonator par-y Y ticularly suited to my invention which is described below.

If no exciting signal is being applied to the tank circuit when a start signal is applied to terminal 3, the resonant frequency signal within the tank decays to zero subsequent to the removal of the start signal from terminal 4. However, application of a resonant frequency signal to terminal 4 when an exciting signal is present on terminal 6 causes a signal to be built up within the tank circuit by virtue of the above-described changes in the value of the tankA circuit inductive element. This built-up signal directly coupled' to the'resonator output, which includes terminal 7, is continued subsequent to the removal of thev start signal from-terminal 4 anduntilthe excitingy signal is removed from terminal 4.

The relationship among input, exciting, and output signals is best demonstrated by comparing Figs. 3b, 3f vand 3h which may be considered to represent the exciting and input signals applied to terminals 6 and 4 and the output signal measured at terminal 7, respectively, of the Fig. 1

In the description which follows, the 0 and 1r phase signals may be considered as 0 and l outputs, respectively, of each parametrically-excited resonator.

In order to simplify the Fig. 4 schematic drawing of the system representing my invention and the description thereof, each of the several parametrically-excited resonators is represented by a circle, it being understood that all resonators function in substantially the same manner as the one described above. the circular symbols representing parametrically-excited vresonators also have lines extending radially therefrom.

Such radial lines have arrows pointing toward the circle and represent signal inputs, such as the one including terminal 4 in the above described Fig. l resonator. Similarly, a radial line having an arrow pointing away from the circle is used to represent an output, such as the one including terminal 7 in the Fig. l resonator. A radial line running into the circle and bearing no arrow is used for representing the exciting input of the resonator.

Referring to the system shown in Fig. 4, I provide a source 40 capable of generating signals of substantially uniform duration at random times. Source 4t) is coupled to the input of delay multivibrator 41 wherein the signals incoming from source 40 are shaped and reduced to signals of uniform width and which appear on output conductor 41a. The next described apparatus is directed to rephasing or shifting each such randomly-occurring signal into coincidence with one of regularly recurringl reference signals.

In order to receive signals triggered by delay multivibrator 41, I provide a shift register comprising first, second and third parametrically- excited esonators 42, 43 and v44, respectively, tuned to resonate at the same particular of they succeeding (or intermediate) and .last Yof the l parametric resonators 43 and 44 in the series. Each ,of resonators 42, 43 and-44 has a second. input 42e, 43cand 44e, respectively, the use of which is to beexplained presently. At this time, it is pointed out that output 44h of resonator 44 represents the output of the system, that thesystenr normally is tov be effective for regularly. pro,-

Referring to Figs. 2a and 2b,l

assauts U ducing O signals, and that the system is to substitute a 1r phase or l signal for the one of the signals in response to the appearance of a signal on conductor 41a.

Each resonator is further provided with an exciting input 42d, 43d and 44d. In order to excite each resonator 42, 43 and 44 sequentially and in the order named, I provide a clock 45 for producing a continuous sinusoidal signal at twice the resonant frequency of resonators 42, 43 and 44. T-he output of clock 45 is connected to the input of signal distributor 46. Distributor 46 has iirst, second and third outputs 47, 48 and 49 and is effective -for admitting signals from clock 45 to those conductors in the order named and in the relationship indicated in Figs. 3a, 3b and 3c, respectively. The operation of distributor 46 is such that the signal appearing on any one of conductors 47, 48 or 49 slightly overlaps the signals present on the others of the conductors. Conductors 47,- 48 and 49 are connected to the excitation inputs 44d, 42d, and 43d, respectively. In this manner, each of resonators 42, 43 and 44 is periodically fed an exciting signal which slightly overlaps the excitation signals applied to the next preceding and next succeeding one of the series of resonators.

In order to supply 0 signals to first resonator 42 within the shift register, I provide a frequency divider 50 having an input connected to clock 45. Frequency divider 50 is effective for intermittently producing signals, each of which is a first subharmonic of the signals produced by clock 45. In other words, divider 5t) produces signals at half the frequency of clock 45 and in substantial coincidence with two consecutive complete signals produced by clock 45. The output signals of divider 50 are applied to the primary of transformer 51. The righthand, secondary winding of transformer 51 is tapped to ground, the signals appearing at its lower terminal being 180 degrees out-of-phase with the signals represented in Fig. 3e appearing at its upper terminal and conductor 60. The lower winding terminal signals may be passed through other apparatus (not shown) which is eective for passing signals to conductor 59 during the times that exciting signals are present on conductor 48. Such signals are represented in Fig. 3d. It is to be understood that the signal chopping apparatus is not strictly necessary to the functioning of the apparatus used to practice my invention, but is included in order to make it easier for the reader to understand the operation of the apparatus.

From the above considerations,.it is` to be seen that divider 50 can be regarded as being equivalent to first and second signal generators which are operative for producing 1r and intermittent 0 phase signals on conductors 60 and 59, respectively. Divider 50 is further arranged rangement, each of resonators S2, 53 and 54 produces at' the aforementioned 'second inputs of resonators 42, 43v

or 44, I provide gates 55, 56 and 57. Each gate of gates 55, 56 and 57 has a control input, 55a, 56a and 57a, respectively, and is operative in response to the application of a signal thereto for making the gate pass signals from the corresponding one of resonators 52, 53 and 54 to the appropriate one of second signal input of gates 42, 43 and 44. The application of a "1 signal at double strength to the second input of any of stages 42, 43 or 44 in coincidence with the application of a normal strength "0 signal to the first input of any one of resonators 42, 43 or 44 at a time that an exciting signal is applied to the exciting input of the same resonator is effective for causing the resonator to produce a l output signal, rather than the normal 0 signal. As in the case of "0 signals, a l signal produced and temporarily stored in any one of resonators 42, 43 or 44 is shifted through the succeeding stages of the shift register and appears ultimately as a l signal on output 44b of resonator 44 for utilization in succeeding equipment (not shown).

In order to control gates 55, 56 and 57, I provide means for coupling the output conductor 41a of multivibrator 41 to each of control inputs a, 56a and 57d of gates 55, 56 and 57, respectively. With this arrangement, the appearance of a signal on conductor 41a at any instant in time must coincide at a time when at least one of resonators 52, 53 or 54 is excited. As a result, a 1r phase signal from the concurrently excited one of resonators 52, 53 and 54 passes into the one of shift register resonators 42, 43 or 44 which is to be next excited.

While the simultaneous enabling of gates 55 and 56 or of gates 56 and 57 at a time when both resonators 52 andy 53 or both resonators 53 and 54 are excited is without effect other than to admit a 1r phase signal to the second inputs of resonators 42 and 43 or to the inputs of resonators 43 and 44. Such simultaneous input of 1r phase signals to either of the aforementioned pairs of resonators must occur at a time when the one resonator of the pair closer to divider 50 in the series of shift register resonators has already been set to producing a 0 signaLthe application of the 1r phase signal to the latter resonator is without effect, and the 1r phase signal is produced only in the one of the aforementioned resonator pairs remote from so that the 0" phase signal on conductor 59 are substantially equal to the amplitude of signals produced by resonators 42, 43 and 44.

The 0 signals from voltage divider 5G which are represented in Fig. 3d, are coupled directly to the rst input 42a of resonator 42, so that thecontinuing O signals applied to resonator 42 are shifted through the various resonator stages and normally appear atoutput 44h of last resonator 44 in the register. Thus far, the operation described is basically similar to that described in the aforementioned Goto paper as a normal or three-step parametric excitation.

Upon the occurrence of a signal on conductor 41a, it is desired to cause the excited one of the register stages to transmit a 1r phase signal instead of the normal 0 signal. Accordingly, I provide means including parametrically- excited resonators 52, 53 and 54 for supplying 1r phase signals to second inputs 42e, 43e and 44e of resonators 42, 43 and 44, respectively. l Each of resonators 52, 53 and 54 has a signal inputl 52a, 53a and 54a coupled to the upper secondary winding terminal of transformer 51. Resonators 52, 53 and 54 also include exciting inputs 52b, 53b and 54b, respectively, connected to conductors 47, 48 and 49, respectively. With this arment of my invention, other modifications will readilyA divider 50 in the series of shift register resonators. However, the simultaneous enabling of gates 57 and 55 by a pulse on conductor 4ta which overlaps in time the excitation signals on conductors 47 and 49 could result in the transmission of two separate output signals, since it would be possible to set both resonators 44 and 42 to producing 1r phase signals at separate times. In order to prevent such a double output signal, I provide means including inverter 58 for coupling the output of gate 57 to a second input 52d of'resonator 52. Inverter 5S is effective for supplying ,to input 52d a signal substantially the same amplitude but degrees out-of-phase with the input signal applied toinput 52a of that same resonator.

Consequently, the input signals applied to the inputs lof` resonator 52 cancel each other, and resonator 52 is made incapable of producing signals for application to resonator 42 during the interval that resonator 54 is supplying a signal to resonator 44 of the shift register.

While I have shown and described a specic embodi- Voccur to those skilled in the art." I do not therefore v7 claimsto cover all such modifiactions falling withinv the spirit and scope of my invention.

`What is claimedis:

V 1. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising a plurality of memory elements disposed in a series; each of said elements having a first signal input, an excitinginput, and an output and each of the intermediate and last of s aid elements in said series having a second signal input; said output of each of the rst and intermediate said f elements in said series being coupled to said second signal input Of the next succeeding one of said elements in said series; said output of the last of said elementsin said series constituting an output for said register; each of said elements ybeing operative in response to the coincident application of a signal to oneof said signal inputs and to said exciting input for producing a signal lon said output for the duration of the signal applied to said exciting input; driving means operative for repetitivelyv applying signals of at least the same duration as the signals produced from said random time signal source in sequence to said exciting input of each of said elements in the order of occurrence of said elements in said series in order to advance a signal stored within any one of said elements to said register output; a plurality of signal producing means, each of said signal producing means being individual to a particular one of said elements; each of said, signal producing means being operative for producing signals in coincidence with signals applied to said exciting input of the corresponding one of said register elements; a plurality` of gates,- eaclr of said gates being individual to a particular one of said signal producing means and having a control input; each of said gates being operative in response to the application of a signal applied to said control input thereof for passing Signals therethrough; means including the corresponding one of said gates for individually coupling each of said signal producing means to said first signal input of the next of said elements in said series; and means for coupling said random signal source to said control inputs of said gates; whereby the Production of signals by said random signal producing means allows the passage of signals from one of said signal producing means into the next succeeding one of said elements in s aid register, and the resulting signal stored therein isV advanced to arrive at said register output in coincidence with the exciting signal applied to the last of said elements in said register.

t 2. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising a plurality of memory elements disposed in a series; each of said elements having a first signal input, an exciting input, and an output, and each of the intermediate and last ofr said elements in said series having a second signal input; said output of each of the first and intermediate said elements in said series being coupled to said second signal input of the next succeeding one of said elements in said series; said output of the last of said elements in said series constituting an output for. said register; each of said elements being operative in response to the coincident application of avsignal to one of said signal inputs and to said exciting input for producing a signal on said output for the duration of the signal applied to said exciting input; driving means operative for repetitively applying signals of at least the same duration as the signals produced froml said random time signal source in sequence to said exciting input of each of said elements in the order of occurrence of saidelementsV in said series in order-to advance a signal stored within any one of said elements to said register output; a plurality of signal each of said signal producing means being 4operative in response to the coincident application of signals to said signal and said exciting inputs thereof for producing signals on said output thereof; means for applying'to each of said signal producing means exciting signals in coincidence with signals applied to said exciting input of the corresponding one of said register elements; means for applying signals to each of said signal producing means; signal input in coincidence with signals applied to said exciting input thereof; a plurality of gates, each of said gates being individual to a particular one of said signal producing means and having a control input; each of said gates being operative in response to the applica tion of a signal applied to said control input thereof for passing signals therethrough; means including said gatesv for coupling said outputs of the corresponding ones lof said signal producing means to said first signal input of the next of said elements in said series; and means for coupling said random signal source to said control inputs of said gates; whereby the production of signals by said random signal producing means allows the passage of signalsfrom one of said signal producing means into the next succeeding one of said elements in said register, and the resulting signal stored in that one of said elements is advanced to arrive at said register output in coincidence with the exciting signal applied to the last `of said elements in said register.

3. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising a plurality of substantially identical memory elements disposedin ay series; each of said elements having first and second signal inputs, an exciting input, and an output; said output of each of the first and intermediate of said elements in said series being coupled to said second signal input of the next succeeding one of said elements in said series,l said output of the last of said elements in said series constituting an output for said register; each of said elements being operative in response to the coincident application of a signal to said exciting input and signals of particular characteristics to said signal inputs for producing for the duration of the signal applied to said exciting input on said output a signal having the same characteristics as the one of the signals applied to said inputs having greater amplitude; driving means operative for repetitively applying signals of at least the same duration as signals produced by said random time signal source in sequence to said exciting input of each of said elements in the order of occurrence of said elements in said seriesv in order to advance a signal stored within any one of said elements to said register output; a first generator` operative for applying to said second signal input of the first of said series elements signals of first characteristic substantially in coincidence with signals applied to said exciting input of the first of said register elements and of amplitude substantially equal to signals produced at said outputs of said memory elements; a second generator operative for producing signals of a second characteristic in coincidence with cach signal produced by saiddriving means; a plurality of signal producing means; each of said signal producing means corresponding to one of said register elements and having an input coupled to said second generator, an exciting input producing means; each of said signalproducing means coupled in parallel with said exciting input of the corresponding one of said register elements, and an output; each of said signal producing means being operative in response to the application of a signal to said exciting input thereof and to the coincident application of?y a signal of a particular characteristic to said signal input thereof for producing a signal of the same characteristic and of amplitude substantially greater than signals produced lby said first generator and saidjregister ele ments at said output thereof for the durationV ofj'the signal .applied to said exciting input thereof; aplurality ogates, each ofrsa-id` gates correspondingto a particu' i d lar one of saidsignal producing means; each of said' gates having a control input and being operative in response to the application of a signal thereto for passing a signal from said output of the corresponding one of said signal producing means to said first signal input of the next succeeding one of said elements in said series of register elements; and means for coupling said random Vtime signal source to said control inputs of said gates; whereby said shift register is normally eective for producing at said output a signal of first characteristic produced -by said first generator in coincidence with signals applied to said exciting input of the last of said register elements in said series, and is operative upon the appearance yof a signal on the output of said random time signal source for causing said register to substitute for the normal signal on said register output a signal of the character produced by said second generator which arrives at said register output in coincidence with the nextoccurring signal applied to exciting input of the last of said register elements.

4. The system set forth in claim 3 and having in ad dition: means for coupling said output of said third signal producing means to said first signal producing means and `operative in response to the coincident application of input signals to said first and said third signal producing means for canceling signals at the output of said first signal producing means; whereby the production of a double signal at the output of said register is prevented.

5. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising first, second and third memory elements disposed in a series; each of said elements having a first signal input, an exciting input, and an output; each of the intermediate and last of said elements in said series having a second signal input, said output of each of said first and said second elements being coupled to said second signal input of said second and said third element, respectively, and said output of said third element constituting an output for said register; each of said elements being operative in response to the coincident application of a signal to one of said signal inputs and to said exciting input for producing a signal on said output for the duration of the signal applied to said exciting input; driving means operative for repetitively applying signals of the same or Y longer duration than signals produced by said random time signal source in sequence to said exciting inputs of said first, said second and said third elements in the order named in order to advance a signal stored within any one of said elements to said'register output; first, second and third signal producing means individual to said tirst, said second and said third register elements, respectively; each of said signal producing means being operative for producing signals in coincidence with signals applied to said exciting input of the corresponding one of said elements; first, second and'third gates for coupling said first, said second and said third signal producing means to said first signal input of said second, said third, and said first elements, respectively; each of said gates having Va control input and being operative in response to the application of a signal thereto for passing signals therethrough; and means for coupling said random signal source to said control input of each of said gates; whereby the production of signals by said random signal producing means allows the passage of signals from one of said signal producing means into the next succeeding one of vsaid elements in said register, and the resulting signals stored therein are advanced to arrive at said register output in coincidence with the application of an exciting signal to said third element Vin said register.

6. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising first, second and third memory elements disposed in a series; each of said elements having a first signal input, an exciting input, and an output, each of the second and said third elements having a second signal input; said output of said first and second elements being coupled to said second signal input of said second and said third elements,

respectively, and said output of said third element constituting 'an output for said register; each of said elements being operative in response to the coincident application of a signal to one of said signal inputs and to said exciting input for producing a signal on said output for the duration of the signal applied to said exciting input; driving means operative for repetitively applying signals of the same or longer duration than signals produced by said random time signal source in sequence to said exciting inputs of said rst, said second and said third elements in the order named in order to advance a signal stored within any `one of said elements to said register output; first, second and third signal producing means individual to said first, said second and said third register elements; each of said signal producing means having signal and exciting inputs and an output; each of said signal producing means being operative in response to the coincident application of signals to said signal and said exciting inputs for producing signals on said output thereof; means for coupling said exciting input of said first, said second and said third elements to said exciting inputs of said first, said second, and said third signal producing means, respectively; means for applying signals to said signal inputs of said first, said second, and said third signal producing means in coincidence with signals applied to said exciting inputs there-- of; first, secondand third gates for coupling said output of said first, said second and said third signal producing means to said first signal input of said second, said third and said first elements, respectively; each of said gates having a control input and being operative in response to the application of a signal thereto for passing signals therethrough; and means for coupling said random time signal source to said control input of each of said gates; whereby the production of signals by said random signal producing means allows the passage of signals from one of said signal producing means into the next succeeding one of said elements in said register, and the resulting signals stored therein are advanced to arrive at said register output in coincidence with the applicationof signals to said third element in said register.

7. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising first, second,

and third, substantially identical memory elements dis-1 posed in a series; each of said elements having first and second signal inputs, an exciting input, and an output; said output of each of the first and said second elements in said series being coupled to said second signal input of the next succeeding one of said elements in said series', and said output of the last of said elements in said series constituting an output for said register; each of said elements being operative in response to the application of a signal to said exciting input and to the coincident application of signals of particular characteristics to said vsignal inputs for producing on said output thereof a signal of characteristic similar to the one of the signals applied to said inputs thereof having the greater amplitude for the duration of the signal applied to said exciting input; driving means operative for repetitively applying signals of the same or longer duration than the signals produced by said random time signall source in sequence to said exciting input of each of said elements in the' order of occurrence of said elements in said series in order to advance a signal stored within anyone of said l elements to said register output; a first generator effective for producing signals of a first characteristic substantially in coincidence with signals applied to said exciting input of said first register element and of substantially sarneiamplitude as signals produced by any of said elements at the output thereof; a second generator operative for producing signals of a second nature substantially in coincidence with signals produced by said driving means and applied to said exciting inputs of the various ones of said register elements; tiret, second and third signal producing means individual to said first, said second and said third elements, respectively; each of said signal producing means having a signal input coupled to said second generator, an exciting input coupled to said exciting input of the corresponding one of said register elements, and an output; each of said signal producing means being operative in response to the application of a signal to said exciting input and to the coincident application of a signal of particular characteristic to said signal input thereof for producing signals of the same characteristic and of amplitude substantially greater than the amplirude of signals produced by said first generator and any of said register elements, at said output thereof; rst, second and third gates, each of said gates having a control input and being operative in response to the application of a signal thereto for passing signals therethrough; said first, said second and said third gates being operative for passing signals from said output of said first, said second and said third signal producing means to said tirst signal input of said second, said iirst, and said third elements, respectively; and means for coupling said control inputs of said gates to said random time signal producing means; whereby said shift register is normally cifcctivefor producing at said register output a signal of the character produced by` said first generator in coincidence with signals applied to said exciting input of said third register element, and is operative upon the appearance of a signal on the output of said random time signal source Vfor causing said register to substitute for the normal signal a signal of the character produced by said second generator on said register output in coincidence with the next-occurring excitation signal applied to said last register element.

S. The system set forth in claim 7 and having in addition: means for coupling said output of said third signal producing means to said first signal producing ymeans and operative in response to the coincident application of input signals to said iirst and said third signal producing means for canceling signals at the output of said rst signal producing means; whereby the production of a double signal at the output of said register is prevented.

9. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising substantially identical first, second and third parametrically-excited resonators disposed in. a series; each of said resonators having a first signal input, an exciting input, and an output; each of the intermediate and last of said resonators in said series having a second signal input, said output:

of each of said first and said second resonators being coupled to said second signal input of said second and said third element, respectively, and said output of said third resonator constituting an output for said register; each of said resonators having a tank circuit connected yto said output thereof and being operative in response to the coincident application of a signal at the resonant frequency of said tank circuit to one of said signal inputs and to said exciting input at double the resonant frequency of said tank. circuit for producing asignal at the resonant-frequency of said tank circuit on said output for the duration of the signal applied to said exciting input; driving means operative for repetitively applying signals at double the resonant frequency of said resonator circuits and of the same or longer duration than signals produced by said random time signal source in sequence to said exciting inputs of said first, said second and Vsaid third resonatorstin the order named in order to advance a signalstored' within any one of said resonators tQSaidmcgiSter output; first, second andthird signal pro- 'i2 ducing .means individual to said first,Y said second and said third register resonators, respectively; each of said signal vproducing means being operative for producing signals at the resonant frequency of said tank circuits in said resonators and in coincidence with signals applied to said exciting input of the corresponding one of said resonators; first, second and rthird gates for coupling said first, said second and said third signal producing means to said first signal input of said second, said third, and said iirst resonators, respectively; each of said gates having a control input and being operative in response to the application of a signal thereto for passing signals therethrough; and means for coupling said random signal source to said control input of each of said gates; whereby the production of signals by said random signal producing means allows the passage of signals from one of said signal producing means into the next succeeding one of said resonators in said register, and the resulting signais stored therein are advanced to arrive at said register output in coincidence with thc application of an exciting signal to said third resonator in said register.

l0. In a system for phasing signals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising substantially identical rst, second and third memory parametricallyexcited resonators disposed in a series; each of said resonators having a first signal input, an exciting input, and an output, each of the second and said third resonators having a second signal input; said output of said first and said. second resonators being coupled to said second signal input of said second and said third resonators, respectively, and said output of said third resonator constituting an output for said register; each of said resonators having a tank circuit and being operative response to the coincident application of a signal at the resonant frequency of said tank circuit thereof to one of said signal inputs and a signal at double the resonant frequency of said tank circuit thereof to said exciting input for producing a signal at the resonant frequency of said tank circuit on said output for the duration of the signal applied to said exciting. input; driving means operative for repetitively applying signals at double the resonant frequency of said resonator tank circuits and of the same or longer duration than signals produced by said random time signal source in sequence to said exciting inputs of said first, said second and said third resonators in the order named in order to advance a signal stored within any one of said resonators to said register output; a second group of resonators including fourth, fth and sixth parametricallyexcited resonators individual to said first, said second and said third register elements, respectively; each of said second group resonators having signal and exciting inputs and an output; each of said second group resonators including a tank circuit substantially identical to said tank circuits of said register resonators and being operative in response to the coincident application of a signal at the resonant frequency of said tank circuit thereof to said signal input-andto asignal at double the resonant frequency of said tank circuit thereof to said exciting input for producing a signal at the resonant frequency of said tank circuit on said output thereof; means for coupling said exciting input of said first, said second and said third resonators to said exciting inputs of said fourth, said fifth, and said sixth resonators, respectively; means for applying signals to said signal inputs of said second group resonators in coincidence with signals'applied to said exciting inputs thereof; first, second and third gates for coupling said output'of said fourth, said fifth, and said sixth signal producing means to said first signal input of said second, said third and said first resonators, respectively; each of said gates having a control input and being operative in response to the application of a signal thereto for passing signals therethrough: and means for coupling said random time signal source to said control input of each of said gates; whereby the production of signals by said random signal producing means allows the passage of signals from one of said second group resonators into the next succeeding one of said resonators in said register, and the resulting signals stored therein are advanced to arrive at said register output in coincidence with the application of signals to said third resonator in said register.

11. In a system for phasingsignals emanating from a source capable of producing signals of uniform duration at random times; a shift register comprising first, second, and third substantially identical parametrically-excited resonators disposed in a series; cach of said resonators having first and second signal inputs, an exciting input, and an output; said output of said first and said second resonators in said series being'coupled to said second signal input of said second and said third resonators, respectively, and said output of said third resonator in said series constituting an output for said register; each of said resonators having a tank circuit and being operative in response to the application of a signal at double the resonant frequency of said tank circuit to said exciting input and to the coincident application of signals at the resonant frequency of said tank circuit in particular phase relationships to the'signal applied to said exciting input` to both said signal inputs for producing on said output thereof a signal of fixed amplitude at the resonant frequency of saidtank circuit and the same phase relationship to said signal applied to said exciting input'as the signals applied to said inputs thereof having the greater amplitude for the duration of the signal applied to said exciting input; driving means operative for repetitively applying signals in phase with each other at double the resonant frequency of said tank circuits and of the same or longer duration than the signals produced by said random time signal source in sequence to said exciting input of each of said resonators in the order of occurrence of said resonators in said series in order to advance a signal stored within any one 'of said resonators to saidfregister output; a first generator effective for producing signals in a particular constant phase relationship with signals produced by said driving means and substantially in coincidence with signals applied to said exciting input of said first register resonator and kof substantially the same amplitude as signals produced by any of said resonators at the output thereof; a second generator operative for producing signals at the resonant frequency of said tank circuits and 180 degrees out-of-phase with signals produced by said first generator substantially in coincidence with signals produced by said driving means and applied to said exciting inputs of the various ones of said register elements; a second group including fourth, fifth, and sixth parametrically-excited resonators individual to said first, said second and said third resonators, respectively; each of said second group resonators having a signal input coupled to said second generator, an exciting input coupled to said exciting input of the corresponding one of said register elements, and an output; each of said second group resonators including a tank circuit substantially identical to said tank circuits of said register resonators and being operative in response to the application of a signal at double lthe exciting frequency of said tank circuits to said exciting input and to the coincident application of a signal at the resonant frequency in particular phase relationship to the signal applied to said exciting input to said signal input thereof for producing signals at said output thereof in the same relationship to the said exciting input signal and of amplitude substantially greater than the amplitude of signals produced by said first generator and said register resonators; first, second and third gates, each of said gates having a control input and being operative in response to the application of a signal thereto for passing signals therethrough; said first, said second and said third gates being operative for passing signals from said output of said fourth, said fth, and said sixth resonators to said first signal input of said and means for coupling said control inputs of said gates to said random time signal producing means; whereby said v shift register is normally effective for producing at said register output a signal in phase with the signal produced by said first generator and in coincidence with signals applied to said exciting input of said first register resonator, and is operative upon the appearance of a signal on the output of said random time signal source for causing said register to substitute for the normal signal on said register output a signal degrees out-of-phase with the normal signal and in coincidence with the next-occurring excitation signal applied to said last register resonator.

l2. The system set forth in claim 11 and having in addition: an inverter having an input and an output operative in response to the application of signals torsaid input at a particular amplitude for producing at said output signals at the same amplitude and 180 degrees out-of-phase with signals applied to said input;'and said fourth, second group resonator also includes a second signal input, said fourth resonator being operative in response to the application of coincident signals to said signal inputs at the resonant frequency of said tank circuit and to said exciting input at double the resonant frequency of said tank circuit for producing on said output of said' fourth resonator a signal at the resonant frequency of said tank circuit and at the amplitude of the ,sum of the signals applied to said signal inputs thereof; and wherein said inverterinput is coupled to said sixth resonator output, and said inverter output is coupled to said second input of said fourth resonator; whereby said signals applied to said signal inputs of said fourth resonator are canceled when said fourth and said sixth resonators are coincidentally excited, and a double output signal in said register is thereby prevented.

No references cited.

Images