US2675473A

US2675473A - Limiting circuit

Info

Publication number: US2675473A
Application number: US262100A
Authority: US
Inventors: Max E Femmer
Original assignee: International Business Machines Corp
Current assignee: International Business Machines Corp
Priority date: 1951-12-17
Filing date: 1951-12-17
Publication date: 1954-04-13
Anticipated expiration: 1971-04-13

Description

April 1954 M. E. FEMMER 2,675,473

LIMITING CIRCUIT Filed Dec. 17, 1951 FIG.I

T VOLTAEE INVENTOR MAX E FEMMER AGE NI Patented Apr. 13, 1954 LIMITING CIRCUIT Max E. Femmer, Hopewell Junction, N. Y., assignor to International Business Machines Corporation, New York, N. Y., a corporation of New York Application December 1'7, 1951, Serial'No. 262,100

Claims. 1

This invention relates to a voltage amplitude limiter and clipper circuit and is directed particularly to a balanced clipper circuit.

An object of the invention resides in the provision-of means for presenting a constant and uniform impedance at its input terminals.

Another object of the invention resides in the provision of means for avoiding generation of spurious bias voltages, more particularly, those generated by unsymmetrical waveforms.

Yet another object of the invention resides in the provision of a limiting and clipper circuit which is substantially non-frequency sensitive.

Another object of the invention resides in the provision of a clipping circuit wherein the clipping level is independent of tube characteristics. Yet another object of the invention resides in the provision of a clipping circuit wherein the cl pping level is not dependent on the magnitudes of applied operating voltages.

Other objects of the invention will be pointed out in the following description and claims and illustrated in the accompanying drawings, which disclose, by way of example, the principle of the invention and the best mode, which has been contemplated, of applying that principle.

In the drawings:

Fig. 1 shows a schematic diagram of the limiter and clipper circuit.

Fig. 2 is a graph of a signal whose amplitude is less than the clipping level while,

Fig. 3 is a graph of clipper action on a signal whose amplitude is larger than the clipping level.

Referring now to Fig. 1 the input to the limiter and clipper circuit is shown at terminals l0 to which an input condenser l I may be attached to isolate the circuit from preceding apparatus. The ungrounded terminal I0 is connected to the cathode of a diode l2 and the anode of another diode l3 as well as to a shunting resistor M. The anode of diode I2 is connected to the midpoint of a voltage divider including resistors l5 and I6 which are connected across a source of bias voltage (not shown). The cathode of diode I3 is similarly connected to the midpoint of another voltage divider composed of resistors I! and H! which also is connected across the source of bias voltage abovementioned.

A.circuit is extended along wire 19 to a second pair of diodes 20 and 2| which are reversely connected in shunt with wire [9 and ground each having in

series therewith resistors

22 and 23 respectively. The output terminal 24 is connected to the anode of diode 20.

The output terminal 24 may be connected as ohms; resistors l5, l0 and I8, 20,000 ohms; and

resistors I1, 22 and 23, 40,000 ohms for clipping a signal fed to terminals at a 5 volt level above and below its own axis. It will be appreciated that other resistor values may be selected for determining diiierent clipping levels. See for example, Fig. 2 where there is shown a graph of two signals, one (signal A) having an amplitude greater than 5 volts, the other (signal 13) less than 5 volts. It is to be noted that signal B having a peak amplitude of less than the clipping level is transferred through the circuit substantially unaltered by clipping whereas signal A is symmetrically clipped at the 0 and --10 volt levels.

To illustrate the operation of the circuit points 26, 2.1, 28 and 29 have been selected for measurement of voltages during transfer of a signal and a tabulation of voltages has been prepared for signal A which is shown in Fig. 3 on a larger scale at the various times in one cycle which are numbered 30 through 34.

gi fig Voltages at Points Numbered Condition X X 5 5 5 1 0 O X X M 10 0 X X F 2 0 X X 9} 9% 9% -10 0 X -l.0%, ]O 10% -l0} 0 This balanced clipper and limiter circuit is arranged for easy adaptation to a succeeding ampli' fier. In referring to Fig. 1 there is shown an amplifier tube whose control grid is provided with a suitable bias potential Ec which can be adjusted to suit the particular tube used to secure operation of the same in the class A region.

The clipping circuit features an automatic bias source for any succeeding amplifier tube which is determined by the proportioning of the resistors before mentioned. In the example at hand a negative bias voltage of -20 volts applied to the clipping circuit will supply a bias voltage E0 of some 5 volts as shown by the table under condition 30. Hence it can be understood that although a separate bias voltage source may be intended for amplifier tube 25 a part of the total voltage is actually supplied by the clipping circuit.

On any positive excursion of the signal, for example, time 32 (Fig. 3) diode 20 will cease to conduct for the duration of this positive part switching the amplifier 25 out at zero volts and thereby preventing control grid 30 from drawing grid current. During this time diode 2| is rendered conductive to thereby maintain constant loading. On negative excursions of the signal, for example, at time 34 the control grid cutoff characteristic need not be relied upon since the diode l3 alternately does the clipping and diode I2 is alternatively transferred into a conductive state thereby maintaining constant loading on the input to tube 25.

In avoiding the use of frequency sensitive elements such as condensers and inductances the above described clipping and limiting circuit is rendered substantially non-frequency sensitive.

While there have been shown and described and pointed out the fundamental novel features of the invention as applied to a preferred embodiment, it will be understood that various omissions and substitutions and changes in the form and t details of the device illustrated and in its operation may be made by those skilled in the art, without departing from the spirit of the invention. It is the intention, therefore, to be limited only as indicated by the scope of the following claims.

What is claimed is:

l. A balanced voltage amplitude limiting and clipping circuit comprising, in combination, a first pair of diodes having a common cathode connection and whose anodes are connected respectively to an input terminal and an output terminal, a source of bias potential, a resistor voltage divider having a tap for connection to said commoned cathodes and connected across said source of bias potential, 9. second pair of diodes, one of which is connected to said input terminal and to another point on said voltage divider, the other diode having its anode connected to said commoned cathodes and its cathode connected in series with a resistor to ground.

2. A linear balanced voltage amplitude limiting and clipping circuit comprising, in combination, an input diode and an output diode having commoned cathodes and arranged in series relation between an input and an output terminal, a source of bias potential, means for applying a proportion of said bias potential to said commoned cathodes, resistor loading means shunting said input and output terminals, and a pair of reversely connected diodes respectively arranged in shunt relation across said input terminal and said output diode.

3. A linear balanced voltage amplitude limiting and clipping circuit comprising, in combination, an input terminal and an output terminal, a source of operating potential, a pair of reversely arranged series connected rectifiers connected to said input terminal and said source of operating potentional for equally limiting both positive and negative phases of a signal applied to said input terminal to a predetermined level, electron discharge signal amplifying means comprising at least a control grid, an anode and a cathode associated with said pair of reversely arranged rectifiers the control grid of which is connected to said output terminal for amplifying said signal after being limited, means comprising a rectifier shunted across said input terminal for maintaining a constant impedance across said input terminal and other rectifier means for maintaining a constant impedance across the control grid circuit of said electron discharge amplifying means.

4. A non-frequency sensitive voltage limiting circuit adapted to limit applied signals to a predetermined amplitude level comprising, in combination, an input terminal to which a to be limited signal is applied, an output terminal on which the limited signal is produced, a source of operating potential, 9. first uni-directional impedance connected to said input terminal and said source of operating potential for limiting positive phases of an applied signal to a predetermined upper level, a second uni-directional impedance reversely connected in series to said first uni-directional impedance for limiting negative phases of an applied signal to a predetermined lower level, electron discharge tube means comprising at least a control grid to which said second uni-directional impedance applies both a mean bias potential and the limited signal, a cathode and an anode to which is connected said output terminal, a third uni-directional impedance shunting said input terminal and alternately responsive to negative phases of an applied signal for maintaining a constant input impedance, and a fourth uni-directional impedance re-' versely connected in shunt across said second unldirectional impedance alternatively responsive to the limited positive phases of an applied signal for balancing said limiting circuit and preventing generation of spurious bias voltages.

5. In a voltage amplitude limiting circuit adapted to pass unaltered signals whose positive and negative amplitudes are less than a predetermined value and to limit to said predetermined value signals of greater amplitude of the type wherein a pair of diodes are reversely connected in series relation and their junction point is supplied with a bias voltage, the combination with said pair of series connected diodes of a third diode shunting said input terminal and alternately responsive to negative phases of an applied signal for maintaining a constant input impedance, and a fourth unidirectional impedance reversely connected in shunt across said second unidirectional impedance alternatively responsive to the limited positive phases of an applied signal for balancing said limiting circuit and preventing generation of spurious bias voltages.

6. A circuit of the type claimed in claim 5 including a capacitive signal transfer input means in combination with said third and fourth diodes for rendering said circuit equally responsive to signals having unsymmetrical waveforms and a repetition rate in the ultra-high frequencies.

Number Name Date Grundmann Sept. 4, 1951 Dallow Jan. 4, 1944,