US2462897A - Electronic pulse shaping circuit - Google Patents
Electronic pulse shaping circuit Download PDFInfo
- Publication number
- US2462897A US2462897A US557043A US55704344A US2462897A US 2462897 A US2462897 A US 2462897A US 557043 A US557043 A US 557043A US 55704344 A US55704344 A US 55704344A US 2462897 A US2462897 A US 2462897A
- Authority
- US
- United States
- Prior art keywords
- tube
- circuit
- tubes
- space
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000007493 shaping process Methods 0.000 title description 2
- 238000010891 electric arc Methods 0.000 description 7
- 230000000903 blocking effect Effects 0.000 description 4
- 102100035683 Axin-2 Human genes 0.000 description 1
- 101700047552 Axin-2 Proteins 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
Definitions
- This invention relates to electronic circuits particularly adaptable for use as pulse or sweep generators, keyers, modulators and the like.
- tubes l and I2 which are preferably arc-discharge tubes of the Thyraton type, have their space-current paths from anode to cathode in parallel.
- a vacuum tube 14 In series with both tubes is the space-current path of a vacuum tube 14, preferably one having high perveance and high emission.
- the anode of tube I4 is connected to the positive terminal of a space-current source IS, the negative terminal of which is grounded.
- the grid of the tube M can be biased at zero potential or biased positive with respect to its cathode by means of a voltage source l8 connected between the grid and cathode through a relatively high resistance 20, so that the impedance of said tube is normally low.
- Tubes I0 and I2 are normally maintained nonconducting by means of negative biases applied to their grids from voltage sources 22 and 24 through relatively high resistances 26 and 28.
- the load circuit 30 is connected to terminals 32 and 34 in the cathode circuit of tube It], or it may be connected to terminals 36 and 38 in the plate circuit of tube I4 by removing the short circuit across said terminals, or load circuits can be connected at both points. Because the tube [0 is non-conducting, no current can flow through the load circuit.
- the grid of tube ['0 is adapted to be intermittently rendered positive by means of sharp positive pulses, such as shown at 4, from a keying source adapted to be connected to terminals 6 and 8. Each pulse is sufficient to overcome the negative grid bias on tube In and render said tube conducting so that plate current will flow through tubes Ill and i4 and the load circuit 3!].
- the voltage pulse across resistor 46 is now applied to a negative pulse generator 48 which will deliver a sharp pulse of negative voltage to the grid of tube l4, thereby biasing it to cutofi and renderin it non-conducting, whereby the plate current through tubes I0 and I2 and their load circuits will be interrupted and the voltage at their anodes reduced sufficiently to render them non-conducting.
- This cycle of operation is repeated at every positive pulse applied to the grid of tube [0.
- Negative pulse generator 48 may take the form of a conventional blocking oscillator which is started by a positive pulse and which blocks itself after the first voltage cycle generated thereby.
- a blocking oscillator is described in Bedford Patent 2,358,297, issued September 19, 1944.
- circuit 48 acts to amplify and invert the pulse applied thereto from resistor 46, and any circuit which will perform this function can be used.
- the character and duration of the pulses through load circuit 30 will depend upon several factors.
- One factor is the time constant of the Rr-C circuit which can be adjusted to any desired interval by adjusting the value of resistor 40.
- Other factors are the ionizing time of tube l2 and the starting time in pulse generator 48 and the pulse duration of the output thereof. If the total time delay due to all the above factors is greater than the duration of input pulses 4 and less than the intervals therebetween, then there will occur a single pulse through the load circuit for each input pulse 4. If the total time delay is greater than the interval between input pulses, then there will be one pulse in output circuit 30 for every two or more input pulses, in which case the network will act as a frequency divider.
- a particular feature of the circuit is the fact that the operation is largely independent of the impedance of the load 30, since the impedance of tubes H! and [4 when they are conducting is relatively small compared to the load impedance. Hence the voltage drop across said load and the time operation of the succeeding circuits is substantially independent of the load impedance.
- the pulse shape across load at will be substantially rectangular if said load is resistive.
- Other pulse shapes can be derived by making said load circuit reactive or a combination of reactance and resistance.
- load circuit 33 By making load circuit 33 a constant charging circuit, the output wave will be a sawtooth wave, the duration of which can be controlled by adjustin the time constant of R-C circuit 40-42.
- An electronic circuit comprising at least first, second and third grid-controlled electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a'source of space-current in series with the space-current path of said third tube, an impedance in the cathode circuit of said second tube, said first and second tubes being normally non-conducting arc-discharge tubes, means torender said first tube conducting, whereby space-current will flow through said firstand third tubes, an adjustable time delay circuit for transmitting the output of said first tube to the grid of said second tube and render it conducting whereby space-current will flow through said impedance, and means responsive to current flow in said impedance to render said third tube non-conductin thereby interrupting the'space-current flow through all of said tubes.
- An electronic circuit comprising at least first, second and third grid-controlled electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the space-current path of said third tube, a load circuit connected in the cathode circuit of said first tube, a resistor in the cathode circuit of said second tube, said first and said second tubes being arc-discharge tubes having their grids negatively biased to cutoff, said third tube bein a high perveance vacuum tube having its grid positively biased so that it is normally of low impedance, means to apply a sharp positive pulse to the grid of said first tube to render it conducting whereby space-current will flow through said load circuit, an adjustable resistance-capacity time-constant circuit for transmitting the voltage drop across said load circuit to the grid of said second tube and render it conducting whereby space-current will flow through said resistor, a blocking oscillator circuit coupled to the output of said resistor for generating a sharp negative pulse for each pulse of voltage across said resistor, and means for applying
- An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, an impedance in the cathode circuit of said second tube, said first and second tubes being normally biased to render them non-conducting, means to render said first tube conducting, whereby space-current will flow through said first and third tubes, means including a time delay circuit responsive to the output of said first tube to render said second tube conducting whereby space-current will flow through said impedance, and means responsive to current flow in said impedance to render said third tube non-conducting thereby interrupting the space-current flow through all of said tubes.
- An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, an impedance in series with the space-current path of said second tube, said first and second tubes being normally non-conducting arc-discharge tubes, means to render said first tube conducting, whereby spacecurrent will flow through said first and third tubes, means including a time delay circuit responsive to the output of said first tube to render said second tube conducting whereby space-current will flow through said impedance, and means responsive to current flow in said impedance to render said third tube non-conducting thereby interrupting the space-current fiow through all of said tubes.
- An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, an impedance in the cathode circuit of said second tube, said first and second tubes being normally non-conducting arc-discharge tubes, means to render said first tube conducting, whereby space-current will flow through said first and third tubes, means including a time delay circuit responsive to the output of said first tube to render said second tube conducting whereby space-current will fiow through said impedance, and means responsive to current fiow in said impedance to render said third tube non-conducting thereby interrupting the space-current flow through all of said tubes.
- An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, a load circuit connected in series with the space-current paths of said first and third tubes, an impedance in the output circuit of said second tube, said first and said second tubes being arc-discharge tubes normally at cute-ff, said third tube being biased to render it normally or low impedance, means to render said first tube conducting whereby spacecurrent will flow through said first and third tubes and said load circuit, a time delay circuit responsive to said space-current flow to render said second tube conducting whereby space-current will fiow through said impedance, means coupled to the output of said impedance for generating a sharp pulse for each change of voltage across said impedance, and means for applying said sharp pulse to said third tubeto render it 5 non-conducting thereby interrupting the spacecurrent flow through all of said tubes.
- An electronic circuit Comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, a load circuit connected to said first tube, a resistor in the cathode circuit or" said second tube, said first and said second tubes being arc-discharge tubes normally at cutcfi, said third tube being a vacuum tube biased so that it is normally of low impedance, means to a pulse to said first tube to render it conducting whereby space-current will flow through said load circuit, a time delay circuit for transmitting the voltage drop across said load circuit to said second tube to render it conducting whereby space-current will flow through said resistor, a pulse generator keyed by the output of said resistor for generating a sharp pulse for each change of voltage across said resistor, and means for applying said sharp pulse to said third tube to render it non-conducting thereby interrupting the space-current flow through all of said tubes.
- An electronic network comprising at least first, second and third grid-controlled electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the space-current path of said third tube, a load circuit connected in the cathode circuit of said first tube, a resistor in the cathode circuit of said second tube, said first and said second tubes having their grids negatively biased to cutoff, said third tube having its grid positively biased so that it is normally of low impedance, means to apply spaced pulses to the grid of said first tube to render it conducting whereby spacecurrent will fiow through said load circuit, .a time delay circuit for transmitting the voltage drop across said load circuit to the grid of said second tube to render it conducting whereby space-current will flow through said resistor, a pulse-forming circuit coupled across said resistor for generating a sharp pulse for each pulse of voltage across said resistor, and means for applying said sharp pulse to the grid of said third tube to render it non-conducting thereby interrupting the space-current flow through all of
Description
March 1, 1949. I J. 1;. RECTOR 2,462,897
ELECTRONIC PULSE SHAPING CIRCUIT Filed Oct. 3, 1944 INVENTOR. JACOB L. RECTOR ATTORNEY Patented Mar. 1, 1949 UNITED STATES PATENT OFFICE (Granted under the act of March 3, 1883, as amended April 30, 1928; 370 0. G. 757) 11 Claims.
The invention described herein may be manufactured and used by or for the Government for governmental purposes, without the payment to me of any royalty thereon.
This invention relates to electronic circuits particularly adaptable for use as pulse or sweep generators, keyers, modulators and the like.
It is a principal object of the invention to provide a circuit for the aforementioned purposes which is relatively simple and flexible and which is largely independent of the impedance of the load fed by the circuit.
For a detailed description of the invention, together with other and further objects thereof, reference is had to the following description taken in connection with the single figure of the drawing, which is a circuit diagram of one form of my invention.
In the drawing, tubes l and I2, which are preferably arc-discharge tubes of the Thyraton type, have their space-current paths from anode to cathode in parallel.
In series with both tubes is the space-current path of a vacuum tube 14, preferably one having high perveance and high emission. The anode of tube I4 is connected to the positive terminal of a space-current source IS, the negative terminal of which is grounded. I
The grid of the tube M can be biased at zero potential or biased positive with respect to its cathode by means of a voltage source l8 connected between the grid and cathode through a relatively high resistance 20, so that the impedance of said tube is normally low.
Tubes I0 and I2 are normally maintained nonconducting by means of negative biases applied to their grids from voltage sources 22 and 24 through relatively high resistances 26 and 28.
The load circuit 30 is connected to terminals 32 and 34 in the cathode circuit of tube It], or it may be connected to terminals 36 and 38 in the plate circuit of tube I4 by removing the short circuit across said terminals, or load circuits can be connected at both points. Because the tube [0 is non-conducting, no current can flow through the load circuit.
The grid of tube ['0 is adapted to be intermittently rendered positive by means of sharp positive pulses, such as shown at 4, from a keying source adapted to be connected to terminals 6 and 8. Each pulse is sufficient to overcome the negative grid bias on tube In and render said tube conducting so that plate current will flow through tubes Ill and i4 and the load circuit 3!].
The potential drop across loadcircuit is now applied to the grid of tube l2 through an adjustable R-C circuit comprisin resistor 40 and condenser 42. The output of this circuit is applied to the grid of tube I2 through a decoupling resistor 44 and blocking condenser 45. After a time interval, depending upon the time constant of 3-0 circuit 4ll42, said grid will be rendered sufficiently positive to overcome the negative bias from source 24 and render tube l2 conducting, whereby a pulse of voltage will be developed across resistor 46 in the cathode circuit of tube 12.
The voltage pulse across resistor 46 is now applied to a negative pulse generator 48 which will deliver a sharp pulse of negative voltage to the grid of tube l4, thereby biasing it to cutofi and renderin it non-conducting, whereby the plate current through tubes I0 and I2 and their load circuits will be interrupted and the voltage at their anodes reduced sufficiently to render them non-conducting. This cycle of operation is repeated at every positive pulse applied to the grid of tube [0.
It will be seen that the character and duration of the pulses through load circuit 30 will depend upon several factors. One factor is the time constant of the Rr-C circuit which can be adjusted to any desired interval by adjusting the value of resistor 40. Other factors are the ionizing time of tube l2 and the starting time in pulse generator 48 and the pulse duration of the output thereof. If the total time delay due to all the above factors is greater than the duration of input pulses 4 and less than the intervals therebetween, then there will occur a single pulse through the load circuit for each input pulse 4. If the total time delay is greater than the interval between input pulses, then there will be one pulse in output circuit 30 for every two or more input pulses, in which case the network will act as a frequency divider. On the other hand, if said time delay is less than the duration of each pulse 4, then there will be two or more pulses in output circuit 30 for each pulse in the input. The latter feature makes it possible to generate groups of output pulses for each pulse at the input, the numher in each group depending upon the duration of the input pulses and the time delay factors above mentioned.
A particular feature of the circuit is the fact that the operation is largely independent of the impedance of the load 30, since the impedance of tubes H! and [4 when they are conducting is relatively small compared to the load impedance. Hence the voltage drop across said load and the time operation of the succeeding circuits is substantially independent of the load impedance.
The pulse shape across load at will be substantially rectangular if said load is resistive. Other pulse shapes can be derived by making said load circuit reactive or a combination of reactance and resistance. By making load circuit 33 a constant charging circuit, the output wave will be a sawtooth wave, the duration of which can be controlled by adjustin the time constant of R-C circuit 40-42.
Other uses and features will be obvious to those skilled in the art, and it is aimed in the appended claims to cover all changes and modifications as fall within the true spirit and scope of the invention.
I claim:
1. An electronic circuit comprising at least first, second and third grid-controlled electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a'source of space-current in series with the space-current path of said third tube, an impedance in the cathode circuit of said second tube, said first and second tubes being normally non-conducting arc-discharge tubes, means torender said first tube conducting, whereby space-current will flow through said firstand third tubes, an adjustable time delay circuit for transmitting the output of said first tube to the grid of said second tube and render it conducting whereby space-current will flow through said impedance, and means responsive to current flow in said impedance to render said third tube non-conductin thereby interrupting the'space-current flow through all of said tubes.
2. An electronic circuit comprising at least first, second and third grid-controlled electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the space-current path of said third tube, a load circuit connected in the cathode circuit of said first tube, a resistor in the cathode circuit of said second tube, said first and said second tubes being arc-discharge tubes having their grids negatively biased to cutoff, said third tube bein a high perveance vacuum tube having its grid positively biased so that it is normally of low impedance, means to apply a sharp positive pulse to the grid of said first tube to render it conducting whereby space-current will flow through said load circuit, an adjustable resistance-capacity time-constant circuit for transmitting the voltage drop across said load circuit to the grid of said second tube and render it conducting whereby space-current will flow through said resistor, a blocking oscillator circuit coupled to the output of said resistor for generating a sharp negative pulse for each pulse of voltage across said resistor, and means for applying said negative pulseto the grid of said third tube to render it non-conducting thereby interrupting the space-current flow through all of said tubes.
3. An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, an impedance in the cathode circuit of said second tube, said first and second tubes being normally biased to render them non-conducting, means to render said first tube conducting, whereby space-current will flow through said first and third tubes, means including a time delay circuit responsive to the output of said first tube to render said second tube conducting whereby space-current will flow through said impedance, and means responsive to current flow in said impedance to render said third tube non-conducting thereby interrupting the space-current flow through all of said tubes.
4. An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, an impedance in series with the space-current path of said second tube, said first and second tubes being normally non-conducting arc-discharge tubes, means to render said first tube conducting, whereby spacecurrent will flow through said first and third tubes, means including a time delay circuit responsive to the output of said first tube to render said second tube conducting whereby space-current will flow through said impedance, and means responsive to current flow in said impedance to render said third tube non-conducting thereby interrupting the space-current fiow through all of said tubes.
5. An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, an impedance in the cathode circuit of said second tube, said first and second tubes being normally non-conducting arc-discharge tubes, means to render said first tube conducting, whereby space-current will flow through said first and third tubes, means including a time delay circuit responsive to the output of said first tube to render said second tube conducting whereby space-current will fiow through said impedance, and means responsive to current fiow in said impedance to render said third tube non-conducting thereby interrupting the space-current flow through all of said tubes.
(5. An electronic circuit comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, a load circuit connected in series with the space-current paths of said first and third tubes, an impedance in the output circuit of said second tube, said first and said second tubes being arc-discharge tubes normally at cute-ff, said third tube being biased to render it normally or low impedance, means to render said first tube conducting whereby spacecurrent will flow through said first and third tubes and said load circuit, a time delay circuit responsive to said space-current flow to render said second tube conducting whereby space-current will fiow through said impedance, means coupled to the output of said impedance for generating a sharp pulse for each change of voltage across said impedance, and means for applying said sharp pulse to said third tubeto render it 5 non-conducting thereby interrupting the spacecurrent flow through all of said tubes.
7. An electronic circuit Comprising at least first, second and third electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the spacecurrent path of said third tube, a load circuit connected to said first tube, a resistor in the cathode circuit or" said second tube, said first and said second tubes being arc-discharge tubes normally at cutcfi, said third tube being a vacuum tube biased so that it is normally of low impedance, means to a pulse to said first tube to render it conducting whereby space-current will flow through said load circuit, a time delay circuit for transmitting the voltage drop across said load circuit to said second tube to render it conducting whereby space-current will flow through said resistor, a pulse generator keyed by the output of said resistor for generating a sharp pulse for each change of voltage across said resistor, and means for applying said sharp pulse to said third tube to render it non-conducting thereby interrupting the space-current flow through all of said tubes.
8. An electronic network comprising at least first, second and third grid-controlled electron tubes, said first and second tubes having their space-current paths connected in parallel and connected to a source of space-current in series with the space-current path of said third tube, a load circuit connected in the cathode circuit of said first tube, a resistor in the cathode circuit of said second tube, said first and said second tubes having their grids negatively biased to cutoff, said third tube having its grid positively biased so that it is normally of low impedance, means to apply spaced pulses to the grid of said first tube to render it conducting whereby spacecurrent will fiow through said load circuit, .a time delay circuit for transmitting the voltage drop across said load circuit to the grid of said second tube to render it conducting whereby space-current will flow through said resistor, a pulse-forming circuit coupled across said resistor for generating a sharp pulse for each pulse of voltage across said resistor, and means for applying said sharp pulse to the grid of said third tube to render it non-conducting thereby interrupting the space-current flow through all of said tubes.
9. The invention set forth in claim 8, wherein the total time delay of said electronic network is greater than the interval between said spaced pulses.
10. The invention set forth in claim 8, wherein the total time delay of said electronic network is greater than the duration of said spaced pulses but less than the intervals therebetween.
11. The invention set forth in claim 8, wherein the total time delay of said electronic network is less than the duration of said spaced pulses.
JACOB L. RECTOR.
REFERENCES CITED The following references are of record in the file of this patent:
UNITED STATES PATENTS Number Name Date 2,102,951 Hackenberg Dec. 21, 1937 2,303,453 Gulliksen Dec. 1, 1942
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US557043A US2462897A (en) | 1944-10-03 | 1944-10-03 | Electronic pulse shaping circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US557043A US2462897A (en) | 1944-10-03 | 1944-10-03 | Electronic pulse shaping circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US2462897A true US2462897A (en) | 1949-03-01 |
Family
ID=24223833
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US557043A Expired - Lifetime US2462897A (en) | 1944-10-03 | 1944-10-03 | Electronic pulse shaping circuit |
Country Status (1)
| Country | Link |
|---|---|
| US (1) | US2462897A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2542631A (en) * | 1946-07-23 | 1951-02-20 | Harry M Crain | Variable timing circuit |
| US2545541A (en) * | 1948-01-09 | 1951-03-20 | Western Electric Co | Apparatus for timing relay operations |
| US2666179A (en) * | 1948-10-29 | 1954-01-12 | Gen Electric | Transient analyzing system |
| US2697168A (en) * | 1946-02-20 | 1954-12-14 | Carl P Spaulding | Sweep circuit |
| US2986655A (en) * | 1958-04-14 | 1961-05-30 | Gen Dynamics Corp | Variable level gating circuit |
| US3233116A (en) * | 1961-11-28 | 1966-02-01 | Gen Electric | Control rectifiers having timing means energized in response to load effecting commutation |
| US3793538A (en) * | 1972-11-30 | 1974-02-19 | Gen Motors Corp | Circuit for periodically energizing an electrical load |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2102951A (en) * | 1935-07-11 | 1937-12-21 | Lorenz C Ag | Generator of electric relaxation oscillations |
| US2303453A (en) * | 1939-05-05 | 1942-12-01 | Westinghouse Electric & Mfg Co | Welding timer |
-
1944
- 1944-10-03 US US557043A patent/US2462897A/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2102951A (en) * | 1935-07-11 | 1937-12-21 | Lorenz C Ag | Generator of electric relaxation oscillations |
| US2303453A (en) * | 1939-05-05 | 1942-12-01 | Westinghouse Electric & Mfg Co | Welding timer |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2697168A (en) * | 1946-02-20 | 1954-12-14 | Carl P Spaulding | Sweep circuit |
| US2542631A (en) * | 1946-07-23 | 1951-02-20 | Harry M Crain | Variable timing circuit |
| US2545541A (en) * | 1948-01-09 | 1951-03-20 | Western Electric Co | Apparatus for timing relay operations |
| US2666179A (en) * | 1948-10-29 | 1954-01-12 | Gen Electric | Transient analyzing system |
| US2986655A (en) * | 1958-04-14 | 1961-05-30 | Gen Dynamics Corp | Variable level gating circuit |
| US3233116A (en) * | 1961-11-28 | 1966-02-01 | Gen Electric | Control rectifiers having timing means energized in response to load effecting commutation |
| US3793538A (en) * | 1972-11-30 | 1974-02-19 | Gen Motors Corp | Circuit for periodically energizing an electrical load |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US2418521A (en) | Impulse measuring device | |
| US2404047A (en) | Electronic computing device | |
| US2390608A (en) | Frequency multiplier | |
| US2428149A (en) | Impulse generator | |
| US2536808A (en) | Fast impulse circuits | |
| US2409577A (en) | Synchronized blocking oscillator | |
| US2562295A (en) | Sawtooth synchronizing circuits | |
| US2719226A (en) | Timed signal generator | |
| US2568319A (en) | Electronic frequency divider apparatus employing delay circuits | |
| US2462897A (en) | Electronic pulse shaping circuit | |
| US2688075A (en) | Sawtooth wave generator | |
| US2413182A (en) | Radio communication system | |
| US2420509A (en) | Electron computing device | |
| US2537077A (en) | Double pulse generator | |
| US2412064A (en) | Saw-tooth wave generator | |
| US2590836A (en) | Plate keyer for radar transmitters | |
| US2473432A (en) | Electronic square wave signal generator | |
| US2489303A (en) | Counter frequency divider without time delay | |
| US2438845A (en) | Relaxation circuits for producing electrical impulses at regular recurrence frequencies | |
| US2452213A (en) | Wave generating system | |
| US2572891A (en) | Timing circuit | |
| US2515195A (en) | Pulse collecting method | |
| US2464252A (en) | Pulsed oscillator | |
| US2672556A (en) | Electronic timing device | |
| US2592493A (en) | Pulse counter circuit |