US20220302241A1

US20220302241A1 - Display panel and display device

Info

Publication number: US20220302241A1
Application number: US17/426,122
Authority: US
Inventors: Yue Long; Yudiao CHENG; Qiwei Wang; Tianyi CHENG; Weiyun HUANG; Yao Huang
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2020-09-24
Filing date: 2020-09-30
Publication date: 2022-09-22
Also published as: US20220310727A1; CN114788008A; CN114556462A; US20220320187A1; WO2022061639A1; WO2022061952A1; WO2022061961A1; CN114730797A

Abstract

The present disclosure provides a display panel and a display device, which belongs to the field of display technology. The display panel has a display area and a peripheral area, the display area includes a main display area and a transparent display area, and the display panel includes a first sub-pixel, a first pixel driving circuit and a transparent lead. The first sub-pixel is located in the transparent display area, and includes a first pixel electrode; the first pixel driving circuit is located in the peripheral area; and the transparent lead connects the first pixel electrode and the first pixel driving circuit, so that the first pixel driving circuit drives the first sub-pixel to emit light.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is based upon International Application No. PCT/CN2020/119568 filed on Sep. 30, 2020, which is based upon and claims priority to International Application No. PCT/CN2020/117373 filed on Sep. 24, 2020, the entire contents of which are incorporated herein by reference.

TECHNICAL FIELD

The present disclosure relates to the field of display technology, and more specifically, to a display panel and display device.

BACKGROUND

A current display device is usually provided with a camera for photographing. In order to maximize a screen-to-body ratio, technologies such as notch screen, waterdrop screen, and hole digging in screen have appeared successively. These technologies reduce an area occupied by a camera in a peripheral area by digging a hole in a part of a display area and placing a camera below the digging area, thereby increasing the screen-to-body ratio. However, the above technique needs to remove a part of the display area, which will cause a part of the display screen to fail to display.
In order to avoid removing the display area, one way is to arrange a display panel with a transparent display area, and arrange an under-screen camera at the position corresponding to the transparent display area, so that the area can take into account both camera and display functions and improve user experience. However, currently, this type of display panel has a problem of that a brightness of the transparent display area is lower than that of anormal display area, resulting in poor picture quality.
It should be noted that the information of the invention in the background art section above is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to those skilled in the art.

SUMMARY

A first aspect of the present disclosure provides a display panel. The display panel has a display area and a peripheral area, the display area includes a main display area and a transparent display area, and the display panel includes:
at least one first sub-pixel, located in the transparent display area, and including a first pixel electrode;
at least one first pixel driving circuit, located in the peripheral area;
at least one transparent lead, connecting the first pixel electrode and the first pixel driving circuit, so that the first pixel driving circuit drives the first sub-pixel to emit light.
In an exemplary embodiment of the present disclosure, at least two of the transparent leads are located on different layers, and projections, in a thickness direction of the display panel, of the transparent leads located on the different layers are partially overlapped.
In an exemplary embodiment of the present disclosure, the transparent lead includes a first sub-transparent lead and a second sub-transparent lead connected to each other, the first sub-transparent lead extends in a row direction and is located in the peripheral area, and the second transparent sub-lead extends in a column direction and is located at least in the display area.
In an exemplary embodiment of the present disclosure, the transparent lead includes a material of ITO, silver nanowire or graphene.
In an exemplary embodiment of the present disclosure, the display panel further includes:
at least one first gate driving circuit, located in the peripheral area;
at least one first scan line, located in the peripheral area,
the first scan line connects the first gate driving circuit and the first pixel driving circuit, so that the first gate driving circuit provides the first pixel driving circuit with a scan signal.
In an exemplary embodiment of the present disclosure, each of the first gate driving circuits and each of the first pixel driving circuits are arranged at a same side of the transparent display area.
In an exemplary embodiment of the present disclosure, all the first sub-pixels are divided into a plurality of rows, and respective first sub-pixels corresponding to at least one of the first gate driving circuits are located in a same row.
In an exemplary embodiment of the present disclosure, respective first pixel driving circuits connected to the first sub-pixels located in the same row forms one or more pixel driving circuit islands, and respective pixel driving circuit islands are arranged in a row direction at a side, close to the transparent display area, of the peripheral area.
In an exemplary embodiment of the present disclosure, the respective pixel driving circuits in the pixel driving circuit island are arranged in the row direction, and the first scan line corresponding to the pixel driving circuit island extends in the row direction and is sequentially connected to the respective pixel driving circuits in the pixel driving circuit island.
In an exemplary embodiment of the present disclosure, the display panel further includes:
at least one second sub-pixel, located in the main display area, and including a second sub-pixel electrode; and
at least one second pixel driving circuit, located in the main display area, electrically connected to the second sub-pixel electrode, and configured to drive the second sub-pixel to emit light,
wherein pixel densities of the transparent display area and the main display area are same.
In an exemplary embodiment of the present disclosure, the display panel further includes:
at least one second gate driving circuit, located in the peripheral area;
at least one second scan line, located in the peripheral area and the display area,
wherein the second scan line connects the second gate driving circuit and the second pixel driving circuit, so that the second gate driving circuit provides the second pixel driving circuit with a scan signal.
In an exemplary embodiment of the present disclosure, the display panel further includes:
a plurality of first data lines, connected to the first pixel driving circuit and the second pixel driving circuit corresponding to the first sub-pixel and the second sub-pixel in a same column,
wherein the first data line extends along the column direction and bypasses an edge of the transparent display area.
Another aspect of the present disclosure provides a display device, including the display panel described above and a camera, the camera being arranged on a backlight side of the display panel and corresponding to the transparent display area.
It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

The drawings herein are incorporated into the specification and constitute a part of the specification, show embodiments in accordance with the present disclosure, and are used, together with the specification, to explain the principle of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

FIG. 1 is a top view of a display panel in an embodiment of the present disclosure;

FIG. 2 is a cross-sectional view of a first sub-pixel and a first pixel driving circuit in an embodiment of the present disclosure;

FIG. 3 is a cross-sectional view of a second sub-pixel and a second pixel driving circuit in an embodiment of the present disclosure;

FIG. 4 is a schematic diagram of a structure of transparent leads using two layers in an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of an arrangement of a transparent lead in the embodiment of the present disclosure;

FIG. 6 is a partial enlarged view of a first arrangement manner of the transparent lead in FIG. 5;

FIG. 7 is a partial enlarged view of a second arrangement manner of the transparent lead in FIG. 5;

FIG. 8 is a partial enlarged view of a third arrangement manner of the transparent lead in FIG. 5;

FIG. 9 is a partial enlarged view of a fourth arrangement manner of the transparent lead in FIG. 5;

FIGS. 10-13 are schematic diagrams of an arrangement of a first gate driving circuit in an embodiment of the present disclosure;

FIG. 14 is a schematic diagram of an arrangement of a second scan line in an embodiment of the present disclosure;

FIG. 15 is a schematic diagram of another arrangement of a second scan line in an embodiment of the present disclosure;

FIG. 16 is a schematic diagram of an arrangement of a first data line in an embodiment of the present disclosure; and

FIG. 17 is a timing diagram of a display panel during display according to the present disclosure.

DETAILED DESCRIPTION

In the related art, when a display panel is provided with an under-screen camera in a transparent display area, in order to improve photographing effect, a light transmittance of the transparent display area shall be as high as possible. However, a pixel driving circuit necessary for display inevitably includes some light-blocking layers, which would block light and thus affect the light transmittance. One way is to reduce pixel density in the transparent display area, thereby reducing light shielding due to an internal structure of the pixel driving circuit, and thus increasing the light transmittance. However, since the pixel density in the transparent display area is lower than that in a normal display area, the brightness of the transparent display area during display will be lower than that of the normal display area, which would cause a visual graininess, resulting in a decrease in image quality.
In view of the above problem, an embodiment of the present disclosure provides a display panel, which improves the light transmittance of the transparent display area without affecting the display effect, and takes into account both photographing and display effects.
As shown in FIG. 1, according to an embodiment of the present disclosure, a display panel has a display area and a peripheral area 200. The display area includes a main display area 100B and a transparent display area 100A. The transparent display area 100A is an area corresponding to a camera, and the remaining normal display area is the main display area 100B. The display panel includes at least one first sub-pixel 11, at least one first pixel driving circuit 12, and at least one transparent lead 13. The first sub-pixel 11 is located in the transparent display area 100A and includes a first pixel electrode; the first pixel driving circuit 12 is located in the peripheral area 200; the transparent lead 13 connects the first pixel electrode and the first pixel driving circuit 12, so that the first pixel driving circuit 12 drives the first sub-pixel 11 to emit light.
In the present disclosure, the first sub-pixel 11 is normally arranged in the transparent display area 100A, and the first pixel driving circuit 12 corresponding to the first sub-pixel 11 is arranged in the peripheral area 200, which prevents a light-blocking layer in the first pixel driving circuit 12 from affecting a light transmittance, and thus improves the light transmittance in the transparent display 100A and ensures a good photographing effect. Further, such structure does not affect a normal display of the transparent display area 100A, and can also increase a display brightness of the transparent display area 100A. The pixel density of the transparent display area can be set according to the situation, for example, to be the same as that of the main display area 100B. The display effect is no longer limited by the pixel density, and thus the image quality of the entire display panel is improved.
The display panel according to the embodiment of the present disclosure will be described in detail below.
In the present disclosure, the display panel may be an organic light emitting diode (OLED) display panel, such as an active matrix OLED (AM-OLED) display panel, a quantum dot OLED (QD-OLED) display panel and the like.
FIG. 1 shows a top view of a display panel in an exemplary embodiment. The display area includes the main display area 100B for displaying images and the transparent display area 100A corresponding to a camera position. The transparent display area 100A displays images, and at the same time can transmit light so that the camera can receive light signals for photographing.
In addition to the circle shown in the figure, the shape of the transparent display area 100A may also be a rectangle, a rounded rectangle, or other regular or irregular polygons. In addition to one shown in the figure, the number of the transparent display area 100A can also be multiple to correspond to different numbers of cameras, so as to achieve different photographing effects. The transparent display area 100A may be arranged at the center of the display area, or may be arranged at any corner of the display area. In order to facilitate the description of the technical solution of the present disclosure, the following takes that the display panel has one transparent display area 100A, and the transparent display area 100A is located at the upper center of the display panel as an example for detailed description.
In the exemplary embodiment, a plurality of first sub-pixels 11 are symmetrically arranged in the transparent display area 100A of the display panel, and correspondingly, a plurality of first pixel driving circuits 12 corresponding thereto are symmetrically arranged in the peripheral area 200. For example, there are 16 first sub-pixels 11 in the figure, which are arranged in two rows, and also, there are 16 first pixel driving circuits 12. The main display area 100B of the display panel has a conventional structure, in which a plurality of second sub-pixels 21 and a plurality of second pixel driving circuits 22 arranged under the second sub-pixels 21 are arranged symmetrically. The first pixel driving circuit 12 is electrically connected to the electrode of the first sub-pixel 11 through a transparent lead 13 to drive the first sub-pixel 11 to emit light; and the second pixel driving circuit 22 is directly electrically connected to the electrode of the second sub-pixel 21 to drive the second sub-pixel 21 to emit light.
Taking the first pixel driving circuit as an example, the first pixel driving circuit 12 includes a driving transistor disposed on a substrate 98. As shown in FIG. 2, which shows a cross-sectional view of the driving transistor, the driving transistor sequentially includes an active layer 91, a gate insulating layer 90, a gate layer 93, an interlayer insulating layer 94, a source and drain layer 95, a passivation layer 96 and the like from bottom to top. It should be noted that the structure of the driving transistor is not limited thereto, and can be determined according to actual requirements. The second pixel driving circuit 22 has the same structure as the first pixel driving circuit 12, except that the second pixel driving circuit 22 is located in the display area, and the first pixel driving circuit 12 is located in the peripheral area 200.
Taking the first sub-pixel as an example, the first sub-pixel 11 is located above the first pixel driving circuit 12 in a thickness direction of the display panel. The first sub-pixel 11 may be a red sub-pixel, a green sub-pixel or a blue sub-pixel, and in some embodiments, may also be a white sub-pixel or other color sub-pixels. Referring to FIG. 2 again, the first sub-pixel 11 includes a first pixel electrode 80, a common electrode 83, and a light emitting layer 82 disposed between the first pixel electrode 80 and the common electrode 83. The array substrate is also provided with a pixel defining layer 81 for defining each sub-pixel. The pixel defining layer 81 has an opening exposing the first pixel electrode 80. The light emitting layer 82 is disposed in the opening. The common electrode 83 can be a layer entirely covering the light emitting layer 82 and the pixel defining layer 81. The metal layers with light-blocking influence in the first pixel driving circuit 12 such as the active layer 91, the gate layer 93, the source and drain layer 95 are all located in the peripheral area 200, thus avoid an influence on the light transmittance of the transparent display area 100A. The second sub-pixel 21 and the first sub-pixel 11 have the same structure, and both are located in the display area. FIG. 3 shows the structure of the second pixel driving circuit 22 and the second sub-pixel 21.
The first sub-pixel 11 and the first pixel driving circuit 12 corresponding thereto are located in different areas, therefore they are connected by the transparent lead 13, so that the first pixel driving circuit 12 can drive the first sub-pixel 11 to emit light. Corresponding to the first sub-pixels 11, there are also a plurality of transparent leads 13, such as 16 as shown in FIG. 1; and the transparent leads 13 are symmetrical bilaterally and each extends to the corresponding first pixel driving circuit 12. The transparent lead 13 is made of a transparent material, and has a light transmittance higher than that of the metal layer in the driving circuit, and thus will not affect the light transmittance of the transparent display area 100A. The material of the transparent lead 13 includes but is not limited to indium tin oxide semiconductor (ITO), silver nanowire or graphene. The transparent lead made of the above-mentioned materials can make the light transmittance of the transparent display area 100A reach 70% or more, which is sufficient to meet photographing and display requirements.
Since the light transmittance of the transparent display area 100A of the present disclosure has been improved, the pixel density of the transparent display area 100A can be made higher, which can be the same as the pixel density of the main display area 100B, thereby eliminating the visual graininess of the transparent display area 100A caused by too low pixel density, and thus can ensure the same display effect of two areas.
When the transparent lead 13 is manufactured, the transparent lead 13 can be provided in the same layer as conductive layers such as the first pixel electrode 80 and the source and drain layer 95, or can be an independently provided layer located between two insulating layers. When the transparent lead 13 adopts the independently provided layer, a wiring density of the existing layer in the display area can be reduced, and a mutual influence between lines can be reduced.
For example, in an embodiment, all the transparent leads shown in FIG. 1 are arranged in the same layer. FIG. 2 shows that the transparent lead adopts the independently provided layer, and schematically shows the cross-sectional structure of one sub-pixel. The display panel includes a first insulating layer 301 and a second insulating layer 302. In the thickness direction of the display panel, the two insulating layers are both provided between the first pixel driving circuit 12 and the first sub-pixel 11, and the transparent lead 13 is located between the two insulating layers. The two insulating layers are both provided with via holes, and the transparent lead 13 is electrically connected to the corresponding first pixel electrode 80 and the drain of the first pixel driving circuit 12 through the via hole.
For another example, in another embodiment, the transparent leads 13 corresponding to the first sub-pixels in the two rows shown in FIG. 1 are respectively arranged in two layers, that is, the transparent leads 13 corresponding to the first sub-pixels in one row are arranged in one layer, and the transparent leads 13 corresponding to the first sub-pixels in another row are arranged in another layer. FIG. 4 is a schematic diagram of the structure of the transparent leads using two independently provided layers, and schematically shows the cross-sectional structure of two sub-pixels. The display panel includes a first insulating layer 301, a second insulating layer 302, and a third insulating layer 303 stacked from bottom to top. The three insulating layers are provided with via holes. In the thickness direction of the display panel, the three insulating layers are all disposed between the first pixel driving circuit 12 and the first sub-pixel 11. The transparent lead 13 corresponding to the first sub-pixel 11 in one row is located between the first insulating layer 301 and the second insulating layer 302, and is electrically connected to the corresponding first pixel electrode 80 and the drain of the first pixel driving circuit 12 through the via hole. The transparent lead 13 corresponding to the first sub-pixel 11 in another row is located between the second insulating layer 302 and the third insulating layer 303, and is electrically connected to the corresponding first pixel electrode 80 and the drain of the first pixel driving circuit 12 through the via hole.
In other embodiments, the transparent leads 13 corresponding to all sub-pixels can be further divided into more layers, such as three layers, four layers, and so on. Each layer of transparent leads 13 is isolated from another layer of transparent leads 13 by an insulating layer, and at the same time, is electrically connected to the corresponding first pixel electrode 80 and the first pixel driving circuit 12 through the via hole opened in the insulating layer. It can be understood that when the transparent leads 13 are divided into a plurality of layers, the wiring density of the leads can be reduced, and the parasitic capacitance can be reduced, but the thickness of the display panel will be increased. Therefore, a specific process can be selected according to actual product requirements.
Preferably, as shown in FIG. 1, when a plurality of transparent leads 13 are located in different layers, projections, in the thickness direction of the display panel, of the transparent leads 13 of different layers do not overlap with each other, so that the influence between the transparent leads 13 of two adjacent layers can be reduced as much as possible. In an embodiment, the projections, in the thickness direction of the display panel, of the transparent leads of different layers may also partially overlap with each other, and the thickness of the insulating layer may be increased at the overlap to reduce the mutual influence between the transparent leads of adjacent layers. For example, FIG. 5 is a schematic diagram of an arrangement of the transparent leads 13, and FIG. 6 is a partial enlarged view of the arrangement of the transparent leads 13 in FIG. 5. Referring to FIGS. 5 and 6, the transparent leads 13 corresponding to the first sub-pixels 11 in the first row are located in the same layer, the transparent leads 13 corresponding to the first sub-pixels 11 in the second row are located in the same layer, and the transparent leads 13 of the two layers partially overlap. It can be understood that the less overlap, the better. Further, in order to facilitate arrangement, the same transparent lead 13 can also be divided into a plurality of sections and arranged across different layers, and the plurality of sections are connected to each other through via holes. The specific process can be designed according to actual product requirements.
In order to reduce the influence of the transparent lead 13 on other layers of the display area, the transparent lead 13 may occupy the area of the main display area 100B as less as possible. Referring to FIGS. 5 and 6 again, the transparent lead 13 includes at least a first sub-transparent lead 131 and a second sub-transparent lead 132 connected to each other. The first sub-transparent lead 131 extends in the row direction and is located in the peripheral area 200, and the second sub-transparent lead 132 extends in the column direction and is located at least in the display area. In such structure, the transparent lead 13 extends upward from the first sub-pixel 11 into the transparent display area 100A and the main display area 100B, then into the peripheral area 200, and then extends horizontally to the corresponding first pixel driving circuit 12. In another embodiment, referring to the partial enlarged view of the transparent lead shown in FIG. 7, the transparent lead 13 may also first extend toward the left and right sides into the main display area 100B, and then extends upward into the peripheral area 200, for example, the transparent lead corresponding to the first sub-pixel in the second row. The arrangement method of extending the transparent lead 13 through the main part outside the transparent display area 100A has been described above. Further, there may be a plurality of arrangement methods of the transparent lead 13 in the transparent display area 100A, for example, as shown in FIG. 1, the transparent lead 13 corresponding to the first sub-pixel 11 in the first row directly extends upward, and the transparent lead 13 corresponding to the first sub-pixel 11 in the second row directly extends downward; as shown in FIG. 6, the transparent lead 13 corresponding to the first sub-pixel 11 in the first row directly extends upward, and the transparent lead 13 corresponding to the first sub-pixel 11 in the second row first extends to the right and then extends upward; as shown in FIG. 7, the transparent lead 13 corresponding to the first sub-pixel 11 in the first row directly extends upward, and the transparent lead 13 corresponding to the first sub-pixel 11 in the second row first extends upward and then extends to the right. On the other hand, in order to make the resistances of the transparent leads 13 similar, the transparent leads 13 connected to the first sub-pixels in different positions can be made to have approximate lengths through reasonable arrangement. For example, referring to FIG. 8, the transparent lead 13 corresponding to the first sub-pixel in the first row is connected to the first pixel driving circuit 12 that is farther away, and the transparent lead 13 corresponding to the first sub-pixel in the second row is connected to the first pixel driving circuit 12 that is closer, thereby making all the transparent leads 13 have similar lengths, and thus have similar resistances, to ensure that the display effects of different first sub-pixels 11 are consistent. The enlarged views of FIGS. 6-8 only show a two-layer structure of the transparent leads. Referring to FIG. 9, the difference between FIG. 9 and FIG. 6 is that the transparent leads in FIG. 9 are arranged in three layers, the transparent leads corresponding to the first sub-pixels 11 in the first row are located in a row, the transparent leads corresponding to the outside two first sub-pixels 11 at the left and right sides in the second row are located in a row, and the transparent leads corresponding to the inside two first sub-pixels 11 at the left and right sides in the second row are located in a row. In a word, there can be many kinds of paths and layers for the arrangement of the transparent leads 13, and the design can be carried out according to the actual product requirements in the specific process.
In the exemplary embodiment, the entire display area adopts the form of bilateral driving. Referring to FIGS. 1 and 5 again, the peripheral area 200 of the display panel includes a plurality of first gate driving circuits 14 and a plurality of first scan lines 15 that are symmetrical. The first scan line 15 connects the first gate driving circuit 14 and the first pixel driving circuit 12, so that the first gate driving circuit 14 provides a scan signal to the first pixel driving circuit 12. The peripheral area 200 of the display panel further includes a plurality of second gate driving circuits 23 and a plurality of second scan lines 24. The second scan line 24 also extends to the main display area 100B to connect the second gate driving circuit 23 located in the peripheral area 200 and the second pixel driving circuit 22 located in the main display area 100B, so that the second gate driving circuit 23 provides a scan signal to the second pixel driving circuit 22. In the embodiment, the gate driving circuits of the transparent display area 100A and the main display area 100B are separated, and the first gate driving circuit 14 provided separately provides the scanning signal to the first pixel driving circuit 12 located in the peripheral area 200, which is convenient for separately controlling the display effect of the transparent display area 100A to meet the different requirements of photographing and display.
In the embodiment, each of the first gate driving circuits 14 and each of the first pixel driving circuits 12 are located at the same side of the transparent display area 100A, that is, the peripheral area 200 above the display area in the figure, so that the length between the transparent lead 13 and the first scan line 15 can be reduced, and the resistance is reduced. In other embodiments, when the transparent display area 100A is located at a corner of the display area, each of the first gate driving circuits 14 and each of the first pixel driving circuits 12 may also be located at the left or right side close to the transparent display area 100A.
In the embodiment, the respective first sub-pixels 11 corresponding to the respective first pixel driving circuits 12 connected to the first gate driving circuit 14 are located in the same row. Referring to FIG. 1, the first pixel driving circuits 12 corresponding to the left four first sub-pixels 11 in the first row are connected to the same first gate driving circuit 14, and the first pixel driving circuits 12 corresponding to the right four first sub-pixels 11 in the first row are connected to the same first gate driving circuit 14. The second row has similar arrangements. Therefore, a row scanning can be realized.
In order to facilitate circuit arrangement, the first pixel driving circuits 12 connected to the first sub-pixels in the same row constitute a pixel driving circuit island 121, and the pixel driving circuit islands 121 are arranged in the row direction at the side of the peripheral area 200 close to the transparent display area 100A. Specifically, referring to FIG. 1, the first pixel driving circuits 12 corresponding to the left four first sub-pixels 11 in the first row constitute one pixel driving circuit island 121, and are connected to one first gate driving circuit 14; and the first pixel driving circuits 12 corresponding to the right four first sub-pixels 11 in the first row constitutes one pixel driving circuit island 121 and are connected to one first gate driving circuit 14; and the second row has the same arrangement. Four pixel driving circuit islands 121 are arranged in the row direction in the peripheral area 200 above the transparent display area 100A, so that all the first pixel driving circuits 12 can be as close as possible to the corresponding first sub-pixels 11 to reduce the length of the transparent lead 13, and their arrangement in the row direction can reduce the width of the peripheral area 200 and realize a narrow frame arrangement. In other embodiments, the first pixel driving circuits 12 connected to the first sub-pixels 11 in each row may also form a plurality of pixel driving circuit islands 121, and the plurality of pixel driving circuit islands 121 are arranged in the row direction to achieve a narrow frame. Further, when the number of pixel driving circuit islands 121 is large, the plurality of pixel driving circuit islands 121 may also be arranged in the column direction.
Further, the first pixel driving circuits 12 in each pixel driving circuit island 121 are also arranged in the row direction, so that the first scan line 15 extends in the row direction to simultaneously connect the first pixel driving circuits 12 in the same pixel driving circuit island 121, thereby reducing the length of the first scan line 15. Further, the arrangement sequence of the four first pixel driving circuits 12 in each pixel driving circuit island 121 is consistent with the arrangement sequence of the corresponding four first sub-pixels 11, which can prevent the transparent leads 13 from crossing each other. The arrangement sequence here refers to a sequence from left to right.
It should be noted that in the above embodiment, the first sub-pixels 11 located in different rows are driven by different first gate driving circuits 14. In another embodiment, one first gate driving circuit 14 may be used to drive the first sub-pixels 11 in a plurality of rows, and even one first gate driving circuit 14 drives the first sub-pixels 11 in all rows, which may further reduce the arrangement space. In actual products, the number of first gate driving circuits 14 can be determined according to the space and the number of pixel rows.
When there are a plurality of first gate driving circuits 14, the arrangement of the first gate driving circuits 14 in the peripheral area may refer to FIGS. 10-13, which respectively show different arrangements by taking that five first gate driving circuits 14 are located on the same side as an example. In these figures, the five pixel driving circuit islands 121 are all arranged in the row direction. As shown in FIG. 10, the five first gate driving circuits 14 are arranged in an arc shape. As shown in FIG. 11, the five first gate driving circuits 14 are arranged in a stepped manner. As shown in FIG. 12 and FIG. 13, the five first gate driving circuits 14 are all arranged in the row direction, and the difference lies in the arrangement direction of the first gate driving circuit 14. Regardless of the arrangement, the five first gate driving circuits 14 are preferably arranged according to the arrangement sequence of the corresponding pixel driving circuit islands 121, so as to reduce the length of each first scan line 15 and avoid the first scan lines 15 from crossing each other.
The arrangement of the plurality of second gate driving circuits 23 in the peripheral region 200 may be the arrangement in the column direction as shown in FIG. 1. The second scan line 24 corresponding to the second gate driving circuit 23 extends to the main display area 100B in the row direction to drive the corresponding pixel row. As for the pixel rows of the main display area 100B corresponding to the transparent display area 100A, the extension direction of the second scan line 24 may be arranged according to the specific conditions of the display panel. In the exemplary embodiment shown in FIG. 1, since the transparent display area 100A is located in the center of the display area, the left and right sides of the main display area 100B are symmetrical, the second scan line 24 in the area extends in the row direction to and ends by the transparent display area 100A. As shown in FIG. 14. In other exemplary embodiments, the transparent display area 100A is not located in the center of the display area, and the left and right sides of the main display area 100B are asymmetrical. At this time, the second scan line 24 in the area extends in the row direction and bypasses the edge of the transparent display area 100A to avoid different loads on both sides, as shown in FIG. 15.
In the exemplary embodiment, the display panel further includes a plurality of first data lines 16, and the first data line 16 is used to provide data signals to the pixel column of the transparent display area 100A. FIG. 16 shows the arrangement of the first data line 16. The first data line 16 extends from a data signal driving terminal (not shown, which is usually arranged above the display area), is connected to the source of the first pixel driving circuit 12 corresponding to the first sub-pixel 11 in the peripheral area 200, further extends to the display area and then bypasses the edge of the transparent display area 100A, and is connected to the source of the second pixel driving circuit 22 in the same column as that of the first sub-pixel 11 in the main display area 100B, thereby providing a data signal to the sub-pixels in the same column of the transparent display area 100A and the main display area 100B without affecting the light transmittance of the transparent display area 100A. It can be understood that, in the transparent display area 100A, the first data lines 16 connected to the first pixel driving circuits 12 corresponding to the two first sub-pixels 11 located in the same column can be combined. By taking the left second first pixel driving circuit 12 and the left seventh first pixel driving circuit 12 as an example, the first sub-pixels 11 corresponding to the two first pixel driving circuits 12 are located in the same column, and therefore the first data lines 16 corresponding to the two first pixel driving circuits can be combined, and then bypass the edge of the transparent display area 100A and is connected to the source of the underlying second pixel driving circuit 22 corresponding to the second sub-pixel 21 in the same column. The data signals of other pixel columns in the main display area 100B can be provided by conventional second data lines extending along the column direction, which will not be repeated here.
FIG. 17 is a timing diagram of the display panel during display in the present disclosure. The transparent display area 100A is scanned before the main display area 100B, that is, the start signal of the first gate driving circuit 14 starts ahead of n cycles (N is the number of pixel rows in the transparent display area 100A). In these n cycles, the first gate driving circuit 14 corresponding to the transparent display area 100A scans row by row, and each first data line 16 provides pixels in the transparent display area 100A with a data signal. After n cycles, the second gate driving circuit 23 starts to scan line by line. At this time, the data line corresponding to the main display area 100B provides a data signal to the pixels in the main display area 100B. This achieves a full-screen display. When the transparent display area 100A needs photographing, the first data line 16 may provide a black picture signal, so that the transparent display area 100A does not display pictures, and thus photographing can be performed.
In the above exemplary embodiments, it is only illustrated as an example that the display panel has one transparent display area 100A, the transparent display area 100A is located in the upper center of the display panel, and the driving mode is bilateral driving. Those skilled in the art can understand that in other embodiments, a plurality of the above-mentioned transparent display areas 100A can be provided in the display panel, and the first pixel driving circuits 12 in the transparent display areas 100A are all provided in the peripheral area 200, so as to improve the light transmittance. In addition, when the transparent display area 100A is not located on the symmetry axis, the arrangement positions of the first pixel driving circuit 12 and the transparent lead 13 can be designed according to the actual space. Furthermore, the display panel of the present disclosure can also be driven in a unilateral driving manner.
An embodiment of the present disclosure also provide a display device, which includes the above-mentioned display panel and a camera, and the camera is arranged on a backlight side of the display panel and corresponds to the transparent display area 100A. Since the light transmittance of the transparent display area 100A corresponding to the camera is improved, a good photographing effect of the camera can be ensured. Therefore, the display device of the present disclosure has both a good display effect and an under-screen photographing effect.
Although relative terms such as “upper” and “lower” are used in this specification to describe the relative relationship between one component and another component shown, these terms are used in this specification only for convenience of description, for example, according to the direction shown in the drawings. It can be understood that if a device shown is turned upside down, the component described as “upper” will become the “lower” component. When a structure is “on” another structure, it may mean that the structure is integrally formed on the another structure, or that the structure is “directly” installed on the another structure, or that the structure is “indirectly” installed on the another structure through a further structure.
The terms “a”, “an”, “the”, “said” and “at least one” are used to indicate the presence of one or more elements/components/etc.; the terms “including” and “have” are used to indicate open-ended inclusive means and means that there may be additional elements/components/etc. in addition to the listed elements/components/etc.
Those skilled in the art will easily conceive of other embodiments of the present disclosure after considering the specification and practicing the present invention disclosed herein. The present application is intended to cover any variations, uses, or adaptive changes of the present disclosure. These variations, uses, or adaptive changes follow the general principles of the present disclosure and include common knowledge or conventional technical means in the technical field that are not disclosed in the present disclosure. The description and the embodiments are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the appended claims.

Claims

1. A display panel, wherein the display panel has a display area and a peripheral area, the display area comprises a main display area and a transparent display area, and the display panel comprises:

at least one first sub-pixel, located in the transparent display area, and comprising a first pixel electrode;

at least one first pixel driving circuit, located in the peripheral area;

at least one transparent lead, connecting the first pixel electrode and the first pixel driving circuit, so that the first pixel driving circuit drives the first sub-pixel to emit light.

2. The display panel according to claim 1, wherein at least two of the transparent leads are located on different layers, and projections, in a thickness direction of the display panel, of the transparent leads located on the different layers are partially overlapped.

3. The display panel according to claim 1, wherein the transparent lead comprises a first sub-transparent lead and a second sub-transparent lead connected to each other, the first sub-transparent lead extends in a row direction and is located in the peripheral area, and the second transparent sub-lead extends in a column direction and is located at least in the display area.

4. The display panel according to claim 1, wherein the transparent lead comprises a material of ITO, silver nanowire or graphene.

5. The display panel according to claim 1, wherein the display panel further comprises:

at least one first gate driving circuit, located in the peripheral area;

at least one first scan line, located in the peripheral area,

wherein the first scan line connects the first gate driving circuit and the first pixel driving circuit, so that the first gate driving circuit provides the first pixel driving circuit with a scan signal.

6. The display panel according to claim 5, wherein each of the first gate driving circuits and each of the first pixel driving circuits are arranged at a same side of the transparent display area.

7. The display panel according to claim 6, wherein all the first sub-pixels are divided into a plurality of rows, and respective first sub-pixels corresponding to at least one of the first gate driving circuits are located in a same row.

8. The display panel according to claim 7, wherein respective first pixel driving circuits connected to the first sub-pixels located in the same row forms one or more pixel driving circuit islands, and respective pixel driving circuit islands are arranged in a row direction at a side, close to the transparent display area, of the peripheral area.

9. The display panel according to claim 8, wherein the respective pixel driving circuits in the pixel driving circuit island are arranged in the row direction, and the first scan line corresponding to the pixel driving circuit island extends in the row direction and is sequentially connected to the respective pixel driving circuits in the pixel driving circuit island.

10. The display panel according to claim 1, wherein the display panel further comprises:

at least one second sub-pixel, located in the main display area, and comprising a second sub-pixel electrode; and

at least one second pixel driving circuit, located in the main display area, electrically connected to the second sub-pixel electrode, and configured to drive the second sub-pixel to emit light,

wherein pixel densities of the transparent display area and the main display area are same.

11. The display panel according to claim 10, wherein the display panel further comprises:

at least one second gate driving circuit, located in the peripheral area;

at least one second scan line, located in the peripheral area and the display area,

wherein the second scan line connects the second gate driving circuit and the second pixel driving circuit, so that the second gate driving circuit provides the second pixel driving circuit with a scan signal.

12. The display panel according to claim 11, wherein the display panel further comprises:

a plurality of first data lines, connected to the first pixel driving circuit and the second pixel driving circuit corresponding to the first sub-pixel and the second sub-pixel in a same column,

wherein the first data line extends along the column direction and bypasses an edge of the transparent display area.

13. A display device, comprising a display panel and a camera,

wherein the display panel has a display area and a peripheral area, the display area comprises a main display area and a transparent display area, and the display panel comprises:

at least one first pixel driving circuit, located in the peripheral area;

at least one transparent lead, connecting the first pixel electrode and the first pixel driving circuit, so that the first pixel driving circuit drives the first sub-pixel to emit light, and

wherein the camera is arranged on a backlight side of the display panel and corresponds to the transparent display area.

14. The display device according to claim 13, wherein at least two of the transparent leads are located on different layers, and projections, in a thickness direction of the display panel, of the transparent leads located on the different layers are partially overlapped.

15. The display device according to claim 13, wherein the transparent lead comprises a first sub-transparent lead and a second sub-transparent lead connected to each other, the first sub-transparent lead extends in a row direction and is located in the peripheral area, and the second transparent sub-lead extends in a column direction and is located at least in the display area.

16. The display device according to claim 13, wherein the transparent lead comprises a material of ITO, silver nanowire or graphene.

17. The display device according to claim 13, wherein the display panel further comprises:

at least one first gate driving circuit, located in the peripheral area;

at least one first scan line, located in the peripheral area,

18. The display device according to claim 17, wherein each of the first gate driving circuits and each of the first pixel driving circuits are arranged at a same side of the transparent display area.

19. The display device according to claim 18, wherein all the first sub-pixels are divided into a plurality of rows, and respective first sub-pixels corresponding to at least one of the first gate driving circuits are located in a same row.

20. The display device according to claim 19, wherein respective first pixel driving circuits connected to the first sub-pixels located in the same row forms one or more pixel driving circuit islands, and respective pixel driving circuit islands are arranged in a row direction at a side, close to the transparent display area, of the peripheral area.