US20220037270A1 - Packaged circuit structure and method for manufacturing the same - Google Patents

Packaged circuit structure and method for manufacturing the same Download PDF

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Publication number
US20220037270A1
US20220037270A1 US17/000,660 US202017000660A US2022037270A1 US 20220037270 A1 US20220037270 A1 US 20220037270A1 US 202017000660 A US202017000660 A US 202017000660A US 2022037270 A1 US2022037270 A1 US 2022037270A1
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Prior art keywords
antenna circuit
board
groove
grooves
conductive heat
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Granted
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US17/000,660
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US11257773B1 (en
Inventor
Yong-Chao Wei
Lin-Jie Gao
Wei-Liang Wu
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Avary Holding Shenzhen Co Ltd
Qing Ding Precision Electronics Huaian Co Ltd
Original Assignee
Avary Holding Shenzhen Co Ltd
Qing Ding Precision Electronics Huaian Co Ltd
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Assigned to AVARY HOLDING (SHENZHEN) CO., LIMITED., QING DING PRECISION ELECTRONICS (HUAIAN) CO.,LTD reassignment AVARY HOLDING (SHENZHEN) CO., LIMITED. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: GAO, Lin-jie, WEI, Yong-chao, WU, Wei-liang
Publication of US20220037270A1 publication Critical patent/US20220037270A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4871Bases, plates or heatsinks
    • H01L21/4882Assembly of heatsink parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/52Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure
    • H01Q1/521Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure reducing the coupling between adjacent antennas
    • H01Q1/523Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure reducing the coupling between adjacent antennas between antennas of an array
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6605High-frequency electrical connections
    • H01L2223/6611Wire connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6661High-frequency adaptations for passive devices
    • H01L2223/6677High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors

Definitions

  • the subject matter herein generally relates to a package circuit structure and a method for manufacturing the package circuit structure, particularly relates to a package circuit structure with at least one antenna module and a method for manufacturing the package circuit structure with at least one antenna module.
  • FIG. 1 is a flowchart of an embodiment of a method for manufacturing a package circuit structure.
  • FIG. 2 is a diagrammatic view of an embodiment of a metal board.
  • FIG. 3 is a cross-sectional view of the metal board of FIG. 2 .
  • FIG. 4 is a cross-sectional view showing a plurality of embedded components received in the metal board of FIG. 3 .
  • FIG. 5 is a cross-sectional view showing insulating layers and antenna circuit boards laminated on opposite sides of the metal board of FIG. 3 to obtain a package circuit structure.
  • FIG. 6 is a diagrammatic view of an embodiment of a package circuit structure.
  • FIG. 7 is a diagrammatic view of an embodiment of a package circuit structure.
  • FIG. 8 is a cross-sectional view of an embodiment of a package circuit structure.
  • FIG. 9 is a diagrammatic view of an embodiment of the package circuit structure of FIG. 8 .
  • FIG. 10 is a flowchart of an embodiment of a method for laminating the insulating layers and the antenna circuit boards on the metal board.
  • FIGS. 11-17 is are cross-sectional views of illustrating respective steps of an embodiment of a method for laminating the insulating layers and the antenna circuit boards on the metal board.
  • FIG. 18 is a diagrammatic view of an embodiment of a package circuit structure.
  • FIG. 1 illustrates a flowchart of a method in accordance with an embodiment.
  • the method for manufacturing a package circuit structure is provided by way of embodiments, as there are a variety of ways to carry out the method.
  • Each block shown in FIG. 1 represents one or more processes, methods, or subroutines carried out in the method.
  • the illustrated order of blocks can be changed. Additional blocks may be added or fewer blocks may be utilized, without departing from this disclosure.
  • the method can begin at block 501 .
  • a metal board 10 is provided. At least one through hole 15 , at least one first groove 11 , and at least one second groove 13 are defined on the metal board 10 .
  • the metal board 10 includes a first surface 101 and a second surface 103 facing away from the first surface 101 .
  • the first surface 101 and the second surface 103 are arranged along a thickness direction of the metal board 10 .
  • Each first groove 11 is recessed from the first surface 101 toward the second surface 103 .
  • Each second groove 13 is recessed from the second surface 103 toward the first surface 101 .
  • Each first groove 11 and each second groove 13 are spaced with each other along a first direction X perpendicular to the thickness direction.
  • Each through hole 15 penetrates the first surface 101 and the second surface 103 and is spaced from the first surface 101 and the second surface 103 .
  • the first groove and the second groove 13 are alternately arranged along the first direction X.
  • the first groove 11 and the second groove 13 may further be alternatively arranged along a second direction Y perpendicular to the first direction X and the thickness direction. So that the first grooves 11 and the second grooves 13 are arranged in a matrix.
  • Each first groove 11 , each second groove 13 , and each through hole 15 may be formed by one of chemical etching, mechanical drilling, laser cutting, and any combination of the above methods.
  • a width of each first groove 11 may gradually decrease from the first surface 101 toward the second surface 103
  • a width of each second groove 13 may gradually decrease from the second surface 103 toward the first surface 101 .
  • shapes of any two first grooves 11 may be the same or different.
  • shapes of any two second grooves 13 may be the same or different.
  • shapes of any one of the first grooves 11 and any one of the second grooves may be the same or different.
  • the metal board 10 includes a plurality of the through holes 15 , and the plurality of the through holes 15 are distributed around the first groove 11 or the second groove 13 .
  • the metal board 10 may be made of metal materials such as copper, aluminum, or an alloy formed by combining the foregoing metal materials.
  • a plurality of embedded components 20 is provided. Each embedded component 20 is fixed in the first groove 11 or the second groove 13 .
  • each embedded component 20 is fixed to a bottom of the first groove 11 or a bottom of the second groove 13 by an insulating glue layer 25 . In at least one embodiment, each embedded component 20 may be fixed to a bottom of the first groove 11 or a bottom of the second groove 13 in other ways.
  • the insulating glue layer 25 may be an adhesive material with good thermal conductivity to accelerate a heat diffusion of the embedded component 20 , thereby facilitating heat dissipation.
  • each embedded component 20 does not protrude from the first groove 11 or the second groove 13 receiving the embedded component 20 . In at least one embodiment, a height of each embedded component 20 is less than a depth of the first groove 11 or the second groove 13 receiving the embedded component 20 .
  • At least one conductive terminal 21 is formed on each embedded component 20 .
  • the at least one conductive terminal 21 is formed on a surface of each embedded component 20 facing away from the bottom of the first groove 11 receiving the embedded component 20 or the bottom of the second groove 13 receiving the embedded component 20 .
  • an insulating layer 30 and an antenna circuit board 40 are sequentially laminated on each of the first surface 101 and the second surface 103 of the metal board 10 with the embedded components 20 respectively, thereby obtaining a package circuit structure 100 .
  • the insulating layers 30 cover the first surface 101 and the second surface 103 , and fill the first groove 11 , the second groove 13 and the through hole 15 .
  • the antenna circuit boards 40 are stacked on opposite sides of the insulating layers 30 along the thickness direction.
  • Each antenna circuit board 40 includes at least one antenna 41 and at least one ground wiring 43 .
  • Each antenna 41 is arranged corresponding to an opening portion of the first groove 11 or an opening portion of the second groove 13 .
  • Each ground wiring 43 is electrically connected to the metal board 10 , so that electromagnetic shielding is achieved through the metal board 10 to avoid electromagnetic interference between the embedded components 20 .
  • a plurality of conductive heat sinks 45 is formed on the antenna circuit boards 40 .
  • Each conductive heat sink 45 penetrates one of the antenna circuit boards 40 along the thickness direction and penetrates the adjacent insulating layer 30 .
  • Each conductive heat sink 45 connects an area of the adjacent second surface 103 of the metal board 10 corresponding to the first groove 11 , or connects an area of the adjacent first surface 101 of the metal board 10 corresponding to the second groove 13 , thereby accelerating the heat diffusion of the embedded components 20 , which is beneficial to heat dissipation.
  • an antenna area corresponding to one antenna 41 and a heat dissipation area corresponding to one conductive heat sink 45 are alternately arranged along the first direction X.
  • the antenna area corresponding to one antenna 41 and the heat dissipation area corresponding to one conductive heat sink 45 may further be alternately arranged along the second direction Y. So that the antenna areas and the heat dissipation areas are arranged in a matrix.
  • the metal board 10 and the ground wiring 43 are electrically connected through the conductive heat sink 45 .
  • each antenna circuit board 40 may further include dielectric layer 470 and at least one wiring layer 47 .
  • the at least one wiring layer 47 is sandwiched between the antenna 41 of the antenna circuit board 40 and the insulating layer 30 .
  • each antenna circuit board 40 may include a first wiring layer 47 a and a second wiring layer 47 b .
  • the second wiring layer 47 b includes the ground wiring 43 .
  • the each antenna circuit board 40 may further include other wiring layers.
  • the antenna circuit board 40 may further include at least one inner antenna(not shown).
  • each antenna circuit board 40 may further include at least one connecting pad 48 exposed from a side of the corresponding antenna circuit board 40 facing away from the metal board 10 for connecting other electronic elements.
  • Each connecting pad 48 electrically connects the wiring layer 47 .
  • the method may further include the block 504 .
  • solder masks are formed on opposite surfaces of the package circuit structure 100 .
  • the connecting pad 48 is exposed from the solder masks for connecting other electronic elements.
  • FIG. 10 illustrates a flowchart of an embodiment of a method for manufacturing the package circuit structure 100 by sequentially laminating the insulating layer 30 and the antenna circuit board 40 on each of the first surface 101 and the second surface 103 of the metal board 10 with the embedded components 20 respectively.
  • the method can begin at block 601 .
  • a first single-sided board 30 a is laminated on each of the first surface 101 and the second surface 103 of the metal board 10 with the embedded components 20 respectively, thereby obtaining a first intermediate structure A.
  • Each first single-sided board 30 a includes an insulating layer 30 and a first metal layer 31 stacked on the insulating layer 30 .
  • a side of the insulating layer 30 facing away from the stacked insulating layer 30 is combined with the metal board 10 .
  • Two insulating layers 30 fill the first groove 11 , the second groove 13 , and the through hole 15 .
  • a plurality of first slots 301 is defined on the first single-sided board 30 a on a side of the first surface 101 facing away from the second surface 103 to expose each area of the first surface 101 of the metal board 10 corresponding to each second groove 13 .
  • a plurality of second slots 303 is defined on the first single-sided board 30 a on a side of the second surface 103 facing away from the first surface 101 to expose each area of the second surface 103 of the metal board 10 corresponding to each first groove 11 .
  • a connecting hole 150 corresponding each through hole 15 is defined to penetrated two first single-sided board 30 a and the corresponding through hole 15 of the metal board 10 .
  • each first slot 301 corresponds to one area of the first surface 101 of the metal board 10 corresponding to one second groove 13 .
  • Each second slot 303 corresponds to one area of the second surface 103 of the metal board 10 corresponding to one first groove 11 .
  • a width of the connecting hole 150 is less than a width of the corresponding through hole 15 , and a sidewall surrounding to define the connecting hole 150 is spaced from a sidewall surrounding to define the corresponding through hole 15 .
  • a first conductive heat dissipating portion 451 is formed in each of the first slots 301 and the second slots 303 , two first wiring layers 47 a are formed on two opposite surfaces of the insulating layers 30 facing away from the metal board 10 , and a conductive via 70 is formed corresponding to each connecting hole 150 .
  • each first wiring layer 47 a is electrically connected to the at least one conductive terminal 21 of the adjacent embedded component 20 .
  • a second single-sided board 401 is laminated on a side of each of the first wiring layers 47 a facing away from the metal board 10 .
  • the second single-sided board 401 includes a first dielectric layer 470 a and a second metal layer 471 stacked on the first dielectric layer 470 a .
  • the first dielectric layer 470 a is combined with the adjacent first wiring layer 47 a and fills gaps of the adjacent first wiring layer 47 a.
  • a second conductive heat dissipating portion 452 corresponding to each first conductive heat dissipating portion 451 is formed and penetrates the second single-sided board 401 .
  • a second wiring layer 47 b is formed on each first dielectric layer 470 a .
  • Each first dielectric layer 470 a includes at least one ground wiring 43 .
  • the second conductive heat dissipating portion 452 penetrates the ground wiring 43 and the corresponding first dielectric layer 470 a to electrically connect the ground wiring 43 and the first conductive heat dissipating portion 451 corresponding to the ground wiring 43 .
  • the second wiring layer 47 b is electrically connected to the first wiring layer 47 a.
  • a third single-sided board 403 is laminated on a side of each second wiring layer 47 b facing away from the metal board 10 .
  • the third single-sided board 403 includes a second dielectric layer 470 b and a third metal layer 473 .
  • the second dielectric layer 470 b is combined with the adjacent second wiring layer 47 b and fills gaps of the adjacent second wiring layer 47 b.
  • a third conductive heat dissipating portion 453 corresponding to each second conductive heat dissipating portion 452 is formed and penetrates the third single-sided board 403 .
  • At least one antenna 41 is formed on each second dielectric layer 470 b .
  • the third conductive heat dissipating portion 453 penetrates the adjacent second dielectric layer 470 b to electrically connect the ground wiring 43 and the second conductive heat dissipating portion 452 .
  • One third conductive heat dissipating portion 453 , the corresponding second conductive heat dissipating portion 452 , and the corresponding first conductive heat dissipating portion 451 are connected in that sequence to form a conductive heat sink 45 .
  • the first dielectric layer 471 a and the second dielectric layer 470 b constitute a dielectric layer 470 .
  • FIG. 18 illustrates an embodiment of a package circuit structure 100 .
  • the package circuit structure 100 includes a metal board 10 , a plurality of embedded components 20 , an insulating layer 30 , and two antenna circuit boards 40 .
  • the metal board 10 includes a first surface 101 and a second surface 103 facing away from the first surface 101 .
  • the first surface 101 and the second surface 103 are arranged along a thickness direction of the metal board 10 .
  • At least one first groove 11 is recessed from the first surface 101 toward the second surface 103 .
  • At least one second groove 13 is recessed from the second surface 103 toward the first surface 101 .
  • the at least one first groove 11 and the at least one second groove 13 are spaced with each other along a first direction X perpendicular to the thickness direction.
  • Each of the plurality of embedded components 20 is mounted in one of the at least one first groove 11 or one of the at least one second groove 13 .
  • the insulating layer 30 covers the first surface 101 and the second surface 103 and fills the at least one first groove 11 and the at least one second groove 13 .
  • the antenna circuit boards 40 are respectively stacked along the thickness direction on two opposite sides of the insulating layer 30 .
  • Each of the antenna circuit boards 40 includes at least one antenna 41 and at least one ground wiring 43 .
  • the metal board 10 is electrically connected to each of at least two ground wirings 43 of the antenna circuit boards 40 .
  • the package circuit structure 100 may include a plurality of first grooves 11 and a plurality of second grooves 13 .
  • the plurality of first grooves 11 and the plurality of the second grooves 13 are alternately arranged along the first direction X.
  • each of the plurality of first grooves 11 and one of the plurality of the second grooves 13 may further be alternatively arranged along a second direction Y perpendicular to the first direction X and the thickness direction. So that the plurality of first grooves 11 and the plurality of the second grooves 13 are arranged in a matrix.
  • the antenna circuit board 40 includes a first antenna circuit board 40 a and a second antenna circuit board 40 b .
  • the first antenna circuit board 40 a is located on one of the opposite sides of the insulating layer 30 adjacent to the first surface 101 .
  • the second antenna circuit board 40 b is located on another of the opposite sides of the insulating layer 30 adjacent to the second surface 103 .
  • the package circuit structure 100 may further include at least one first conductive heat sink 45 a and at least one second conductive heat sink 45 b .
  • Each of the at least one first conductive heat sink 45 a penetrates the first antenna circuit board 40 a along a thickness direction and penetrates a portion of the insulating layer 30 to connect an area of the adjacent first surface 101 of the metal board 10 corresponding to the second groove 13 .
  • Each of the at least one second conductive heat sink 45 b penetrates the second antenna circuit board 40 b along thickness direction, and penetrates a portion of the insulating layer 30 to connect an area of the adjacent second surface 103 of the metal board 10 corresponding to the first groove 11 . So that the heat diffusion of the embedded components 20 may be accelerated, and it is beneficial to heat dissipation of the package circuit structure 100 .
  • an antenna area corresponding one antenna 41 and a heat dissipation area corresponding to one of the at least one first conductive heat sink 45 a or one of the at least one second conductive heat sink 45 b are alternately arranged along the first direction X.
  • the antenna area corresponding one antenna 41 and the heat dissipation area corresponding to one of the at least one first conductive heat sink 45 a or one of the at least one second conductive heat sink 45 b may further be alternately arranged along the second direction Y. So that the antenna areas and the heat dissipation areas are arranged in a matrix on each of two opposite sides of the metal board 10 .
  • a width of each of the at least one first conductive heat sink 45 a is less than a width of an opening portion of the second groove 13 corresponding the first conductive heat sink 45 a along the thickness direction.
  • a width of each of the at least one second conductive heat sink 45 b is less than a width of an opening portion of the first groove 11 corresponding the second conductive heat sink 45 b along the thickness direction.
  • Each of the at least one first conductive heat sink 45 a is electrically connected to one of the at least one ground wiring 43 of the first antenna circuit board 40 a .
  • Each of the at least one second conductive heat sink 45 b is electrically connected to one of the at least one ground wiring 43 of the second antenna circuit board 40 b.
  • each of the first antenna circuit board 40 a and the second antenna circuit board 40 b may further include at least one wiring layer 47 .
  • the at least one wiring layer 47 of the first antenna circuit board 40 a is between the at least one antenna 41 of the first antenna circuit board 40 a and the insulating layer 30 .
  • the least one wiring layer 47 of the second antenna circuit board 40 b between the at least one antenna 41 of the second antenna circuit board 40 b and the insulating layer 30 .
  • each of the first antenna circuit board 40 a and the second antenna circuit board 40 b may include a first wiring layer 47 a and a second wiring layer 47 b stacked on the first wiring layer 47 a along the thickness direction.
  • At least one of the antenna circuit boards 40 may further include at least one connecting pad 48 exposed from a side of the corresponding antenna circuit board 40 facing away from the metal board 10 for connecting other electronic elements.
  • Each connecting pad 48 electrically connects the at least one wiring layer 47 .
  • the package circuit structure 100 may further include solder masks formed on two opposite surfaces of the antenna circuit boards 40 facing away from the metal board 10 .
  • the at least one connecting pad 48 is exposed from the solder masks for connecting other electronic elements.
  • At least one conductive terminal 21 is formed on each of the plurality of the embedded components 20 .
  • Each of the plurality of the embedded components 20 is electrically connected to one of the antenna circuit boards 40 through the at least one conductive terminal 21 .
  • the at least one conductive terminal 21 may be formed on a side of each of the plurality of the embedded components 20 received in the first groove 11 or the second groove 13 facing away from a bottom of the corresponding first groove 11 or a bottom of the corresponding second groove 13 . So that a signal transmission loss between the antenna 41 and the embedded component 20 electrically connected to the corresponding antenna 41 may be reduced.
  • the metal board 10 may further include at least one through hole 15 penetrating the first surface 101 and the second surface 103 .
  • the at least one through hole 15 is spaced from the at least one first groove 11 and the at least one second groove 13 .
  • a conductive via 70 corresponding each of the at least one through hole 15 may be formed and penetrates the corresponding through hole 15 to electrically connect the antenna circuit boards 40 .
  • the conductive via 70 is spaced from an inner wall surrounding to define the corresponding through hole 15 by the insulating layer 30 .
  • the at least one groove 11 and the at least one groove 13 are recessed in opposite direction and spaced from each other along the first direction X perpendicular to the thickness direction, which may improve the heat dissipation efficiency and a temperature equalization effect of the package circuit structure 100 .
  • the metal board 10 is electrically connected to the ground wiring, which may avoid electromagnetic interference between the embedded components 20 .
  • the conductive heat sink 45 ( 45 a , 45 b ) may improve the heat dissipation efficiency of the package circuit structure 100 .
  • the antenna 41 and the conductive heat sink 45 ( 45 a , 45 b ) are alternately arranged, which may further improve the heat dissipation efficiency and a temperature equalization effect of the package circuit structure 100 .

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Abstract

A package circuit structure includes a metal board including a first surface and a second surface, a plurality of embedded components, an insulating layer, and two antenna circuit boards. At least one first groove is recessed from the first surface. At least one second groove is recessed from the second surface. The first groove and the second groove are spaced with each other along a first direction perpendicular to a thickness direction of the metal board. Each embedded component is mounted in the first groove or the second groove. The insulating layer covers the first surface and the second surface and fills the first groove and the second groove. The antenna circuit boards are respectively stacked on two opposite sides of the insulating layer. Each antenna circuit board includes at least one antenna and at least one ground wiring. The metal board is electrically connected to each ground wiring.

Description

    FIELD
  • The subject matter herein generally relates to a package circuit structure and a method for manufacturing the package circuit structure, particularly relates to a package circuit structure with at least one antenna module and a method for manufacturing the package circuit structure with at least one antenna module.
  • BACKGROUND
  • With the development of the 5th generation wireless systems, more components need to be integrated into the antenna module. An electromagnetic interference between components and heat produced by the antenna module have increased.
  • Therefore, there is room for improvement within the art.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • Implementations of the present disclosure will now be described, by way of embodiments, with reference to the attached figures.
  • FIG. 1 is a flowchart of an embodiment of a method for manufacturing a package circuit structure.
  • FIG. 2 is a diagrammatic view of an embodiment of a metal board.
  • FIG. 3 is a cross-sectional view of the metal board of FIG. 2.
  • FIG. 4 is a cross-sectional view showing a plurality of embedded components received in the metal board of FIG. 3.
  • FIG. 5 is a cross-sectional view showing insulating layers and antenna circuit boards laminated on opposite sides of the metal board of FIG. 3 to obtain a package circuit structure.
  • FIG. 6 is a diagrammatic view of an embodiment of a package circuit structure.
  • FIG. 7 is a diagrammatic view of an embodiment of a package circuit structure.
  • FIG. 8 is a cross-sectional view of an embodiment of a package circuit structure.
  • FIG. 9 is a diagrammatic view of an embodiment of the package circuit structure of FIG. 8.
  • FIG. 10 is a flowchart of an embodiment of a method for laminating the insulating layers and the antenna circuit boards on the metal board.
  • FIGS. 11-17 is are cross-sectional views of illustrating respective steps of an embodiment of a method for laminating the insulating layers and the antenna circuit boards on the metal board.
  • FIG. 18 is a diagrammatic view of an embodiment of a package circuit structure.
  • DETAILED DESCRIPTION
  • It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale, and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
  • The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.
  • FIG. 1 illustrates a flowchart of a method in accordance with an embodiment. The method for manufacturing a package circuit structure is provided by way of embodiments, as there are a variety of ways to carry out the method. Each block shown in FIG. 1 represents one or more processes, methods, or subroutines carried out in the method. Furthermore, the illustrated order of blocks can be changed. Additional blocks may be added or fewer blocks may be utilized, without departing from this disclosure. The method can begin at block 501.
  • At block 501, referring to FIG. 2, a metal board 10 is provided. At least one through hole 15, at least one first groove 11, and at least one second groove 13 are defined on the metal board 10.
  • Referring to FIG. 3, the metal board 10 includes a first surface 101 and a second surface 103 facing away from the first surface 101. The first surface 101 and the second surface 103 are arranged along a thickness direction of the metal board 10. Each first groove 11 is recessed from the first surface 101 toward the second surface 103. Each second groove 13 is recessed from the second surface 103 toward the first surface 101. Each first groove 11 and each second groove 13 are spaced with each other along a first direction X perpendicular to the thickness direction. Each through hole 15 penetrates the first surface 101 and the second surface 103 and is spaced from the first surface 101 and the second surface 103.
  • In at least one embodiment, when at least one of the number of the first grooves 11 and the number of the second grooves 13 is more than one, the first groove and the second groove 13 are alternately arranged along the first direction X.
  • In at least one embodiment, referring to FIG. 2, when each of the number the of the first grooves 11 and the number of the second grooves 13 is more than one, the first groove 11 and the second groove 13 may further be alternatively arranged along a second direction Y perpendicular to the first direction X and the thickness direction. So that the first grooves 11 and the second grooves 13 are arranged in a matrix.
  • Each first groove 11, each second groove 13, and each through hole 15 may be formed by one of chemical etching, mechanical drilling, laser cutting, and any combination of the above methods.
  • In at least one embodiment, a width of each first groove 11 may gradually decrease from the first surface 101 toward the second surface 103, and a width of each second groove 13 may gradually decrease from the second surface 103 toward the first surface 101.
  • In at least one embodiment, when the metal board 10 includes a plurality of the first grooves 11, shapes of any two first grooves 11 may be the same or different. When the metal board 10 includes a plurality of the second grooves 13, shapes of any two second grooves 13 may be the same or different. In at least one embodiment, shapes of any one of the first grooves 11 and any one of the second grooves may be the same or different.
  • In at least one embodiment, the metal board 10 includes a plurality of the through holes 15, and the plurality of the through holes 15 are distributed around the first groove 11 or the second groove 13.
  • The metal board 10 may be made of metal materials such as copper, aluminum, or an alloy formed by combining the foregoing metal materials.
  • At block 502, referring to FIG. 4, a plurality of embedded components 20 is provided. Each embedded component 20 is fixed in the first groove 11 or the second groove 13.
  • In at least one embodiment, each embedded component 20 is fixed to a bottom of the first groove 11 or a bottom of the second groove 13 by an insulating glue layer 25. In at least one embodiment, each embedded component 20 may be fixed to a bottom of the first groove 11 or a bottom of the second groove 13 in other ways.
  • In at least one embodiment, the insulating glue layer 25 may be an adhesive material with good thermal conductivity to accelerate a heat diffusion of the embedded component 20, thereby facilitating heat dissipation.
  • In at least one embodiment, each embedded component 20 does not protrude from the first groove 11 or the second groove 13 receiving the embedded component 20. In at least one embodiment, a height of each embedded component 20 is less than a depth of the first groove 11 or the second groove 13 receiving the embedded component 20.
  • At least one conductive terminal 21 is formed on each embedded component 20. In at least one embodiment, the at least one conductive terminal 21 is formed on a surface of each embedded component 20 facing away from the bottom of the first groove 11 receiving the embedded component 20 or the bottom of the second groove 13 receiving the embedded component 20.
  • At block 503, referring to FIGS. 5, 6, and 7, an insulating layer 30 and an antenna circuit board 40 are sequentially laminated on each of the first surface 101 and the second surface 103 of the metal board 10 with the embedded components 20 respectively, thereby obtaining a package circuit structure 100. In the package circuit structure 100, the insulating layers 30 cover the first surface 101 and the second surface 103, and fill the first groove 11, the second groove 13 and the through hole 15. The antenna circuit boards 40 are stacked on opposite sides of the insulating layers 30 along the thickness direction. Each antenna circuit board 40 includes at least one antenna 41 and at least one ground wiring 43. Each antenna 41 is arranged corresponding to an opening portion of the first groove 11 or an opening portion of the second groove 13. Each ground wiring 43 is electrically connected to the metal board 10, so that electromagnetic shielding is achieved through the metal board 10 to avoid electromagnetic interference between the embedded components 20.
  • In at least one embodiment, a plurality of conductive heat sinks 45 is formed on the antenna circuit boards 40. Each conductive heat sink 45 penetrates one of the antenna circuit boards 40 along the thickness direction and penetrates the adjacent insulating layer 30. Each conductive heat sink 45 connects an area of the adjacent second surface 103 of the metal board 10 corresponding to the first groove 11, or connects an area of the adjacent first surface 101 of the metal board 10 corresponding to the second groove 13, thereby accelerating the heat diffusion of the embedded components 20, which is beneficial to heat dissipation. On both sides of the metal board 10 in the package circuit structure 100, an antenna area corresponding to one antenna 41 and a heat dissipation area corresponding to one conductive heat sink 45 are alternately arranged along the first direction X.
  • In at least one embodiment, the antenna area corresponding to one antenna 41 and the heat dissipation area corresponding to one conductive heat sink 45 may further be alternately arranged along the second direction Y. So that the antenna areas and the heat dissipation areas are arranged in a matrix.
  • In at least one embodiment, the metal board 10 and the ground wiring 43 are electrically connected through the conductive heat sink 45.
  • In at least one embodiment, each antenna circuit board 40 may further include dielectric layer 470 and at least one wiring layer 47. The at least one wiring layer 47 is sandwiched between the antenna 41 of the antenna circuit board 40 and the insulating layer 30.
  • The conductive terminal 21 and the antenna 41 are electrically connected through the at least one wiring layer 47. In at least one embodiment, each antenna circuit board 40 may include a first wiring layer 47 a and a second wiring layer 47 b. the second wiring layer 47 b includes the ground wiring 43. In at least one embodiment, the each antenna circuit board 40 may further include other wiring layers.
  • In at least one embodiment, the antenna circuit board 40 may further include at least one inner antenna(not shown).
  • In at least one embodiment, referring to FIGS. 8 and 9, each antenna circuit board 40 may further include at least one connecting pad 48 exposed from a side of the corresponding antenna circuit board 40 facing away from the metal board 10 for connecting other electronic elements. Each connecting pad 48 electrically connects the wiring layer 47.
  • In at least one embodiment, the method may further include the block 504.
  • At block 504, solder masks (not shown) are formed on opposite surfaces of the package circuit structure 100.
  • When the antenna circuit board 40 includes the connecting pad 48, the connecting pad 48 is exposed from the solder masks for connecting other electronic elements.
  • FIG. 10 illustrates a flowchart of an embodiment of a method for manufacturing the package circuit structure 100 by sequentially laminating the insulating layer 30 and the antenna circuit board 40 on each of the first surface 101 and the second surface 103 of the metal board 10 with the embedded components 20 respectively. The method can begin at block 601.
  • At block 601, referring to FIGS. 11 and 12, a first single-sided board 30 a is laminated on each of the first surface 101 and the second surface 103 of the metal board 10 with the embedded components 20 respectively, thereby obtaining a first intermediate structure A. Each first single-sided board 30 a includes an insulating layer 30 and a first metal layer 31 stacked on the insulating layer 30. A side of the insulating layer 30 facing away from the stacked insulating layer 30 is combined with the metal board 10. Two insulating layers 30 fill the first groove 11, the second groove 13, and the through hole 15.
  • At block 602, referring to FIG. 13, a plurality of first slots 301 is defined on the first single-sided board 30 a on a side of the first surface 101 facing away from the second surface 103 to expose each area of the first surface 101 of the metal board 10 corresponding to each second groove 13. A plurality of second slots 303 is defined on the first single-sided board 30 a on a side of the second surface 103 facing away from the first surface 101 to expose each area of the second surface 103 of the metal board 10 corresponding to each first groove 11. A connecting hole 150 corresponding each through hole 15 is defined to penetrated two first single-sided board 30 a and the corresponding through hole 15 of the metal board 10.
  • In at least one embodiment, each first slot 301 corresponds to one area of the first surface 101 of the metal board 10 corresponding to one second groove 13. Each second slot 303 corresponds to one area of the second surface 103 of the metal board 10 corresponding to one first groove 11.
  • In at least one embodiment, a width of the connecting hole 150 is less than a width of the corresponding through hole 15, and a sidewall surrounding to define the connecting hole 150 is spaced from a sidewall surrounding to define the corresponding through hole 15.
  • At block 603, referring to FIG. 14, a first conductive heat dissipating portion 451 is formed in each of the first slots 301 and the second slots 303, two first wiring layers 47 a are formed on two opposite surfaces of the insulating layers 30 facing away from the metal board 10, and a conductive via 70 is formed corresponding to each connecting hole 150.
  • In at least one embodiment, each first wiring layer 47 a is electrically connected to the at least one conductive terminal 21 of the adjacent embedded component 20.
  • At block 604, referring to FIG. 15, a second single-sided board 401 is laminated on a side of each of the first wiring layers 47 a facing away from the metal board 10. The second single-sided board 401 includes a first dielectric layer 470 a and a second metal layer 471 stacked on the first dielectric layer 470 a. The first dielectric layer 470 a is combined with the adjacent first wiring layer 47 a and fills gaps of the adjacent first wiring layer 47 a.
  • At block 605, referring to FIG. 16, a second conductive heat dissipating portion 452 corresponding to each first conductive heat dissipating portion 451 is formed and penetrates the second single-sided board 401. A second wiring layer 47 b is formed on each first dielectric layer 470 a. Each first dielectric layer 470 a includes at least one ground wiring 43. The second conductive heat dissipating portion 452 penetrates the ground wiring 43 and the corresponding first dielectric layer 470 a to electrically connect the ground wiring 43 and the first conductive heat dissipating portion 451 corresponding to the ground wiring 43.
  • The second wiring layer 47 b is electrically connected to the first wiring layer 47 a.
  • At block 606, referring to FIG. 17, a third single-sided board 403 is laminated on a side of each second wiring layer 47 b facing away from the metal board 10. The third single-sided board 403 includes a second dielectric layer 470 b and a third metal layer 473. The second dielectric layer 470 b is combined with the adjacent second wiring layer 47 b and fills gaps of the adjacent second wiring layer 47 b.
  • At block 607, referring to FIG. 5, a third conductive heat dissipating portion 453 corresponding to each second conductive heat dissipating portion 452 is formed and penetrates the third single-sided board 403. At least one antenna 41 is formed on each second dielectric layer 470 b. The third conductive heat dissipating portion 453 penetrates the adjacent second dielectric layer 470 b to electrically connect the ground wiring 43 and the second conductive heat dissipating portion 452.
  • One third conductive heat dissipating portion 453, the corresponding second conductive heat dissipating portion 452, and the corresponding first conductive heat dissipating portion 451 are connected in that sequence to form a conductive heat sink 45. The first dielectric layer 471 a and the second dielectric layer 470 b constitute a dielectric layer 470.
  • Depending on the embodiment, certain of the steps of methods described may be removed, others may be added, and the sequence of steps may be altered. It is also to be understood that the description and the claims drawn to a method may include some indication in reference to sequential steps. However, the indication used is only to be viewed for identification purposes and not as a suggestion as to an order for the steps.
  • FIG. 18 illustrates an embodiment of a package circuit structure 100. The package circuit structure 100 includes a metal board 10, a plurality of embedded components 20, an insulating layer 30, and two antenna circuit boards 40. The metal board 10 includes a first surface 101 and a second surface 103 facing away from the first surface 101. The first surface 101 and the second surface 103 are arranged along a thickness direction of the metal board 10. At least one first groove 11 is recessed from the first surface 101 toward the second surface 103. At least one second groove 13 is recessed from the second surface 103 toward the first surface 101. The at least one first groove 11 and the at least one second groove 13 are spaced with each other along a first direction X perpendicular to the thickness direction. Each of the plurality of embedded components 20 is mounted in one of the at least one first groove 11 or one of the at least one second groove 13. The insulating layer 30 covers the first surface 101 and the second surface 103 and fills the at least one first groove 11 and the at least one second groove 13. The antenna circuit boards 40 are respectively stacked along the thickness direction on two opposite sides of the insulating layer 30. Each of the antenna circuit boards 40 includes at least one antenna 41 and at least one ground wiring 43. The metal board 10 is electrically connected to each of at least two ground wirings 43 of the antenna circuit boards 40.
  • In at least one embodiment, the package circuit structure 100 may include a plurality of first grooves 11 and a plurality of second grooves 13. The plurality of first grooves 11 and the plurality of the second grooves 13 are alternately arranged along the first direction X.
  • In at least one embodiment, each of the plurality of first grooves 11 and one of the plurality of the second grooves 13 may further be alternatively arranged along a second direction Y perpendicular to the first direction X and the thickness direction. So that the plurality of first grooves 11 and the plurality of the second grooves 13 are arranged in a matrix.
  • The antenna circuit board 40 includes a first antenna circuit board 40 a and a second antenna circuit board 40 b. The first antenna circuit board 40 a is located on one of the opposite sides of the insulating layer 30 adjacent to the first surface 101. The second antenna circuit board 40 b is located on another of the opposite sides of the insulating layer 30 adjacent to the second surface 103.
  • The package circuit structure 100 may further include at least one first conductive heat sink 45 a and at least one second conductive heat sink 45 b. Each of the at least one first conductive heat sink 45 a penetrates the first antenna circuit board 40 a along a thickness direction and penetrates a portion of the insulating layer 30 to connect an area of the adjacent first surface 101 of the metal board 10 corresponding to the second groove 13. Each of the at least one second conductive heat sink 45 b penetrates the second antenna circuit board 40 b along thickness direction, and penetrates a portion of the insulating layer 30 to connect an area of the adjacent second surface 103 of the metal board 10 corresponding to the first groove 11. So that the heat diffusion of the embedded components 20 may be accelerated, and it is beneficial to heat dissipation of the package circuit structure 100.
  • In at least one embodiment, on each of two opposite sides of the metal board 10 in the package circuit structure 100, an antenna area corresponding one antenna 41 and a heat dissipation area corresponding to one of the at least one first conductive heat sink 45 a or one of the at least one second conductive heat sink 45 b are alternately arranged along the first direction X. The antenna area corresponding one antenna 41 and the heat dissipation area corresponding to one of the at least one first conductive heat sink 45 a or one of the at least one second conductive heat sink 45 b may further be alternately arranged along the second direction Y. So that the antenna areas and the heat dissipation areas are arranged in a matrix on each of two opposite sides of the metal board 10.
  • In at least one embodiment, along a same direction, a width of each of the at least one first conductive heat sink 45 a is less than a width of an opening portion of the second groove 13 corresponding the first conductive heat sink 45 a along the thickness direction. A width of each of the at least one second conductive heat sink 45 b is less than a width of an opening portion of the first groove 11 corresponding the second conductive heat sink 45 b along the thickness direction.
  • Each of the at least one first conductive heat sink 45 a is electrically connected to one of the at least one ground wiring 43 of the first antenna circuit board 40 a. Each of the at least one second conductive heat sink 45 b is electrically connected to one of the at least one ground wiring 43 of the second antenna circuit board 40 b.
  • In at least one embodiment, each of the first antenna circuit board 40 a and the second antenna circuit board 40 b may further include at least one wiring layer 47. The at least one wiring layer 47 of the first antenna circuit board 40 a is between the at least one antenna 41 of the first antenna circuit board 40 a and the insulating layer 30. The least one wiring layer 47 of the second antenna circuit board 40 b between the at least one antenna 41 of the second antenna circuit board 40 b and the insulating layer 30.
  • In at least one embodiment, each of the first antenna circuit board 40 a and the second antenna circuit board 40 b may include a first wiring layer 47 a and a second wiring layer 47 b stacked on the first wiring layer 47 a along the thickness direction.
  • In at least one embodiment, referring to FIG. 8, at least one of the antenna circuit boards 40 may further include at least one connecting pad 48 exposed from a side of the corresponding antenna circuit board 40 facing away from the metal board 10 for connecting other electronic elements. Each connecting pad 48 electrically connects the at least one wiring layer 47.
  • In at least one embodiment, the package circuit structure 100 may further include solder masks formed on two opposite surfaces of the antenna circuit boards 40 facing away from the metal board 10. The at least one connecting pad 48 is exposed from the solder masks for connecting other electronic elements.
  • At least one conductive terminal 21 is formed on each of the plurality of the embedded components 20. Each of the plurality of the embedded components 20 is electrically connected to one of the antenna circuit boards 40 through the at least one conductive terminal 21. In at least one embodiment, the at least one conductive terminal 21 may be formed on a side of each of the plurality of the embedded components 20 received in the first groove 11 or the second groove 13 facing away from a bottom of the corresponding first groove 11 or a bottom of the corresponding second groove 13. So that a signal transmission loss between the antenna 41 and the embedded component 20 electrically connected to the corresponding antenna 41 may be reduced.
  • The metal board 10 may further include at least one through hole 15 penetrating the first surface 101 and the second surface 103. The at least one through hole 15 is spaced from the at least one first groove 11 and the at least one second groove 13.
  • A conductive via 70 corresponding each of the at least one through hole 15 may be formed and penetrates the corresponding through hole 15 to electrically connect the antenna circuit boards 40. The conductive via 70 is spaced from an inner wall surrounding to define the corresponding through hole 15 by the insulating layer 30.
  • In the package circuit structure 100, the at least one groove 11 and the at least one groove 13 are recessed in opposite direction and spaced from each other along the first direction X perpendicular to the thickness direction, which may improve the heat dissipation efficiency and a temperature equalization effect of the package circuit structure 100. The metal board 10 is electrically connected to the ground wiring, which may avoid electromagnetic interference between the embedded components 20. Furthermore, the conductive heat sink 45 (45 a, 45 b) may improve the heat dissipation efficiency of the package circuit structure 100. In addition, the antenna 41 and the conductive heat sink 45 (45 a, 45 b) are alternately arranged, which may further improve the heat dissipation efficiency and a temperature equalization effect of the package circuit structure 100.
  • It is to be understood, even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only; changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the plain meaning of the terms in which the appended claims are expressed.

Claims (18)

What is claimed is:
1. A method for manufacturing a package circuit structure comprising:
providing a metal board along a thickness direction comprising a first surface and a second surface facing away from the first surface;
recessing at least one first groove from the first surface toward the second surface, recessing at least one second groove from the second surface toward the first surface, wherein each of the at least one first groove and each of the at least one second groove are spaced with each other along a first direction perpendicular to the thickness direction;
mounting an embedded component in each of the at least one first groove and each of the at least one second groove respectively;
laminating a dielectric layer and an antenna circuit board sequentially on each of the first surface and the second surface of the metal board with the embedded components respectively, wherein two dielectric layers cover the first surface and the second surface, and fill the at least one first groove and the at least one second groove, two antenna circuit boards are stacked on opposite sides of the two dielectric layers along the thickness direction facing away from each other, each of the two antenna circuit boards comprises at least one antenna and at least one ground wiring, the metal board is electrically connected to the at least one ground wiring.
2. The method of claim 1, wherein a plurality of first grooves and a plurality of second grooves are formed, the plurality of first grooves and the plurality of second grooves are alternatively arranged along the first direction.
3. The method of claim 2, wherein the plurality of first grooves and the plurality of second grooves are alternatively arranged along a second direction perpendicular to the first direction and the thickness direction, the plurality of first grooves and the plurality of second grooves are arranged in a matrix.
4. The method of claim 3, wherein before mounting the embedded component in each of the at least one first groove and each of the at least one second groove respectively, further comprising defining at least one through hole penetrating the metal board along the thickness direction;
wherein in the step of laminating a dielectric layer and an antenna circuit board sequentially on each of the first surface and the second surface of the metal board with the embedded components respectively, the dielectric layers fills the at least one through hole; and the two antenna circuit boards are electrically connected to each other through a conductive via corresponding each of the at least one through hole and penetrating the corresponding through hole, the conductive via is spaced from an inner wall surrounding to define the corresponding through hole by the dielectric layer.
5. The method of claim 3, wherein the two antenna circuit boards comprise a first antenna circuit board on a side of the first surface facing away from the second surface and a second antenna circuit board on a side of the second surface facing away from the first surface; the first antenna circuit board comprises at least one first conductive heat sink, each of the at least one first conductive heat sink penetrates the first antenna circuit board and the adjacent dielectric layer along the thickness direction to connect an area of the first surface of the metal board corresponding to the second groove; the second antenna circuit board comprises at least one second conductive heat sink, each of the at least one second conductive heat sink penetrates the second antenna circuit board and the adjacent dielectric layer along the thickness direction to connect an area of the second surface of the metal board corresponding to the first groove.
6. The method of claim 5, wherein the package circuit structure comprises a plurality of the first conductive heat sinks and a plurality of the second conductive heat sinks, the plurality of the first conductive heat sinks and the antennas of the first antenna circuit board are arranged in a matrix, the plurality of the second conductive heat sinks and the antennas of the second antenna circuit board are arranged in a matrix.
7. The method of claim 1, wherein each of the two antenna circuit boards further comprises at least one wiring layer, the at least one wiring layer of each of the two antenna circuit boards is between the at least one antenna of the corresponding antenna circuit board and the adjacent dielectric layer.
8. The method of claim 4, wherein the step of laminating a dielectric layer and an antenna circuit board sequentially on each of the first surface and the second surface of the metal board with the embedded components respectively further comprises:
laminating a first single-sided board on each of the first surface and the second surface of the metal board with the embedded components respectively, wherein each first single-sided board comprises an insulating layer and a first metal layer stacked on the insulating layer, two insulating layers are combined with the metal board and fills in the plurality of first grooves, the plurality of second grooves and the plurality of through holes;
defining a plurality of first slots on the first single-sided board on a side of the first surface facing away from the second surface to expose each area of the first surface of the metal board corresponding to each of the plurality of second grooves, defining a plurality of second slots on the first single-sided board on a side of the second surface facing away from the first surface to expose each area of the second surface of the metal board corresponding to each first groove, and defining a connecting hole corresponding each of the at least one through hole to penetrated two first single-sided board and the corresponding through hole;
forming a first conductive heat dissipating portion in each of the plurality of first slots and the plurality of second slots respectively, and forming a first wiring layer on a surface of each of the insulating layers facing away from the metal board, and forming a conductive via corresponding to each connecting hole;
laminating a second single-sided board on a side of each of two first wiring layers facing away from the metal board respectively, wherein the second single-sided board comprises a first dielectric layer and a second metal layer stacked on the first dielectric layer, a side of the first dielectric layer facing away from the second metal layer is combined with the first wiring layer and fills gaps of the first wiring layer;
forming a second conductive heat dissipating portion corresponding to each of a plurality of first conductive heat dissipating portions to penetrate one of two second single-sided boards, and forming a second wiring layer on a surface of each of two first dielectric layers facing away from the metal board respectively, wherein the second wiring layer comprises a plurality of ground wirings, each of a plurality of second conductive heat dissipating portions penetrates one of the plurality of ground wirings and one of the two first dielectric layers to electrically connect the one of the plurality of ground wirings and one of the plurality of first conductive heat dissipating portions;
laminating a third single-sided board on a side of each of two second wiring layers facing away from the metal board respectively, wherein the third single-sided board comprises a second dielectric layer and a third metal layer, a side of the second dielectric layer facing away from the third metal layer is combined with the second wiring layer and fills gaps of the second wiring layer; and
forming a third conductive heat dissipating portion corresponding to each of a plurality of second conductive heat dissipating portions to penetrate one of two third single-sided boards, and forming a plurality of antennas on each of two second wiring layers, wherein each of a plurality of third conductive heat dissipating portions, one corresponding of the plurality of second conductive heat dissipating portions, and one corresponding of the plurality of first conductive heat dissipating portions are connected in that sequence to form a conductive heat sink.
9. The method of claim 8, wherein at least one conductive terminal is formed on a side of each of a plurality of embedded components facing away from a bottom of the plurality of first grooves or a bottom of the plurality of second grooves, each of the plurality of embedded components is electrically connected to one of the antenna circuit boards through the at least one conductive terminal.
10. A package circuit structure comprising:
a metal board;
a plurality of embedded components;
an insulating layer; and
two antenna circuit boards;
wherein the metal board includes a first surface and a second surface facing away from the first surface; the first surface and the second surface are arranged along a thickness direction of the metal board, at least one first groove is recessed from the first surface toward the second surface, at least one second groove is recessed from the second surface toward the first surface, the at least one first groove and the at least one second groove are spaced with each other along a first direction perpendicular to the thickness direction, each of the plurality of embedded components is mounted in one of the at least one first groove or one of the at least one second groove; the insulating layer covers the first surface and the second surface and fills the at least one first groove and the at least one second groove; the antenna circuit boards are respectively stacked along the thickness direction on two opposite sides of the insulating layer, each of the antenna circuit boards includes at least one antenna and at least one ground wiring, the metal board is electrically connected to the at least one ground wiring of each of the antenna circuit boards.
11. The package circuit structure of claim 10, wherein the package circuit structure further comprises a plurality of first grooves and a plurality of second grooves, the plurality of first grooves and the plurality of the second grooves are alternatively arranged along the first direction.
12. The package circuit structure of claim 11, wherein the plurality of first grooves and the plurality of second grooves are alternatively arranged along a second direction perpendicular to the first direction and the thickness direction, the plurality of first grooves and the plurality of second grooves are arranged in a matrix.
13. The package circuit structure of claim 12, wherein the antenna circuit boards includes a first antenna circuit board and a second antenna circuit board, the first antenna circuit board on one of the opposite sides of the insulating layer adjacent the first surface, the second antenna circuit board on another of the opposite sides of the insulating layer adjacent the second surface.
14. The package circuit structure of claim 13, wherein the package circuit structure further comprises a plurality of first conductive heat sinks and a plurality of second conductive heat sinks, each of the plurality of first conductive heat sinks penetrates the first antenna circuit board and a portion of the insulating layer along thickness direction to connect an area of the adjacent first surface of the metal board corresponding to the plurality of second grooves; each of the plurality of second conductive heat sinks penetrates the second antenna circuit board and a portion of the insulating layer to connect an area of the adjacent first surface of the metal board corresponding to the plurality of first grooves.
15. The package circuit structure of claim 14, wherein the first antenna circuit board comprises a plurality of antennas, the second antenna circuit board comprises a plurality of antennas of the first antenna circuit board, the plurality of first conductive heat sinks and the plurality of antennas are alternatively arranged along the first direction and the second direction respectively; the plurality of second conductive heat sinks and the plurality of antennas of the second antenna circuit board are alternatively arranged along the first direction and the second direction respectively.
16. The package circuit structure of claim 15, wherein the first antenna circuit board further comprises a plurality of ground wirings, the second antenna circuit board further comprises a plurality of ground wirings, each of the plurality of first conductive heat sinks is electrically connected to one of the plurality of ground wirings of the first antenna circuit board, each of the plurality of second conductive heat sinks is electrically connected to one of the plurality of ground wirings of the second antenna circuit board.
17. The package circuit structure of claim 13, wherein the first antenna circuit board comprises at least one wiring layer between the at least one antenna of the first antenna circuit board and the insulating layer, the second antenna circuit board comprises at least one wiring layer between the at least one antenna od the second antenna circuit board and the insulating layer.
18. The package circuit structure of claim 10, wherein at least one conductive terminal is formed on a side of each of the plurality of embedded components facing away from a bottom of the plurality of first grooves or a bottom of the plurality of second grooves, each of the plurality of embedded components is electrically connected to one of the antenna circuit boards through the at least one conductive terminal.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11582866B1 (en) * 2021-07-22 2023-02-14 Toyota Motor Engineering & Manufacturing North America, Inc. Systems including a power device-embedded PCB directly joined with a cooling assembly and method of forming the same
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Families Citing this family (1)

* Cited by examiner, † Cited by third party
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TWI793024B (en) * 2022-05-26 2023-02-11 矽品精密工業股份有限公司 Electronic package and manufacturing method thereof

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7353598B2 (en) * 2004-11-08 2008-04-08 Alien Technology Corporation Assembly comprising functional devices and method of making same
JP4901809B2 (en) * 2008-05-23 2012-03-21 新光電気工業株式会社 Multi-layer circuit board with built-in components
KR101228731B1 (en) * 2011-09-15 2013-02-01 삼성전기주식회사 Electronic device module and manufacturing method thereof
US10777515B2 (en) * 2017-10-25 2020-09-15 Sj Semiconductor (Jiangyin) Corporation Fan-out antenna packaging structure and preparation method thereof
KR101942746B1 (en) * 2017-11-29 2019-01-28 삼성전기 주식회사 Fan-out semiconductor package
CN110798974B (en) * 2018-08-01 2021-11-16 宏启胜精密电子(秦皇岛)有限公司 Embedded substrate, manufacturing method thereof and circuit board with embedded substrate
WO2020028579A1 (en) * 2018-08-02 2020-02-06 Viasat, Inc. Antenna element module
WO2020077617A1 (en) * 2018-10-19 2020-04-23 华为技术有限公司 Antenna packaging structure and manufacturing method thereof
CN210489609U (en) * 2019-09-17 2020-05-08 苏州日月新半导体有限公司 Integrated circuit package
CN110890357A (en) * 2019-12-24 2020-03-17 华进半导体封装先导技术研发中心有限公司 Embedded packaging structure of integrated antenna and radio frequency front end based on metal substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11582866B1 (en) * 2021-07-22 2023-02-14 Toyota Motor Engineering & Manufacturing North America, Inc. Systems including a power device-embedded PCB directly joined with a cooling assembly and method of forming the same
EP4340015A1 (en) * 2022-09-13 2024-03-20 Fujitsu Limited Semiconductor device with antenna

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