US20210123135A1 - Carrier ring used in a deposition chamber - Google Patents

Carrier ring used in a deposition chamber Download PDF

Info

Publication number
US20210123135A1
US20210123135A1 US16/679,255 US201916679255A US2021123135A1 US 20210123135 A1 US20210123135 A1 US 20210123135A1 US 201916679255 A US201916679255 A US 201916679255A US 2021123135 A1 US2021123135 A1 US 2021123135A1
Authority
US
United States
Prior art keywords
carrier ring
annular
region
wafer
slope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US16/679,255
Inventor
Min-Fu Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
United Semiconductor Xiamen Co Ltd
Original Assignee
United Semiconductor Xiamen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Semiconductor Xiamen Co Ltd filed Critical United Semiconductor Xiamen Co Ltd
Assigned to United Semiconductor (Xiamen) Co., Ltd. reassignment United Semiconductor (Xiamen) Co., Ltd. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LEE, MIN-FU
Publication of US20210123135A1 publication Critical patent/US20210123135A1/en
Priority to US17/516,727 priority Critical patent/US11795544B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4581—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber characterised by material of construction or surface finish of the means for supporting the substrate
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4585—Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C23C16/509—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
    • C23C16/5096—Flat-bed apparatus
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/513—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using plasma jets

Definitions

  • the present invention relates to the field of semiconductor technology, and in particular to a carrier ring used in a deposition chamber, which can improve edge local defect problems and improve semiconductor process yield.
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • CVD Chemical Vapor Deposition
  • One object of the present invention is to provide an improved carrier ring for use in a deposition chamber that can alleviate the deficiencies and shortcomings of the prior art described above.
  • a step height is disposed between the slope and the lower carrier ring surface.
  • the step height ranges between 0.3 mm and 0.6 mm.
  • the slope is connected to the top carrier ring surface at a first top-facing corner.
  • the first top-facing corner has an angle ranging between 100° and 180°.
  • the carrier ring further comprises a sidewall surface between the slope and the lower carrier ring surface.
  • a slit is situated between the sidewall surface and a peripheral edge of the wafer during processing.
  • the slope is connected to the sidewall surface at a second top-facing corner.
  • the second top-facing corner has an angle ranging between 95° and 150°.
  • the slope is lower than a top surface of the wafer during processing.
  • a chamber for processing deposition on a wafer includes a wafer holder having a central surface region for placing a wafer and a carrier ring support surface encircling the central surface region; and a carrier ring disposed on the carrier ring support surface.
  • the carrier ring comprises an annular disk body comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region.
  • the annular peripheral region comprises a top carrier ring surface.
  • the annular wafer support region has a lower carrier ring surface that is in physical contact with a wafer during processing.
  • the annular transition region comprises a slope between the top carrier ring surface and the lower carrier ring surface.
  • the carrier ring support surface is a step down from the central surface region.
  • a step height is disposed between the slope and the lower carrier ring surface.
  • the transition region has a thickness that increases with a radius of the annular disk body.
  • the carrier ring further comprises a sidewall surface between the slope and the lower carrier ring surface.
  • a slit is situated between the sidewall surface and a peripheral edge of the wafer during processing.
  • FIG. 1 is a schematic diagram of a chamber for performing deposition processing on a wafer according to an embodiment of the invention.
  • FIG. 2 is an enlarged schematic view of the carrier ring placed on the carrier ring support surface.
  • FIG. 3 is an enlarged schematic view of the carrier ring.
  • FIG. 4 is an enlarged cross-sectional view showing a carrier ring according to another embodiment of the present invention.
  • FIG. 1 is a schematic diagram of a chamber for performing deposition processing on a wafer according to an embodiment of the invention.
  • the chamber 1 is, for example, a deposition chamber in a plasma enhanced chemical vapor deposition (PECVD) tool.
  • the chamber 1 comprises a wafer holder 10 having a central surface region 10 a for placing a wafer 100 , and a carrier ring support surface 10 b surrounding the central surface area 10 a .
  • the carrier ring support surface 10 b is lowered by one step from the central surface area 10 a.
  • the central surface region 10 a may be an approximately circular and raised region, and the central surface region 10 a has an area slightly smaller than the area of the wafer 100 such that when the wafer 100 is placed on the central surface region 10 a , the bevel edge region 101 thereof slightly extends beyond the central surface region 10 a .
  • a heater plate 110 or other components may be disposed within the wafer holder 10 in accordance with embodiments of the present invention.
  • an index plate may be additionally disposed around the wafer holder 10 .
  • a showerhead 20 may be disposed above the wafer holder 10 in the chamber 1 to directly face the wafer 100 , which may be coupled to the gas inlet system or the manifold to allow the reaction gas to flow into the chamber 1 . Additionally, the showerhead 20 can be coupled to a power source (not shown) to provide the voltage or bias required to generate the plasma 30 .
  • a reactive gas such as silane, oxygen or ammonia is used to form plasma 30 between the showerhead 20 and the wafer 100 , and a reaction product such as silicon oxide or silicon nitride is deposited on the wafer 100 .
  • peripheral devices such as the gas inlet system or manifold, a gas supply line, and a control module coupled to the chamber 1 are not shown in the figures.
  • peripheral devices such as the gas inlet system or manifold, a gas supply line, and a control module coupled to the chamber 1 are not shown in the figures.
  • a carrier ring 40 is disposed on the carrier ring support surface 10 b , wherein the carrier ring 40 includes an annular disk body 400 , wherein the annular disk body 400 may be composed of a material that does not participate in a deposition reaction, such as aluminum oxidation, but not limited to this.
  • the annular disk body 400 can be divided into an annular wafer support region 401 , an annular peripheral region 402 , and an annular transition region 403 between the annular wafer support region 401 and the annular peripheral regions 402 .
  • the annular peripheral region 402 includes a top carrier ring surface 402 a and the annular wafer support region 401 has a lower carrier ring surface 401 a that is in direct contact with the wafer 100 during processing.
  • the annular transition region 403 comprises a slope 403 a between the top carrier ring surface 402 a and the lower carrier ring surface 401 a .
  • the slope 403 a may be a flat surface that is not parallel to the top carrier ring surface 402 a.
  • FIG. 2 is an enlarged schematic view of the carrier ring placed on the carrier ring support surface 10 b
  • FIG. 3 is an enlarged schematic view of the carrier ring.
  • the carrier ring 40 is placed on the carrier ring support surface 10 b
  • the wafer 100 is placed on the central surface region 10 a .
  • the range of the bevel edge region 101 that slightly extends beyond the perimeter of the central surface region 10 a corresponds to the annular wafer support region 401 and the lower carrier ring surface 401 a.
  • the lower carrier ring surface 401 a does not directly contact the bevel edge region 101 , and at this point, the entire slope 403 a may be lower than the top surface 100 a of the wafer 100 .
  • a delivery device for example, a spider fork, will protrude below the carrier ring 40 and raise the carrier ring 40 such that the lower carrier ring surface 401 a directly contacts the bevel edge region 101 of the wafer 100 and holds the wafer 100 .
  • the slope 403 a may be slightly higher than the top surface 100 a of the wafer 100 .
  • the thickness of the wafer 100 is, for example, 0.775 mm.
  • the slope 403 a of the annular transition region 403 inclines from the top carrier ring surface 402 a toward the lower carrier ring surface 401 a .
  • there is a step height d between the slope 403 a and the lower carrier ring surface 401 a , wherein the step height d may range between 0.3 mm and 0.6 mm.
  • the thickness of the annular transition region 403 has a thickness that increases with a radius of the annular disk body 400 , that is, the portion of the annular transition region 403 that is adjacent to the annular peripheral region 402 is relatively thicker, and the portion near the annular wafer support region 401 is relatively thinner.
  • the thickness T 0 of the annular peripheral region 402 may be about 4.0 to 6.0 mm, for example, 4.7 mm, but is not limited thereto.
  • the thickness T 1 of the annular wafer support region 401 may be about 3.0 to 4.0 mm, for example, 3.6 mm, but is not limited thereto.
  • the slope 403 a and the top carrier ring surface 402 a are connected to a first top-face corner 411 .
  • the angle ⁇ 1 of the first top-face corner 411 is between 100° and 180°.
  • the carrier ring 40 further includes a sidewall surface 404 a between the slope 403 a and the lower carrier ring surface 401 a .
  • the slope 403 a and the sidewall surface 404 a are connected at a second top-face corner 412 .
  • the angle ⁇ 2 of the second top-face corner 412 is between 95° and 150°.
  • a slit 420 is formed between the sidewall surface 404 a and a peripheral edge 100 b of the wafer 100 during processing.
  • annular disk body 400 of the carrier ring 40 is divided into an annular wafer support region 401 , an annular peripheral region 402 , and an annular transition region 403 to form a slope in close proximity to the bevel edge region 101 of the wafer 100 .
  • Such configuration can prevent the by-product of the deposition reaction from being generated on the carrier ring 40 , improving the problem of the edge local defect.
  • FIG. 4 is an enlarged cross-sectional view showing a carrier ring 40 a according to another embodiment of the present invention, wherein the same elements, layers or regions are denoted by the same reference numerals.
  • the first top-facing corner 411 and the second top-facing corner 412 may be relatively rounded corner structures.
  • the slope 403 a of the annular transition region 403 between the first top-facing corner 411 and the second top-facing corner 412 may be a surface with curvature or a curved surface.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A carrier ring used in a deposition chamber includes an annular disk body comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region. The annular peripheral region has a top carrier ring surface. The annular wafer support region has a lower carrier ring surface that is in physical contact with a wafer during processing. The annular transition region has a slope between the top carrier ring surface and the lower carrier ring surface. The slope downwardly inclines from the top carrier ring surface toward the wafer.

Description

    BACKGROUND OF THE INVENTION 1. Field of the Invention
  • The present invention relates to the field of semiconductor technology, and in particular to a carrier ring used in a deposition chamber, which can improve edge local defect problems and improve semiconductor process yield.
    • 2. Description of the Prior Art
  • Plasma Enhanced Chemical Vapor Deposition (PECVD) is a process by which thin films of various materials can be deposited on wafers at lower temperature than that of standard Chemical Vapor Deposition (CVD). In PECVD processes, deposition is achieved by introducing reactant gases between parallel electrodes—a grounded electrode and an RF-energized electrode. The capacitive coupling between the electrodes excites the reactant gases into plasma, which induces a chemical reaction and results in the reaction product being deposited on the wafer.
  • It is known that in some PECVD models (for example, the Vector series of Lam Research Co.), a carrier ring is placed around the wafer holder. The carrier ring and a spider fork enable the wafer to move smoothly between different deposition chambers. However, on the surface of the carrier ring, near the edge of the wafer, by-products of the deposition reaction are easily generated, resulting in edge local defects.
    • SUMMARY OF THE INVENTION
  • One object of the present invention is to provide an improved carrier ring for use in a deposition chamber that can alleviate the deficiencies and shortcomings of the prior art described above.
  • According to one aspect of the invention, a carrier ring used in a deposition chamber includes an annular disk body comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region. The annular peripheral region comprises a top carrier ring surface, the annular wafer support region has a lower carrier ring surface that is in physical contact with a wafer during wafer delivery, and the annular transition region comprises a slope between the top carrier ring surface and the lower carrier ring surface. The slope downwardly inclines from the top carrier ring surface toward the lower carrier ring surface.
  • According to some embodiments, a step height is disposed between the slope and the lower carrier ring surface.
  • According to some embodiments, the step height ranges between 0.3 mm and 0.6 mm.
  • According to some embodiments, the annular transition region has a thickness that increases with a radius of the annular disk body.
  • According to some embodiments, the slope is connected to the top carrier ring surface at a first top-facing corner.
  • According to some embodiments, the first top-facing corner has an angle ranging between 100° and 180°.
  • According to some embodiments, the carrier ring further comprises a sidewall surface between the slope and the lower carrier ring surface.
  • According to some embodiments, a slit is situated between the sidewall surface and a peripheral edge of the wafer during processing.
  • According to some embodiments, the slope is connected to the sidewall surface at a second top-facing corner.
  • According to some embodiments, the second top-facing corner has an angle ranging between 95° and 150°.
  • According to some embodiments, the slope is lower than a top surface of the wafer during processing.
  • According to another aspect of the invention, a chamber for processing deposition on a wafer includes a wafer holder having a central surface region for placing a wafer and a carrier ring support surface encircling the central surface region; and a carrier ring disposed on the carrier ring support surface. The carrier ring comprises an annular disk body comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region. The annular peripheral region comprises a top carrier ring surface. The annular wafer support region has a lower carrier ring surface that is in physical contact with a wafer during processing. The annular transition region comprises a slope between the top carrier ring surface and the lower carrier ring surface.
  • According to some embodiments, the slope downwardly inclines from the top carrier ring surface toward the lower carrier ring surface.
  • According to some embodiments, the carrier ring support surface is a step down from the central surface region.
  • According to some embodiments, a step height is disposed between the slope and the lower carrier ring surface.
  • According to some embodiments, the transition region has a thickness that increases with a radius of the annular disk body.
  • According to some embodiments, the carrier ring further comprises a sidewall surface between the slope and the lower carrier ring surface.
  • According to some embodiments, a slit is situated between the sidewall surface and a peripheral edge of the wafer during processing.
  • These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a schematic diagram of a chamber for performing deposition processing on a wafer according to an embodiment of the invention.
  • FIG. 2 is an enlarged schematic view of the carrier ring placed on the carrier ring support surface.
  • FIG. 3 is an enlarged schematic view of the carrier ring.
  • FIG. 4 is an enlarged cross-sectional view showing a carrier ring according to another embodiment of the present invention.
    •  DETAILED DESCRIPTION
  • In the following detailed description of the disclosure, reference is made to the accompanying drawings, which form a part hereof, and in which is shown, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are described in sufficient details to enable those skilled in the art to practice the invention.
  • Other embodiments may be utilized, and structural, logical, and electrical changes may be made without departing from the scope of the present invention. Therefore, the following detailed description is not to be considered as limiting, but the embodiments included herein are defined by the scope of the accompanying claims.
  • Please refer to FIG. 1, which is a schematic diagram of a chamber for performing deposition processing on a wafer according to an embodiment of the invention. As shown in FIG. 1, the chamber 1 is, for example, a deposition chamber in a plasma enhanced chemical vapor deposition (PECVD) tool. The chamber 1 comprises a wafer holder 10 having a central surface region 10 a for placing a wafer 100, and a carrier ring support surface 10 b surrounding the central surface area 10 a. According to an embodiment of the invention, the carrier ring support surface 10 b is lowered by one step from the central surface area 10 a.
  • According to an embodiment of the present invention, the central surface region 10 a may be an approximately circular and raised region, and the central surface region 10 a has an area slightly smaller than the area of the wafer 100 such that when the wafer 100 is placed on the central surface region 10 a, the bevel edge region 101 thereof slightly extends beyond the central surface region 10 a. In addition, a heater plate 110 or other components may be disposed within the wafer holder 10 in accordance with embodiments of the present invention. According to an embodiment of the invention, an index plate may be additionally disposed around the wafer holder 10.
  • According to an embodiment of the present invention, a showerhead 20 may be disposed above the wafer holder 10 in the chamber 1 to directly face the wafer 100, which may be coupled to the gas inlet system or the manifold to allow the reaction gas to flow into the chamber 1. Additionally, the showerhead 20 can be coupled to a power source (not shown) to provide the voltage or bias required to generate the plasma 30. A reactive gas such as silane, oxygen or ammonia is used to form plasma 30 between the showerhead 20 and the wafer 100, and a reaction product such as silicon oxide or silicon nitride is deposited on the wafer 100.
  • To simplify the description, peripheral devices such as the gas inlet system or manifold, a gas supply line, and a control module coupled to the chamber 1 are not shown in the figures. Those skilled in the art will appreciate that the above-described configurations are merely illustrative and that the present invention can be applied in a variety of different configurations.
  • According to an embodiment of the present invention, a carrier ring 40 is disposed on the carrier ring support surface 10 b, wherein the carrier ring 40 includes an annular disk body 400, wherein the annular disk body 400 may be composed of a material that does not participate in a deposition reaction, such as aluminum oxidation, but not limited to this. According to an embodiment of the invention, the annular disk body 400 can be divided into an annular wafer support region 401, an annular peripheral region 402, and an annular transition region 403 between the annular wafer support region 401 and the annular peripheral regions 402.
  • In accordance with an embodiment of the invention, the annular peripheral region 402 includes a top carrier ring surface 402 a and the annular wafer support region 401 has a lower carrier ring surface 401 a that is in direct contact with the wafer 100 during processing. In accordance with an embodiment of the invention, the annular transition region 403 comprises a slope 403 a between the top carrier ring surface 402 a and the lower carrier ring surface 401 a. According to an embodiment of the invention, the slope 403 a may be a flat surface that is not parallel to the top carrier ring surface 402 a.
  • Please refer to FIG. 2 and FIG. 3, wherein FIG. 2 is an enlarged schematic view of the carrier ring placed on the carrier ring support surface 10 b, and FIG. 3 is an enlarged schematic view of the carrier ring. As shown in FIG. 2 and FIG. 3, the carrier ring 40 is placed on the carrier ring support surface 10 b, and the wafer 100 is placed on the central surface region 10 a. The range of the bevel edge region 101 that slightly extends beyond the perimeter of the central surface region 10 a corresponds to the annular wafer support region 401 and the lower carrier ring surface 401 a.
  • When the deposition reaction is performed, the lower carrier ring surface 401 a does not directly contact the bevel edge region 101, and at this point, the entire slope 403 a may be lower than the top surface 100 a of the wafer 100. When it is necessary to move the wafer 100 to the next chamber, a delivery device (not shown), for example, a spider fork, will protrude below the carrier ring 40 and raise the carrier ring 40 such that the lower carrier ring surface 401 a directly contacts the bevel edge region 101 of the wafer 100 and holds the wafer 100. At this point, the slope 403 a may be slightly higher than the top surface 100 a of the wafer 100.
  • According to an embodiment of the invention, the thickness of the wafer 100 is, for example, 0.775 mm. According to an embodiment of the invention, the slope 403 a of the annular transition region 403 inclines from the top carrier ring surface 402 a toward the lower carrier ring surface 401 a. According to an embodiment of the invention, between the slope 403 a and the lower carrier ring surface 401 a, there is a step height d, wherein the step height d may range between 0.3 mm and 0.6 mm.
  • Moreover, in accordance with an embodiment of the present invention, the thickness of the annular transition region 403 has a thickness that increases with a radius of the annular disk body 400, that is, the portion of the annular transition region 403 that is adjacent to the annular peripheral region 402 is relatively thicker, and the portion near the annular wafer support region 401 is relatively thinner. According to an embodiment of the present invention, the thickness T0 of the annular peripheral region 402 may be about 4.0 to 6.0 mm, for example, 4.7 mm, but is not limited thereto. According to an embodiment of the present invention, the thickness T1 of the annular wafer support region 401 may be about 3.0 to 4.0 mm, for example, 3.6 mm, but is not limited thereto.
  • According to an embodiment of the invention, the slope 403 a and the top carrier ring surface 402 a are connected to a first top-face corner 411. According to an embodiment of the invention, the angle θ1 of the first top-face corner 411 is between 100° and 180°.
  • According to an embodiment of the invention, the carrier ring 40 further includes a sidewall surface 404 a between the slope 403 a and the lower carrier ring surface 401 a. In accordance with an embodiment of the invention, the slope 403 a and the sidewall surface 404 a are connected at a second top-face corner 412. According to an embodiment of the invention, the angle θ2 of the second top-face corner 412 is between 95° and 150°. In accordance with an embodiment of the invention, a slit 420 is formed between the sidewall surface 404 a and a peripheral edge 100 b of the wafer 100 during processing.
  • An advantage of the present invention is that the annular disk body 400 of the carrier ring 40 is divided into an annular wafer support region 401, an annular peripheral region 402, and an annular transition region 403 to form a slope in close proximity to the bevel edge region 101 of the wafer 100. Such configuration can prevent the by-product of the deposition reaction from being generated on the carrier ring 40, improving the problem of the edge local defect.
  • FIG. 4 is an enlarged cross-sectional view showing a carrier ring 40 a according to another embodiment of the present invention, wherein the same elements, layers or regions are denoted by the same reference numerals. As shown in FIG. 4, the first top-facing corner 411 and the second top-facing corner 412 may be relatively rounded corner structures. Further, the slope 403 a of the annular transition region 403 between the first top-facing corner 411 and the second top-facing corner 412 may be a surface with curvature or a curved surface.
  • Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

Claims (18)

What is claimed is:
1. A carrier ring used in a deposition chamber, comprising:
an annular disk body comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region;
wherein the annular peripheral region comprises a top carrier ring surface, the annular wafer support region has a lower carrier ring surface that is in physical contact with a wafer during wafer delivery, and the annular transition region comprises a slope between the top carrier ring surface and the lower carrier ring surface;
and wherein the slope downwardly inclines from the top carrier ring surface toward the lower carrier ring surface.
2. The carrier ring according to claim 1, wherein a step height is disposed between the slope and the lower carrier ring surface.
3. The carrier ring according to claim 2, wherein the step height ranges between 0.3 mm and 0.6 mm.
4. The carrier ring according to claim 1, wherein the annular transition region has a thickness that increases with a radius of the annular disk body.
5. The carrier ring according to claim 1, wherein the slope is connected to the top carrier ring surface at a first top-facing corner.
6. The carrier ring according to claim 5, wherein the first top-facing corner has an angle ranging between 100° and 180°.
7. The carrier ring according to claim 6 further comprising a sidewall surface between the slope and the lower carrier ring surface.
8. The carrier ring according to claim 7, wherein a slit is situated between the sidewall surface and a peripheral edge of the wafer during processing.
9. The carrier ring according to claim 7, wherein the slope is connected to the sidewall surface at a second top-facing corner.
10. The carrier ring according to claim 9, wherein the second top-facing corner has an angle ranging between 95° and 150°.
11. The carrier ring according to claim 1, wherein the slope is lower than a top surface of the wafer during processing.
12. A chamber for processing deposition on a wafer, comprising:
a wafer holder having a central surface region for placing a wafer and a carrier ring support surface encircling the central surface region; and
a carrier ring disposed on the carrier ring support surface, the carrier ring comprising an annular disk body comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region, wherein the annular peripheral region comprises a top carrier ring surface, the annular wafer support region has a lower carrier ring surface that is in physical contact with a wafer during processing, and the annular transition region comprises a slope between the top carrier ring surface and the lower carrier ring surface.
13. The chamber according to claim 12, wherein the slope downwardly inclines from the top carrier ring surface toward the lower carrier ring surface.
14. The chamber according to claim 12, wherein the carrier ring support surface is a step down from the central surface region.
15. The chamber according to claim 12, wherein a step height is disposed between the slope and the lower carrier ring surface.
16. The chamber according to claim 12, wherein the transition region has a thickness that increases with a radius of the annular disk body.
17. The chamber according to claim 12, wherein the carrier ring further comprises a sidewall surface between the slope and the lower carrier ring surface.
18. The chamber according to claim 17, wherein a slit is situated between the sidewall surface and a peripheral edge of the wafer during processing.
US16/679,255 2019-10-25 2019-11-10 Carrier ring used in a deposition chamber Abandoned US20210123135A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/516,727 US11795544B2 (en) 2019-10-25 2021-11-02 Carrier ring used in a deposition chamber

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201911021514.4 2019-10-25
CN201911021514.4A CN112708871A (en) 2019-10-25 2019-10-25 Carrier ring for use in deposition chamber

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US17/516,727 Continuation US11795544B2 (en) 2019-10-25 2021-11-02 Carrier ring used in a deposition chamber

Publications (1)

Publication Number Publication Date
US20210123135A1 true US20210123135A1 (en) 2021-04-29

Family

ID=75541457

Family Applications (2)

Application Number Title Priority Date Filing Date
US16/679,255 Abandoned US20210123135A1 (en) 2019-10-25 2019-11-10 Carrier ring used in a deposition chamber
US17/516,727 Active 2040-02-12 US11795544B2 (en) 2019-10-25 2021-11-02 Carrier ring used in a deposition chamber

Family Applications After (1)

Application Number Title Priority Date Filing Date
US17/516,727 Active 2040-02-12 US11795544B2 (en) 2019-10-25 2021-11-02 Carrier ring used in a deposition chamber

Country Status (2)

Country Link
US (2) US20210123135A1 (en)
CN (1) CN112708871A (en)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100397891B1 (en) * 2001-07-25 2003-09-19 삼성전자주식회사 chuck assembly of etching equipment for fabricating semiconductor device
US7988814B2 (en) * 2006-03-17 2011-08-02 Tokyo Electron Limited Plasma processing apparatus, plasma processing method, focus ring, and focus ring component
JP2009087989A (en) * 2007-09-27 2009-04-23 Nuflare Technology Inc Method of forming epitaxial growth film
JP5665726B2 (en) * 2011-12-14 2015-02-04 株式会社東芝 Etching device and focus ring
TWI615917B (en) * 2015-04-27 2018-02-21 Ｓｕｍｃｏ股份有限公司 Susceptor and epitaxial growth device
US10655224B2 (en) * 2016-12-20 2020-05-19 Lam Research Corporation Conical wafer centering and holding device for semiconductor processing
US20190259647A1 (en) * 2018-02-17 2019-08-22 Applied Materials, Inc. Deposition ring for processing reduced size substrates

Also Published As

Publication number Publication date
CN112708871A (en) 2021-04-27
US20220056582A1 (en) 2022-02-24
US11795544B2 (en) 2023-10-24

Similar Documents

Publication Publication Date Title
US10229845B2 (en) Substrate treatment apparatus
CN106148915B (en) Substrate pedestal module including backside gas delivery line and method of making the same
US7024105B2 (en) Substrate heater assembly
JP4470970B2 (en) Plasma processing equipment
US10242848B2 (en) Carrier ring structure and chamber systems including the same
US20060196420A1 (en) High density plasma chemical vapor deposition apparatus
US7501161B2 (en) Methods and apparatus for reducing arcing during plasma processing
US10655224B2 (en) Conical wafer centering and holding device for semiconductor processing
US10312076B2 (en) Application of bottom purge to increase clean efficiency
US10600624B2 (en) System and method for substrate processing chambers
US8097082B2 (en) Nonplanar faceplate for a plasma processing chamber
CN105940143B (en) Gas for eliminating shadow frame limits device assembly
US20170162422A1 (en) Amalgamated cover ring
US20170081757A1 (en) Shadow frame with non-uniform gas flow clearance for improved cleaning
US20150322571A1 (en) Substrate processing apparatus
US20230298922A1 (en) Electrostatic chuck design with improved chucking and arcing performance
CN112201568A (en) Method and equipment for epitaxial growth of silicon wafer
US11398397B2 (en) Electrostatic chuck and plasma processing apparatus including the same
US11795544B2 (en) Carrier ring used in a deposition chamber
US20120211165A1 (en) Sample table and microwave plasma processing apparatus
US11821106B2 (en) Semiconductor process chamber including lower volume upper dome
US10896842B2 (en) Manufacturing method of sample table
US10468221B2 (en) Shadow frame with sides having a varied profile for improved deposition uniformity
TWI798856B (en) Semiconductor processing system and method for bevel backside deposition elimination
US20230057432A1 (en) Ceramic coated quartz lid for processing chamber

Legal Events

Date Code Title Description
AS Assignment

Owner name: UNITED SEMICONDUCTOR (XIAMEN) CO., LTD., CHINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:LEE, MIN-FU;REEL/FRAME:050964/0542

Effective date: 20191108

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION