US20200334359A1 - System and method for protecting firmware of baseboard management controller of computing device - Google Patents
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- US20200334359A1 US20200334359A1 US16/398,752 US201916398752A US2020334359A1 US 20200334359 A1 US20200334359 A1 US 20200334359A1 US 201916398752 A US201916398752 A US 201916398752A US 2020334359 A1 US2020334359 A1 US 2020334359A1
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- 238000000034 method Methods 0.000 title claims abstract description 21
- 230000002093 peripheral effect Effects 0.000 claims abstract description 4
- 230000004224 protection Effects 0.000 claims description 25
- 230000004075 alteration Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/572—Secure firmware programming, e.g. of basic input output system [BIOS]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/66—Updates of program code stored in read-only memory [ROM]
Definitions
- the subject matter herein generally relates to firmware of baseboard management controller of computing device.
- a baseboard management controller is a specialized service processor that monitors a physical state of a computing device.
- the BMC is usually contained in a motherboard or main circuit board of the computing device being monitored. If firmware of the BMC is damaged for some reason, the BMC will not work properly. A protection of the BMC against damages is desired.
- FIG. 1 is a block diagram of an embodiment of a firmware protecting system of a baseboard management controller of a computing device.
- FIG. 2 is a block diagram of an embodiment of a logic controlling unit of the system of FIG. 1 .
- FIGS. 3 and 4 are flowcharts of method for protecting a firmware of the baseboard management controller of the computing device.
- Coupled is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections.
- the connection can be such that the objects are permanently connected or releasably connected.
- comprising means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in a so-described combination, group, series, and the like.
- FIG. 1 illustrates a firmware protecting system 100 in accordance with an embodiment of the present disclosure.
- the firmware protecting system 100 operates in a computing device (not shown).
- the computing device may be a computer, a server, or other hardware device.
- the firmware protecting system 100 includes a logic controlling unit 10 , a baseboard management controller (BMC 20 ), and a serial peripheral interface read only memory device (SPI ROM 30 ).
- the logic controlling unit 10 may be a complex programmable logic device (CPLD).
- the BMC 20 is electrically coupled to the SPI ROM 30
- the logic controlling unit 10 is electrically coupled between the SPI ROM 30 and the BMC 20 .
- the SPI ROM 30 is in communication with the BMC 20
- the logic controlling unit 10 is in communication with the SPI ROM 30 and the BMC 20 .
- the logic controlling unit 10 can communicate with the SPI ROM 30 through an SPI bus.
- the SPI ROM 30 includes a first block 32 and a second block 34 .
- the first block 32 stores a main program.
- the second block 34 stores a backup program, which is identical to the main program stored in the SPI ROM 30 .
- the BMC 20 obtains the main program from the first block 32 , and loads the main program to work normally.
- the backup program can recover the main program when the main program of the SPI ROM 30 is not altered or damaged, to allow the BMC to work normally.
- the SPI ROM 30 further includes a write protection pin WP, and the write protection pin WP of the SPI ROM 30 is active when in a low state (such as logic 0). The low level signal thus prevents the SPI ROM 30 from being overwritten.
- FIG. 2 illustrates that the logic controlling unit 10 includes a protecting module 12 , a determining module 14 , and a controlling module 16 .
- the protecting module 12 When the computing device is powered on, the protecting module 12 will lock the main program and the backup program into write-protected mode in the SPI ROM 30 .
- the protecting module 12 sends a write protection command to the SPI ROM 30 , and the main program and the backup program are locked according to the write protection command. Therefore, the SPI ROM 30 can only read data, and the main program and the backup program are protected against alteration.
- the protecting module 12 sets a potential of the write protection pin WP of the SPI ROM 30 to a low level state, to write-protect the main program and the backup program in the SPI ROM 30 .
- the logic controlling unit 10 After the logic controlling unit 10 write-protects the SPI ROM 30 , the logic controlling unit 10 outputs a signal fed back to the BMC 20 , and the BMC 20 will obtain the main program from the first block 32 of the SPI ROM 30 to perform work.
- the determining module 14 determines whether the main program is altered or damaged when the main program is obtained.
- the controlling module 16 sends a deep sleep command to the SPI ROM 30 .
- the SPI ROM 30 cannot be read from or written to, protecting the main program and the backup program of SPI ROM 30 .
- the controlling module 16 invokes the backup program from the second block 34 , and writes the backup program to the first block 32 .
- the logic controlling unit 10 will notify the BMC 20 to read the main program in the first block 32 of the SPI ROM 30 again.
- the logic controlling unit 10 can recover the main program of the first block 32 using the backup program of the second block 34 whenever the main program of the first block 32 is not in an original state.
- the BMC 20 After the damaged main program is repaired, the BMC 20 will read normally the main program in the first block 32 of the SPI ROM 30 , the server will be in a normal working state, and the BMC 20 will feed back to the logic controlling unit 10 .
- the controlling module 16 will send the deep sleep command to the SPI ROM 30 , to control the SPI ROM 30 to enter the deep sleep mode.
- the determining module 14 may determine that a request to update the BMC 20 firmware online is received when the SPI ROM 30 is in the deep sleep mode.
- the controlling module 16 unlocks write protection of the main program and the backup program and the SPI ROM 30 exits from the deep sleep mode when the BMC 20 has such request.
- the BMC 20 performs an online update of the main program in the first block 32 , and notifies the logic controlling unit 10 after completing the update.
- the controlling module 16 reads the updated main program from the first block 32 and writes the updated main program as an overwrite to the backup program in the second block 34 .
- the controlling module 16 sends a deep sleep command to the SPI ROM 30 , to control the SPI ROM 30 accordingly.
- FIGS. 3 and 4 are flowcharts depicting an embodiment of a method to protect firmware of a baseboard management controller.
- the method is provided by way of example, as there are a variety of ways to carry out the method. The method described below can be carried out using the configurations illustrated in FIGS. 1-2 for example, and various elements of these figures are referenced in explaining the example method.
- Each block shown in FIGS. 3 and 4 represents one or more processes, methods, or subroutines, carried out in the example method.
- the illustrated order of blocks is illustrative only and the order of the blocks can change. Additional blocks can be added or fewer blocks may be utilized, without departing from the present disclosure.
- the example method can begin at block 300 .
- the computing device is powered on.
- the computing device may be a computer, a server, or other hardware device.
- the protecting module 12 sends a write protection command to the SPI ROM 30 , to lock the main program and the backup program. Therefore, the SPI ROM 30 can only read data, and the main program and the backup program are protected against alteration.
- the protecting module 12 sets a potential of the write protection pin WP of the SPI ROM 30 to a low level state, to write-protect the main program and the backup program in the SPI ROM 30 .
- the BMC 20 obtains the main program from the first block 32 of the SPI ROM 30 to perform work.
- the determining module 14 determines whether the main program is altered or damaged when the main program is obtained. If the main program is altered or damaged, block 320 is implemented, otherwise block 310 is implemented.
- the controlling module 16 sends a deep sleep command to the SPI ROM 30 , to control the SPI ROM 30 to enter a deep sleep mode.
- the controlling module 16 will send the deep sleep command to the SPI ROM 30 , to control the SPI ROM 30 to enter the deep sleep mode. At this time, the SPI ROM 30 cannot be read from or written to, protecting the main program and the backup program of SPI ROM 30 .
- the determining module 14 determines whether that a request to update the BMC 20 firmware online is received. If the BMC 20 has such request to update the firmware online, block 314 is implemented, otherwise returns to block 310 .
- the controlling module 16 unlocks write protection of the main program and the backup program and the SPI ROM 30 exits from the deep sleep mode.
- the controlling module 16 unlocks various protections (such as write protection and deep sleep mode) and feeds this state back to the BMC 20 .
- various protections such as write protection and deep sleep mode
- the SPI ROM 30 can be written.
- the determining module 14 determines whether the BMC 20 completes the firmware update. If the BMC 20 has complete the firmware update, block 318 is implemented, otherwise returns to block 314 .
- the controlling module 16 reads the updated main program from the first block 32 and write the updated main program as an overwrite to the backup program in the second block 34 .
- the controlling module 16 sends a deep sleep command to the SPI ROM 30 , to control the SPI ROM 30 accordingly.
- the controlling module 16 invokes the backup program from the second block 34 , and writes the backup program to the first block 32 .
- the logic controlling unit 10 will notify the BMC 20 to read the main program in the first block 32 of the SPI ROM 30 again. Therefore, the logic controlling unit 10 can recover the main program of the first block 32 using the backup program of the second block 34 when the main program of the first block 32 is altered or damaged.
- the firmware protecting system and method can prevent the firmware of the BMC from being vandalized or accidentally altered due to design flaws.
Abstract
Description
- The subject matter herein generally relates to firmware of baseboard management controller of computing device.
- A baseboard management controller (BMC) is a specialized service processor that monitors a physical state of a computing device. The BMC is usually contained in a motherboard or main circuit board of the computing device being monitored. If firmware of the BMC is damaged for some reason, the BMC will not work properly. A protection of the BMC against damages is desired.
- Therefore, there is a room for improvement.
- Implementations of the present disclosure will now be described, by way of embodiments, with reference to the attached figures.
-
FIG. 1 is a block diagram of an embodiment of a firmware protecting system of a baseboard management controller of a computing device. -
FIG. 2 is a block diagram of an embodiment of a logic controlling unit of the system ofFIG. 1 . -
FIGS. 3 and 4 are flowcharts of method for protecting a firmware of the baseboard management controller of the computing device. - It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. Additionally, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features. The description is not to be considered as limiting the scope of the embodiments described herein.
- Several definitions that apply throughout this disclosure will now be presented.
- The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising” means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in a so-described combination, group, series, and the like.
-
FIG. 1 illustrates a firmware protectingsystem 100 in accordance with an embodiment of the present disclosure. The firmware protectingsystem 100 operates in a computing device (not shown). In one embodiment, the computing device may be a computer, a server, or other hardware device. - The firmware protecting
system 100 includes alogic controlling unit 10, a baseboard management controller (BMC 20), and a serial peripheral interface read only memory device (SPI ROM 30). In one embodiment, thelogic controlling unit 10 may be a complex programmable logic device (CPLD). - In the embodiment, the BMC 20 is electrically coupled to the
SPI ROM 30, and thelogic controlling unit 10 is electrically coupled between theSPI ROM 30 and the BMC 20. TheSPI ROM 30 is in communication with the BMC 20, and thelogic controlling unit 10 is in communication with theSPI ROM 30 and the BMC 20. - In one embodiment, the
logic controlling unit 10 can communicate with theSPI ROM 30 through an SPI bus. - In the embodiment, the
SPI ROM 30 includes afirst block 32 and asecond block 34. - The
first block 32 stores a main program. Thesecond block 34 stores a backup program, which is identical to the main program stored in theSPI ROM 30. The BMC 20 obtains the main program from thefirst block 32, and loads the main program to work normally. The backup program can recover the main program when the main program of theSPI ROM 30 is not altered or damaged, to allow the BMC to work normally. - In the embodiment, the
SPI ROM 30 further includes a write protection pin WP, and the write protection pin WP of theSPI ROM 30 is active when in a low state (such as logic 0). The low level signal thus prevents theSPI ROM 30 from being overwritten. -
FIG. 2 illustrates that thelogic controlling unit 10 includes a protectingmodule 12, a determiningmodule 14, and a controllingmodule 16. - When the computing device is powered on, the protecting
module 12 will lock the main program and the backup program into write-protected mode in theSPI ROM 30. - For example, when a server is powered on, the protecting
module 12 sends a write protection command to theSPI ROM 30, and the main program and the backup program are locked according to the write protection command. Therefore, theSPI ROM 30 can only read data, and the main program and the backup program are protected against alteration. - The protecting
module 12 sets a potential of the write protection pin WP of theSPI ROM 30 to a low level state, to write-protect the main program and the backup program in theSPI ROM 30. - After the
logic controlling unit 10 write-protects theSPI ROM 30, thelogic controlling unit 10 outputs a signal fed back to the BMC 20, and the BMC 20 will obtain the main program from thefirst block 32 of theSPI ROM 30 to perform work. - Furthermore, the determining
module 14 determines whether the main program is altered or damaged when the main program is obtained. - If the BMC 20 can successfully load the main program, and the main program is not altered or damaged, the controlling
module 16 sends a deep sleep command to theSPI ROM 30. At this time, theSPI ROM 30 cannot be read from or written to, protecting the main program and the backup program ofSPI ROM 30. - If the BMC 20 fails to load the main program, and the main program is altered or damaged, the controlling
module 16 invokes the backup program from thesecond block 34, and writes the backup program to thefirst block 32. Thelogic controlling unit 10 will notify the BMC 20 to read the main program in thefirst block 32 of theSPI ROM 30 again. - Therefore, the
logic controlling unit 10 can recover the main program of thefirst block 32 using the backup program of thesecond block 34 whenever the main program of thefirst block 32 is not in an original state. - After the damaged main program is repaired, the BMC 20 will read normally the main program in the
first block 32 of theSPI ROM 30, the server will be in a normal working state, and the BMC 20 will feed back to thelogic controlling unit 10. The controllingmodule 16 will send the deep sleep command to theSPI ROM 30, to control theSPI ROM 30 to enter the deep sleep mode. - The determining
module 14 may determine that a request to update the BMC 20 firmware online is received when theSPI ROM 30 is in the deep sleep mode. - The controlling
module 16 unlocks write protection of the main program and the backup program and theSPI ROM 30 exits from the deep sleep mode when the BMC 20 has such request. - The BMC 20 performs an online update of the main program in the
first block 32, and notifies thelogic controlling unit 10 after completing the update. - The controlling
module 16 reads the updated main program from thefirst block 32 and writes the updated main program as an overwrite to the backup program in thesecond block 34. - Thereafter, the controlling
module 16 sends a deep sleep command to theSPI ROM 30, to control theSPI ROM 30 accordingly. -
FIGS. 3 and 4 are flowcharts depicting an embodiment of a method to protect firmware of a baseboard management controller. The method is provided by way of example, as there are a variety of ways to carry out the method. The method described below can be carried out using the configurations illustrated inFIGS. 1-2 for example, and various elements of these figures are referenced in explaining the example method. Each block shown inFIGS. 3 and 4 represents one or more processes, methods, or subroutines, carried out in the example method. Furthermore, the illustrated order of blocks is illustrative only and the order of the blocks can change. Additional blocks can be added or fewer blocks may be utilized, without departing from the present disclosure. The example method can begin at block 300. - At block 300, the computing device is powered on.
- In one embodiment, the computing device may be a computer, a server, or other hardware device.
- At block 302, the protecting
module 12 sends a write protection command to theSPI ROM 30, to lock the main program and the backup program. Therefore, theSPI ROM 30 can only read data, and the main program and the backup program are protected against alteration. - At block 304, the protecting
module 12 sets a potential of the write protection pin WP of theSPI ROM 30 to a low level state, to write-protect the main program and the backup program in theSPI ROM 30. - At block 306, the
BMC 20 obtains the main program from thefirst block 32 of theSPI ROM 30 to perform work. - At block 308, the determining
module 14 determines whether the main program is altered or damaged when the main program is obtained. If the main program is altered or damaged, block 320 is implemented, otherwise block 310 is implemented. - At block 310, the controlling
module 16 sends a deep sleep command to theSPI ROM 30, to control theSPI ROM 30 to enter a deep sleep mode. - For example, when the
BMC 20 can successfully load the main program, and the main program is not damaged, the controllingmodule 16 will send the deep sleep command to theSPI ROM 30, to control theSPI ROM 30 to enter the deep sleep mode. At this time, theSPI ROM 30 cannot be read from or written to, protecting the main program and the backup program ofSPI ROM 30. - At block 312, the determining
module 14 determines whether that a request to update theBMC 20 firmware online is received. If theBMC 20 has such request to update the firmware online, block 314 is implemented, otherwise returns to block 310. - At block 314, the controlling
module 16 unlocks write protection of the main program and the backup program and theSPI ROM 30 exits from the deep sleep mode. - For example, when the
BMC 20 needs to perform burning firmware, the controllingmodule 16 unlocks various protections (such as write protection and deep sleep mode) and feeds this state back to theBMC 20. At this time, theSPI ROM 30 can be written. - At block 316, the determining
module 14 determines whether theBMC 20 completes the firmware update. If theBMC 20 has complete the firmware update, block 318 is implemented, otherwise returns to block 314. - At block 318, the controlling
module 16 reads the updated main program from thefirst block 32 and write the updated main program as an overwrite to the backup program in thesecond block 34. - Thereafter, the controlling
module 16 sends a deep sleep command to theSPI ROM 30, to control theSPI ROM 30 accordingly. - At block 320, the controlling
module 16 invokes the backup program from thesecond block 34, and writes the backup program to thefirst block 32. - In the embodiment, the
logic controlling unit 10 will notify theBMC 20 to read the main program in thefirst block 32 of theSPI ROM 30 again. Therefore, thelogic controlling unit 10 can recover the main program of thefirst block 32 using the backup program of thesecond block 34 when the main program of thefirst block 32 is altered or damaged. - Therefore, the firmware protecting system and method can prevent the firmware of the BMC from being vandalized or accidentally altered due to design flaws.
- Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the detail, especially in matters of shape, size, and arrangement of the parts within the principles of the present disclosure, up to and including the full extent established by the broad general meaning of the terms used in the claims. It will therefore be appreciated that the exemplary embodiments described above may be modified within the scope of the claims.
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CN201910324816.2A CN111832084A (en) | 2019-04-22 | 2019-04-22 | Firmware protection system and method for baseboard management controller |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11469956B2 (en) * | 2020-07-22 | 2022-10-11 | Cisco Technology, Inc. | Server-management microservice storehouse for baseboard management controllers |
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Publication number | Priority date | Publication date | Assignee | Title |
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US20240037283A1 (en) * | 2022-07-28 | 2024-02-01 | Quanta Computer Inc. | Systems and methods for computing system security |
TWI830418B (en) * | 2022-10-04 | 2024-01-21 | 神雲科技股份有限公司 | The method of update complex programmable logic device firmware |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2030124A4 (en) * | 2006-05-24 | 2012-12-12 | Safend Ltd | Method and system for defending security application in a user's computer |
CN101373451B (en) * | 2008-10-20 | 2011-04-13 | 华硕电脑股份有限公司 | Computer system for protecting double-basic input /output system program and control method thereof |
CN103885869A (en) * | 2012-12-20 | 2014-06-25 | 鸿富锦精密工业(深圳)有限公司 | Substrate management controller safety protection system and method |
CN104598256A (en) * | 2013-10-30 | 2015-05-06 | 鸿富锦精密工业(武汉)有限公司 | Computer BIOS (Basic Input /Output System) recovery system and method |
CN104679699A (en) * | 2013-11-26 | 2015-06-03 | 英业达科技有限公司 | Electronic device |
CN105988844A (en) * | 2015-03-02 | 2016-10-05 | 营邦企业股份有限公司 | Control module of endpoint server and firmware update method thereof |
US10353779B2 (en) * | 2017-05-05 | 2019-07-16 | Dell Products L.P. | Systems and methods for detection of firmware image corruption and initiation of recovery |
US10839080B2 (en) * | 2017-09-01 | 2020-11-17 | Microsoft Technology Licensing, Llc | Hardware-enforced firmware security |
CN108804955A (en) * | 2018-06-11 | 2018-11-13 | 郑州云海信息技术有限公司 | Guard method, system, device and the storage medium of network interface card EEPROM |
CN108959973A (en) * | 2018-06-27 | 2018-12-07 | 郑州云海信息技术有限公司 | A kind of guard method and system refreshed for BMC firmware |
CN109086634A (en) * | 2018-07-25 | 2018-12-25 | 浪潮(北京)电子信息产业有限公司 | A kind of BMC chip management method, system and BMC chip and storage medium |
CN109144552A (en) * | 2018-09-10 | 2019-01-04 | 郑州云海信息技术有限公司 | A kind of boot firmware method for refreshing and device |
US10585816B1 (en) * | 2018-12-07 | 2020-03-10 | Dell Products, L.P. | System and method for serial communication at a peripheral interface device |
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US11469956B2 (en) * | 2020-07-22 | 2022-10-11 | Cisco Technology, Inc. | Server-management microservice storehouse for baseboard management controllers |
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