US20190296185A1 - Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices - Google Patents
Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices Download PDFInfo
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- US20190296185A1 US20190296185A1 US16/441,477 US201916441477A US2019296185A1 US 20190296185 A1 US20190296185 A1 US 20190296185A1 US 201916441477 A US201916441477 A US 201916441477A US 2019296185 A1 US2019296185 A1 US 2019296185A1
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Definitions
- the present technology relates to solid-state transducer devices that emit and/or receive light and substrates for manufacturing such devices.
- FIG. 1A is a cross-sectional view of a conventional SST device 10 that includes a support substrate 20 carrying an LED structure 11 having an active region 14 between P-type and N-type semiconductor materials 15 and 16 , respectively.
- the SST device 10 also includes a first contact 17 and a second contact 19 spaced laterally apart from the first contact 17 .
- the first contact 17 typically includes a transparent and conductive material (e.g., indium tin oxide (“ITO”)) through which light is emitted from the LED structure 11 .
- ITO indium tin oxide
- an SST device can be configured as a “direct-attach” device.
- FIG. 1B shows a direct-attach SST device 22 coupled to a PCB 24 via the first and second contacts 17 and 19 .
- the first and second contacts 17 and 19 are bonded to corresponding contacts 26 and 28 at the PCB 24 (e.g., with a reflowed solder connection) to electrically and mechanically connect the SST device 22 to the PCB 24 .
- the support substrate 20 ( FIG. 1A ) is omitted from the SST device 22 such that light can escape from an active surface 30 of the LED structure 11 that is opposite the first and second contacts 17 and 19 .
- the first and second contacts 17 and 19 can be manufactured from opaque materials (rather than transparent materials).
- the direct-attach SST device 22 is challenging to manufacture because the device materials and structures are fragile and thus difficult to handle during manufacturing.
- the LED structure 11 is thin and without the support substrate (e.g., a support wafer) the LED structure 11 is prone to warping and damage.
- FIGS. 1A and 1B are partially schematic cross-sectional diagrams of SST devices in accordance with the prior art.
- FIGS. 2A-2F are cross-sectional views illustrating a method of forming a semiconductor device assembly in accordance with selected embodiments of the present technology.
- FIGS. 3A-3C are partially exploded, isometric views of various optically-transmissive carrier substrates that can be incorporated into a semiconductor device assembly in accordance with selected embodiments of the present technology.
- FIGS. 4A-4C are cross-sectional views illustrating singulation of semiconductor devices from a semiconductor device assembly having an optically-transmissive carrier substrate in accordance with selected embodiments of the present technology.
- FIG. 5 is a cross-sectional view of an SST structure incorporating an optically-transmissive carrier substrate in accordance with selected embodiments of the present technology.
- FIG. 6 is a schematic view of a system that includes a semiconductor device configured in accordance with selected embodiments of the present technology.
- semiconductor device generally refers to a solid-state device that includes semiconductor material. Although described herein in the context of SST devices, embodiments of the present technology can also include other types of semiconductor devices, such as logic devices, memory devices, and diodes, among others. Further, the term “semiconductor device” can refer to a finished device or to an assembly or other structure at various stages of processing before becoming a finished device.
- SST generally refers to solid-state transducers that include a semiconductor material as the active medium to convert electrical energy into electromagnetic radiation in the visible, ultraviolet, infrared, and/or other spectra.
- SSTs include solid-state light emitters (e.g., LEDs, laser diodes, etc.) and/or other sources of emission other than electrical filaments, plasmas, or gases.
- SSTs can also include solid-state devices that convert electromagnetic radiation into electricity.
- substrate can refer to a wafer-level substrate or to a singulated, die-level substrate.
- substrate can refer to a wafer-level substrate or to a singulated, die-level substrate.
- suitable steps of the methods described herein can be performed at the wafer level or at the die level.
- structures disclosed herein can be formed using conventional semiconductor-manufacturing techniques. Materials can be deposited, for example, using chemical vapor deposition, physical vapor deposition, atomic layer deposition, spin coating, and/or other suitable techniques. Similarly, materials can be removed, for example, using plasma etching, wet etching, chemical-mechanical planarization, or other suitable techniques.
- FIGS. 2A-2F are cross-sectional views of a semiconductor device assembly 100 in various stages of manufacture in accordance with selected embodiments of the present technology.
- FIG. 2A shows the semiconductor device assembly 100 after a semiconductor structure 104 has been formed on a support substrate 108 and a conductive material 102 has been formed on the semiconductor structure 104 .
- the semiconductor device assembly 100 also has a mask 106 on the conductive material 102 .
- the mask 106 e.g., a photoresist mask, a hard mask, or other suitable mask
- the openings 110 expose surfaces 112 of the semiconductor structure 104 .
- the openings 110 also define locations of individual semiconductor devices 114 in the semiconductor device assembly 100 . As described in further detail below, the individual semiconductor devices 114 have an active surface 113 through which light is emitted and/or received during operation.
- the conductive material 102 can include, for example, a metallic material, a doped semiconductor material, a combination of such materials, or other suitable conductive materials.
- the semiconductor structure 104 can include, for example, a single semiconductor material or a stack of different semiconductor materials.
- the support substrate 108 can be used to form the semiconductor structure 104 and the conductive material 102 .
- the support substrate 108 can include an engineered (handle) substrate of poly aluminum nitride, silicon carbine, or other suitable materials for epitaxial growth of semiconductor materials.
- the semiconductor device assembly 100 can include other materials or features.
- the semiconductor device assembly 100 can include a through-substrate interconnect (not shown) that extends through the semiconductor structure 104 between the conductive material 102 and the support substrate 108 .
- the through-substrate interconnect can provide an electrical connection with a transparent electrical (e.g., an indium tin oxide (ITO) electrode; not shown) at the active surface 113 of the individual semiconductor devices 114 .
- ITO indium tin oxide
- FIG. 2B shows the semiconductor device assembly 100 after forming first trenches 116 that extend through the conductive material 102 and into the semiconductor structure 104 .
- An etch or other material removal process can form the first trenches 116 aligned with the openings 110 in the conductive material 102 .
- the first trenches 116 define individual mesas 118 that include a portion of the conductive material 102 and a portion of the semiconductor structure 104 that are both separated from other mesas 118 of the semiconductor device assembly 100 .
- the individual mesas 118 also include first sidewalls 120 that extend between exposed surfaces 122 of the support substrate 108 and contact surfaces 124 of the conductive material 102 .
- the mask 106 FIG.
- the mask 106 can be removed before forming the first trenches 116 .
- a different mask can be used to form the first trenches 116 or the conductive material 102 itself can be used as a mask.
- FIG. 2B also shows openings 126 formed in the conductive material 102 of the semiconductor device assembly 100 .
- the openings 126 define contacts 128 (identified individually as first and second contacts 128 a and 128 b ) on the semiconductor structure 104 .
- the openings 110 and 126 in the conductive material 102 can be formed (e.g., patterned and etched) simultaneously.
- the openings 110 and 126 can be formed in a first stage, and the first trenches 116 can be formed in a second stage in which the openings 126 are covered by a mask and the openings 110 are not covered by a mask.
- FIG. 2C shows the semiconductor device assembly 100 after a transfer structure 130 is attached to the conductive material 102 of the individual semiconductor devices 114 .
- the transfer structure 130 can include an adhesive (not shown) for at least temporarily binding the individual semiconductor devices 114 to the transfer structure 130 .
- a temporary transfer substrate 130 is configured to be removable at a later processing stage without damaging the semiconductor devices 114 .
- the transfer structure 130 can include a die-attach tape.
- the transfer structure 130 can be removed by a solvent that dissolves the adhesive material of the transfer structure 130 . Removal of a temporary transfer structure 130 is illustrated, for example, in FIGS. 3A-3C .
- the transfer structure 130 does not substantially degrade in acidic and/or basic solutions within a certain pH range.
- the transfer structure 130 is configured such that it does not substantially degrade in the chemical etchant described below with reference to FIG. 2D .
- FIG. 2D shows the semiconductor device assembly 100 with the support substrate 108 removed from active surfaces 113 (e.g., light-emitting surfaces) of the individual semiconductor devices 114 .
- the semiconductor device assembly 100 can be placed into a bath of chemical etchant such that the etchant (drawn as arrows “E” in FIG. 2D ) removes material from the interface between the support substrate 108 and the active surfaces 113 of the individual semiconductor devices 114 .
- the etchant sufficiently undercuts the support substrate 108 below the semiconductor structure 104 , the support substrate 108 is released from the semiconductor device assembly 100 .
- the etchant can access each side of the individual semiconductor devices 114 via the first trenches 116 between the individual semiconductor devices 114 .
- the support substrate 108 can be recycled and used to form other semiconductor materials and devices. Alternatively, the support substrate 108 can be discarded depending on the life-cycle of the support substrate 108 . For example, the support substrate 108 can be discarded if it has become too thin, contaminated, and/or cycled more than a pre-determined number of times. In other embodiments, the support substrate 108 can be removed by an alternative process, such as by backgrinding, etching, or chemical and mechanical polishing (e.g., CMP).
- CMP chemical and mechanical polishing
- FIG. 2E shows the semiconductor device assembly 100 after roughening the active surfaces 113 of the individual semiconductor devices 114 .
- the semiconductor structure 104 can be placed in a different bath of chemical etchant that isotropically removes material from the active surface 113 .
- the roughed active surface 113 can improve light emission efficiency of the individual semiconductor devices 114 by reducing internal reflection.
- the roughened active surface 113 can promote adhesion of other materials and structures with the semiconductor structure 104 of the individual semiconductor devices 114 .
- the active surfaces 113 are not roughened and accordingly the stage shown in FIG. 2E can be omitted.
- FIG. 2F shows the semiconductor device assembly 100 after attaching a carrier substrate 134 to the semiconductor structure 104 of the individual semiconductor devices 114 .
- the carrier substrate 134 includes a material that is optically transmissive such that the active surfaces of the individual semiconductor devices 114 can emit and/or receive the light through the carrier substrate 134 .
- the carrier substrate 134 can be substantially transparent or substantially translucent to light in the visible spectrum (e.g., from about 390 nm to about 750 nm).
- the carrier substrate 134 can include, for example, a flexible polymeric material, a glass material (e.g., silicon dioxide or sapphire), a combination of optically transmissive materials, or other suitable materials.
- the carrier substrate 134 includes a glass material having a reflective coating.
- an intermediary material 136 can attach the carrier substrate 134 to the active surfaces 113 of the individual semiconductor devices 114 .
- the intermediary material 136 can include, for example, an adhesive, epoxy, or other suitable bonding material.
- the intermediary material 136 can be selectively deposited on the active surface such that it does not substantially interfere with the transmission of light through the carrier substrate 134 .
- an adhesive can be screen printed at the periphery of the active surfaces 113 of the individual semiconductor devices 114 .
- the intermediary material 136 can be substantially transparent, or in other embodiments the intermediary material 136 can include a material that alters the light (e.g., a phosphor).
- the intermediary material can be dispensed directly on the active surface 113 of the individual semiconductor devices 114 and/or a first surface 138 of the carrier substrate 134 .
- a bead of adhesive can be deposited or the adhesive can be screen printed.
- the carrier substrate 134 can be bonded by fusing the carrier substrate 134 with the active surfaces 113 of the individual semiconductor devices 114 .
- the carrier substrate 134 can include a glass material that is fused with a native oxide or a deposited oxide of the semiconductor structure 104 of the individual semiconductor devices 114 .
- the intermediary material 136 can be eliminated or defined by a region of chemical bonding between the active surfaces 113 of the individual semiconductor devices 114 and the outer surface 138 of the carrier substrate 134 .
- the transfer structure 130 can be removed from the contacts 128 of the individual semiconductor devices 114 before continuing to other processing stages. Alternatively, the transfer structure 130 can remain on the contacts 128 during subsequent processing stages. For example, the transfer structure 130 can shield the contacts 128 from contamination and debris associated with operator handling, device singulation, or laser scribing. The transfer structure 130 can also provide a diffusion barrier that mitigates oxidation of the contacts 128 of the individual semiconductor devices 114 .
- the carrier substrate 134 provides mechanical support for carrying and protecting individual semiconductor devices.
- the carrier substrate 134 can be suited for direct-attach manufacturing techniques.
- semiconductor devices incorporating the carrier substrate e.g., after die singulation
- contacts that are suited for direct bonding, such as eutectic bonding to a printed circuit board (PCB) or other suitable substrate.
- direct attach devices can be fragile and difficult to handle during manufacturing.
- Conventional techniques to improve the strength of direct-attach devices involve the use of thick metal for the electrical contacts to support the thin semiconductor devices.
- metal deposition processes for forming the thick metal can be time intensive and expensive.
- thick metal can produce large aspect ratios between individual electrical contacts.
- the thick metal can exceed 100 ⁇ m in thickness to provide sufficient support, whereas the semiconductor materials can be less than 10 ⁇ m in thickness. This disparity in thickness can cause fracturing of the thinner semiconductor material during die singulation. Accordingly, in various embodiments the conductive material 102 and corresponding electrical contacts 128 formed therein can be thinner than the contacts of conventional direct-attach devices.
- FIGS. 3A-3C show differently shaped carrier substrates 134 (identified individually as wafer-shaped, square-shaped, and rectangular-shaped carriers substrates 134 a - 134 c , respectively).
- FIGS. 3A-3C also shows the transfer structure 130 being removed from the carrier substrates 134 to expose the contact surfaces 124 of the individual semiconductor devices 114 .
- the wafer-shaped carrier substrate 134 a can be sized and shaped for compatibility with down-stream manufacturing equipment. For example, a vacuum wand, a chuck, and/or other mechanical component of a semiconductor processing tool can receive the wafer-shaped substrate 134 a for further processing of the individual semiconductor devices 114 .
- FIG. 3B shows the square-shaped carrier substrate 134 b (e.g., a plate of square glass, a plate of polymeric material, or a plate of other suitable materials). Because the square-shaped carrier substrate 134 b is not circular, it may be less complicated to manufacture than the wafer-shaped carrier substrate 134 a of FIG. 3A .
- FIG. 3C shows the rectangular-shaped carrier substrate 134 c . In this configuration, the carrier substrate 134 c carries individual semiconductor devices 114 transferred from multiple transfer structures 130 . Accordingly, it is expected that such a configuration can provide a higher throughput relative to the wafer-shaped and square-shaped carrier substrates 134 a and 134 b of FIGS. 3A and 3B , respectively.
- the carrier substrate 134 can have other configurations that facilitate further processing stages of the individual semiconductor devices 114 .
- processing stages can include electrical testing of the individual semiconductor devices 114 on the carrier substrate 134 and/or singulation of the individual semiconductor devices from the semiconductor substrate assembly 100 .
- processing stages can also forming a transparent electrode (e.g., an ITO electrode) at the active surface 113 of the individual semiconductor devices 114 .
- FIGS. 4A-4C are cross-sectional views of the semiconductor device assembly 100 in various stages of device singulation. Each of the processing stages of FIG. 4A-4C may occur, for example, after the processing stage of FIG. 2F .
- FIG. 4A shows the semiconductor device assembly 100 after forming second trenches 140 in the carrier substrate 134 to singulate the individual semiconductor devices 114 from the semiconductor device assembly 100 .
- the second trenches 140 form separate sections 142 of the carrier substrate 134 that remain attached to the semiconductor structure 104 of the individual semiconductor devices 114 .
- the second trenches 140 can be formed by a variety of mechanical singulation techniques, including blade cutting, wafer sawing, or laser ablation, among others. Device singulation can also include other suitable techniques, such as chemically etching the second trenches 140 in the carrier substrate 134 .
- mechanical singulation includes forming the second trenches 140 through a first surface 138 of the carrier substrate 134 .
- mechanical singulation techniques can create topographical artifacts at the first side walls 120 of the first trenches 116 (not shown in FIG. 4A ).
- mechanical singulation can create indentations (e.g., from blade or saw marks) at the first side walls 120 of the first trenches 116 (not shown in FIG. 4A ).
- the topographical artifacts may not have a significant (or any) impact on the operating performance of the individual semiconductor devices 114 .
- the carrier substrate 134 can be singulated through a second surface 144 of the carrier substrate 134 that is opposite the first surface 138 and such that the second trenches 140 are substantially aligned (e.g., generally in parallel) with the first trenches 116 .
- second sidewalls 146 in the second trenches 140 are often relatively rougher than the first sidewalls 120 of the first trenches 116 .
- the first sidewalls 120 of the individual semiconductor devices 114 can be smoother than the second sidewalls 146 of the second trenches 140 because the first sidewalls 120 can be formed chemically (e.g., an etch) as opposed to mechanically.
- FIGS. 4B and 4C show the semiconductor device assembly 100 after forming second trenches 140 in the carrier substrate 134 .
- FIGS. 4B and 4C are different than FIG. 4A in that the individual mesas 118 of the individual semiconductor devices 114 have a first planform shape P 1 that is different planform shape than the carrier substrate 134 .
- sections 242 of the carrier substrate 134 have a second planform shape P 2 that is larger than the first planform shape P 1 of the individual mesas 118 .
- a portion of the carrier substrate 134 extends laterally beyond the first sidewalls 136 of the individual semiconductor devices 114 .
- FIG. 4C shows sections 342 of the carrier substrate 134 having a third planform shape P 3 that is larger than the first planform shape P 1 of the individual mesas 118 .
- a portion of the individual mesas 118 extends laterally beyond the second sidewalls 146 of the carrier substrate 134 .
- the planform shapes of the individual mesas 118 and the carrier substrate 134 can be sized according to the particular configuration of the individual semiconductor devices 114 .
- the second (larger) planform shape P 2 of the carrier substrate section 242 shown in FIG. 4B can insure that the carrier substrate 134 completely covers the active surface 113 of the semiconductor structure 104 .
- planform shapes can be limited by a singulation process.
- the third (smaller) planform shape P 3 of the carrier substrate section 342 shown in FIG. 4C can be caused by a wafer saw having a blade that is substantially wider than the first trench 116 between the individual mesas 118 of the individual semiconductor devices 114 .
- FIG. 5 is a cross-sectional view of the semiconductor device assembly 100 having SST structures 414 .
- the individual SST structures 414 include the conductive material 102 and the semiconductor structure 104 , and the semiconductor structure 104 can include first through third semiconductor materials 104 a - 104 c .
- the SST structure 414 can be configured to emit and/or receive light in the visible spectrum (e.g., from about 390 nm to about 750 nm) through the carrier substrate 134 .
- the SST structure 414 can also be configured to emit and/or receive light in the infrared spectrum (e.g., from about 1050 nm to about 1550 nm) and/or in other suitable spectra provided that the carrier substrate 134 is optically transmissive to such spectra.
- the infrared spectrum e.g., from about 1050 nm to about 1550 nm
- suitable spectra provided that the carrier substrate 134 is optically transmissive to such spectra.
- the first semiconductor material 104 a can include an N-type semiconductor (e.g., an N-type gallium nitride (“N-GaN”)) and the third semiconductor material 104 c can include a P-type semiconductor material (e.g., a P-type gallium nitride (“P-GaN”)).
- N-GaN N-type gallium nitride
- P-GaN P-type gallium nitride
- the first and third semiconductor materials 104 a and 104 c can individually include at least one of gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), gallium arsenide phosphide (GaAsP), gallium (III) phosphide (GaP), zinc selenide (ZnSe), boron nitride (BN), aluminum gallium nitride (AlGaN), and/or other suitable semiconductor materials.
- the second semiconductor material 104 b can define an “active region” that includes a single quantum well (“SQW”), MQWs, and/or a bulk semiconductor material.
- the term “bulk semiconductor material” generally refers to a single grain semiconductor material (e.g., InGaN) with a thickness between approximately 10 nanometers and approximately 500 nanometers.
- the active region can include an InGaN SQW, GaN/InGaN MQWs, and/or an InGaN bulk material.
- the active region can include aluminum gallium indium phosphide (AlGaInP), aluminum gallium indium nitride (AlGaInN), and/or other suitable materials or configurations.
- the SST structure 414 can be formed via metal organic chemical vapor deposition (“MOCVD”), molecular beam epitaxy (“MBE”), liquid phase epitaxy (“LPE”), hydride vapor phase epitaxy (“HVPE”), and/or other suitable epitaxial growth techniques.
- MOCVD metal organic chemical vapor deposition
- MBE molecular beam epitaxy
- LPE liquid phase epitaxy
- HVPE hydride vapor phase epitaxy
- the SST structure 414 can also include other suitable components, such as a buffer material that facilitates the formation of the semiconductor structure 104 on the support substrate 108 ( FIG. 2A ).
- the SST structure 414 can include additional bonding and seed layers to facilitate bonding and/or epitaxial growth.
- the SST structure 414 can be integrated into an SST device.
- first and second contacts 428 a and 428 b of the SST structure 414 can be directly attached to a printed circuit board or other suitable substrate.
- other features can be formed on or integrated into the SST structure, such as a lens over the carrier substrate 134 of the SST structure 414 , an anti-reflective coating or a mirror, and/or other suitable mechanical/electrical components (not shown).
- the semiconductor device assembly 100 described above with reference to FIGS. 2A-5 can be used to form SST devices, SST structures, and/or other semiconductor structures that are incorporated into any of a myriad of larger and/or more complex devices or systems, a representative example of which is system 500 shown schematically in FIG. 6 .
- the system 500 can include one or more semiconductor/SST devices 510 , a driver 520 , a processor 530 , and/or other subsystems or components 540 .
- the resulting system 500 can perform any of a wide variety of functions, such as backlighting, general illumination, power generations, sensors, and/or other suitable functions.
- representative systems can include, without limitation, hand-held devices (e.g., mobile phones, tablets, digital readers, and digital audio players), lasers, photovoltaic cells, remote controls, computers, and appliances.
- Components of the system 500 may be housed in a single unit or distributed over multiple, interconnected units (e.g., through a communications network).
- the components of the system 500 can also include local and/or remote memory storage devices, and any of a wide variety of computer readable media.
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Abstract
Description
- This application is a continuation of U.S. application Ser. No. 15/729,487, filed Oct. 10, 2017; which is a continuation of U.S. application Ser. No. 14/706,827, filed May 7, 2015, now U.S. Pat. No. 9,812,606; which is a divisional of U.S. application Ser. No. 13/747,182, filed Jan. 22, 2013, now U.S. Pat. No. 9,054,235; each of which is incorporated herein by reference in its entirety.
- The present technology relates to solid-state transducer devices that emit and/or receive light and substrates for manufacturing such devices.
- Mobile phones, personal digital assistants (“PDAs”), digital cameras, MP3 players, and other portable electronic devices utilize light-emitting diodes (“LEDs”), organic light-emitting diodes (“OLEDs”), polymer light-emitting diodes (“PLEDs”), and other solid-state transducer (“SST”) devices for, e.g., backlighting. SST devices are also used for signage, indoor lighting, outdoor lighting, and other types of general illumination.
FIG. 1A is a cross-sectional view of aconventional SST device 10 that includes asupport substrate 20 carrying anLED structure 11 having anactive region 14 between P-type and N-type semiconductor materials SST device 10 also includes afirst contact 17 and asecond contact 19 spaced laterally apart from thefirst contact 17. Thefirst contact 17 typically includes a transparent and conductive material (e.g., indium tin oxide (“ITO”)) through which light is emitted from theLED structure 11. - To simplify assembly on a substrate (e.g., a printed circuit board (“PCB”)), an SST device can be configured as a “direct-attach” device.
FIG. 1B shows a direct-attach SST device 22 coupled to aPCB 24 via the first andsecond contacts second contacts corresponding contacts SST device 22 to thePCB 24. As illustrated, the support substrate 20 (FIG. 1A ) is omitted from theSST device 22 such that light can escape from anactive surface 30 of theLED structure 11 that is opposite the first andsecond contacts second contacts PCB 24, the direct-attach SST device 22 is challenging to manufacture because the device materials and structures are fragile and thus difficult to handle during manufacturing. For example, theLED structure 11 is thin and without the support substrate (e.g., a support wafer) theLED structure 11 is prone to warping and damage. -
FIGS. 1A and 1B are partially schematic cross-sectional diagrams of SST devices in accordance with the prior art. -
FIGS. 2A-2F are cross-sectional views illustrating a method of forming a semiconductor device assembly in accordance with selected embodiments of the present technology. -
FIGS. 3A-3C are partially exploded, isometric views of various optically-transmissive carrier substrates that can be incorporated into a semiconductor device assembly in accordance with selected embodiments of the present technology. -
FIGS. 4A-4C are cross-sectional views illustrating singulation of semiconductor devices from a semiconductor device assembly having an optically-transmissive carrier substrate in accordance with selected embodiments of the present technology. -
FIG. 5 is a cross-sectional view of an SST structure incorporating an optically-transmissive carrier substrate in accordance with selected embodiments of the present technology. -
FIG. 6 is a schematic view of a system that includes a semiconductor device configured in accordance with selected embodiments of the present technology. - Specific details of several embodiments of semiconductor devices having optically-transmissive carrier substrates and associated systems and methods are described below. The term “semiconductor device” generally refers to a solid-state device that includes semiconductor material. Although described herein in the context of SST devices, embodiments of the present technology can also include other types of semiconductor devices, such as logic devices, memory devices, and diodes, among others. Further, the term “semiconductor device” can refer to a finished device or to an assembly or other structure at various stages of processing before becoming a finished device. The term “SST” generally refers to solid-state transducers that include a semiconductor material as the active medium to convert electrical energy into electromagnetic radiation in the visible, ultraviolet, infrared, and/or other spectra. For example, SSTs include solid-state light emitters (e.g., LEDs, laser diodes, etc.) and/or other sources of emission other than electrical filaments, plasmas, or gases. SSTs can also include solid-state devices that convert electromagnetic radiation into electricity.
- Depending upon the context in which it is used, the term “substrate” can refer to a wafer-level substrate or to a singulated, die-level substrate. A person having ordinary skill in the relevant art will recognize that suitable steps of the methods described herein can be performed at the wafer level or at the die level. Furthermore, unless the context indicates otherwise, structures disclosed herein can be formed using conventional semiconductor-manufacturing techniques. Materials can be deposited, for example, using chemical vapor deposition, physical vapor deposition, atomic layer deposition, spin coating, and/or other suitable techniques. Similarly, materials can be removed, for example, using plasma etching, wet etching, chemical-mechanical planarization, or other suitable techniques. A person having ordinary skill in the relevant art will also understand that the present technology may have additional embodiments, and that the present technology may be practiced without several of the details of the embodiments described herein with reference to
FIGS. 2A-6 . For ease of reference, throughout this disclosure identical reference numbers are used to identify similar or analogous components or features, but the use of the same reference number does not imply that the parts should be construed to be identical. Indeed, in many examples described herein, identically-numbered parts are distinct in structure and/or function. Furthermore, the same shading may be used to indicate materials in cross section that can be compositionally similar, but the use of the same shading does not imply that the materials should be construed to be identical. -
FIGS. 2A-2F are cross-sectional views of asemiconductor device assembly 100 in various stages of manufacture in accordance with selected embodiments of the present technology.FIG. 2A shows thesemiconductor device assembly 100 after asemiconductor structure 104 has been formed on asupport substrate 108 and aconductive material 102 has been formed on thesemiconductor structure 104. At this stage, thesemiconductor device assembly 100 also has amask 106 on theconductive material 102. The mask 106 (e.g., a photoresist mask, a hard mask, or other suitable mask) has apertures that can be used in combination with an etch or other suitable material removal process to formopenings 110 in theconductive material 102. As shown, theopenings 110 exposesurfaces 112 of thesemiconductor structure 104. Theopenings 110 also define locations ofindividual semiconductor devices 114 in thesemiconductor device assembly 100. As described in further detail below, theindividual semiconductor devices 114 have anactive surface 113 through which light is emitted and/or received during operation. - The
conductive material 102 can include, for example, a metallic material, a doped semiconductor material, a combination of such materials, or other suitable conductive materials. Thesemiconductor structure 104 can include, for example, a single semiconductor material or a stack of different semiconductor materials. Thesupport substrate 108 can be used to form thesemiconductor structure 104 and theconductive material 102. For example, thesupport substrate 108 can include an engineered (handle) substrate of poly aluminum nitride, silicon carbine, or other suitable materials for epitaxial growth of semiconductor materials. Although omitted for purposes of clarity, thesemiconductor device assembly 100 can include other materials or features. In one embodiment, thesemiconductor device assembly 100 can include a through-substrate interconnect (not shown) that extends through thesemiconductor structure 104 between theconductive material 102 and thesupport substrate 108. In this configuration, the through-substrate interconnect can provide an electrical connection with a transparent electrical (e.g., an indium tin oxide (ITO) electrode; not shown) at theactive surface 113 of theindividual semiconductor devices 114. -
FIG. 2B shows thesemiconductor device assembly 100 after formingfirst trenches 116 that extend through theconductive material 102 and into thesemiconductor structure 104. An etch or other material removal process can form thefirst trenches 116 aligned with theopenings 110 in theconductive material 102. As shown, thefirst trenches 116 defineindividual mesas 118 that include a portion of theconductive material 102 and a portion of thesemiconductor structure 104 that are both separated fromother mesas 118 of thesemiconductor device assembly 100. Theindividual mesas 118 also includefirst sidewalls 120 that extend between exposedsurfaces 122 of thesupport substrate 108 andcontact surfaces 124 of theconductive material 102. In some embodiments, the mask 106 (FIG. 2A ) can be used to define the locations of thefirst trenches 116. In other embodiments, themask 106 can be removed before forming thefirst trenches 116. For example, a different mask can be used to form thefirst trenches 116 or theconductive material 102 itself can be used as a mask. -
FIG. 2B also showsopenings 126 formed in theconductive material 102 of thesemiconductor device assembly 100. Theopenings 126 define contacts 128 (identified individually as first andsecond contacts semiconductor structure 104. In some embodiments, theopenings conductive material 102 can be formed (e.g., patterned and etched) simultaneously. For example, theopenings first trenches 116 can be formed in a second stage in which theopenings 126 are covered by a mask and theopenings 110 are not covered by a mask. -
FIG. 2C shows thesemiconductor device assembly 100 after atransfer structure 130 is attached to theconductive material 102 of theindividual semiconductor devices 114. Thetransfer structure 130 can include an adhesive (not shown) for at least temporarily binding theindividual semiconductor devices 114 to thetransfer structure 130. In particular, atemporary transfer substrate 130 is configured to be removable at a later processing stage without damaging thesemiconductor devices 114. For example, thetransfer structure 130 can include a die-attach tape. Additionally or alternatively, thetransfer structure 130 can be removed by a solvent that dissolves the adhesive material of thetransfer structure 130. Removal of atemporary transfer structure 130 is illustrated, for example, inFIGS. 3A-3C . In general, thetransfer structure 130 does not substantially degrade in acidic and/or basic solutions within a certain pH range. For example, thetransfer structure 130 is configured such that it does not substantially degrade in the chemical etchant described below with reference toFIG. 2D . -
FIG. 2D shows thesemiconductor device assembly 100 with thesupport substrate 108 removed from active surfaces 113 (e.g., light-emitting surfaces) of theindividual semiconductor devices 114. In some embodiments, thesemiconductor device assembly 100 can be placed into a bath of chemical etchant such that the etchant (drawn as arrows “E” inFIG. 2D ) removes material from the interface between thesupport substrate 108 and theactive surfaces 113 of theindividual semiconductor devices 114. When the etchant sufficiently undercuts thesupport substrate 108 below thesemiconductor structure 104, thesupport substrate 108 is released from thesemiconductor device assembly 100. As shown, the etchant can access each side of theindividual semiconductor devices 114 via thefirst trenches 116 between theindividual semiconductor devices 114. Once released, thesupport substrate 108 can be recycled and used to form other semiconductor materials and devices. Alternatively, thesupport substrate 108 can be discarded depending on the life-cycle of thesupport substrate 108. For example, thesupport substrate 108 can be discarded if it has become too thin, contaminated, and/or cycled more than a pre-determined number of times. In other embodiments, thesupport substrate 108 can be removed by an alternative process, such as by backgrinding, etching, or chemical and mechanical polishing (e.g., CMP). -
FIG. 2E shows thesemiconductor device assembly 100 after roughening theactive surfaces 113 of theindividual semiconductor devices 114. For example, thesemiconductor structure 104 can be placed in a different bath of chemical etchant that isotropically removes material from theactive surface 113. In some embodiments, the roughedactive surface 113 can improve light emission efficiency of theindividual semiconductor devices 114 by reducing internal reflection. In addition or alternatively, the roughenedactive surface 113 can promote adhesion of other materials and structures with thesemiconductor structure 104 of theindividual semiconductor devices 114. In other embodiments, theactive surfaces 113 are not roughened and accordingly the stage shown inFIG. 2E can be omitted. -
FIG. 2F shows thesemiconductor device assembly 100 after attaching acarrier substrate 134 to thesemiconductor structure 104 of theindividual semiconductor devices 114. Thecarrier substrate 134 includes a material that is optically transmissive such that the active surfaces of theindividual semiconductor devices 114 can emit and/or receive the light through thecarrier substrate 134. For example, thecarrier substrate 134 can be substantially transparent or substantially translucent to light in the visible spectrum (e.g., from about 390 nm to about 750 nm). Thecarrier substrate 134 can include, for example, a flexible polymeric material, a glass material (e.g., silicon dioxide or sapphire), a combination of optically transmissive materials, or other suitable materials. In one embodiment, thecarrier substrate 134 includes a glass material having a reflective coating. - As illustrated in
FIG. 2F , anintermediary material 136 can attach thecarrier substrate 134 to theactive surfaces 113 of theindividual semiconductor devices 114. Theintermediary material 136 can include, for example, an adhesive, epoxy, or other suitable bonding material. Theintermediary material 136 can be selectively deposited on the active surface such that it does not substantially interfere with the transmission of light through thecarrier substrate 134. For example, an adhesive can be screen printed at the periphery of theactive surfaces 113 of theindividual semiconductor devices 114. Theintermediary material 136 can be substantially transparent, or in other embodiments theintermediary material 136 can include a material that alters the light (e.g., a phosphor). In such cases, the intermediary material can be dispensed directly on theactive surface 113 of theindividual semiconductor devices 114 and/or afirst surface 138 of thecarrier substrate 134. For example, a bead of adhesive can be deposited or the adhesive can be screen printed. - Alternatively, the
carrier substrate 134 can be bonded by fusing thecarrier substrate 134 with theactive surfaces 113 of theindividual semiconductor devices 114. For example, thecarrier substrate 134 can include a glass material that is fused with a native oxide or a deposited oxide of thesemiconductor structure 104 of theindividual semiconductor devices 114. As such, theintermediary material 136 can be eliminated or defined by a region of chemical bonding between theactive surfaces 113 of theindividual semiconductor devices 114 and theouter surface 138 of thecarrier substrate 134. - In some embodiments, the
transfer structure 130 can be removed from the contacts 128 of theindividual semiconductor devices 114 before continuing to other processing stages. Alternatively, thetransfer structure 130 can remain on the contacts 128 during subsequent processing stages. For example, thetransfer structure 130 can shield the contacts 128 from contamination and debris associated with operator handling, device singulation, or laser scribing. Thetransfer structure 130 can also provide a diffusion barrier that mitigates oxidation of the contacts 128 of theindividual semiconductor devices 114. - In accordance with various embodiments of the present technology, the
carrier substrate 134 provides mechanical support for carrying and protecting individual semiconductor devices. In particular, thecarrier substrate 134 can be suited for direct-attach manufacturing techniques. For example, semiconductor devices incorporating the carrier substrate (e.g., after die singulation) can have contacts that are suited for direct bonding, such as eutectic bonding to a printed circuit board (PCB) or other suitable substrate. As discussed above, direct attach devices can be fragile and difficult to handle during manufacturing. Conventional techniques to improve the strength of direct-attach devices involve the use of thick metal for the electrical contacts to support the thin semiconductor devices. However, metal deposition processes for forming the thick metal can be time intensive and expensive. Also, thick metal can produce large aspect ratios between individual electrical contacts. Further, in some instances the thick metal can exceed 100 μm in thickness to provide sufficient support, whereas the semiconductor materials can be less than 10 μm in thickness. This disparity in thickness can cause fracturing of the thinner semiconductor material during die singulation. Accordingly, in various embodiments theconductive material 102 and corresponding electrical contacts 128 formed therein can be thinner than the contacts of conventional direct-attach devices. -
FIGS. 3A-3C show differently shaped carrier substrates 134 (identified individually as wafer-shaped, square-shaped, and rectangular-shapedcarriers substrates 134 a-134 c, respectively).FIGS. 3A-3C also shows thetransfer structure 130 being removed from thecarrier substrates 134 to expose the contact surfaces 124 of theindividual semiconductor devices 114. Referring first toFIG. 3A , the wafer-shaped carrier substrate 134 a can be sized and shaped for compatibility with down-stream manufacturing equipment. For example, a vacuum wand, a chuck, and/or other mechanical component of a semiconductor processing tool can receive the wafer-shaped substrate 134 a for further processing of theindividual semiconductor devices 114.FIG. 3B shows the square-shapedcarrier substrate 134 b (e.g., a plate of square glass, a plate of polymeric material, or a plate of other suitable materials). Because the square-shapedcarrier substrate 134 b is not circular, it may be less complicated to manufacture than the wafer-shaped carrier substrate 134 a ofFIG. 3A .FIG. 3C shows the rectangular-shapedcarrier substrate 134 c. In this configuration, thecarrier substrate 134 c carriesindividual semiconductor devices 114 transferred frommultiple transfer structures 130. Accordingly, it is expected that such a configuration can provide a higher throughput relative to the wafer-shaped and square-shapedcarrier substrates 134 a and 134 b ofFIGS. 3A and 3B , respectively. In these and other embodiments, thecarrier substrate 134 can have other configurations that facilitate further processing stages of theindividual semiconductor devices 114. Such processing stages can include electrical testing of theindividual semiconductor devices 114 on thecarrier substrate 134 and/or singulation of the individual semiconductor devices from thesemiconductor substrate assembly 100. In certain non-illustrated embodiments, processing stages can also forming a transparent electrode (e.g., an ITO electrode) at theactive surface 113 of theindividual semiconductor devices 114. -
FIGS. 4A-4C are cross-sectional views of thesemiconductor device assembly 100 in various stages of device singulation. Each of the processing stages ofFIG. 4A-4C may occur, for example, after the processing stage ofFIG. 2F .FIG. 4A shows thesemiconductor device assembly 100 after formingsecond trenches 140 in thecarrier substrate 134 to singulate theindividual semiconductor devices 114 from thesemiconductor device assembly 100. Thesecond trenches 140 formseparate sections 142 of thecarrier substrate 134 that remain attached to thesemiconductor structure 104 of theindividual semiconductor devices 114. Thesecond trenches 140 can be formed by a variety of mechanical singulation techniques, including blade cutting, wafer sawing, or laser ablation, among others. Device singulation can also include other suitable techniques, such as chemically etching thesecond trenches 140 in thecarrier substrate 134. - In some embodiments, mechanical singulation includes forming the
second trenches 140 through afirst surface 138 of thecarrier substrate 134. In certain instances, however, mechanical singulation techniques can create topographical artifacts at thefirst side walls 120 of the first trenches 116 (not shown inFIG. 4A ). For example, mechanical singulation can create indentations (e.g., from blade or saw marks) at thefirst side walls 120 of the first trenches 116 (not shown inFIG. 4A ). In some of these instances, the topographical artifacts may not have a significant (or any) impact on the operating performance of theindividual semiconductor devices 114. In other embodiments, thecarrier substrate 134 can be singulated through asecond surface 144 of thecarrier substrate 134 that is opposite thefirst surface 138 and such that thesecond trenches 140 are substantially aligned (e.g., generally in parallel) with thefirst trenches 116. As shown inFIG. 4A ,second sidewalls 146 in thesecond trenches 140 are often relatively rougher than thefirst sidewalls 120 of thefirst trenches 116. Thefirst sidewalls 120 of theindividual semiconductor devices 114 can be smoother than thesecond sidewalls 146 of thesecond trenches 140 because thefirst sidewalls 120 can be formed chemically (e.g., an etch) as opposed to mechanically. - Similar to
FIG. 4A ,FIGS. 4B and 4C show thesemiconductor device assembly 100 after formingsecond trenches 140 in thecarrier substrate 134.FIGS. 4B and 4C are different thanFIG. 4A in that theindividual mesas 118 of theindividual semiconductor devices 114 have a first planform shape P1 that is different planform shape than thecarrier substrate 134. Referring first toFIG. 4B ,sections 242 of thecarrier substrate 134 have a second planform shape P2 that is larger than the first planform shape P1 of theindividual mesas 118. In such a configuration, a portion of thecarrier substrate 134 extends laterally beyond thefirst sidewalls 136 of theindividual semiconductor devices 114.FIG. 4C showssections 342 of thecarrier substrate 134 having a third planform shape P3 that is larger than the first planform shape P1 of theindividual mesas 118. In such a configuration, a portion of theindividual mesas 118 extends laterally beyond thesecond sidewalls 146 of thecarrier substrate 134. In general, the planform shapes of theindividual mesas 118 and thecarrier substrate 134 can be sized according to the particular configuration of theindividual semiconductor devices 114. For example, the second (larger) planform shape P2 of thecarrier substrate section 242 shown inFIG. 4B can insure that thecarrier substrate 134 completely covers theactive surface 113 of thesemiconductor structure 104. In some embodiments, however, the size of planform shapes can be limited by a singulation process. For example, the third (smaller) planform shape P3 of thecarrier substrate section 342 shown inFIG. 4C can be caused by a wafer saw having a blade that is substantially wider than thefirst trench 116 between theindividual mesas 118 of theindividual semiconductor devices 114. -
FIG. 5 is a cross-sectional view of thesemiconductor device assembly 100 havingSST structures 414. Theindividual SST structures 414 include theconductive material 102 and thesemiconductor structure 104, and thesemiconductor structure 104 can include first throughthird semiconductor materials 104 a-104 c. In some embodiments, theSST structure 414 can be configured to emit and/or receive light in the visible spectrum (e.g., from about 390 nm to about 750 nm) through thecarrier substrate 134. In other embodiments, theSST structure 414 can also be configured to emit and/or receive light in the infrared spectrum (e.g., from about 1050 nm to about 1550 nm) and/or in other suitable spectra provided that thecarrier substrate 134 is optically transmissive to such spectra. - In one embodiment, the
first semiconductor material 104 a can include an N-type semiconductor (e.g., an N-type gallium nitride (“N-GaN”)) and thethird semiconductor material 104 c can include a P-type semiconductor material (e.g., a P-type gallium nitride (“P-GaN”)). In selected embodiments, the first andthird semiconductor materials second semiconductor material 104 b can define an “active region” that includes a single quantum well (“SQW”), MQWs, and/or a bulk semiconductor material. The term “bulk semiconductor material” generally refers to a single grain semiconductor material (e.g., InGaN) with a thickness between approximately 10 nanometers and approximately 500 nanometers. In certain embodiments, the active region can include an InGaN SQW, GaN/InGaN MQWs, and/or an InGaN bulk material. In other embodiments, the active region can include aluminum gallium indium phosphide (AlGaInP), aluminum gallium indium nitride (AlGaInN), and/or other suitable materials or configurations. - The
SST structure 414 can be formed via metal organic chemical vapor deposition (“MOCVD”), molecular beam epitaxy (“MBE”), liquid phase epitaxy (“LPE”), hydride vapor phase epitaxy (“HVPE”), and/or other suitable epitaxial growth techniques. In other embodiments, theSST structure 414 can also include other suitable components, such as a buffer material that facilitates the formation of thesemiconductor structure 104 on the support substrate 108 (FIG. 2A ). In further embodiments, theSST structure 414 can include additional bonding and seed layers to facilitate bonding and/or epitaxial growth. - Once formed, the
SST structure 414 can be integrated into an SST device. For example, first andsecond contacts SST structure 414 can be directly attached to a printed circuit board or other suitable substrate. Also, other features can be formed on or integrated into the SST structure, such as a lens over thecarrier substrate 134 of theSST structure 414, an anti-reflective coating or a mirror, and/or other suitable mechanical/electrical components (not shown). - The
semiconductor device assembly 100 described above with reference toFIGS. 2A-5 can be used to form SST devices, SST structures, and/or other semiconductor structures that are incorporated into any of a myriad of larger and/or more complex devices or systems, a representative example of which issystem 500 shown schematically inFIG. 6 . Thesystem 500 can include one or more semiconductor/SST devices 510, adriver 520, aprocessor 530, and/or other subsystems orcomponents 540. The resultingsystem 500 can perform any of a wide variety of functions, such as backlighting, general illumination, power generations, sensors, and/or other suitable functions. Accordingly, representative systems can include, without limitation, hand-held devices (e.g., mobile phones, tablets, digital readers, and digital audio players), lasers, photovoltaic cells, remote controls, computers, and appliances. Components of thesystem 500 may be housed in a single unit or distributed over multiple, interconnected units (e.g., through a communications network). The components of thesystem 500 can also include local and/or remote memory storage devices, and any of a wide variety of computer readable media. - From the foregoing, it will be appreciated that specific embodiments of the technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the disclosure. Certain aspects of the present technology described in the context of particular embodiments may also be combined or eliminated in other embodiments. Additionally, while advantages associated with certain embodiments of the present technology have been described in the context of those embodiments, other embodiments may also exhibit such advantages, and not all embodiments need necessarily exhibit such advantages to fall within the scope of the technology. Accordingly, the disclosure and associated technology can encompass other embodiments not expressly shown or described herein.
Claims (20)
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US16/441,477 US20190296185A1 (en) | 2013-01-22 | 2019-06-14 | Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices |
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US14/706,827 US9812606B2 (en) | 2013-01-22 | 2015-05-07 | Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices |
US15/729,487 US10326043B2 (en) | 2013-01-22 | 2017-10-10 | Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices |
US16/441,477 US20190296185A1 (en) | 2013-01-22 | 2019-06-14 | Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices |
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US15/729,487 Active US10326043B2 (en) | 2013-01-22 | 2017-10-10 | Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices |
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US9812606B2 (en) | 2017-11-07 |
US9054235B2 (en) | 2015-06-09 |
US20140203239A1 (en) | 2014-07-24 |
US20180033909A1 (en) | 2018-02-01 |
US20150243835A1 (en) | 2015-08-27 |
US10326043B2 (en) | 2019-06-18 |
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