US20190163001A1 - Goa circuit, liquid crystal panel and display device - Google Patents

Goa circuit, liquid crystal panel and display device Download PDF

Info

Publication number
US20190163001A1
US20190163001A1 US15/749,303 US201815749303A US2019163001A1 US 20190163001 A1 US20190163001 A1 US 20190163001A1 US 201815749303 A US201815749303 A US 201815749303A US 2019163001 A1 US2019163001 A1 US 2019163001A1
Authority
US
United States
Prior art keywords
tft
signal
node
stage
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US15/749,303
Other versions
US10302985B1 (en
Inventor
Qiang Gong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN201711217027.6A external-priority patent/CN108010498A/en
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd, Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Assigned to WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. reassignment WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: GONG, Qiang
Application granted granted Critical
Publication of US10302985B1 publication Critical patent/US10302985B1/en
Publication of US20190163001A1 publication Critical patent/US20190163001A1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • G06F3/0418Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G06F3/04184Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306Circuit arrangements or driving methods for the control of single liquid crystal cells
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13454Drivers integrated on the active matrix substrate
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0286Details of a shift registers arranged for use in a driving circuit
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/08Details of timing specific for flat panels, other than clock recovery

Definitions

  • the disclosure relates to a liquid crystal display technical field, and more particularly to a GOA (Gate Driver On Array) circuit, liquid crystal panel and display device.
  • GOA Gate Driver On Array
  • GOA Gate Line scan driving signal circuit on an array substrate through the existed thin film transistor liquid crystal display device array process.
  • COF Chip On Flex/Film
  • the GOA technique could greatly save the manufacturing cost, save the bonging process of the COF on the Gate side, and increase the producing performance. Therefore, GOA is an important technique in the future development of the liquid crystal panel.
  • In-Cell Touch panel technology due to the well-development of integrated In-Cell Touch panel technology, it is widely used in high-end mobile phones.
  • the panels since the display refreshing time is separated, the panels usually perform touch scanning within a keeping time (i.e., touch panel suspending time), so that the working status of the GOA circuit of the panel is no longer continuous. Therefore, a certain number of stages are scanned continuously, the scan status is kept for a period of time after the scan, and then another scan starts to continue to scan the rest stages.
  • the GOA circuit is in the keeping status, the problem of insufficient circuit maintenance capability happens easily, so that the cascaded transmission of the GOA circuit might fail and the display abnormality occurs.
  • the technique issue to be solved by the embodiments of the present invention is to provide a GOA circuit, liquid crystal panel and display device to overcome the problem of insufficient circuit maintenance capability so that failure of cascaded transmission of the GOA circuit could be reduced and the circuit could be more stable.
  • the GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for
  • the voltage-stabilizing module comprises a first thin film transistor (TFT), wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
  • TFT thin film transistor
  • the forward-reverse scan control module comprises a second TFT and a third TFT;
  • a gate of the second TFT receives a current-stage gate driving signal of a (N ⁇ 2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
  • a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
  • the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT;
  • a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
  • a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N ⁇ 1)th stage GOA structural unit of the GOA structural units;
  • a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
  • the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • the node Q pull-down module comprises an eighth TFT, and a gate of the eighth TFT is connected to the second node, a source of the eighth TFT receives the signal with the constant low-level potential, and a drain of the eighth TFT is connected to the source of the first TFT of the voltage-stabilizing module and is connected to the first node through the first TFT.
  • the node P pull-down module comprises a ninth TFT, and a gate of the ninth TFT is connected to both the drains of the second TFT and the third TFT of the forward-reverse scan control module, a source of the ninth TFT receives the signal with the constant low-level potential, and a drain of the ninth TFT is connected to the second node.
  • the gate signal pull-down module comprises a tenth TFT, and a gate of the tenth TFT is connected to the second node, a source of the tenth TFT receives the signal with the constant low-level potential, and a drain of the tenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • the GAS signal function module comprises an eleventh TFT, a twelfth TFT and a thirteenth TFT;
  • a gate of the eleventh TFT receives the first GAS signal, a source of the eleventh TFT receives the signal with the constant low-level potential, and a drain of the eleventh TFT is connected to the second node;
  • a gate of the twelfth TFT receives the first GAS signal and is short-connected to a source of the twelfth TFT, and a drain of the twelfth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit;
  • a gate of the thirteenth TFT receives the second GAS signal, a source of the thirteenth TFT receives the signal with the constant low-level potential, and a drain of the thirteenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • one embodiment of the present invention further provides a liquid crystal panel.
  • the liquid crystal panel comprises a GOA circuit.
  • the GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a no
  • the voltage-stabilizing module comprises a first TFT, wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
  • the forward-reverse scan control module comprises a second TFT and a third TFT;
  • a gate of the second TFT receives a current-stage gate driving signal of a (N ⁇ 2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
  • a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
  • the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT;
  • a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
  • a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N ⁇ 1)th stage GOA structural unit of the GOA structural units;
  • a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
  • the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • the node Q pull-down module comprises an eighth TFT, and a gate of the eighth TFT is connected to the second node, a source of the eighth TFT receives the signal with the constant low-level potential, and a drain of the eighth TFT is connected to the source of the first TFT of the voltage-stabilizing module and is connected to the first node through the first TFT.
  • the node P pull-down module comprises a ninth TFT, and a gate of the ninth TFT is connected to both the drains of the second TFT and the third TFT of the forward-reverse scan control module, a source of the ninth TFT receives the signal with the constant low-level potential, and a drain of the ninth TFT is connected to the second node.
  • the gate signal pull-down module comprises a tenth TFT, and a gate of the tenth TFT is connected to the second node, a source of the tenth TFT receives the signal with the constant low-level potential, and a drain of the tenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • the GAS signal function module comprises an eleventh TFT, a twelfth TFT and a thirteenth TFT;
  • a gate of the eleventh TFT receives the first GAS signal, a source of the eleventh TFT receives the signal with the constant low-level potential, and a drain of the eleventh TFT is connected to the second node;
  • a gate of the twelfth TFT receives the first GAS signal and is short-connected to a source of the twelfth TFT, and a drain of the twelfth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit;
  • a gate of the thirteenth TFT receives the second GAS signal, a source of the thirteenth TFT receives the signal with the constant low-level potential, and a drain of the thirteenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • one embodiment of the present invention further provides a display device.
  • the display device comprises a liquid crystal panel.
  • the liquid crystal display panel comprises a GOA circuit, wherein,
  • the GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for pulling down a potential of a second node; a gate signal pull-down module for pulling
  • the voltage-stabilizing module comprises a first TFT, wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
  • the forward-reverse scan control module comprises a second TFT and a third TFT;
  • a gate of the second TFT receives a current-stage gate driving signal of a (N ⁇ 2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
  • a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
  • the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT;
  • a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
  • a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N ⁇ 1)th stage GOA structural unit of the GOA structural units;
  • a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
  • the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • the voltage-stabilizing module is prevented from being turned on during the suspending period of the touch panel and current leakage from the first node Q to the constant low-level potential VGL through the node Q pull-down module or from the first node Q to the low-level potential of the corresponded direct-current scan control signal through the forward-reverse scan control module could be stopped, so that normally turning on the output control module and fully turning on the next stage GOA structural unit after the suspending period of the touch panel could be ensured. Therefore, the problem of insufficient circuit maintenance capability could be overcome, failure of cascaded transmission of the GOA circuit could be reduced and the circuit could be more stable.
  • FIG. 1 is a circuit diagram of one stage GOA structural unit of the GOA circuit according to one embodiment of the present invention.
  • FIG. 2 is a timing chart when one stage GOA structural unit of the GOA circuit receives the signal with the constant high-level potential VGH according to one embodiment of the present invention.
  • FIG. 3 is a timing chart of one stage GOA structural unit of the GOA circuit according to one embodiment of the present invention.
  • a GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units.
  • Nth stage GOA structural unit is used as an example for explanation, wherein N is a positive integer.
  • the Nth stage GOA structural unit comprises:
  • a forward-reverse scan control module 1 for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal U 2 D and a reverse direct-current scan control signal D 2 U;
  • a node signal control input module 2 for outputting a low-level potential in a non-working stage of the GOA circuit
  • an output control module 3 for controlling output of a gate driving signal
  • a voltage-stabilizing module 4 for maintaining a potential of a first node Q(N);
  • a node Q pull-down module 5 for pulling down the potential of the first node Q(N);
  • a node P pull-down module 6 for pulling down a potential of a second node P(N);
  • a gate signal pull-down module 7 for pulling down a potential of a current-stage gate driving signal G(N) and controlling output of the current-stage gate driving signal G(N) during a scan period of the touch panel;
  • a GAS signal function module 8 for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal G(N) during the scan period of the touch panel by using a first GAS signal GAS 1 and a second GAS signal GAS 2 ;
  • the forward-reverse scan control module 1 comprises a second thin film transistor (TFT) NT 2 and a third TFT NT 3 .
  • a gate of the second TFT NT 2 receives a current-stage gate driving signal G(N ⁇ 2) of a (N ⁇ 2)th stage GOA structural unit of the GOA structural units, a source of the second TFT NT 2 receives the forward direct-current scan control signal U 2 D, and a drain of the second TFT NT 2 is connected to both a source of a first TFT NT 1 of the voltage-stabilizing module 4 and a drain of the third TFT NT 3 .
  • a gate of the third TFT NT 3 receives a current-stage gate driving signal G(N+2) of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT NT 3 receives the reverse direct-current scan control signal D 2 U.
  • the node signal control input module 2 comprises a fourth TFT NT 4 , a fifth TFT NT 5 and a sixth TFT NT 6 .
  • a gate of the fourth TFT NT 4 receives the forward direct-current scan control signal U 2 D
  • a source of the fourth TFT NT 4 receives a current-stage clock signal CK(N+1) of a (N+1)th stage GOA structural unit of the GOA structural units
  • a drain of the fourth TFT NT 4 is connected to a drain of the fifth TFT NT 5 and a gate of the sixth TFT NT 6 .
  • a gate of the fifth TFT NT 5 receives the reverse direct-current scan control signal D 2 U, and a source of the fifth TFT NT 5 receives a current-stage clock signal CK(N ⁇ 1) of a (N ⁇ 1)th stage GOA structural unit of the GOA structural units.
  • a source of the sixth TFT NT 6 receives the signal with the constant high-level potential VGH, and a drain of the sixth TFT NT 6 is connected to the second node P(N) connected to the node Q pull-down module 5 , the node P pull-down module 6 , the gate signal pull-down module 7 and the GAS signal function module 8 .
  • the output control module 3 comprises a seventh TFT NT 7 .
  • a gate of the seventh TFT NT 7 is connected to the first node Q(N), a source of the seventh TFT NT 7 receives a current-stage clock signal CK(N) of the Nth stage GOA structural unit, and a drain of the seventh TFT NT 7 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit.
  • the voltage-stabilizing module 4 comprises the first TFT NT 1 .
  • a gate of the first TFT NT 1 receives a third GAS signal GAS 3 , a source of the first TFT NT 1 is connected to both the forward-reverse scan control module 1 and the node Q pull-down module 5 , and a drain of the first TFT NT 1 is connected to the first node Q(N).
  • the node Q pull-down module 5 comprises an eighth TFT NT 8 .
  • a gate of the eighth TFT NT 8 is connected to the second node P(N)
  • a source of the eighth TFT NT 8 receives the signal with the constant low-level potential VGL
  • a drain of the eighth TFT NT 8 is connected to the source of the first TFT NT 1 of the voltage-stabilizing module 4 and is connected to the first node Q(N) through the first TFT NT 1 .
  • the node P pull-down module 6 comprises a ninth TFT NT 9 .
  • a gate of the ninth TFT NT 9 is connected to both the drains of the second TFT NT 2 and the third TFT NT 3 of the forward-reverse scan control module 1 , a source of the ninth TFT NT 9 receives the signal with the constant low-level potential VGL, and a drain of the ninth TFT NT 9 is connected to the second node P(N).
  • the gate signal pull-down module 7 comprises a tenth TFT NT 10 .
  • a gate of the tenth TFT NT 10 is connected to the second node P(N), a source of the tenth TFT NT 10 receives the signal with the constant low-level potential VGL, and a drain of the tenth TFT NT 10 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit.
  • the GAS signal function module 8 comprises an eleventh TFT NT 11 , a twelfth TFT NT 12 and a thirteenth TFT NT 13 .
  • a gate of the eleventh TFT NT 11 receives the first GAS signal GAS 1
  • a source of the eleventh TFT NT 11 receives the signal with the constant low-level potential VGL
  • a drain of the eleventh TFT NT 11 is connected to the second node P(N).
  • a gate of the twelfth TFT NT 12 receives the first GAS signal GAS 1 and is short-connected to a source of the twelfth TFT NT 12 , and a drain of the twelfth TFT NT 12 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit.
  • a gate of the thirteenth TFT NT 13 receives the second GAS signal GAS 2 , a source of the thirteenth TFT NT 13 receives the signal with the constant low-level potential VGL, and a drain of the thirteenth TFT NT 13 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit.
  • the self-lifting capacitor 9 comprises a first capacitor C 1 .
  • One terminal of the first capacitor C 1 receives the signal with the constant low-level potential VGL, and another terminal of the first capacitor C 1 is connected to the source of the first TFT NT 1 of the voltage-stabilizing module 4 and connected to the first node Q(N) through the first TFT NT 1 , so as to perform second lifting of the potential of the first node Q(N).
  • the gate of the first TFT NT 1 of the voltage-stabilizing module 4 would be kept at high-level potential and being turned on always once entering the suspending period of the touch panel so that charges would leak from the first node Q(N) to the constant low-level potential VGL through the source of the first TFT NT 1 and the seventh TFT NT 7 of the node Q pull-down module 5 , or leak from the first node Q(N) to the forward direct-current scan control signal U 2 D or reverse direct-current scan control signal D 2 U at low-level potential through the source of the first TFT NT 1 and the forward-reverse scan control module 1 .
  • the potential of the first node Q(N) is too low to fully turn on the seventh TFT NT 7 of the output control module 3 so that abnormal occurs in the current stage GOA structural unit and a next stage GOA structural unit next to the current stage GOA structural unit cannot be fully turned on.
  • FIG. 2 for the specific timing diagram. It is noted that, the potentials of the forward direct-current scan control signal U 2 D and the reverse direct-current scan control signal D 2 U are different at the same time, and the current leakage path of the first node Q(N) is determined in accordance with the scan direction of the forward-reverse scan control module 1 .
  • the forward direct-current scan control signal U 2 D is at high-level potential and the reverse direct-current scan control signal D 2 U is at low-level potential so that the charges are leaked from the first node Q(N) to the reverse direct-current scan control signal D 2 U.
  • the forward-reverse scan control module 1 scans in reverse direction, the charges are leaked from the first node Q(N) to the forward direct-current scan control signal U 2 D.
  • the present invention adjusts the third GAS signal GAS 3 received by the gate of the first TFT NT 1 of the voltage-stabilizing module 4 so that the third GAS signal GAS 3 is kept being the signal with the constant high-level potential VGH during the scan period of the touch panel and being the signal with the constant low-level potential VGL during the suspending period of the touch panel. Therefore, the first TFT NT 1 of the voltage-stabilizing module 4 could be terminated during the suspending period of the touch panel, and charge leakage from the first node Q(N) could be prevented. Please refer to FIG. 3 for the specific timing diagram.
  • the TFT's used in the GOA structural units are N-type TFT's, the signal with the constant high-level potential VGH is set at 10V, and the signal with the constant low-level potential VGL is set at ⁇ 7V.
  • the potential of the forward direct-current scan control signal U 2 D is 10V when the forward direct-current scan control signal U 2 D is with high-level potential, and the potential of the forward direct-current scan control signal U 2 D is ⁇ 7V when the forward direct-current scan control signal U 2 D is with low-level potential.
  • the potential of the reverse direct-current scan control signal D 2 U is ⁇ 7V when the reverse direct-current scan control signal D 2 U is with low-level potential, and the potential of the reverse direct-current scan control signal D 2 U is 10V when the reverse direct-current scan control signal D 2 U is with high-level potential.
  • the second embodiment of the present invention provides a liquid crystal panel comprising the GOA circuit having structure and connecting relationship the same as the GOA circuit provided by the first embodiment of the present invention.
  • the details could be referred to the related contents of the first embodiment of the present invention and are nod described again here.
  • the third embodiment of the present invention provides a display device comprising the liquid crystal panel having structure and connecting relationship the same as the liquid crystal panel provided by the second embodiment of the present invention.
  • the details could be referred to the related contents of the second embodiment of the present invention and are nod described again here.
  • the voltage-stabilizing module is prevented from being turned on during the suspending period of the touch panel and current leakage from the first node Q to the constant low-level potential VGL through the node Q pull-down module or from the first node Q to the low-level potential of the corresponded direct-current scan control signal through the forward-reverse scan control module could be stopped, so that normally turning on the output control module and fully turning on the next stage GOA structural unit after the suspending period of the touch panel could be ensured. Therefore, the problem of insufficient circuit maintenance capability could be overcome, failure of cascaded transmission of the GOA circuit could be reduced and the circuit could be more stable.

Abstract

A GOA circuit comprises a plurality of GOA structural units connected in cascade, and each GOA structural unit outputs a line scanning signal to a corresponding one line of pixel units. An Nth stage GOA structural unit comprises a forward-reverse scan control module, a node signal control input module, an output control module, a voltage-stabilizing module, a node Q pull-down module, a node P pull-down module, a gate signal pull-down module, a GAS signal function module and a self-lifting capacitor. A gate of a first TFT of the voltage-stabilizing module receives a third GAS signal, a source thereof is connected to the forward-reverse scan control module and the node Q pull-down module, and a drain thereof is connected to the first node. The third GAS signal is VGH signal during the scan period of the touch panel, and is a VGL signal in a suspending period of the touch panel.

Description

    RELATED APPLICATIONS
  • The present application is a National Phase of International Application Number PCT/CN2018/070020, filed on Jan. 2, 2018, and claims the priority of China Application No. 201711217027.6, filed on Nov. 28, 2017.
  • FIELD OF THE DISCLOSURE
  • The disclosure relates to a liquid crystal display technical field, and more particularly to a GOA (Gate Driver On Array) circuit, liquid crystal panel and display device.
  • BACKGROUND
  • GOA technique drives scanning on a liquid crystal panel by forming a gate line scan driving signal circuit on an array substrate through the existed thin film transistor liquid crystal display device array process. Compared with the conventional COF (Chip On Flex/Film) technique, the GOA technique could greatly save the manufacturing cost, save the bonging process of the COF on the Gate side, and increase the producing performance. Therefore, GOA is an important technique in the future development of the liquid crystal panel.
  • Along with the development of the low temperature polysilicon (LTPS) semiconductor transistors and due to the very high carrier mobility of the LTPS semiconductors, corresponded integrated peripheral circuits of the panel and researches relating to the system on panel (SOP) techniques are focused by people and are become reality step by step.
  • At present, due to the well-development of integrated In-Cell Touch panel technology, it is widely used in high-end mobile phones. In the integrated touch panels, since the display refreshing time is separated, the panels usually perform touch scanning within a keeping time (i.e., touch panel suspending time), so that the working status of the GOA circuit of the panel is no longer continuous. Therefore, a certain number of stages are scanned continuously, the scan status is kept for a period of time after the scan, and then another scan starts to continue to scan the rest stages. However, when the GOA circuit is in the keeping status, the problem of insufficient circuit maintenance capability happens easily, so that the cascaded transmission of the GOA circuit might fail and the display abnormality occurs.
  • Therefore, there is an urgent need for an improved GOA circuit to overcome the problem of insufficient circuit maintenance capability so that failure of cascaded transmission of the GOA circuit could be reduced and the circuit could be more stable.
  • SUMMARY
  • The technique issue to be solved by the embodiments of the present invention is to provide a GOA circuit, liquid crystal panel and display device to overcome the problem of insufficient circuit maintenance capability so that failure of cascaded transmission of the GOA circuit could be reduced and the circuit could be more stable.
  • In order to solve the technique issue mentioned above, one embodiment of the present invention provides a GOA circuit. The GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for pulling down a potential of a second node; a gate signal pull-down module for pulling down a potential of a current-stage gate driving signal and controlling output of the current-stage gate driving signal during a scan period of a touch panel; a GAS signal function module for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal during the scan period of the touch panel by using a first GAS signal and a second GAS signal; and a self-lifting capacitor for a second lifting of the potential of the first node, and N is a positive integer; wherein,
  • the voltage-stabilizing module comprises a first thin film transistor (TFT), wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
  • Wherein, the forward-reverse scan control module comprises a second TFT and a third TFT; wherein,
  • a gate of the second TFT receives a current-stage gate driving signal of a (N−2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
  • a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
  • Wherein, the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT; wherein,
  • a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
  • a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N−1)th stage GOA structural unit of the GOA structural units;
  • a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
  • Wherein, the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • Wherein, the node Q pull-down module comprises an eighth TFT, and a gate of the eighth TFT is connected to the second node, a source of the eighth TFT receives the signal with the constant low-level potential, and a drain of the eighth TFT is connected to the source of the first TFT of the voltage-stabilizing module and is connected to the first node through the first TFT.
  • Wherein, the node P pull-down module comprises a ninth TFT, and a gate of the ninth TFT is connected to both the drains of the second TFT and the third TFT of the forward-reverse scan control module, a source of the ninth TFT receives the signal with the constant low-level potential, and a drain of the ninth TFT is connected to the second node.
  • Wherein, the gate signal pull-down module comprises a tenth TFT, and a gate of the tenth TFT is connected to the second node, a source of the tenth TFT receives the signal with the constant low-level potential, and a drain of the tenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • Wherein, the GAS signal function module comprises an eleventh TFT, a twelfth TFT and a thirteenth TFT; wherein,
  • a gate of the eleventh TFT receives the first GAS signal, a source of the eleventh TFT receives the signal with the constant low-level potential, and a drain of the eleventh TFT is connected to the second node;
  • a gate of the twelfth TFT receives the first GAS signal and is short-connected to a source of the twelfth TFT, and a drain of the twelfth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit;
  • a gate of the thirteenth TFT receives the second GAS signal, a source of the thirteenth TFT receives the signal with the constant low-level potential, and a drain of the thirteenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • Correspondingly, one embodiment of the present invention further provides a liquid crystal panel. The liquid crystal panel comprises a GOA circuit. The GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for pulling down a potential of a second node; a gate signal pull-down module for pulling down a potential of a current-stage gate driving signal and controlling output of the current-stage gate driving signal during a scan period of a touch panel; a GAS signal function module for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal during the scan period of the touch panel by using a first GAS signal and a second GAS signal; and a self-lifting capacitor for a second lifting of the potential of the first node, and N is a positive integer; wherein,
  • the voltage-stabilizing module comprises a first TFT, wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
  • Wherein, the forward-reverse scan control module comprises a second TFT and a third TFT; wherein,
  • a gate of the second TFT receives a current-stage gate driving signal of a (N−2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
  • a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
  • Wherein, the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT; wherein,
  • a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
  • a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N−1)th stage GOA structural unit of the GOA structural units;
  • a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
  • Wherein, the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • Wherein, the node Q pull-down module comprises an eighth TFT, and a gate of the eighth TFT is connected to the second node, a source of the eighth TFT receives the signal with the constant low-level potential, and a drain of the eighth TFT is connected to the source of the first TFT of the voltage-stabilizing module and is connected to the first node through the first TFT.
  • Wherein, the node P pull-down module comprises a ninth TFT, and a gate of the ninth TFT is connected to both the drains of the second TFT and the third TFT of the forward-reverse scan control module, a source of the ninth TFT receives the signal with the constant low-level potential, and a drain of the ninth TFT is connected to the second node.
  • Wherein, the gate signal pull-down module comprises a tenth TFT, and a gate of the tenth TFT is connected to the second node, a source of the tenth TFT receives the signal with the constant low-level potential, and a drain of the tenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • Wherein, the GAS signal function module comprises an eleventh TFT, a twelfth TFT and a thirteenth TFT; wherein,
  • a gate of the eleventh TFT receives the first GAS signal, a source of the eleventh TFT receives the signal with the constant low-level potential, and a drain of the eleventh TFT is connected to the second node;
  • a gate of the twelfth TFT receives the first GAS signal and is short-connected to a source of the twelfth TFT, and a drain of the twelfth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit;
  • a gate of the thirteenth TFT receives the second GAS signal, a source of the thirteenth TFT receives the signal with the constant low-level potential, and a drain of the thirteenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • Correspondingly, one embodiment of the present invention further provides a display device. The display device comprises a liquid crystal panel. The liquid crystal display panel comprises a GOA circuit, wherein,
  • the GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for pulling down a potential of a second node; a gate signal pull-down module for pulling down a potential of a current-stage gate driving signal and controlling output of the current-stage gate driving signal during a scan period of a touch panel; a GAS signal function module for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal during the scan period of the touch panel by using a first GAS signal and a second GAS signal; and a self-lifting capacitor for a second lifting of the potential of the first node, and N is a positive integer; wherein,
  • the voltage-stabilizing module comprises a first TFT, wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
  • Wherein, the forward-reverse scan control module comprises a second TFT and a third TFT; wherein,
  • a gate of the second TFT receives a current-stage gate driving signal of a (N−2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
  • a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
  • Wherein, the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT; wherein,
  • a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
  • a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N−1)th stage GOA structural unit of the GOA structural units;
  • a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
  • Wherein, the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
  • In the embodiments of the present invention, through setting the signal, which is received by the gate of the first TFT of the voltage-stabilizing module of each stage of the GOA structural units in the GOA circuit, to be the third GAS signal which is at the constant high-level potential VGH during the scan period of the touch panel and at the constant low-level potential VGL during the suspending period of the touch panel, the voltage-stabilizing module is prevented from being turned on during the suspending period of the touch panel and current leakage from the first node Q to the constant low-level potential VGL through the node Q pull-down module or from the first node Q to the low-level potential of the corresponded direct-current scan control signal through the forward-reverse scan control module could be stopped, so that normally turning on the output control module and fully turning on the next stage GOA structural unit after the suspending period of the touch panel could be ensured. Therefore, the problem of insufficient circuit maintenance capability could be overcome, failure of cascaded transmission of the GOA circuit could be reduced and the circuit could be more stable.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • In order to make the descriptions of the technique solutions of the embodiments of the present invention or the existed techniques, the drawings necessary for describing the embodiments or the existed techniques are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention, and, for those with ordinary skill in this field, other drawings can be obtained from the drawings described below without creative efforts.
  • FIG. 1 is a circuit diagram of one stage GOA structural unit of the GOA circuit according to one embodiment of the present invention.
  • FIG. 2 is a timing chart when one stage GOA structural unit of the GOA circuit receives the signal with the constant high-level potential VGH according to one embodiment of the present invention.
  • FIG. 3 is a timing chart of one stage GOA structural unit of the GOA circuit according to one embodiment of the present invention.
  • DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
  • The embodiments of the present invention will be described with reference to accompanying drawings as follows.
  • In the first embodiment of the present invention, a GOA circuit is provided. The GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units. In order to simplify the description, the Nth stage GOA structural unit is used as an example for explanation, wherein N is a positive integer.
  • As shown in FIG. 1, the Nth stage GOA structural unit comprises:
  • a forward-reverse scan control module 1 for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal U2D and a reverse direct-current scan control signal D2U;
  • a node signal control input module 2 for outputting a low-level potential in a non-working stage of the GOA circuit;
  • an output control module 3 for controlling output of a gate driving signal;
  • a voltage-stabilizing module 4 for maintaining a potential of a first node Q(N);
  • a node Q pull-down module 5 for pulling down the potential of the first node Q(N);
  • a node P pull-down module 6 for pulling down a potential of a second node P(N);
  • a gate signal pull-down module 7 for pulling down a potential of a current-stage gate driving signal G(N) and controlling output of the current-stage gate driving signal G(N) during a scan period of the touch panel;
  • a GAS signal function module 8 for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal G(N) during the scan period of the touch panel by using a first GAS signal GAS1 and a second GAS signal GAS2; and
  • a self-lifting capacitor 9 for a second lifting of the potential of the first node Q(N).
  • Wherein, the forward-reverse scan control module 1 comprises a second thin film transistor (TFT) NT2 and a third TFT NT3. A gate of the second TFT NT2 receives a current-stage gate driving signal G(N−2) of a (N−2)th stage GOA structural unit of the GOA structural units, a source of the second TFT NT2 receives the forward direct-current scan control signal U2D, and a drain of the second TFT NT2 is connected to both a source of a first TFT NT1 of the voltage-stabilizing module 4 and a drain of the third TFT NT3. A gate of the third TFT NT3 receives a current-stage gate driving signal G(N+2) of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT NT3 receives the reverse direct-current scan control signal D2U.
  • Wherein, the node signal control input module 2 comprises a fourth TFT NT4, a fifth TFT NT5 and a sixth TFT NT6. A gate of the fourth TFT NT4 receives the forward direct-current scan control signal U2D, a source of the fourth TFT NT4 receives a current-stage clock signal CK(N+1) of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT NT4 is connected to a drain of the fifth TFT NT5 and a gate of the sixth TFT NT6. A gate of the fifth TFT NT5 receives the reverse direct-current scan control signal D2U, and a source of the fifth TFT NT5 receives a current-stage clock signal CK(N−1) of a (N−1)th stage GOA structural unit of the GOA structural units. A source of the sixth TFT NT6 receives the signal with the constant high-level potential VGH, and a drain of the sixth TFT NT6 is connected to the second node P(N) connected to the node Q pull-down module 5, the node P pull-down module 6, the gate signal pull-down module 7 and the GAS signal function module 8.
  • Wherein, the output control module 3 comprises a seventh TFT NT7. A gate of the seventh TFT NT7 is connected to the first node Q(N), a source of the seventh TFT NT7 receives a current-stage clock signal CK(N) of the Nth stage GOA structural unit, and a drain of the seventh TFT NT7 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit.
  • Wherein, the voltage-stabilizing module 4 comprises the first TFT NT1. A gate of the first TFT NT1 receives a third GAS signal GAS3, a source of the first TFT NT1 is connected to both the forward-reverse scan control module 1 and the node Q pull-down module 5, and a drain of the first TFT NT1 is connected to the first node Q(N).
  • Wherein, the node Q pull-down module 5 comprises an eighth TFT NT8. A gate of the eighth TFT NT8 is connected to the second node P(N), a source of the eighth TFT NT8 receives the signal with the constant low-level potential VGL, and a drain of the eighth TFT NT8 is connected to the source of the first TFT NT1 of the voltage-stabilizing module 4 and is connected to the first node Q(N) through the first TFT NT1.
  • Wherein, the node P pull-down module 6 comprises a ninth TFT NT9. A gate of the ninth TFT NT9 is connected to both the drains of the second TFT NT2 and the third TFT NT3 of the forward-reverse scan control module 1, a source of the ninth TFT NT9 receives the signal with the constant low-level potential VGL, and a drain of the ninth TFT NT9 is connected to the second node P(N).
  • Wherein, the gate signal pull-down module 7 comprises a tenth TFT NT10. A gate of the tenth TFT NT10 is connected to the second node P(N), a source of the tenth TFT NT10 receives the signal with the constant low-level potential VGL, and a drain of the tenth TFT NT10 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit.
  • Wherein, the GAS signal function module 8 comprises an eleventh TFT NT11, a twelfth TFT NT12 and a thirteenth TFT NT13. A gate of the eleventh TFT NT11 receives the first GAS signal GAS1, a source of the eleventh TFT NT11 receives the signal with the constant low-level potential VGL, and a drain of the eleventh TFT NT11 is connected to the second node P(N). A gate of the twelfth TFT NT12 receives the first GAS signal GAS1 and is short-connected to a source of the twelfth TFT NT12, and a drain of the twelfth TFT NT12 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit. A gate of the thirteenth TFT NT13 receives the second GAS signal GAS2, a source of the thirteenth TFT NT13 receives the signal with the constant low-level potential VGL, and a drain of the thirteenth TFT NT13 receives the current-stage gate driving signal G(N) of the Nth stage GOA structural unit.
  • Wherein, the self-lifting capacitor 9 comprises a first capacitor C1. One terminal of the first capacitor C1 receives the signal with the constant low-level potential VGL, and another terminal of the first capacitor C1 is connected to the source of the first TFT NT1 of the voltage-stabilizing module 4 and connected to the first node Q(N) through the first TFT NT1, so as to perform second lifting of the potential of the first node Q(N).
  • It is found by the applicant that when the third GAS signal GAS3 received by the gate of the first TFT NT1 of the voltage-stabilizing module 4 is always kept being the signal with the constant high-level voltage VGH, the gate of the first TFT NT1 of the voltage-stabilizing module 4 would be kept at high-level potential and being turned on always once entering the suspending period of the touch panel so that charges would leak from the first node Q(N) to the constant low-level potential VGL through the source of the first TFT NT1 and the seventh TFT NT7 of the node Q pull-down module 5, or leak from the first node Q(N) to the forward direct-current scan control signal U2D or reverse direct-current scan control signal D2U at low-level potential through the source of the first TFT NT1 and the forward-reverse scan control module 1. Therefore, after the suspending period of the touch panel is finished, the potential of the first node Q(N) is too low to fully turn on the seventh TFT NT7 of the output control module 3 so that abnormal occurs in the current stage GOA structural unit and a next stage GOA structural unit next to the current stage GOA structural unit cannot be fully turned on. Please refer to FIG. 2 for the specific timing diagram. It is noted that, the potentials of the forward direct-current scan control signal U2D and the reverse direct-current scan control signal D2U are different at the same time, and the current leakage path of the first node Q(N) is determined in accordance with the scan direction of the forward-reverse scan control module 1. For example, when the forward-reverse scan control module 1 scans in forward direction, the forward direct-current scan control signal U2D is at high-level potential and the reverse direct-current scan control signal D2U is at low-level potential so that the charges are leaked from the first node Q(N) to the reverse direct-current scan control signal D2U. Or, when the forward-reverse scan control module 1 scans in reverse direction, the charges are leaked from the first node Q(N) to the forward direct-current scan control signal U2D.
  • In order to overcome the problem of insufficient circuit maintenance capability so as to reduce failure of cascaded transmission of the GOA circuit and increase stability of the circuit, the present invention adjusts the third GAS signal GAS3 received by the gate of the first TFT NT1 of the voltage-stabilizing module 4 so that the third GAS signal GAS3 is kept being the signal with the constant high-level potential VGH during the scan period of the touch panel and being the signal with the constant low-level potential VGL during the suspending period of the touch panel. Therefore, the first TFT NT1 of the voltage-stabilizing module 4 could be terminated during the suspending period of the touch panel, and charge leakage from the first node Q(N) could be prevented. Please refer to FIG. 3 for the specific timing diagram.
  • In the first embodiment of the present invention, the TFT's used in the GOA structural units are N-type TFT's, the signal with the constant high-level potential VGH is set at 10V, and the signal with the constant low-level potential VGL is set at −7V. The potential of the forward direct-current scan control signal U2D is 10V when the forward direct-current scan control signal U2D is with high-level potential, and the potential of the forward direct-current scan control signal U2D is −7V when the forward direct-current scan control signal U2D is with low-level potential. Similarly, the potential of the reverse direct-current scan control signal D2U is −7V when the reverse direct-current scan control signal D2U is with low-level potential, and the potential of the reverse direct-current scan control signal D2U is 10V when the reverse direct-current scan control signal D2U is with high-level potential.
  • Corresponding to the GOA circuit provided by the first embodiment of the present invention, the second embodiment of the present invention provides a liquid crystal panel comprising the GOA circuit having structure and connecting relationship the same as the GOA circuit provided by the first embodiment of the present invention. The details could be referred to the related contents of the first embodiment of the present invention and are nod described again here.
  • Corresponding to the liquid crystal panel provided in the second embodiment of the present invention, the third embodiment of the present invention provides a display device comprising the liquid crystal panel having structure and connecting relationship the same as the liquid crystal panel provided by the second embodiment of the present invention. The details could be referred to the related contents of the second embodiment of the present invention and are nod described again here.
  • The beneficial effects obtained through adopting the embodiments of the present invention are as follows:
  • In the embodiments of the present invention, through setting the signal, which is received by the gate of the first TFT of the voltage-stabilizing module of each stage of the GOA structural units in the GOA circuit, to be the third GAS signal which is at the constant high-level potential VGH during the scan period of the touch panel and at the constant low-level potential VGL during the suspending period of the touch panel, the voltage-stabilizing module is prevented from being turned on during the suspending period of the touch panel and current leakage from the first node Q to the constant low-level potential VGL through the node Q pull-down module or from the first node Q to the low-level potential of the corresponded direct-current scan control signal through the forward-reverse scan control module could be stopped, so that normally turning on the output control module and fully turning on the next stage GOA structural unit after the suspending period of the touch panel could be ensured. Therefore, the problem of insufficient circuit maintenance capability could be overcome, failure of cascaded transmission of the GOA circuit could be reduced and the circuit could be more stable.
  • The foregoing contents are detailed description of the disclosure in conjunction with specific embodiments and the scope of the present invention should not be limited accordingly. For the person skilled in the art of the disclosure, without departing from the concept of the disclosure, simple deductions or substitutions can be made and should be included in the protection scope of the application.

Claims (20)

What is claimed is:
1. A GOA (Gate Driver on Array) circuit, comprising a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for pulling down a potential of a second node; a gate signal pull-down module for pulling down a potential of a current-stage gate driving signal and controlling output of the current-stage gate driving signal during a scan period of a touch panel; a GAS signal function module for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal during the scan period of the touch panel by using a first GAS signal and a second GAS signal; and a self-lifting capacitor for a second lifting of the potential of the first node, and N is a positive integer; wherein,
the voltage-stabilizing module comprises a first thin film transistor (TFT), wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
2. The GOA circuit according to claim 1, wherein the forward-reverse scan control module comprises a second TFT and a third TFT; wherein,
a gate of the second TFT receives a current-stage gate driving signal of a (N−2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
3. The GOA circuit according to claim 2, wherein the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT; wherein,
a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N−1)th stage GOA structural unit of the GOA structural units;
a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
4. The GOA circuit according to claim 3, wherein the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
5. The GOA circuit according to claim 4, wherein the node Q pull-down module comprises an eighth TFT, and a gate of the eighth TFT is connected to the second node, a source of the eighth TFT receives the signal with the constant low-level potential, and a drain of the eighth TFT is connected to the source of the first TFT of the voltage-stabilizing module and is connected to the first node through the first TFT.
6. The GOA circuit according to claim 5, wherein the node P pull-down module comprises a ninth TFT, and a gate of the ninth TFT is connected to both the drains of the second TFT and the third TFT of the forward-reverse scan control module, a source of the ninth TFT receives the signal with the constant low-level potential, and a drain of the ninth TFT is connected to the second node.
7. The GOA circuit according to claim 6, wherein the gate signal pull-down module comprises a tenth TFT, and a gate of the tenth TFT is connected to the second node, a source of the tenth TFT receives the signal with the constant low-level potential, and a drain of the tenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
8. The GOA circuit according to claim 7, wherein the GAS signal function module comprises an eleventh TFT, a twelfth TFT and a thirteenth TFT; wherein,
a gate of the eleventh TFT receives the first GAS signal, a source of the eleventh TFT receives the signal with the constant low-level potential, and a drain of the eleventh TFT is connected to the second node;
a gate of the twelfth TFT receives the first GAS signal and is short-connected to a source of the twelfth TFT, and a drain of the twelfth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit;
a gate of the thirteenth TFT receives the second GAS signal, a source of the thirteenth TFT receives the signal with the constant low-level potential, and a drain of the thirteenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
9. A liquid crystal panel, comprising a GOA circuit comprising a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for pulling down a potential of a second node; a gate signal pull-down module for pulling down a potential of a current-stage gate driving signal and controlling output of the current-stage gate driving signal during a scan period of a touch panel; a GAS signal function module for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal during the scan period of the touch panel by using a first GAS signal and a second GAS signal; and a self-lifting capacitor for a second lifting of the potential of the first node, and N is a positive integer; wherein,
the voltage-stabilizing module comprises a first thin film transistor (TFT), wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
10. The liquid crystal panel according to claim 9, wherein the forward-reverse scan control module comprises a second TFT and a third TFT; wherein,
a gate of the second TFT receives a current-stage gate driving signal of a (N−2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
11. The liquid crystal panel according to claim 10, wherein the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT; wherein,
a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N−1)th stage GOA structural unit of the GOA structural units;
a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
12. The liquid crystal panel according to claim 11, wherein the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
13. The liquid crystal panel according to claim 12, wherein the node Q pull-down module comprises an eighth TFT, and a gate of the eighth TFT is connected to the second node, a source of the eighth TFT receives the signal with the constant low-level potential, and a drain of the eighth TFT is connected to the source of the first TFT of the voltage-stabilizing module and is connected to the first node through the first TFT.
14. The liquid crystal panel according to claim 13, wherein the node P pull-down module comprises a ninth TFT, and a gate of the ninth TFT is connected to both the drains of the second TFT and the third TFT of the forward-reverse scan control module, a source of the ninth TFT receives the signal with the constant low-level potential, and a drain of the ninth TFT is connected to the second node.
15. The liquid crystal panel according to claim 14, wherein the gate signal pull-down module comprises a tenth TFT, and a gate of the tenth TFT is connected to the second node, a source of the tenth TFT receives the signal with the constant low-level potential, and a drain of the tenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
16. The liquid crystal panel according to claim 15, wherein the GAS signal function module comprises an eleventh TFT, a twelfth TFT and a thirteenth TFT; wherein,
a gate of the eleventh TFT receives the first GAS signal, a source of the eleventh TFT receives the signal with the constant low-level potential, and a drain of the eleventh TFT is connected to the second node;
a gate of the twelfth TFT receives the first GAS signal and is short-connected to a source of the twelfth TFT, and a drain of the twelfth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit;
a gate of the thirteenth TFT receives the second GAS signal, a source of the thirteenth TFT receives the signal with the constant low-level potential, and a drain of the thirteenth TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
17. A display device, comprising a liquid crystal panel comprising a GOA circuit; wherein,
the GOA circuit comprises a plurality of GOA structural units connected in cascade, wherein each one stage of the GOA structural units outputs a line scanning signal to a corresponding one line of pixel units within a display area of a display panel in accordance with what is done by a Nth stage GOA structural unit of the GOA structural units; wherein, the Nth stage GOA structural unit comprises a forward-reverse scan control module for controlling the GOA circuit to scan forwardly or inversely by using a forward direct-current scan control signal and a reverse direct-current scan control signal; a node signal control input module for outputting a low-level potential in a non-working stage of the GOA circuit; an output control module for controlling output of a gate driving signal; a voltage-stabilizing module for maintaining a potential of a first node; a node Q pull-down module for pulling down the potential of the first node; a node P pull-down module for pulling down a potential of a second node; a gate signal pull-down module for pulling down a potential of a current-stage gate driving signal and controlling output of the current-stage gate driving signal during a scan period of a touch panel; a GAS signal function module for turning on all gate driving signals of the GOA circuit and controlling output of the current-stage gate driving signal during the scan period of the touch panel by using a first GAS signal and a second GAS signal; and a self-lifting capacitor for a second lifting of the potential of the first node, and N is a positive integer; wherein,
the voltage-stabilizing module comprises a first thin film transistor (TFT), wherein a gate of the first TFT receives a third GAS signal, a source of the first TFT is connected to both the forward-reverse scan control module and the node Q pull-down module, and a drain of the first TFT is connected to the first node; wherein the third GAS signal is a signal with a constant high-level potential during the scan period of the touch panel, and is a signal with a constant low-level potential in a suspending period of the touch panel.
18. The display device according to claim 17, wherein the forward-reverse scan control module comprises a second TFT and a third TFT; wherein,
a gate of the second TFT receives a current-stage gate driving signal of a (N−2)th stage GOA structural unit of the GOA structural units, a source of the second TFT receives the forward direct-current scan control signal, and a drain of the second TFT is connected to both the source of the first TFT of the voltage-stabilizing module and a drain of the third TFT;
a gate of the third TFT receives a current-stage gate driving signal of a (N+2)th stage GOA structural unit of the GOA structural units, and a source of the third TFT receives the reverse direct-current scan control signal.
19. The display device according to claim 18, wherein the node signal control input module comprises a fourth TFT, a fifth TFT and a sixth TFT; wherein,
a gate of the fourth TFT receives the forward direct-current scan control signal, a source of the fourth TFT receives a current-stage clock signal of a (N+1)th stage GOA structural unit of the GOA structural units, and a drain of the fourth TFT is connected to a drain of the fifth TFT and a gate of the sixth TFT;
a gate of the fifth TFT receives the reverse direct-current scan control signal, and a source of the fifth TFT receives a current-stage clock signal of a (N−1)th stage GOA structural unit of the GOA structural units;
a source of the sixth TFT receives the signal with the constant high-level potential, and a drain of the sixth TFT is connected to the second node connected to the node Q pull-down module, the node P pull-down module, the gate signal pull-down module and the GAS signal function module.
20. The display device according to claim 19, wherein the output control module comprises a seventh TFT, and a gate of the seventh TFT is connected to the first node, a source of the seventh TFT receives a current-stage clock signal of the Nth stage GOA structural unit, and a drain of the seventh TFT receives the current-stage gate driving signal of the Nth stage GOA structural unit.
US15/749,303 2017-11-28 2018-01-02 GOA circuit, liquid crystal panel and display device Active US10302985B1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
CN201711217027.6A CN108010498A (en) 2017-11-28 2017-11-28 A kind of GOA circuits and liquid crystal panel, display device
CN201711217027 2017-11-28
CN201711217027.6 2017-11-28
PCT/CN2018/070020 WO2019104823A1 (en) 2017-11-28 2018-01-02 Goa circuit, liquid crystal panel, and display device

Publications (2)

Publication Number Publication Date
US10302985B1 US10302985B1 (en) 2019-05-28
US20190163001A1 true US20190163001A1 (en) 2019-05-30

Family

ID=66632329

Family Applications (1)

Application Number Title Priority Date Filing Date
US15/749,303 Active US10302985B1 (en) 2017-11-28 2018-01-02 GOA circuit, liquid crystal panel and display device

Country Status (1)

Country Link
US (1) US10302985B1 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10782810B2 (en) * 2017-11-08 2020-09-22 Lg Display Co., Ltd. Gate driving circuit and display device comprising the same
US10839764B2 (en) 2018-07-24 2020-11-17 Wuhan China Star Optoelectronics Technology Co., Ltd. GOA circuit and display device
US11049428B1 (en) 2020-03-11 2021-06-29 Wuhan China Star Optoelectronics Technology Co., Ltd. Driving circuit and display panel
US11362040B2 (en) * 2018-03-28 2022-06-14 Boe Technology Group Co., Ltd. Array substrate, method for manufacturing the same and display device
US11404006B2 (en) 2020-04-10 2022-08-02 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. GOA circuit and display panel
US20220358891A1 (en) * 2020-11-03 2022-11-10 Wuhan China Star Optoelectronics Technology Co., Ltd. Goa circuit and driving method therefor, and display panel
US20230137269A1 (en) * 2020-06-01 2023-05-04 Wuhan China Star Optoelectronics Technology Co., Ltd. Goa circuit, display panel, and display device
US20240029608A1 (en) * 2021-06-28 2024-01-25 Wuhan China Star Optoelectronics Technology Co., Ltd. Gate drive circuit and display device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10714511B2 (en) * 2018-08-28 2020-07-14 Wuhan China Star Optoelectronics Technology Co., Ltd. Pull-down circuit of gate driving unit and display device
CN110767175A (en) * 2019-10-08 2020-02-07 武汉华星光电半导体显示技术有限公司 Drive circuit and display panel
EP4163908A4 (en) * 2020-06-09 2024-05-15 Wuhan China Star Optoelectronics Technology Co Ltd Goa circuit and display panel

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103943083B (en) * 2014-03-27 2017-02-15 京东方科技集团股份有限公司 Gate drive circuit and method and display device
KR101572378B1 (en) * 2014-08-04 2015-11-27 엘지디스플레이 주식회사 Display device having touch sensors
CN104332144B (en) * 2014-11-05 2017-04-12 深圳市华星光电技术有限公司 Liquid crystal display panel and gate drive circuit thereof
CN104835450B (en) * 2015-05-22 2017-01-25 京东方科技集团股份有限公司 Shift register unit, control method therefor, grid drive circuit, and display device
CN104916262B (en) * 2015-06-04 2017-09-19 武汉华星光电技术有限公司 A kind of scan drive circuit
CN104916261B (en) * 2015-06-04 2017-12-22 武汉华星光电技术有限公司 A kind of scan drive circuit

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10782810B2 (en) * 2017-11-08 2020-09-22 Lg Display Co., Ltd. Gate driving circuit and display device comprising the same
US11362040B2 (en) * 2018-03-28 2022-06-14 Boe Technology Group Co., Ltd. Array substrate, method for manufacturing the same and display device
US10839764B2 (en) 2018-07-24 2020-11-17 Wuhan China Star Optoelectronics Technology Co., Ltd. GOA circuit and display device
US11049428B1 (en) 2020-03-11 2021-06-29 Wuhan China Star Optoelectronics Technology Co., Ltd. Driving circuit and display panel
US11404006B2 (en) 2020-04-10 2022-08-02 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. GOA circuit and display panel
US20230137269A1 (en) * 2020-06-01 2023-05-04 Wuhan China Star Optoelectronics Technology Co., Ltd. Goa circuit, display panel, and display device
US20220358891A1 (en) * 2020-11-03 2022-11-10 Wuhan China Star Optoelectronics Technology Co., Ltd. Goa circuit and driving method therefor, and display panel
US11798511B2 (en) * 2020-11-03 2023-10-24 Wuhan China Star Optoelectronics Technology Co., Ltd. GOA circuit and driving method therefor, and display panel
US20240029608A1 (en) * 2021-06-28 2024-01-25 Wuhan China Star Optoelectronics Technology Co., Ltd. Gate drive circuit and display device

Also Published As

Publication number Publication date
US10302985B1 (en) 2019-05-28

Similar Documents

Publication Publication Date Title
US10302985B1 (en) GOA circuit, liquid crystal panel and display device
US10685616B2 (en) Shift register circuit, method for driving the same, gate drive circuit, and display panel
US10497454B2 (en) Shift register, operation method thereof, gate driving circuit and display device
US11127478B2 (en) Shift register unit and driving method thereof, gate driving circuit, and display device
US10043473B2 (en) GOA circuit
US9875709B2 (en) GOA circuit for LTPS-TFT
US9721674B2 (en) GOA unit and method for driving the same, GOA circuit and display device
US10043477B2 (en) GOA circuit
US10223993B2 (en) Shift register and driving method thereof, gate driving circuit and display apparatus
US9916805B2 (en) GOA circuit for LTPS-TFT
US10593415B2 (en) Shift register unit and driving method thereof, gate driving circuit
US10204585B2 (en) Shift register unit, gate driving device, display device and driving method
US20170178582A1 (en) Shift register, gate driving circuit, display panel, driving method thereof and display device
US10599242B2 (en) Single-type GOA circuit and display apparatus
US9799293B2 (en) Liquid crystal display device and gate driving circuit
US9847069B2 (en) GOA circuit and liquid crystal display device
CN105702297B (en) Shift register, driving method, driving circuit, array substrate and display device
US9570028B2 (en) PMOS gate driving circuit
US10121433B2 (en) GOA circuit and method for driving the same and LCD
US10403210B2 (en) Shift register and driving method, driving circuit, array substrate and display device
US10535414B2 (en) Shift register element, method for driving the same, and display device
US10650768B2 (en) Shift register unit and driving method thereof, gate driving circuit and display panel
US20210287592A1 (en) Gate drive circuit and display panel
US9805680B2 (en) Liquid crystal display device and gate driving circuit
US20220020324A1 (en) Shift register unit, driving method thereof, gate driving circuit, and display device

Legal Events

Date Code Title Description
FEPP Fee payment procedure

Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

STCF Information on status: patent grant

Free format text: PATENTED CASE

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 4