US20160099386A1

US20160099386A1 - Light emitting diode and manufacturing method thereof

Info

Publication number: US20160099386A1
Application number: US14/969,568
Authority: US
Inventors: Doo Hyeb YOUN; Young-Jun Yu; Kwang Hyo Chung; Choon Gi Choi
Original assignee: Electronics and Telecommunications Research Institute ETRI
Current assignee: Electronics and Telecommunications Research Institute ETRI
Priority date: 2013-06-17
Filing date: 2015-12-15
Publication date: 2016-04-07
Also published as: US9257610B2; KR20140146467A; US20140367731A1

Abstract

A light emitting diode includes: a substrate; an n-type semiconductor layer disposed on the substrate; an active layer disposed on the n-type semiconductor layer; a p-type semiconductor layer disposed on the active layer; a first electrode disposed on the p-type semiconductor layer and made of a metal oxide; a second electrode disposed on the first electrode and made of graphene; a p-type electrode disposed on the second electrode; and an n-type electrode disposed on the n-type semiconductor layer, wherein a work function of the first electrode is less than a work function of the p-type semiconductor layer, but is greater than a to work function of the second electrode.

Description

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional application of U.S. patent application Ser. No. 14/290,192, filed on May 29, 2014 (currently pending), the disclosure of which is herein incorporated by reference in its entirety. The U.S. patent application Ser. No. 14/290,192 claims priority to Korean Application No. 10-2013-0069249 filed on Jun. 17, 2013, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

(a) Field of the Invention
The present invention relates to a light emitting diode (hereinafter, referred to as “LED”) and a manufacturing method thereof. More particularly, the present invention relates to a high luminance LED including a transparent graphene electrode layer.
(b) Description of the Related Art
An LED or a laser diode (hereinafter referred to as “ID”) using groups III-V nitride semiconductor materials has been extensively used in a light-emitting device to obtain light having a blue or green wavelength band.
Gallium nitride (GaN) among Group III-V nitride semiconductors is gaining the spotlight as a core material of light emitting devices such as an LED, an LD, etc. due to its excellent physical and chemical properties.
The light emitting device includes a substrate for growing a semiconductor material with GaN, an n-type nitride semiconductor layer, a chemical layer, and a p-type nitride semiconductor layer sequentially laminated on the substrate, and electrodes formed on the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, respectively.
In this case, a transparent electrode is formed by a material such as indium tin oxide (ITO) on a p-type nitride semiconductor layer and then an electrode is formed to increase a current injection area and to form an ohmic contact.

SUMMARY OF THE INVENTION

The present invention has been made in an effort to provide an LED and a to manufacturing method thereof having advantages of improving transmission efficiency through the entire region of an ultraviolet ray region and an infrared ray region as compared with an oxide semiconductor transparent electrode of the related art.
However, in a case of the transparent electrode such as ITO, when the wavelength of the LED is in the UV band (300-400 nm), transmission efficiency is significantly deteriorated to 40% or less. In a case of a visible light region (450-750 nm), the transmission efficiency is also degraded in a green region (500-550 nm).
An exemplary embodiment of the present invention provides a light emitting diode including: a substrate; an n-type semiconductor layer disposed on the substrate; an active layer disposed on the n-type semiconductor layer; a p-type semiconductor layer disposed on the active layer; a first electrode disposed on the p-type semiconductor layer and made of a metal oxide; a second electrode disposed on the first electrode and made of graphene; a p-type electrode disposed on the second electrode; and an n-type electrode disposed on the n-type semiconductor layer, wherein a work function of the first electrode is less than a work function of the p-type semiconductor layer, but is greater than a work function of the second electrode.
The first electrode may have a net structure.
The first electrode may include: a plurality of first conductive patterns having a circle shape or a polygon shape and arranged in a matrix; a plurality of second conductive patterns protruding from the first conductive patterns to connect adjacent first conductive patterns to each other; and a plurality of third conductive patterns protruding in a direction perpendicular to the second conductive patterns from the first conductive patterns to connect adjacent first conductive patterns to each other, wherein the second conductive patterns and the third conductive patterns are linear. DeletedTexts
The first electrode may have a line width in a range of 10 nm to 100 nm.
The first electrode may include at least one of ITO, ZnO, SnO₂, TiO₂, SbO₂, NiO, CrO, and CuO.
Another embodiment of the present invention provides, a method of manufacturing a light emitting diode, including: forming an n-type semiconductor layer on a substrate; forming an active layer on the n-type semiconductor layer; forming a p-type semiconductor layer on the active layer; forming a first electrode by electrospinning after disposing a mask on the p-type semiconductor layer;
forming a second electrode made of graphene on the first electrode after moving the mask; forming a p-type electrode on the second electrode; and forming an n-type electrode on the n-type semiconductor layer.
The forming of the first electrode may include: disposing a first mask having a first linear opening pattern; forming a first conductive pattern of the first electrode by injecting a spinning solution into the first opening pattern; disposing a second mask having a second linear opening pattern above the first opening pattern; and forming a second conductive pattern of the first electrode by injecting the spinning solution into the second opening pattern, wherein the second opening pattern and the first opening pattern are disposed to cross each other.
The spinning solution may have a viscosity in a range of 10 cps to 50 cps.
The spinning solution may include a metal salt such as copper acetate monohydrate ((CH₃COO)₂Cu), titanium tetraisopropoxide (Ti(OCH(CH₃)₂)₄), tin isopropoxide (Sn(OCH(CH₃)₂)₄), and antimony isopropoxide (C₉H₂₁O₃Sb) including metal particles such as zinc (Zn), phosphorus (P), titanium (Ti), tin (Sn), copper (Cu) and antimony (Sb); and a solvent having a viscosity in a range of 10 cps to 50 cps.
The solvent may include at least one of diethylene glycol, terpineol, ethylene glycol, diethylene glycol monobenzyl ether, propylene glycol monophenyl ether, glycerol, propylene glycol, and triethylene glycol.
Yet another embodiment of the present invention provides a method of manufacturing a light emitting diode, including: forming an n-type semiconductor layer on a substrate; forming an active layer on the n-type semiconductor layer; forming a p-type semiconductor layer on the active layer; disposing an electric field induced pattern under the substrate; forming a first electrode made of a metal oxide on the p-type semiconductor layer by electrospinning; removing the electric field induced pattern and forming a second electrode made of graphene on the first electrode; forming a p-type electrode on the second electrode; and forming an n-type electrode on the n-type semiconductor layer.
The electric field induced pattern and the first electrode may include a net structure.
The first electrode may be formed by a spinning solution having a viscosity in a range of 10 cPs to 50 cPs.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a top plan view illustrating an LED according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along line II-II of FIG. 1.

FIG. 3 is a top plan view illustrating a first electrode of the LED shown in FIG. 1.

FIGS. 4 and 5 are top plan views illustrating a first electrode according to another exemplary embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a middle step in a method of manufacturing the LED according to an exemplary embodiment of the present invention.

FIG. 7 is a top plan view illustrating an electrode in a middle step of a method of manufacturing the LED according to an exemplary embodiment of the present invention.

FIG. 8 is a view schematically illustrating an electrospinning device according to an exemplary embodiment of the present invention.

FIG. 9 is a top plan view illustrating a first mask for manufacturing the LED according to an exemplary embodiment of the present invention.

FIGS. 10, 13, and 15 are cross-sectional views illustrating a middle step in a method of manufacturing the LED according to an exemplary embodiment of the present invention.

FIGS. 11 and 12 are cross-sectional views taken along line XI-XI of FIG. 10.

FIG. 14 is a cross-sectional view taken along line XIV-XIV of FIG. 13.

FIG. 16 is a cross-sectional view taken along line XVI-XVI of FIG. 15.

FIG. 17 is a cross-sectional view illustrating a middle step in a method of manufacturing the LED according to another exemplary embodiment of the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.
In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like reference numerals designate like elements throughout the specification. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
Hereinafter, the LED according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a top plan view illustrating an LED according to an exemplary embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line II-II of FIG. 1, FIG. 3 is a top plan view illustrating a first electrode of the LED shown in FIG. 1, and FIGS. 4 and 5 are top plan views illustrating a first electrode according to another exemplary embodiment of the present invention.
As shown in FIGS. 1 and 2, the LED according to an exemplary embodiment of the present invention includes a substrate 100, a buffer layer 102 formed on the substrate 100, an n-type semiconductor layer 104 disposed on the buffer layer 102, an active layer 106 disposed on the n-type semiconductor layer 104, a p-type semiconductor layer 108 disposed on the active layer 106, a transparent electrode 110 disposed on the p-type semiconductor layer 108, an n-type electrode 112 disposed on the n-type semiconductor layer 104, and a p-type electrode 114 disposed on the transparent electrode 110.
The substrate 100 may include a sapphire substrate on which a GaN semiconductor is easily grown.
The buffer layer 102 is made of GaN which is undoped with conductive impurities, and is formed to reduce the differences in lattice constants and thermal expansion coefficients between the substrate 100 and a semiconductor layer.
The n-type semiconductor layer 104, the active layer 106, and the p-type semiconductor layer 108 may include a semiconductor material having a compositional formula of In_xAl_yGa_(1−x−y)N (0≦x≦1, 0≦y≦1, and 0≦x+y≦1). The n-type semiconductor layer may include a GaN layer or a GaN/AlGaN layer doped with an n-type conductive impurity, and the p-type semiconductor layer may include a GaN layer or a GaN/AlGaN layer doped with a p-type conductive impurity.
Further, the active layer 106 may include a GaN/InGaN layer having a multi quantum well (MQW) structure.
The transparent electrode 110 includes a first electrode 12 and a second electrode 14 disposed on the first electrode 12.
Sheet resistance of the transparent electrode 110 is 100 Ω/cm²or less, and the transparent electrode 110 has light transmittance of 80% or greater. The transparent electrode 110 may have a thickness in the range of 100 nm to 500 nm, and may represent resistivity of 1×10⁻³Ω·cm.
The first electrode 12 may be made of a metal oxide which has a lower work function than that of the p-type semiconductor 108 and has a greater work function than that of a graphene electrode, and may be made of at least one of ITO, ZnO, SnO₂, TiO₂, SbO₂, NiO, CrO, and CuO. The first electrode 12 reduces to contact resistance between the p-type semiconductor 108 and the second electrode 14 by lowering a Shottky barrier height (SBH).
In this case, the first electrode 12 may have a net structure with a line width D in the range of 10 nm to 100 nm as shown in FIG. 3. In the net structure, a plurality of first conductive patterns 51 may cross a plurality of second conductive patterns 53, and both of the first conductive patterns 51 and the second conductive patterns 53 are linear.
Further, as shown in FIGS. 4 and 5, the first electrode 12 includes a plurality of third conductive patterns 55 having a circle shape or a polygon shape, a plurality of fourth conductive patterns 57 protruding from the third conductive patterns 55 to connect adjacent third conductive patterns 55 to each other, and a plurality of fifth conductive patterns 59 protruding in a direction perpendicular to the fourth conductive patterns 57 from the third conductive patterns 55 to connect adjacent third conductive patterns 55 to each other.
In this case, the fourth conductive patterns 57 and the fifth conductive patterns 59 may be linear.
Referring back to FIGS. 1 and 2, the second electrode 14 may be made of graphene. The graphene may include a single layer or a plurality of layers of covalently bonded carbon atoms. In this case, the covalently bonded carbon atoms of each layer may form a six-member ring as a repeating unit, and may further include a five-member ring or a seven-member ring.
The p-type electrode 114 and the n-type electrode 112 may be made of nickel (Ni) or copper (Cu).
Hereinafter, a method of manufacturing the LED according to an exemplary embodiment of the present invention will be described with reference to FIGS. 6 to 9 and FIG. 2 described above.
FIG. 6 is a cross-sectional view illustrating a middle step in a method of manufacturing the LED according to an exemplary embodiment of the present invention, FIG. 7 is a top plan view illustrating an electrode in a middle step of a method of manufacturing the LED according to an exemplary embodiment of the present invention, FIG. 8 is a view schematically illustrating an electrospinning device according to an exemplary embodiment of the present invention, FIG. 9 is a top plan view illustrating a first mask for manufacturing the LED according to an exemplary embodiment of the present invention, FIGS. 10, 13, and 15 are cross-sectional views illustrating a middle step in a method of manufacturing the LED according to an exemplary embodiment of the present invention, FIGS. 11 and 12 are cross-sectional views taken along line XI-XI of FIG. 10, FIG. 14 is a cross-sectional view taken along line XIV-XIV of FIG. 13, and FIG. 16 is a cross-sectional view taken along line XVI-XVI of FIG. 15.
First, as shown in FIG. 6, the buffer layer 102, the n-type semiconductor layer 104, the active layer 106, and the p-type semiconductor layer 108 are sequentially formed on the substrate 100.
The n-type semiconductor layer 104, the p-type semiconductor layer 108, and the active layer 106 may be formed by a process such as metal organic chemical vapor deposition (MOCVD), liquid phase epitaxy, hydride vapor phase epitaxy, and molecular beam epitaxy.
As shown in FIG. 7, after a first mask 300 is disposed on the p-type semiconductor layer 108, the first conductive pattern 51 is formed by electrospinning, and then a heat treatment is performed in a vacuum chamber at 500° C. for 90 minutes so that remaining solvent is removed. The first mask 300 includes a plurality of linear openings 35 which are spaced apart from each other in one direction as shown in FIG. 9.
In the electrospinning, as shown in FIG. 8, a polymer solution or a polymer melt stored in a reservoir 60 located above a ground corrector is dispensed through a nozzle 65 by an electrostatic force due to a high voltage of greater than several hundred to several thousand volts, and is moved onto a p-type semiconductor (not shown) of the substrate 100 in a ground state so that a pattern is formed.
In this case, the nozzle 65 is made of metal, and has a diameter in the range of 5 μm to 200 μm. A spinning solution has a viscosity in the range of 10 cps to 50 cps, and the spinning solution may be exhausted at a speed of nl/min to ul/min.
The spinning solution may be prepared by mixing a metal salt such as copper acetate monohydrate ((CH₃COO)₂Cu), titanium tetraisopropoxide (Ti(OCH(CH₃)₂)₄), tin isopropoxide (Sn(OCH(CH₃)₂)₄), and antimony isopropoxide (C₉H₂₁O₃Sb) including metal particles such as zinc (Zn), phosphorus (P), titanium (Ti), tin (Sn), copper (Cu) and antimony (Sb) with a solvent having a viscosity in the range of 10 cps to 50 cps.
The solvent may include at least one of diethylene glycol, terpineol, ethylene glycol, diethylene glycol monobenzyl ether, propylene glycol monophenyl ether, glycerol, propylene glycol, and triethylene glycol.
Next, as shown in FIGS. 10 and 11, after the first mask 300 is removed, a second mask 302 is disposed above the first conductive pattern 51 and then the second conductive pattern 53 is formed. The second conductive pattern 53 is formed in a direction crossing the first conductive pattern 51.
The second mask 302 includes a plurality of linear openings 37, and the linear openings 37 are formed in a direction crossing the first conductive pattern 51. The second conductive pattern 53 may be formed in the same manner as in the first conductive pattern 51.
In this manner, if the first electrode 12 with the first conductive pattern 51 and the second conductive pattern 53 is formed by the electro-spinning, a photolithography process for forming the first electrode 12 is not performed so that process time can be reduced.
Next, as shown in FIG. 12, after removal of the second mask 302, the second electrode 14 is formed on the first electrode 12.
The second electrode 14 may be formed by transferring using a transfer substrate including the graphene. In detail, a catalyst layer is formed on a silicon on insulator (SOI) substrate on which a silicon oxide layer is formed using an electron beam irradiation device. In this case, the catalyst layer may be made of a transition metal such as nickel (Ni), copper (Cu), and platinum (Pt) capable of easily absorbing carbon. The catalyst layer has a thickness of approximately 200 nm.
Further, a carbon layer is formed by performing heat treatment with respect to the substrate 100 on which the catalyst layer is formed. In this case, the heat treatment is performed by putting the substrate 100 in a thermal chemical vapor deposition (T-CVD) device or a rapid thermal chemical vapor deposition (RT-CVD) device to maintain a high temperature of greater than 1000° C., and by injecting a mixed gas of CH₄, H₂, and Ar into the deposition device.
After that, the graphene is grown on a surface of the catalyst layer by separating carbon combined with the catalyst layer through rapid cooling, and a transfer substrate made of polydimethylsiloxane (PDMS) or poly(methylmethacrylate) (PMMA) is formed on the graphene. Thereafter, the catalyst layer is removed.
Next, the graphene is transferred onto the first electrode 12 using the transfer substrate, and then the second electrode made of the graphene is formed by removing the transfer substrate using acetone.
Next, as shown in FIGS. 13 and 14, after a first shadow mask (not shown) is disposed, a first opening 95 exposing the n-type semiconductor is formed by dry etching, and then an n-type electrode 112 making contact with the n-type semiconductor is formed in the first opening 95. The n-type electrode 112 may be formed by depositing one of copper (Cu), nickel (Ni), chromium (Cr), gold (Au), and TiAu in the vacuum chamber.
Next, as shown in FIGS. 15 and 16, after the second shadow mask (not shown) is disposed, and an upper graphene layer is etched using inductively coupled plasma (ICP) equipment by injecting chlorine (Cl₂) gas into the vacuum chamber. After that, a gallium nitride (GaN) layer disposed under the graphene is etched by injecting oxygen (O₂) gas so that a second opening 97 exposing the p-type semiconductor layer 108 is formed.
Next, as shown in FIGS. 1 and 2, the p-type electrode 114 is formed by depositing one of Cr, Au, and TiAu in the second opening 97.
Hereinafter, the method of manufacturing the LED according to another exemplary embodiment of the present invention will be described with reference to FIG. 17, FIG. 6, and FIGS. 13 to 16.
FIG. 17 is a cross-sectional view illustrating a middle step in a method of manufacturing the LED according to another exemplary embodiment of the to present invention.
First, as shown in FIG. 6, the buffer layer 102, the n-type semiconductor layer 104, the active layer 106, and the p-type semiconductor layer 108 are sequentially formed on the substrate 100.
Next, as shown in FIG. 17, after an electric field induced pattern 700 is disposed under the substrate 100, the first electrode 12 is formed by the electro-spinning.
The electric field induced pattern 700 has the same plane pattern as that of the first electrode 12 to be formed, and forms an electric field together with a nozzle.
In this manner, if the electric field induced pattern 700 is formed, a spinning solution exhausted from the nozzle is deposited on the substrate 100 along the electric field induced pattern 700 so that the first electrode 12 is formed.
Next, as shown in FIGS. 13 to 16, the second electrode 14, the n-type electrode 112, and the p-type electrode 114 are formed.
In the present invention, if a transparent electrode is formed by a graphene, an LED where transmission efficiency is improved through the entire region of the ultraviolet ray region and the infrared ray region can be provided.
Further, even if crack occurs in an electrode made of the graphene by forming a net electrode, an electric current can be prevented from being blocked due to the net electrode.
While this invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.


<Description of Symbols>

12: first electrode	14: second electrode
35, 37: opening	51: first electrode pattern
53: second electrode pattern	55: third electrode pattern
57: fourth electrode pattern	59: fifth electrode pattern
65: nozzle	95, 97: opening
100: substrate	102: buffer layer
104: n-type semiconductor layer	106: active layer
108: p-type semiconductor layer	110: transparent electrode
112: n-type electrode	114: p-type electrode
110: transparent electrode	300: first mask
302: second mask	700: electric field induced pattern

Claims

What is claimed is:

1. A light emitting diode comprising:

a substrate;

an n-type semiconductor layer disposed on the substrate;

an active layer disposed on the n-type semiconductor layer;

a p-type semiconductor layer disposed on the active layer;

a first electrode disposed on the p-type semiconductor layer and made of a metal oxide;

a second electrode disposed on the first electrode and made of graphene;

a p-type electrode disposed on the second electrode; and

an n-type electrode disposed on the n-type semiconductor layer,

wherein a work function of the first electrode is less than a work function of the p-type semiconductor layer, but is greater than a work function of the second electrode.

2. The light emitting diode of claim 1, wherein the first electrode has a net structure.

3. The light emitting diode of claim 2, wherein the first electrode comprises:

a plurality of first conductive patterns having a circle shape or a polygon shape and arranged in a matrix;

a plurality of second conductive patterns protruding from the first conductive patterns to connect adjacent first conductive patterns to each other; and

a plurality of third conductive patterns protruding in a direction perpendicular to the second conductive patterns from the first conductive patterns to connect adjacent first conductive patterns to each other,

wherein the second conductive patterns and the third conductive patterns are linear.

4. The light emitting diode of claim 2, wherein the first electrode has a line width in a range of 10 nm to 100 nm.

5. The light emitting diode of claim 1, wherein the first electrode comprises at least one of ITO, ZnO, SnO₂, TiO₂, SbO₂, NiO, CrO, and CuO.