US20160049463A1 - Semiconductor Device with a Shielding Structure - Google Patents
Semiconductor Device with a Shielding Structure Download PDFInfo
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- US20160049463A1 US20160049463A1 US14/457,491 US201414457491A US2016049463A1 US 20160049463 A1 US20160049463 A1 US 20160049463A1 US 201414457491 A US201414457491 A US 201414457491A US 2016049463 A1 US2016049463 A1 US 2016049463A1
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Definitions
- Power semiconductor devices such as power diodes, power MOSFETs, power IGBTs, or any other power semiconductor devices are designed to withstand high blocking voltages, e. g. at least 600 V.
- Those power devices include a pn-junction that is formed between a p-doped semiconductor region and an n-doped semiconductor region. The device is in its blocking mode when the pn-junction is reversely biased. In this case a depletion region (space charge region) propagates in the p-doped and n-doped regions.
- one of these n-doped and p-doped semiconductor regions is more lightly doped than the other one of these semiconductor regions, so that the depletion region mainly extends in the more lightly doped region, which mainly supports the voltage applied across the pn-junction.
- the ability of a pn-junction to support high voltages is limited by the avalanche breakdown mechanism of the semiconductor power device.
- a blocking voltage applied to a pn-junction increases, an electric field in the semiconductor regions forming the pn-junction also increases. The electric field results in an acceleration of mobile charge carriers present in the semiconductor region.
- An avalanche breakdown occurs when, due to the electric field, the charge carriers are accelerated such that they create electron-hole pairs by impact ionization. Charge carriers created by impact ionization create new charge carriers, so that there is a multiplication effect.
- a significant current flows across the pn-junction in the reverse direction.
- the voltage at which the avalanche breakdown sets in is referred to as breakdown voltage.
- critical electric field The electric field at which the avalanche breakdown sets in is referred to as critical electric field (E crit ).
- the absolute value of the critical electric field is mainly dependent on the type of semiconductor material used for forming the pn-junction, and is (weakly) dependent on the doping concentration of the more lightly doped semiconductor region.
- the critical electric field is a theoretical value that is defined for a semiconductor region that has an infinite size in directions perpendicular to field strength vectors of the electric field.
- Power semiconductor devices have a semiconductor body of finite size that is terminated by edge surfaces in lateral directions.
- the pn-junction In vertical power semiconductor devices, which are semiconductor devices in which the pn-junction mainly extends substantially in a horizontal plane of the semiconductor body, the pn-junction usually does not extend to the edge surface of the semiconductor body but is distant to the edge surface of the semiconductor body in a lateral direction. In this case, a semiconductor region (edge region) of the semiconductor body adjoining the pn junction in the lateral direction also has to withstand the blocking voltage.
- an edge termination structure can be implemented that helps to improve the voltage blocking capability in the edge region. Nevertheless, it is desirable to further improve the voltage blocking capability.
- a semiconductor device has a semiconductor body with a top side, a bottom side opposite the top side, and a surface limiting the semiconductor body.
- An active semiconductor region and an edge region are formed in the semiconductor body.
- the edge region surrounds the active semiconductor region.
- a first semiconductor zone of a first conduction type is formed in the edge region.
- an edge termination structure is formed in the edge region at the top side.
- a shielding structure comprising a number of N1 ⁇ 2 first segments and a number of N2 ⁇ 1 second segments are arranged.
- Each of the first segments is electrically connected to each of the other first segments and to each of the second segments.
- Each of the second segments has an electric resistivity higher than an electric resistivity of each of the first segments.
- the shielding structure serves to trap surface charges that, for instance, emanate from outside the semiconductor device.
- the second segment(s) having an electric resistivity higher than an electric resistivity of each of the first segments serves to bleed off the collected charge carriers in a controlled manner. As the number of charge carriers that adversely affect the voltage blocking capability increasing effect of the edge termination structure is significantly reduced, the voltage blocking capability of the semiconductor device is stabilized.
- FIG. 1A schematically illustrates a vertical cross-sectional view of a semiconductor d
- FIG. 1B schematically illustrates a top view of the semiconductor device of FIG. 1A .
- FIG. 2A illustrates a cross-sectional side view of a first embodiment of a semiconduc
- FIG. 2B illustrates a modification of the first embodiment, in which modification the fie
- FIG. 3 illustrates a cross-sectional side view of a second embodiment of a semiconductor device according to FIGS. 1A and 1B in a sectional plane E-E, wherein the edge termination structure has junction termination extension.
- FIG. 4 illustrates a cross-sectional side view of a third embodiment of a semiconduct
- FIG. 5 is a top view of a semiconductor device as illustrated in FIGS. 1A and 1B wh
- FIG. 6 illustrates an enlarged section A of the semiconductor device of FIG. 5 , whe
- FIG. 7 illustrates an enlarged section A of the semiconductor device of FIG. 5 , whe
- FIG. 8 illustrates an enlarged section A of the semiconductor device of FIG. 5 , whe
- FIG. 9 illustrates an enlarged section A of the semiconductor device of FIG. 5 , whe
- FIG. 10 is a diagram showing the influence of surface or interface charges on the blo the semiconductor device according to the present invention.
- FIGS. 1A and 1B schematically illustrate a semiconductor body 100 of a power semiconductor device 1 .
- FIG. 1A is a side view and FIG. 1B a top view.
- the semiconductor body 100 has a top side 101 , a bottom side 102 opposite the top side 101 , and a surface 103 .
- the top side 101 is arranged distant from the bottom side 102 in a vertical direction v that runs perpendicular to the bottom side 102 .
- metallizations, electrodes, dielectric layers etc. arranged on the semiconductor body 100 and the detailed internal structure are suppressed in FIGS. 1A and 1B and will be explained with reference to further FIGS. 2A , 2 B and 3 to 9 .
- the semiconductor body 100 has an active semiconductor region 110 , and an edge region 120 surrounding the active semiconductor region 110 .
- the surface 103 which may substantially extend perpendicular to the bottom side 102 , is a closed ring surrounding both the active semiconductor region 110 and the edge region 120 . That is, the edge region 120 is arranged between the active semiconductor region 110 and the surface 103 .
- the semiconductor body 100 includes an arbitrary material, for instance a single-element semiconductor material, e.g. silicon (Si), germanium (Ge), or a compound semiconductor material, e. g. IV-IV or III-V or III-VI or II-VI or IV-VI or I-III-VI semiconductor material.
- a single-element semiconductor material e.g. silicon (Si), germanium (Ge)
- a compound semiconductor material e. g. IV-IV or III-V or III-VI or II-VI or IV-VI or I-III-VI semiconductor material.
- Suitable IV-IV semiconductor materials are SiC or SiGe.
- Suitable III-V semiconductor materials are GaP, GaAs, InP, InSb, InAs, GaSb, GaN, AlN, InN, Al x Ga 1 ⁇ x As (0 ⁇ x ⁇ 1) or In x Ga 1 ⁇ x N (0 ⁇ x ⁇ 1).
- Suitable II-VI semiconductor materials are ZnO, ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, Hg 1 ⁇ x Cd x Te (0 ⁇ x ⁇ 1), BeSe, BeTe or HgS.
- Suitable III-VI semiconductor materials are GaS, GaSe, GaTe, InS, InSe, InTe.
- Suitable I-III-VI semiconductor materials are CuInSe 2 , CuInGaSe 2 , CuInS 2 , CuIn, GaS 2 .
- a suitable IV-VI semiconductor material is SnTe.
- the semiconductor body 100 may have a substantially monocrystalline structure. However, the semiconductor body 100 may also have a small number of crystallographic defects like point defects, line defects, planar defects, bulk defects. In contrast, a body formed of polycrystalline semiconductor material, e.g. polycrystalline silicon, has a large number of crystallographic defects.
- the semiconductor body 100 may have any combination of doped and/or undoped crystalline semiconductor material, doped and/or undoped polycrystalline semiconductor material like polycrystalline silicon or polycrystalline silicon carbide, p-conductive semiconductor regions, n-conductive semiconductor regions, trenches, metallization layers, dielectric layers, semiconductor resistance regions, pn-junctions and so on.
- the semiconductor component 1 may also comprise arbitrary electrically conductive layers or elements applied to the semiconductor body 100 , for instance metals, polycrystalline semiconductor material (e. g. polycrystalline silicon or polycrystalline silicon carbide), silicide layers or elements, dielectric layers or elements like nitride (e. g. silicon nitride), oxides (e. g. silicon oxide) or imides.
- polycrystalline semiconductor material e. g. polycrystalline silicon or polycrystalline silicon carbide
- silicide layers or elements e. g. silicon nitride
- dielectric layers or elements like nitride (e. g. silicon nitride), oxides (e. g. silicon oxide) or imides.
- the electronic structure may consist of or include a transistor, e.g. a bipolar or an unipolar transistor like an IGFET (Insulated Gate Field Effect Transistor), e.g. a MOSFET (Metal Oxide Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), a JFET (Junction Field Effect Transistor), a HEMT (High Electron Mobility Transistor), a thyristor, a BJT (bipolar junction transistor), or a diode.
- the electronic structure may have a cellular structure with a plurality of device cells, e.g. transistor cells, electrically connected in parallel.
- the device cells may be, without limitation, stripe cells, rectangular cells, square cells or hexagonal cells.
- FIG. 2A is an enlarged cross-sectional view of a section of the semiconductor device of FIGS. 1A and 1B in a sectional plane E-E.
- the semiconductor device 1 is a MOSFET or an IGBT the structure of which is well-known in the art.
- the edge region 120 described with reference to FIG. 2A may be used in connection with any other electronic structure described above.
- the active semiconductor region 110 has a rectifying main junction 15 which is arranged in the active semiconductor region 110 .
- the rectifying main junction 15 is a pn-junction formed between a first main semiconductor region 11 and a second main semiconductor region 12 .
- the first main semiconductor region 11 and the second main semiconductor region 12 have complementary conduction types. As illustrated in FIG. 2A , the first main semiconductor region 11 may be of the n-type and the second main semiconductor region 12 of the p-type. However, the first main semiconductor region 11 may also be of the p-type and the second main semiconductor region 12 of the n-type.
- the rectifying main junction 15 could—as an alternative to a pn-junction—also be a Schottky junction.
- the first main semiconductor region 11 would also include the region of the second semiconductor region 12 . That is, the first semiconductor region 11 would extend as far as the top side 101 where it would contact a first main electrode 71 that is arranged on the top side.
- the rectifying main-junction would be formed as a Schottky junction between the first main semiconductor region 11 and the first main electrode 71 .
- the first main semiconductor region 11 may comprise a drift zone of the semiconductor device 1 .
- the doping concentration of the first main semiconductor region 11 is not required to be constant in the vertical direction v.
- the first main semiconductor region 11 may have at least one sub-region in which the doping concentration of the first main semiconductor region 11 has, in the vertical direction v, a local or even global maximum, whereby “global” refers to the whole first main semiconductor region 11 .
- the local or global maximum may be arranged distant from the bottom side 102 or be located at the bottom side 102 .
- such a sub-region may be a field stop zone or a contact region for improving an electrical contact to an electrode arranged on the semiconductor body 100 .
- a further semiconductor region 16 is arranged on that side of the drift zone 11 facing away from the top side 101 .
- the further semiconductor region 16 is a drain region having the first conduction type
- the further semiconductor region 16 is a collector region having the second conduction type. In both cases, the doping concentration of the further semiconductor region is greater than that of the drift zone 11 .
- the rectifying main junction 15 may run substantially parallel to the bottom side 102 .
- the rectifying main pn-junction 15 may have an arbitrary shape.
- an edge termination structure 20 arranged in the edge region 120 at the top side 101 as will be explained in more detail below serves to improve the voltage blocking capability in the edge region 120 if the rectifying main junction 15 is in its blocking state, that is, if the rectifying main junction 15 is reverse biased by a blocking voltage.
- the blocking voltage capability may be at least 100 V. However, the blocking voltage capability may also be lower.
- the edge region 120 has a first semiconductor zone 121 of a first conduction type.
- the first semiconductor zone 121 may be a sub-region of the first main semiconductor region 11 and accordingly have the conduction type of the first main semiconductor region 11 .
- the first conduction type is “n”.
- the first conduction type could also be “p”.
- an edge termination structure 20 may have a field ring structure with at least N10 field rings 10 .
- N10 is an integer with N10 ⁇ 1.
- N10 may be at least 5 or at least 10 or at least 15.
- Each of the field rings 10 has a second conduction type (here: p) complementary to the first conduction type (here: n) and forms a pn-junction 25 with the first semiconductor zone 121 . Further, each of the field rings 10 surrounds the active semiconductor region 110 .
- the field rings 10 may have an equidistant or, preferably, a non-equidistant spacing. In the latter case which is illustrated in FIG. 2A and considering all field rings 10 of the semiconductor device 1 , within the edge region 120 the distances d 10 between adjacent field rings 10 may increase from the active semiconductor region 110 towards the surface 103 .
- the distance d 10 between a first one of the field rings 10 and a second one of the field rings 10 with no further field ring 10 arranged in between may be at least 5 ⁇ m and/or less than or equal to 500 ⁇ m.
- one, more than one or each of the field rings 10 may be electrically connected to an electrically conductive field plate 30 that is arranged on the top side 101 .
- each of the field plates 30 may be electrically connected to one and only one of the field rings 10 .
- a dielectric 61 is arranged between the field plates(s) 30 and the top side 101 . A protrusion of each field plate 30 pierces through the dielectric 61 toward the semiconductor body 100 and electrically contacts the respective field ring 10 .
- the shielding structure has a number of N1 ⁇ 2 first segments 40 and a number of N2 ⁇ 1 second segments 50 .
- N1 may be at least 3, at least 10 or even at least 20.
- N2 may be equal to 1, or greater than one.
- the semiconductor component may have one and only one second segment that is a continuous or non-continuous layer. Any two first segments 40 are arranged distant from one another. If there are more than one second segments 50 , any two second segments 50 are arranged distant from one another. Further, the first segments 40 are arranged distant from the semiconductor body 100 with a dielectric 61 arranged between the field limiting structure 20 and the shielding structure.
- the embodiment illustrated in FIG. 2 has only one second segment 50 .
- each of the first segments 40 is electrically connected to at least one, more than one or all second segments 50 .
- each of the second segments 50 has an electric resistivity higher than an electric resistivity of each of the first segments 40 .
- each of the second segments 50 may have an electric resistivity that is at least 10 times or even 100 times higher than an electric resistivity of each of the first segments 40 .
- one, more than one or each of the first segments 40 may have an electric resistivity of less than 50 ⁇ cm or even of less than 1 ⁇ cm.
- One, more than one or each of the first segments 40 may, independently from the other first segments 40 , consist of or comprise metal, doped or undoped polycrystalline semiconductor.
- one, more than one or each of the second segments 50 may have an electric resistivity of at least 10 8 ⁇ cm.
- one, more than one or each of the second segments 50 may consist of or comprise doped or undoped polycrystalline semiconductor material, amorphous semiconductor material (e. g. amorphous silicon “a-Si” or amorphous silicon carbide “a-SiC”), amorphous non-semiconductor material (e. g. amorphous carbon “a-C” or hydrogenated amorphous carbon “a-C:H”).
- amorphous semiconductor material e. g. amorphous silicon “a-Si” or amorphous silicon carbide “a-SiC”
- amorphous non-semiconductor material e. g. amorphous carbon “a-C” or hydrogenated amorphous carbon “a-C:H”.
- one, more than one or each of the first segments 40 may be formed as a closed ring.
- All first segments 40 which are formed as closed rings may be arranged such that there is only one (the innermost) among all of those closed rings that does not surround at least one of the other closed rings.
- a first main electrode 71 and a second main electrode 72 with the rectifying main junction 15 electrically connected in series between the first main electrode 71 and the second main electrode 72 may be arranged on the semiconductor body 100 .
- the first main electrode 71 may be arranged on the top side 101 and the second main electrode 72 on the bottom side 102 such that the semiconductor body 100 is arranged between the first main electrode 71 and the second main electrode 72 .
- Such an arrangement may be used, inter alia, if the semiconductor device 1 is designed a “vertical” device, that is, in a device in which the main current substantially runs in the vertical direction v.
- the first main electrode 71 and the second main electrode 72 may be an anode electrode and a cathode electrode or a cathode electrode and an anode electrode (e. g. if the semiconductor device 1 is a diode or a thyristor), or be an emitter electrode and a collector electrode or a collector electrode and an emitter electrode (if the semiconductor device 1 is a bipolar device like, e. g. an IGBT), or a source electrode and a drain electrode or a drain electrode and a source electrode (e. g. if the semiconductor device 1 is unipolar device like, e.g. a MOSFET).
- an anode electrode and a cathode electrode or a cathode electrode and an anode electrode e. g. if the semiconductor device 1 is a diode or a thyristor
- an emitter electrode and a collector electrode or a collector electrode and an emitter electrode if the semiconductor device 1 is a bipolar device like,
- the shielding structure with its first and second segments 40 , 50 may optionally be electrically connected at a first connection region 51 to the first main electrode 71 and/or at a second connection region 52 to a field stop or channel stop ring 122 that is arranged in the edge region 120 and that surrounds the active semiconductor region 110 .
- the respective connection may be designed such that for each of the first segments 40 an electric resistance between that first segment 40 and the first main electrode 71 is at least 1 ⁇ .
- the respective connection may be designed such that for each of the first segments 40 an electric resistance between that first segment 40 and the field stop or channel stop ring 122 is at least 1 ⁇ .
- charge carriers collected with the first segments 40 are bleed off in a controlled, limited manner to the first main contact 71 and/or the field stop ring 122 , respectively.
- FIG. 2B illustrates a modification of the semiconductor device 1 described with reference to FIG. 2A .
- the first segments 40 also act as field plates 30 and therefore have a double function.
- the edge termination structure 20 is arranged in the edge region 120 at the top side 101 . Thereby, the edge termination structure 20 may be arranged between a rectifying main junction 15 and the surface 103 .
- the edge termination structure 20 may be or have a planar edge termination structure.
- a “planar edge termination structure” is a structure having one or more wells of the second conduction type, for instance one or more field rings 10 as explained with reference to FIGS. 2A and 2B , a junction termination extension region 17 as explained with reference to FIG. 3 (described below in more detail), or a variable lateral doping region 18 as explained with reference to FIG. 4 (described below in more detail).
- the planar edge termination structure has at least one pn-junction 25 . Each of the pn-junction(s) 25 of the planar edge termination structure is arranged distant from the edge 103 .
- a dielectric passivation layer 62 e. g. an imide, may optionally be arranged on the top side 101 such that the first and second segments 40 , 50 are completely embedded and do not have any exposed parts.
- FIGS. 2A , 2 B, 3 and 4 each describes a semiconductor device 1 having a planar edge termination structure 20 .
- the edge termination structure 20 has field rings 10 and optionally also field plates 30 as described above.
- Semiconductor devices 1 having other edge termination structures 20 will now be explained with reference to FIGS. 3 and 4 .
- the semiconductor devices 1 of FIGS. 3 and 4 are identical to the semiconductor device 1 of FIGS. 2A and 2B . Insofar, features explained with reference to FIGS. 2A and 2B may also apply to FIGS. 3 and 4 .
- the planar edge termination structure 20 has a junction termination extension region 17 (“JTE”) that is formed as a closed ring which surrounds the active semiconductor region 110 .
- the junction termination extension region 17 has the second conduction type and directly adjoins the rectifying main junction 15 from which it extends perpendicular to the vertical direction towards the surface 103 .
- the junction termination extension region 17 is characterized in that its doping concentration is—in a direction perpendicular to the vertical direction v and apart from edge effects—close to its boundary with the first semiconductor zone 121 and close to rectifying main junction 15 substantially constant.
- the region 17 may extend towards the edge 103 as far as the field stop region 122 so that a pn-junction 19 between the region 17 and the field stop region 122 is formed.
- the field stop region 122 is also designated as resurf region.
- the planar edge termination structure 20 has a variable lateral doping region 18 (“VLD”) which differs from the described junction termination extension region 17 only in that its doping concentration varies, in a direction perpendicular to the vertical direction v, with increasing distance from the rectifying main junction 15 .
- VLD variable lateral doping region 18
- FIG. 5 is a top view of a semiconductor device as illustrated in FIGS. 1A and 1B which schematically illustrates a possible layout of the first segments 40 .
- Such a layout may be used in connection with any semiconductor device 1 of the present invention, in particular in connection with the embodiments described with reference to FIGS. 2A , 2 B, 3 and 4 .
- the dielectric passivation layer 62 and the second segments 50 are removed.
- the surface 103 is ring-shaped, surrounds the active semiconductor region 110 and delimits the semiconductor body 100 .
- FIG. 6 An enlarged section A which additionally shows the second segments 50 is illustrated in FIG. 6 .
- Each of the second segments 50 is formed as a ring that is arranged between and electrically interconnects two adjacent first segments 40 .
- the second segment 50 there is only one second segment 50 that is electrically connected to each of the first segments 40 .
- the second segment 50 may be formed as a simply-connected layer that overlays all first segments 40 .
- the shielding structure may optionally form a web or a grid.
- a web or grid may be regular or irregular.
- FIG. 10 is a diagram showing the influence of surface charges on the blocking voltage capability and comparing a semiconductor device according to the present invention with a conventional semiconductor device that is, except for the missing shielding structure, identical to the semiconductor device according to the present invention.
- Curve C 1 relates to the semiconductor device 1 of the invention, curve C 2 to the conventional semiconductor device.
- the axis of abscissa shows the surface or interface charge carrier density of charge carriers that impinge on the semiconductor device during operation of the device
- the axis of ordinate shows the blocking voltage capability Ub in Volts dependent on the surface or interface charge carrier density.
- the origin of these charges might be outside the semiconductor device, the material of the package of the semiconductor device, the passivation layers on top of the semiconductor device, or a degradation mechanism of one of the materials.
- the charges move towards the semiconductor surface due to the electric field present during operation.
- the charges or parts of the charges might penetrate the passivation layers or might be allocated at one of the surfaces or interfaces of any of the layers present on top of the semiconductor devices. These Charges are influencing the distribution of the electric field and thus might reduce the blocking voltage capability of the device during operation.
- the diagram is only intended to show that the invention has a favorable effect on the stability of the blocking voltage capability Vb during operation of the device.
- the shielding structure was described to be arranged in the vertical direction v above a planar edge termination structure 20 . Even if not shown in the drawings, additional materials, layers, structures etc. may be arranged between the edge termination structure 20 and the shielding structure.
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Abstract
Description
- Embodiments of the present invention relate to a semiconductor device with a field ring or a JTE (junction termination extension) or a VLD (VLD=variation of lateral doping) edge termination structure.
- Power semiconductor devices, such as power diodes, power MOSFETs, power IGBTs, or any other power semiconductor devices are designed to withstand high blocking voltages, e. g. at least 600 V. Those power devices include a pn-junction that is formed between a p-doped semiconductor region and an n-doped semiconductor region. The device is in its blocking mode when the pn-junction is reversely biased. In this case a depletion region (space charge region) propagates in the p-doped and n-doped regions. Usually, one of these n-doped and p-doped semiconductor regions is more lightly doped than the other one of these semiconductor regions, so that the depletion region mainly extends in the more lightly doped region, which mainly supports the voltage applied across the pn-junction.
- The ability of a pn-junction to support high voltages is limited by the avalanche breakdown mechanism of the semiconductor power device. As a blocking voltage applied to a pn-junction increases, an electric field in the semiconductor regions forming the pn-junction also increases. The electric field results in an acceleration of mobile charge carriers present in the semiconductor region. An avalanche breakdown occurs when, due to the electric field, the charge carriers are accelerated such that they create electron-hole pairs by impact ionization. Charge carriers created by impact ionization create new charge carriers, so that there is a multiplication effect. At the onset of an avalanche breakdown, a significant current flows across the pn-junction in the reverse direction. The voltage at which the avalanche breakdown sets in is referred to as breakdown voltage.
- The electric field at which the avalanche breakdown sets in is referred to as critical electric field (Ecrit). The absolute value of the critical electric field is mainly dependent on the type of semiconductor material used for forming the pn-junction, and is (weakly) dependent on the doping concentration of the more lightly doped semiconductor region.
- The critical electric field is a theoretical value that is defined for a semiconductor region that has an infinite size in directions perpendicular to field strength vectors of the electric field. Power semiconductor devices, however, have a semiconductor body of finite size that is terminated by edge surfaces in lateral directions. In vertical power semiconductor devices, which are semiconductor devices in which the pn-junction mainly extends substantially in a horizontal plane of the semiconductor body, the pn-junction usually does not extend to the edge surface of the semiconductor body but is distant to the edge surface of the semiconductor body in a lateral direction. In this case, a semiconductor region (edge region) of the semiconductor body adjoining the pn junction in the lateral direction also has to withstand the blocking voltage.
- In the edge region, an edge termination structure can be implemented that helps to improve the voltage blocking capability in the edge region. Nevertheless, it is desirable to further improve the voltage blocking capability.
- According to one aspect of the invention, a semiconductor device has a semiconductor body with a top side, a bottom side opposite the top side, and a surface limiting the semiconductor body. An active semiconductor region and an edge region are formed in the semiconductor body. The edge region surrounds the active semiconductor region. A first semiconductor zone of a first conduction type is formed in the edge region. Further, an edge termination structure is formed in the edge region at the top side. On that side of the edge termination structure facing away from the bottom side, a shielding structure comprising a number of N1≧2 first segments and a number of N2≧1 second segments are arranged. Each of the first segments is electrically connected to each of the other first segments and to each of the second segments. Each of the second segments has an electric resistivity higher than an electric resistivity of each of the first segments.
- As discovered by the inventors of the present invention, the shielding structure serves to trap surface charges that, for instance, emanate from outside the semiconductor device. The second segment(s) having an electric resistivity higher than an electric resistivity of each of the first segments serves to bleed off the collected charge carriers in a controlled manner. As the number of charge carriers that adversely affect the voltage blocking capability increasing effect of the edge termination structure is significantly reduced, the voltage blocking capability of the semiconductor device is stabilized.
- Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.
- Examples will now be explained with reference to the drawings. The drawings serve to illustrate the basic principle, so that only aspects necessary for understanding the basic principle are illustrated. The drawings are not to scale. In the drawings the same reference characters denote like features.
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FIG. 1B schematically illustrates a top view of the semiconductor device ofFIG. 1A . -
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FIG. 3 illustrates a cross-sectional side view of a second embodiment of a semiconductor device according toFIGS. 1A and 1B in a sectional plane E-E, wherein the edge termination structure has junction termination extension. -
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- In the following detailed description, reference is made to the accompanying drawings. The drawings form a part of the description and by way of illustration show specific embodiments in which the invention may be practiced. It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.
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FIGS. 1A and 1B schematically illustrate asemiconductor body 100 of apower semiconductor device 1.FIG. 1A is a side view andFIG. 1B a top view. Thesemiconductor body 100 has atop side 101, abottom side 102 opposite thetop side 101, and asurface 103. Thetop side 101 is arranged distant from thebottom side 102 in a vertical direction v that runs perpendicular to thebottom side 102. For the sake of clearness, metallizations, electrodes, dielectric layers etc. arranged on thesemiconductor body 100 and the detailed internal structure are suppressed inFIGS. 1A and 1B and will be explained with reference to furtherFIGS. 2A , 2B and 3 to 9. - The
semiconductor body 100 has anactive semiconductor region 110, and anedge region 120 surrounding theactive semiconductor region 110. Thesurface 103 which may substantially extend perpendicular to thebottom side 102, is a closed ring surrounding both theactive semiconductor region 110 and theedge region 120. That is, theedge region 120 is arranged between theactive semiconductor region 110 and thesurface 103. - The
semiconductor body 100 includes an arbitrary material, for instance a single-element semiconductor material, e.g. silicon (Si), germanium (Ge), or a compound semiconductor material, e. g. IV-IV or III-V or III-VI or II-VI or IV-VI or I-III-VI semiconductor material. - Suitable IV-IV semiconductor materials are SiC or SiGe. Suitable III-V semiconductor materials are GaP, GaAs, InP, InSb, InAs, GaSb, GaN, AlN, InN, AlxGa1−xAs (0≦x≦1) or InxGa1−xN (0≦x≦1). Suitable II-VI semiconductor materials are ZnO, ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, Hg1−xCdxTe (0≦x≦1), BeSe, BeTe or HgS. Suitable III-VI semiconductor materials are GaS, GaSe, GaTe, InS, InSe, InTe. Suitable I-III-VI semiconductor materials are CuInSe2, CuInGaSe2, CuInS2, CuIn, GaS2. A suitable IV-VI semiconductor material is SnTe.
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semiconductor body 100 may have a substantially monocrystalline structure. However, thesemiconductor body 100 may also have a small number of crystallographic defects like point defects, line defects, planar defects, bulk defects. In contrast, a body formed of polycrystalline semiconductor material, e.g. polycrystalline silicon, has a large number of crystallographic defects. - In order to realize an electronic structure monolithically integrated in the
semiconductor body 100 and having an arbitrary function, thesemiconductor body 100 may have any combination of doped and/or undoped crystalline semiconductor material, doped and/or undoped polycrystalline semiconductor material like polycrystalline silicon or polycrystalline silicon carbide, p-conductive semiconductor regions, n-conductive semiconductor regions, trenches, metallization layers, dielectric layers, semiconductor resistance regions, pn-junctions and so on. - The
semiconductor component 1 may also comprise arbitrary electrically conductive layers or elements applied to thesemiconductor body 100, for instance metals, polycrystalline semiconductor material (e. g. polycrystalline silicon or polycrystalline silicon carbide), silicide layers or elements, dielectric layers or elements like nitride (e. g. silicon nitride), oxides (e. g. silicon oxide) or imides. - For instance, the electronic structure may consist of or include a transistor, e.g. a bipolar or an unipolar transistor like an IGFET (Insulated Gate Field Effect Transistor), e.g. a MOSFET (Metal Oxide Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), a JFET (Junction Field Effect Transistor), a HEMT (High Electron Mobility Transistor), a thyristor, a BJT (bipolar junction transistor), or a diode. Optional, the electronic structure may have a cellular structure with a plurality of device cells, e.g. transistor cells, electrically connected in parallel. For instance, the device cells may be, without limitation, stripe cells, rectangular cells, square cells or hexagonal cells.
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FIG. 2A is an enlarged cross-sectional view of a section of the semiconductor device ofFIGS. 1A and 1B in a sectional plane E-E. Only for illustration purposes, thesemiconductor device 1 is a MOSFET or an IGBT the structure of which is well-known in the art. However, theedge region 120 described with reference toFIG. 2A may be used in connection with any other electronic structure described above. - The
active semiconductor region 110 has a rectifyingmain junction 15 which is arranged in theactive semiconductor region 110. The rectifyingmain junction 15 is a pn-junction formed between a firstmain semiconductor region 11 and a secondmain semiconductor region 12. The firstmain semiconductor region 11 and the secondmain semiconductor region 12 have complementary conduction types. As illustrated inFIG. 2A , the firstmain semiconductor region 11 may be of the n-type and the secondmain semiconductor region 12 of the p-type. However, the firstmain semiconductor region 11 may also be of the p-type and the secondmain semiconductor region 12 of the n-type. - As in all other embodiments of the present invention, the rectifying
main junction 15 could—as an alternative to a pn-junction—also be a Schottky junction. In this case, there would not be asecond semiconductor region 12. Instead, the firstmain semiconductor region 11 would also include the region of thesecond semiconductor region 12. That is, thefirst semiconductor region 11 would extend as far as thetop side 101 where it would contact a firstmain electrode 71 that is arranged on the top side. The rectifying main-junction would be formed as a Schottky junction between the firstmain semiconductor region 11 and the firstmain electrode 71. - As is also illustrated in the present embodiment, the first
main semiconductor region 11 may comprise a drift zone of thesemiconductor device 1. The doping concentration of the firstmain semiconductor region 11 is not required to be constant in the vertical direction v. For instance, the firstmain semiconductor region 11 may have at least one sub-region in which the doping concentration of the firstmain semiconductor region 11 has, in the vertical direction v, a local or even global maximum, whereby “global” refers to the whole firstmain semiconductor region 11. The local or global maximum may be arranged distant from thebottom side 102 or be located at thebottom side 102. For instance, such a sub-region may be a field stop zone or a contact region for improving an electrical contact to an electrode arranged on thesemiconductor body 100. - In the illustrated embodiment of a MOSFET or an IGBT, a
further semiconductor region 16 is arranged on that side of thedrift zone 11 facing away from thetop side 101. In case of a MOSFET thefurther semiconductor region 16 is a drain region having the first conduction type, in case of an IGBT, thefurther semiconductor region 16 is a collector region having the second conduction type. In both cases, the doping concentration of the further semiconductor region is greater than that of thedrift zone 11. - As shown, the rectifying
main junction 15 may run substantially parallel to thebottom side 102. In principle however, the rectifying main pn-junction 15 may have an arbitrary shape. In any case, anedge termination structure 20 arranged in theedge region 120 at thetop side 101 as will be explained in more detail below serves to improve the voltage blocking capability in theedge region 120 if the rectifyingmain junction 15 is in its blocking state, that is, if the rectifyingmain junction 15 is reverse biased by a blocking voltage. For instance, the blocking voltage capability may be at least 100 V. However, the blocking voltage capability may also be lower. - The
edge region 120 has afirst semiconductor zone 121 of a first conduction type. Optionally, thefirst semiconductor zone 121 may be a sub-region of the firstmain semiconductor region 11 and accordingly have the conduction type of the firstmain semiconductor region 11. In the present embodiment, the first conduction type is “n”. Alternatively, the first conduction type could also be “p”. - According to a first embodiment of an
edge termination structure 20, anedge termination structure 20 may have a field ring structure with at least N10 field rings 10. N10 is an integer with N10≧1. For instance, N10 may be at least 5 or at least 10 or at least 15. Each of the field rings 10 has a second conduction type (here: p) complementary to the first conduction type (here: n) and forms a pn-junction 25 with thefirst semiconductor zone 121. Further, each of the field rings 10 surrounds theactive semiconductor region 110. - The field rings 10 may have an equidistant or, preferably, a non-equidistant spacing. In the latter case which is illustrated in
FIG. 2A and considering all field rings 10 of thesemiconductor device 1, within theedge region 120 the distances d10 between adjacent field rings 10 may increase from theactive semiconductor region 110 towards thesurface 103. Optionally, the distance d10 between a first one of the field rings 10 and a second one of the field rings 10 with nofurther field ring 10 arranged in between may be at least 5 μm and/or less than or equal to 500 μm. - Also optionally, one, more than one or each of the field rings 10 may be electrically connected to an electrically
conductive field plate 30 that is arranged on thetop side 101. Thereby, each of thefield plates 30 may be electrically connected to one and only one of the field rings 10. In order to avoid the field plate(s) 30 from making contact with thefirst semiconductor zone 121, a dielectric 61 is arranged between the field plates(s) 30 and thetop side 101. A protrusion of eachfield plate 30 pierces through the dielectric 61 toward thesemiconductor body 100 and electrically contacts therespective field ring 10. - Above the
field limiting structure 20, that is, on that side of the field limiting structure facing away from thebottom side 102, there is a shielding structure arranged on thetop side 101. The shielding structure has a number of N1≧2first segments 40 and a number of N2≧1second segments 50. For instance, N1 may be at least 3, at least 10 or even at least 20. N2 may be equal to 1, or greater than one. Optionally, the semiconductor component may have one and only one second segment that is a continuous or non-continuous layer. Any twofirst segments 40 are arranged distant from one another. If there are more than onesecond segments 50, any twosecond segments 50 are arranged distant from one another. Further, thefirst segments 40 are arranged distant from thesemiconductor body 100 with a dielectric 61 arranged between thefield limiting structure 20 and the shielding structure. The embodiment illustrated inFIG. 2 has only onesecond segment 50. - Generally, each of the
first segments 40 is electrically connected to at least one, more than one or allsecond segments 50. Thereby, each of thesecond segments 50 has an electric resistivity higher than an electric resistivity of each of thefirst segments 40. - Optionally, each of the
second segments 50 may have an electric resistivity that is at least 10 times or even 100 times higher than an electric resistivity of each of thefirst segments 40. Also optionally, one, more than one or each of thefirst segments 40 may have an electric resistivity of less than 50Ω·cm or even of less than 1Ω·cm. - One, more than one or each of the
first segments 40 may, independently from the otherfirst segments 40, consist of or comprise metal, doped or undoped polycrystalline semiconductor. - Also optionally, one, more than one or each of the
second segments 50 may have an electric resistivity of at least 108Ω·cm. For instance, one, more than one or each of thesecond segments 50 may consist of or comprise doped or undoped polycrystalline semiconductor material, amorphous semiconductor material (e. g. amorphous silicon “a-Si” or amorphous silicon carbide “a-SiC”), amorphous non-semiconductor material (e. g. amorphous carbon “a-C” or hydrogenated amorphous carbon “a-C:H”). - According to a preferred embodiment, one, more than one or each of the
first segments 40 may be formed as a closed ring. However, a plurality of other layouts is also possible. Allfirst segments 40 which are formed as closed rings may be arranged such that there is only one (the innermost) among all of those closed rings that does not surround at least one of the other closed rings. - In order to allow for electrically connecting the rectifying
main junction 15 to a device that is external to thesemiconductor device 1, a firstmain electrode 71 and a secondmain electrode 72 with the rectifyingmain junction 15 electrically connected in series between the firstmain electrode 71 and the secondmain electrode 72 may be arranged on thesemiconductor body 100. For instance, as illustrated inFIG. 2A , the firstmain electrode 71 may be arranged on thetop side 101 and the secondmain electrode 72 on thebottom side 102 such that thesemiconductor body 100 is arranged between the firstmain electrode 71 and the secondmain electrode 72. Such an arrangement may be used, inter alia, if thesemiconductor device 1 is designed a “vertical” device, that is, in a device in which the main current substantially runs in the vertical direction v. - In particular, the first
main electrode 71 and the secondmain electrode 72 may be an anode electrode and a cathode electrode or a cathode electrode and an anode electrode (e. g. if thesemiconductor device 1 is a diode or a thyristor), or be an emitter electrode and a collector electrode or a collector electrode and an emitter electrode (if thesemiconductor device 1 is a bipolar device like, e. g. an IGBT), or a source electrode and a drain electrode or a drain electrode and a source electrode (e. g. if thesemiconductor device 1 is unipolar device like, e.g. a MOSFET). - As exemplarily shown in
FIG. 2A , the shielding structure with its first andsecond segments first connection region 51 to the firstmain electrode 71 and/or at asecond connection region 52 to a field stop orchannel stop ring 122 that is arranged in theedge region 120 and that surrounds theactive semiconductor region 110. - If the shielding structure is electrically connected to a first
main electrode 71, the respective connection may be designed such that for each of thefirst segments 40 an electric resistance between thatfirst segment 40 and the firstmain electrode 71 is at least 1Ω. - If the shielding structure is electrically connected to a
field stop ring 122, the respective connection may be designed such that for each of thefirst segments 40 an electric resistance between thatfirst segment 40 and the field stop orchannel stop ring 122 is at least 1Ω. - Due to the high-ohmic connection(s) between the
first segments 40 on the one hand and the firstmain electrode 71 and/or thefield stop ring 122 on the other hand, charge carriers collected with thefirst segments 40 are bleed off in a controlled, limited manner to the firstmain contact 71 and/or thefield stop ring 122, respectively. -
FIG. 2B illustrates a modification of thesemiconductor device 1 described with reference toFIG. 2A . In this modification, thefirst segments 40 also act asfield plates 30 and therefore have a double function. - As already described above, the
edge termination structure 20 is arranged in theedge region 120 at thetop side 101. Thereby, theedge termination structure 20 may be arranged between a rectifyingmain junction 15 and thesurface 103. - The
edge termination structure 20 may be or have a planar edge termination structure. In this context, a “planar edge termination structure” is a structure having one or more wells of the second conduction type, for instance one or more field rings 10 as explained with reference toFIGS. 2A and 2B , a junctiontermination extension region 17 as explained with reference toFIG. 3 (described below in more detail), or a variablelateral doping region 18 as explained with reference toFIG. 4 (described below in more detail). In any case, the planar edge termination structure has at least one pn-junction 25. Each of the pn-junction(s) 25 of the planar edge termination structure is arranged distant from theedge 103. - Further, a
dielectric passivation layer 62, e. g. an imide, may optionally be arranged on thetop side 101 such that the first andsecond segments -
FIGS. 2A , 2B, 3 and 4 each describes asemiconductor device 1 having a planaredge termination structure 20. InFIGS. 2A and 2B , theedge termination structure 20 has field rings 10 and optionally alsofield plates 30 as described above.Semiconductor devices 1 having otheredge termination structures 20 will now be explained with reference toFIGS. 3 and 4 . Apart from the different kinds ofedge termination structures 20, thesemiconductor devices 1 ofFIGS. 3 and 4 are identical to thesemiconductor device 1 ofFIGS. 2A and 2B . Insofar, features explained with reference toFIGS. 2A and 2B may also apply toFIGS. 3 and 4 . - In the
semiconductor device 1 ofFIG. 3 , the planaredge termination structure 20 has a junction termination extension region 17 (“JTE”) that is formed as a closed ring which surrounds theactive semiconductor region 110. The junctiontermination extension region 17 has the second conduction type and directly adjoins the rectifyingmain junction 15 from which it extends perpendicular to the vertical direction towards thesurface 103. The junctiontermination extension region 17 is characterized in that its doping concentration is—in a direction perpendicular to the vertical direction v and apart from edge effects—close to its boundary with thefirst semiconductor zone 121 and close to rectifyingmain junction 15 substantially constant. Optionally, as indicated by a dashed line, theregion 17 may extend towards theedge 103 as far as thefield stop region 122 so that a pn-junction 19 between theregion 17 and thefield stop region 122 is formed. In this case, thefield stop region 122 is also designated as resurf region. - In the
semiconductor device 1 ofFIG. 4 , the planaredge termination structure 20 has a variable lateral doping region 18 (“VLD”) which differs from the described junctiontermination extension region 17 only in that its doping concentration varies, in a direction perpendicular to the vertical direction v, with increasing distance from the rectifyingmain junction 15. -
FIG. 5 is a top view of a semiconductor device as illustrated inFIGS. 1A and 1B which schematically illustrates a possible layout of thefirst segments 40. Such a layout may be used in connection with anysemiconductor device 1 of the present invention, in particular in connection with the embodiments described with reference toFIGS. 2A , 2B, 3 and 4. In order to show that each of thefirst segments 40 may be a closed ring, thedielectric passivation layer 62 and thesecond segments 50 are removed. It is also apparent fromFIG. 5 that thesurface 103 is ring-shaped, surrounds theactive semiconductor region 110 and delimits thesemiconductor body 100. - An enlarged section A which additionally shows the
second segments 50 is illustrated inFIG. 6 . Each of thesecond segments 50 is formed as a ring that is arranged between and electrically interconnects two adjacentfirst segments 40. - According to an alternative embodiment illustrated in
FIG. 7 , there is only onesecond segment 50 that is electrically connected to each of thefirst segments 40. Thereby, thesecond segment 50 may be formed as a simply-connected layer that overlays allfirst segments 40. - According to a further alternative embodiment illustrated in
FIG. 8 , there may be a plurality ofsecond segments 50 each forming a longish strip that electrically interconnects at least threefirst segments 40. - According to still a further alternative embodiment illustrated in
FIG. 9 , there may be a plurality ofsecond segments 50 forming a web and each electrically interconnecting only two adjacentfirst segments 40. - As illustrated by way of example with reference to
FIGS. 8 and 9 , the shielding structure may optionally form a web or a grid. Such a web or grid may be regular or irregular. -
FIG. 10 is a diagram showing the influence of surface charges on the blocking voltage capability and comparing a semiconductor device according to the present invention with a conventional semiconductor device that is, except for the missing shielding structure, identical to the semiconductor device according to the present invention. Curve C1 relates to thesemiconductor device 1 of the invention, curve C2 to the conventional semiconductor device. - The axis of abscissa shows the surface or interface charge carrier density of charge carriers that impinge on the semiconductor device during operation of the device, and the axis of ordinate shows the blocking voltage capability Ub in Volts dependent on the surface or interface charge carrier density. The origin of these charges might be outside the semiconductor device, the material of the package of the semiconductor device, the passivation layers on top of the semiconductor device, or a degradation mechanism of one of the materials. The charges move towards the semiconductor surface due to the electric field present during operation. The charges or parts of the charges might penetrate the passivation layers or might be allocated at one of the surfaces or interfaces of any of the layers present on top of the semiconductor devices. These Charges are influencing the distribution of the electric field and thus might reduce the blocking voltage capability of the device during operation. The diagram is only intended to show that the invention has a favorable effect on the stability of the blocking voltage capability Vb during operation of the device.
- In the previous description, the shielding structure was described to be arranged in the vertical direction v above a planar
edge termination structure 20. Even if not shown in the drawings, additional materials, layers, structures etc. may be arranged between theedge termination structure 20 and the shielding structure. - Although various exemplary embodiments of the invention have been disclosed, it will be apparent to those skilled in the art that various changes and modifications can be made which will achieve some of the advantages of the invention without departing from the spirit and scope of the invention. It will be obvious to those reasonably skilled in the art that other components performing the same functions may be suitably substituted. It should be mentioned that features explained with reference to a specific figure may be combined with features of other figures, even in those cases in which this has not explicitly been mentioned.
Claims (25)
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US14/457,491 US9281360B1 (en) | 2014-08-12 | 2014-08-12 | Semiconductor device with a shielding structure |
DE102015111997.8A DE102015111997A1 (en) | 2014-08-12 | 2015-07-23 | Semiconductor device with a shielding structure |
CN201510491053.2A CN105374856B (en) | 2014-08-12 | 2015-08-11 | Semiconductor devices with shielding construction |
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US14/457,491 US9281360B1 (en) | 2014-08-12 | 2014-08-12 | Semiconductor device with a shielding structure |
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US20160049463A1 true US20160049463A1 (en) | 2016-02-18 |
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US20180237292A1 (en) * | 2017-02-22 | 2018-08-23 | Infineon Technologies Ag | Semiconductor device, microphone and methods for forming a semiconductor device |
US20190131412A1 (en) * | 2017-01-25 | 2019-05-02 | Fuji Electric Co., Ltd. | Semiconductor device |
JP2020520102A (en) * | 2017-05-17 | 2020-07-02 | プリズマティック、センサーズ、アクチボラグPrismatic Sensors Ab | X-ray sensor, X-ray detector system, and X-ray imaging system |
US20220157951A1 (en) * | 2020-11-17 | 2022-05-19 | Hamza Yilmaz | High voltage edge termination structure for power semicondcutor devices and manufacturing method thereof |
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DE102018115637A1 (en) * | 2018-06-28 | 2020-01-02 | Infineon Technologies Ag | Power semiconductor component |
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JP2585331B2 (en) | 1986-12-26 | 1997-02-26 | 株式会社東芝 | High breakdown voltage planar element |
US5087959A (en) | 1987-03-02 | 1992-02-11 | Microwave Technology, Inc. | Protective coating useful as a passivation layer for semiconductor devices |
DE102004057792B4 (en) | 2004-11-30 | 2008-12-18 | Infineon Technologies Austria Ag | Semiconductor device |
US8476691B1 (en) * | 2010-02-18 | 2013-07-02 | Microsemi Corporation | High reliability-high voltage junction termination with charge dissipation layer |
JP5515922B2 (en) * | 2010-03-24 | 2014-06-11 | 富士電機株式会社 | Semiconductor device |
JP5863574B2 (en) * | 2012-06-20 | 2016-02-16 | 株式会社東芝 | Semiconductor device |
JP5949941B2 (en) * | 2012-11-29 | 2016-07-13 | 富士電機株式会社 | Semiconductor device |
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Cited By (11)
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US20190131412A1 (en) * | 2017-01-25 | 2019-05-02 | Fuji Electric Co., Ltd. | Semiconductor device |
US10896961B2 (en) * | 2017-01-25 | 2021-01-19 | Fuji Electric Co., Ltd. | Semiconductor device |
US20180237292A1 (en) * | 2017-02-22 | 2018-08-23 | Infineon Technologies Ag | Semiconductor device, microphone and methods for forming a semiconductor device |
US10858246B2 (en) * | 2017-02-22 | 2020-12-08 | Infineon Technologies Ag | Semiconductor device, microphone and methods for forming a semiconductor device |
US11352253B2 (en) | 2017-02-22 | 2022-06-07 | Infineon Technologies Ag | Semiconductor device, microphone and methods for forming a semiconductor device |
JP2020520102A (en) * | 2017-05-17 | 2020-07-02 | プリズマティック、センサーズ、アクチボラグPrismatic Sensors Ab | X-ray sensor, X-ray detector system, and X-ray imaging system |
JP7370866B2 (en) | 2017-05-17 | 2023-10-30 | プリズマティック、センサーズ、アクチボラグ | X-ray sensors, X-ray detector systems, and X-ray imaging systems |
US20220157951A1 (en) * | 2020-11-17 | 2022-05-19 | Hamza Yilmaz | High voltage edge termination structure for power semicondcutor devices and manufacturing method thereof |
US20230108668A1 (en) * | 2020-11-17 | 2023-04-06 | Hamza Yilmaz | High voltage edge termination structure for power semiconductor devices and manufacturing method thereof |
US20230104778A1 (en) * | 2020-11-17 | 2023-04-06 | Hamza Yilmaz | High voltage edge termination structure for power semiconductor devices |
US20230103304A1 (en) * | 2020-11-17 | 2023-04-06 | Hamza Yilmaz | High voltage edge termination structure for power semiconductor devices and manufacturing method thereof |
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CN105374856B (en) | 2018-04-13 |
DE102015111997A1 (en) | 2016-02-18 |
US9281360B1 (en) | 2016-03-08 |
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