US20120299135A1 - Non volatile memory including stabilizing structures - Google Patents
Non volatile memory including stabilizing structures Download PDFInfo
- Publication number
- US20120299135A1 US20120299135A1 US13/568,409 US201213568409A US2012299135A1 US 20120299135 A1 US20120299135 A1 US 20120299135A1 US 201213568409 A US201213568409 A US 201213568409A US 2012299135 A1 US2012299135 A1 US 2012299135A1
- Authority
- US
- United States
- Prior art keywords
- layer
- recording layer
- volatile memory
- memory cell
- non volatile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
Definitions
- STRAM non-volatile spin-transfer torque random access memory
- RRAM resistive random access memory
- the spin torque from the writing current has to overcome the in-plane anisotropy (which is equal to 2 ⁇ Ms, where Ms is the saturation magnetization).
- the in-plane anisotropic field is about 5000 Oersted (Oe) for a nickel iron (NiFe) layer.
- the thermal stability and retention characteristics of such a cell is provided by the uni-axial anisotropic field, which is only around 500 Oe.
- a memory cell that reduces the in-plane anisotropic field, thereby affording a cell that is easier to switch, but increases the uni-axial anisotropic field, thereby affording a cell that is more thermally stable and retains the state written to it.
- a apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer.
- a non volatile memory cell including a spin torque transfer random access memory (STRAM) structure that includes a reference layer; a tunnel barrier; and a recording layer, wherein the tunnel barrier is between the reference layer and the recording layer; an exchange coupling spacer layer; and a stabilizing structure, wherein the exchange coupling spacer layer is between the STRAM structure and the stabilizing structure and exchange couples the recording layer of the STRAM structure to the stabilizing structure.
- STRAM spin torque transfer random access memory
- a method of determining the state of a non volatile memory cell including the steps of: providing a non volatile memory cell, the non volatile memory cell including a spin torque transfer random access memory (STRAM) structure; an exchange coupling spacer layer; and a stabilizing structure that includes a synthetic antiferromagnetic (SAF) structure that includes a first ferromagnetic layer, a nonmagnetic spacer layer and a second ferromagnetic layer, wherein the nonmagnetic spacer layer is between the first ferromagnetic layer and the second ferromagnetic layer; and an upper reference layer, wherein the upper reference layer is proximate to the second ferromagnetic layer, directing a current across the non volatile memory cell, wherein the current is directed from the stabilizing structure to the STRAM structure; measuring a voltage, wherein the voltage is dependent on the magnetic orientation of the upper reference layer with respect to the second ferromagnetic layer of the SAF structure and the orientation of the upper reference layer with respect to the second ferromagnetic layer can be changed to reflect
- FIGS. 1A and 1B are schematic diagrams of non volatile spin-transfer torque random access memory (STRAM) structures
- FIG. 1C is a schematic diagram of a STRAM cell within a system for utilizing the STRAM cell as memory;
- STRAM spin-transfer torque random access memory
- FIGS. 2A , 2 B, and 2 C are a schematic diagram defining the relevant dimensions of a STRAM structures ( FIG. 2A ), a graph showing how the width and height affect the effective size of the STRAM structure ( FIG. 2B ), and a graph showing how the driving current is effected by the effective size ( FIG. 2C );
- FIG. 3 is a schematic diagram of a STRAM cell that includes an embodiment of a stabilizing structure
- FIGS. 4A through 4E are schematic diagrams of embodiments of a stabilizing structure ( FIG. 4A ), a STRAM cell including such a stabilizing structure ( FIG. 4B ), the STRAM cell of FIG. 4B with the STRAM structure antiferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction ( FIG. 4C ), the STRAM cell of FIG. 4B with the STRAM structure ferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction ( FIG. 4D ), and the STRAM cell of FIG. 4B with the STRAM structure antiferromagnetically coupled to the stabilizing structure after a second current has been passed through it in a first direction ( FIG. 4E );
- FIGS. 5A through 5D are schematic diagrams of embodiments of a stabilizing structure ( FIG. 5A ), a STRAM cell including such a stabilizing structure ( FIG. 5B ), the STRAM cell of FIG. 5B with the STRAM structure antiferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction ( FIG. 5C ), and the STRAM cell of FIG. 5B with the STRAM structure ferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction ( FIG. 5D );
- FIGS. 6A through 6D are graphs showing the magnetoresistance (Mr) versus coercivity (H) for a strongly coupled STRAM stack and stabilizing structure ( FIG. 6A ) and an intermediately coupled STRAM stack and stabilizing structure ( FIG. 6B ), the magnetoresistance (also referred to as “MR”) (Mr) versus switching current (I) for a strongly coupled STRAM stack and stabilizing structure ( FIG. 6C ) and an intermediately coupled STRAM stack and stabilizing structure ( FIG. 6D ); and
- FIGS. 7A and 7B are graphs showing the magnetoresistance versus coercivity ( FIG. 7A ) and magnetoresistance versus switching current ( FIG. 7B ) of thin recording layers.
- Non volatile memory cells as disclosed herein include stabilizing structures.
- the stabilizing structures generally function to increase the thermal stability or other characteristics of the non volatile memory cells while still allowing the non volatile memory cells to have an aspect ratio of close to about 1 (i.e. substantially circular instead of elliptical).
- the stabilizing structure can utilize different methods and materials to accomplish this improvement.
- a non volatile memory cell utilized herein can include many different types of memory.
- Exemplary types of memory that can be utilized in devices disclosed herein include, but are not limited to non volatile memory such as, resistive sense memory (RSM).
- RSM is memory that has changeable resistance that affords data storage using different resistance states of the RSM.
- Exemplary types of RSM include, but are not limited to, magnetoresistive RAM (MRAM); resistive RAM (RRAM); and spin torque transfer RAM, which is also referred to as STRAM.
- the RSM can include STRAM.
- STRAM includes a MTJ (magnetic tunnel junction), which generally includes two magnetic electrode layers separated by a thin insulating layer, which is also known as a tunnel barrier.
- An embodiment of a MTJ is depicted in FIG. 1A .
- the MTJ 100 in FIG. 1A includes a first magnetic layer 130 ,which can also be referred to as a pinned layer or reference layer, and a second magnetic layer 110 , which can also be referred to as a free layer or a recording layer.
- the reference layer 130 and the recording layer 110 are separated by an insulating layer 120 .
- FIG. 1B depicts a MTJ 100 in contact with a first electrode layer 140 and a second electrode layer 151 .
- the first electrode layer 140 and the second electrode layer 151 electrically connect the reference layer 130 and the recording layer 110 respectively to a control circuit (not shown) providing read and write currents through the magnetic layers.
- the relative orientation of the magnetization vectors of the reference layer 130 and the recording layer 110 can be determined by the resistance across the MTJ 100 ; and the resistance across the MTJ 100 can be determined by the relative orientation of the magnetization vectors of the reference layer 130 and the recording layer 110 .
- the reference layer 130 and the recording layer 110 are generally made of ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys. Pinning of the reference layer 130 may be achieved through, e.g., the use of exchange bias with an antiferromagnetically ordered material such as PtMn, IrMn and others.
- the insulating layer 120 is generally made of an insulating material such as aluminum oxide (Al 2 O 3 ) or magnesium oxide (MgO).
- the recording layer 110 can be a relatively thin recording layer. In embodiments, the recording layer 110 can be from about 1 nm to about 5 nm thick. In embodiments, the recording layer 110 can be from about 1 nm to about 3 nm thick. In embodiments, the recording layer 110 can have a relatively high spin polarization. In embodiments, the recording layer 110 can have a spin polarization that is equal to or greater than about 0.5. In embodiments, the recording layer 110 can generally be made of ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys.
- FIG. 1C illustrates a memory device that includes a memory element 113 that can include a memory cell 111 and its corresponding transistor 115 .
- Single memory elements 113 can be configured within larger systems.
- the memory element 113 can be operatively coupled between a bit line 121 and a source line 125 within a larger system.
- the read/write circuitry 135 controls the particular bit line 121 and source line 125 that current passes through, thereby controlling the particular memory cell that is read from or written to.
- the read/write circuitry 135 can also control the voltage applied across the bit line 121 or memory element 113 from the source line 125 (or vice versa).
- the direction which current flows across a memory cell 111 is determined by the voltage differential across the bit line 121 and the source line 125 .
- a particular memory cell 111 can be read from by activating its corresponding transistor 115 , which when turned on, allows current to flow from the bit line 121 through the memory cell 111 to the source line 125 (or vice versa).
- the transistor 115 is activated and deactivated through the word line 131 .
- the word line 131 is operatively coupled to and supplies a voltage to the transistor 115 to turn the transistor on so that current can flow to the memory cell 111 .
- a voltage, dependent on the resistance of the memory cell 111 is then detected by the sense amplifier 141 from the source line 125 (for example).
- the voltage differential between the bit line 121 and the source line 125 (or vice versa), which is indicative of the resistance of the memory cell 111 is then compared to a reference voltage 145 and amplified by the sense amplifier 141 to determine whether the memory cell 111 contains a “1” or a “0”.
- a current is passed through the STRAM stack perpendicular to the stack.
- the direction of the recording layer can be set either parallel or anti-parallel to the reference layer.
- the spin torque needs to overcome the in-plane anisotropy of the recording layer in order to affect the magnetization of the recording layer.
- the current necessary to do this (J c0 ) can be seen in Equation I below.
- Equation I ⁇ is the spin polarization efficiency of the current, 2 e/h is a constant, ⁇ is the damping constant, H K and H are the anisotropy field and external field respectively, and M s is the saturation magnetization of the recording layer.
- 2 ⁇ M reflects the in-plane anisotropy and the term Hk reflects the anisotropy.
- Hk the anisotropy field
- the switching current in such a STRAM cell is mostly dominated by the in-plane anisotropy (2 ⁇ M) while the thermal stability and retention are mostly dominated by (Hk). Therefore, the large 2 ⁇ M term makes the switching current high but does not substantially improve the thermal stability and retention.
- FIG. 2A depicts an elliptically shaped recording layer 110 of a STRAM cell.
- the recording layer 110 has a width (also referred to as “w”) and a height (also referred to as “h”).
- FIG. 2B shows width and height requirements of thermally stable cells.
- the data in FIG. 2B assumes that the saturation magnetization (Ms) is about 800 emu/cc (typical for NiFe) and the thickness of the recording layer is 3 nm.
- the effective size is the square root of (width*height).
- FIG. 2C shows the dependence of the switching current (J(A/m 2 ))on the effective cell size (nm) for cells having different saturation magnetization (Ms) values
- Non volatile memory cells disclosed herein provide increased thermal stability while maintaining small cell sizes and more importantly small aspect ratios.
- Non volatile memory cells disclosed herein generally include a stabilizing structure that is exchange coupled with the recording layer of the MTJ stack. The materials of the stabilizing structure afford increased thermal stability of the MTJ stack even at aspect ratios approaching 1.
- FIG. 3 illustrates embodiments of non volatile memory cells disclosed herein.
- non volatile memory cells disclosed herein include a MTJ stack 300 , an exchange coupling spacer layer 350 , and a stabilizing structure 340 .
- the exchange coupling spacer layer 350 is generally disposed between the MTJ stack 300 and the stabilizing structure 340 .
- the MTJ stack 300 includes layers such as those discussed above, a reference layer 330 , a tunnel barrier structure 320 , and a recording layer 310 .
- the properties, functions and materials discussed above are applicable herein.
- the recording layer 310 of the MTJ stack 300 generally has a relatively low saturation magnetization and can create a relatively large spin polarization in the electrical current used to switch the MTJ.
- the exchange coupling spacer layer 350 generally functions to magnetically couple (either ferromagnetically or antiferromagnetically) the recording layer 310 and the stabilizing structure 340 .
- the exchange coupling spacer layer 350 can be made of various materials, including but not limited to, conductive metals such as copper (Cu), tantalum (Ta), ruthenium (Ru), palladium (Pd), platinum (Pt), chromium (Cr), gold (Au), and the like; thin layers of oxide materials such as magnesium oxide (MgO), alumina (AlO), titanium oxide (TiO), tantalum oxide (TaO), and the like; or combinations thereof.
- the exchange coupling spacer layer 350 can be about 5 nanometers (nm) thick if it is made of a conductive metal and about 1 nm thick if made of an oxide material.
- the magnitude of the exchange coupling between the recording layer 310 and the stabilizing structure 340 can be at least partially controlled by the materials and thickness of the exchange coupling spacer layer 350 .
- the coupling field between the recording layer 310 and the stabilizing structure 340 will not significantly affect the critical current density for switching.
- the coupling field can reverse the stabilizing structure with or without the aid of the static field from the recording layer 310 .
- the magnitude of the coupling between the recording layer 310 and the stabilizing structure 340 can be in the range of about 50 to about 500 Oe.
- exchange coupling can be considered to be strong exchange coupling if the exchange field (Hex) is equal to or greater than about 1000 Oe.
- An exchange coupling can be considered to be an intermediate exchange coupling if the exchange field (Hex) is from about 100 Oe to about 1000 Oe.
- Embodiments can include a recording layer 310 that creates a relatively large spin polarization in the electrical current and also has a relatively low net magnetic moment (Ms*t).
- the recording layer 310 is exchange coupled (either ferromagnetically or antiferromagnetically) to the stabilizing layer 340 .
- the exchange coupling can be intermediate, in an embodiment from about 50 to 500 Oe. Therefore, the switching current will not be detrimentally affected.
- the exchange coupling can serve to increase the total thermal barrier (KuV/kT).
- the thermal barrier factor can be increased from about 20 to 30 (without the stabilizing layer) to about 40 or more (with the stabilizing layer).
- the recording layer will be more stable (i.e., not super-paramagnetic) at room temperature. Because the net moment of the recording layer is small, a substantial reduction in switching current can be achieved.
- the stabilizing structure 340 generally has a high thermal stability, even when formed in a circular shape (e.g. aspect ratio equals 1).
- the stabilizing structure 340 is generally exchange coupled to the recording layer 310 .
- the stabilizing structure 340 can include a single layer or more than one layer.
- the stabilizing layer can include ferromagnetic layers having acceptable anisotropy.
- an acceptable anisotropy (Hk) for the stabilizing layer can be greater than or equal to about 300 Oe.
- the stabilizing structure 740 can generally be made of ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys, including but not limited to CoCr, CoPt, FePt, CoCrPt, and the like.
- the stabilizing structure can have a thickness from about 2 nm to about 20 nm.
- the stabilizing structure 340 can include synthetic antiferromagnetic (SAF) materials or a SAF structure.
- SAF structures generally include two or more ferromagnetic layers separated by a nonmagnetic layer (or more than one nonmagnetic layer in the case of more than two ferromagnetic layers). The ferromagnetic layers are antiferromagnetically coupled, which provides the SAF structures with a relatively high thermal stability. SAF structures also generally have large intrinsic anisotropy and do not require any shape induced anisotropy.
- FIG. 4A shows an example of a stabilizing structure 440 that includes a SAF structure.
- the stabilizing structure 440 includes a first ferromagnetic layer 442 , a nonmagnetic spacer layer 444 and a second ferromagnetic layer 446 . As seen by the arrows on the first ferromagnetic layer 442 and the second ferromagnetic layer 446 , the two layers are antiferromagnetically coupled.
- the magnetic orientation of the SAF structure i.e. the three layer structure seen in FIG. 4A
- a magnetic field can affect the first ferromagnetic layer 442 thereby reorienting the magnetic field to the left (the opposite of that seen in FIG.
- the switch of the first ferromagnetic layer 442 can happen before, simultaneous with, or substantially simultaneously with the switch of the second ferromagnetic layer 446 .
- the SAF structure 440 can be made of any materials that will exhibit the above discussed characteristics.
- Exemplary materials for the first and second ferromagnetic layers 442 and 446 include, but are not limited to, cobalt (Co), nickel (Ni), iron (Fe), and combinations thereof.
- the ferromagnetic layers can include CoFe, NiFe, and combinations thereof.
- the first and second ferromagnetic layers 442 and 446 can generally have thicknesses from about 1.5 nm to about 5 nm.
- Exemplary materials for the nonmagnetic spacer layer 444 include, but are not limited to, ruthenium (Ru), copper (Cu), rhodium (Rh), iridium (Ir), palladium (Pd), chromium (Cr), and the like, or combinations thereof.
- the nonmagnetic spacer layer 444 can include Ru or Cu.
- the nonmagnetic spacer layer 444 can generally have a thickness from about 0.3 nm to about 3 nm.
- FIG. 4B shows a non volatile memory cell that includes a stabilizing structure 440 as illustrated in the embodiment of FIG. 4A .
- the exemplary non volatile memory cell includes a MTJ stack 400 having a reference layer 430 , a tunnel barrier structure 420 and a recording layer 410 .
- the MTJ stack 400 is separated from the stabilizing structure 440 by an exchange coupling spacer layer 450 .
- This embodiment of a stabilizing structure 440 includes a first ferromagnetic layer 442 and a second ferromagnetic layer 446 separated by a nonmagnetic spacer layer 444 . Exemplary characteristics and materials for the various layers of the non volatile memory cell can be as discussed above.
- FIG. 4C depicts the non volatile memory cell after application of a current (J in FIG. 4C ) that is sufficient to write to the MTJ stack.
- the current is directed from the bottom of the MTJ stack to the top of the MTJ stack (i.e. in the direction from the transistor to the MTJ) in order to write a “1” (i.e. the high resistance state, wherein the recording layer 410 and the reference layer 430 have opposite polarities).
- the current will set the recording layer 410 to a magnetization (indicated by the left pointing arrow in the recording layer 410 ) that is opposite to that of the reference layer 430 (which is pinned).
- the magnetic orientation of the recording layer 410 will affect the first ferromagnetic layer 442 of the stabilizing structure 440 because of the exchange coupling of the recording layer 410 and the stabilizing structure 440 .
- the first ferromagnetic layer 442 will then affect the second ferromagnetic layer 446 because of its coupling so that the second ferromagnetic layer 446 is changed (if the first ferromagnetic layer 442 was changed) to be anti-parallel to the first ferromagnetic layer 442 .
- the timing of the switching of the recording layer 410 , the first ferromagnetic layer 442 , and the second ferromagnetic layer 446 are not necessarily sequential, and may indeed occur at substantially the same time.
- the first ferromagnetic layer 442 Upon application of the current, the first ferromagnetic layer 442 will either remain antiferromagnetically coupled with the recording layer 410 or will switch its magnetization direction so that it becomes antiferromagnetically coupled with the recording layer 410 . As seen in FIG. 4C , the first ferromagnetic layer 442 had its magnetization direction switched (or was already) so that it is opposite to that of the recording layer 410 .
- the stabilizing structure 440 in the non volatile memory cell depicted in FIG. 4C is antiferromagnetically coupled with the recording layer 410 .
- the stabilizing structure 440 could be ferromagnetically coupled to the recording layer 410 .
- the non volatile memory cell depicted in FIG. 4D illustrates the effect of writing a “1” to a non volatile memory cell that contains a stabilizing structure that is ferromagnetically coupled to the recording layer.
- the recording layer 410 will affect the first ferromagnetic layer 442 of the stabilizing structure 440 because of the exchange coupling of the recording layer 410 and the stabilizing structure 440 .
- the ferromagnetic layer 442 Upon application of the current (from the bottom to the top of the MTJ stack), the ferromagnetic layer 442 will either remain ferromagnetically coupled with the recording layer 410 or will switch its magnetization direction so that it becomes ferromagnetically coupled with the recording layer 410 . As seen in FIG. 4D , the first ferromagnetic layer 442 had its magnetization direction switched (or was already) so that it is ferromagnetically aligned with that of the recording layer 410 .
- FIG. 4E illustrates the application of a current to write a “0”.
- the current is directed from the top to the bottom of the MTJ stack (i.e. in the direction from the MTJ to the transistor) in order to write a “0” (i.e. the low resistance state, wherein the recording layer 410 and the reference layer 430 have aligned polarities).
- the current will set the recording layer 410 to a magnetization (indicated by the right pointing arrow in the recording layer 410 ) that is aligned with that of the reference layer 430 .
- the magnetic orientation of the recording layer 410 will affect the first ferromagnetic layer 442 of the stabilizing structure 440 because of the exchange coupling of the recording layer 410 and the stabilizing structure 440 .
- the embodiment in FIG. 4E is antiferromagnetically coupled so that the first ferromagnetic layer 442 will either remain antiferromagnetically coupled with the recording layer 410 or will switch its magnetization direction so that it becomes antiferromagnetically coupled with the recording layer 410 .
- the first ferromagnetic layer 442 had its magnetization direction switched (or was already) so that it is opposite to that of the recording layer 410 .
- An embodiment that is ferromagnetically coupled would switch the first ferromagnetic layer so that its magnetization direction is aligned with the magnetization direction of the recording layer.
- Such an embodiment of a non volatile memory cell can have the exchange coupling (whether ferromagnetic or antiferromagnetic) between the recording layer and the SAF structure that is mediate, or generally in the range of from about 50 to 500 Oe (which is much less than half of the demagnetizing field of about 5000 Oe). Such an embodiment will not have a significant effect on the switching current.
- the saturation magnetization of the recording layer is relatively low so that a reduction in switching current can be seen.
- a relatively low saturation magnetization is generally one that is from about 400 emu/cc to about 1300 emu/cc.
- FIG. 5A Another embodiment of a stabilizing structure 540 is depicted in FIG. 5A .
- This embodiment of a stabilizing structure 540 includes a SAF structure 542 .
- the SAF structure 542 generally includes two or more ferromagnetic layers (first ferromagnetic layer 541 and second ferromagnetic layer 545 ) separated by a nonmagnetic layer 543 (or more than one nonmagnetic layer in the case of more than two ferromagnetic layers).
- the ferromagnetic layers 541 and 545 are antiferromagnetically coupled through the nonmagnetic layer 543 .
- This embodiment of a stabilizing structure 540 also includes a tunnel barrier spacer layer 547 disposed between the SAF structure 542 and an upper reference layer 549 .
- the layers of the SAF structure 542 can include similar materials and have similar properties to those discussed above with respect to the stabilizing structure 440 in FIG. 4A .
- the tunnel barrier spacer layer 547 is generally a material that transmits a spin polarization across it from the upper reference layer 549 to the SAF structure 542 (or vice versa).
- the tunnel barrier spacer layer 547 can be a material that transmits a high spin polarization across it from the upper reference layer 549 to the SAF structure 542 (or vice versa).
- Such materials include interfaces between conventional ferromagnets (such as Co, Fe, CoFeB, and their alloys) and insulators such as magnesium oxide (MgO), magnesium nitride (Mg x N y ), and magnesium oxynitride. Any other materials or combination of materials having a relatively high spin polarization may also be used in the tunnel barrier spacer layer 547 .
- the upper reference layer 549 is generally a layer whose magnetization orientation is or can be pinned to a particular orientation.
- Materials for the upper reference layer 549 can include, but are not limited to ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys.
- the upper reference layer 549 can be pinned to a particular orientation as is known to those of skill in the art, including the use of exchange bias with an antiferromagnetically ordered material such as PtMn, IrMn and others. In such embodiments, the upper reference layer 549 can therefore include more than one layer.
- FIG. 5B depicts a stabilizing structure 540 as exemplified with respect to FIG. 5A in combination with a MTJ stack 500 to form an embodiment of a non volatile memory cell.
- This exemplary non volatile memory cell includes a MTJ stack 500 , an exchange coupling spacer layer 550 , and a stabilizing structure 540 .
- the MTJ stack 500 is exchange coupled to the SAF structure 542 of the stabilizing structure 540 through the exchange coupling spacer layer 550 .
- the exchange coupling of the SAF structure 542 to the recording layer 510 of the MTJ stack 500 can be either ferromagnetic or antiferromagnetic.
- FIG. 5C depicts the non volatile memory cell after application of a current (J in FIG. 5C ) that is sufficient to write to the MTJ stack.
- the current is directed from the bottom of the MTJ stack to the top of the MTJ stack (i.e. in the direction from the transistor to the MTJ) in order to write a “1” (i.e. the high resistance state, wherein the recording layer 510 and the reference layer 530 have opposite polarities).
- the current will set the recording layer 510 to a magnetization (indicated by the left pointing arrow in the recording layer 510 ) that is opposite to that of the reference layer 530 .
- the magnetic orientation of the recording layer 510 will affect the first ferromagnetic layer 541 of the stabilizing structure 540 because of the exchange coupling (in this case antiferromagnetically coupled) of the recording layer 510 and the stabilizing structure 540 .
- the first ferromagnetic layer 541 will then affect the second ferromagnetic layer 545 because of its coupling so that the second ferromagnetic layer 545 is changed (if the first ferromagnetic layer 541 was changed) to be anti-parallel to the first ferromagnetic layer 541 .
- the timing of the switching of the recording layer 510 , the first ferromagnetic layer 541 , and the second ferromagnetic layer 545 are not necessarily sequential, and may indeed occur at substantially the same time.
- the non volatile memory cell depicted in FIG. 5D illustrates the effect of writing a “1” to a non volatile memory cell that contains a stabilizing structure that is ferromagnetically coupled to the recording layer.
- the recording layer 510 will affect the first ferromagnetic layer 541 of the stabilizing structure 540 because of the ferromagnetic exchange coupling of the recording layer 510 and the stabilizing structure 540 .
- the first ferromagnetic layer 541 Upon application of the current (from the bottom to the top of the MTJ stack), the first ferromagnetic layer 541 will either remain ferromagnetically coupled with the recording layer 510 or will switch its magnetization direction so that it becomes ferromagnetically coupled with the recording layer 510 .
- FIG. 5D illustrates the effect of writing a “1” to a non volatile memory cell that contains a stabilizing structure that is ferromagnetically coupled to the recording layer.
- the first ferromagnetic layer 541 had its magnetization direction switched (or was already) so that it is aligned with that of the recording layer 510 .
- the second ferromagnetic layer 545 will then switch to be antiferromagnetically coupled with the first ferromagnetic layer 541 .
- Switching the non volatile memory cells depicted in FIGS. 5C and 5D to “0” can be accomplished by directing a current in the opposite direction (not depicted herein). It should be noted that in both the embodiments depicted in FIG. 5C and FIG. 5D (as well as that not depicted—switching the cells to “0”), the upper reference layer 549 does not switch because it is pinned in a single direction.
- the magnetization direction of the upper reference layer 549 can be the same or different than the magnetization of the reference layer 530 of the MTJ stack.
- Methods of reading a non volatile memory cell can generally include directing a current across the non volatile memory cell (in either direction) and then measuring a voltage, which is indicative of the resistance of the non volatile memory cell.
- the resistance states (in embodiments two, a low resistance state and a high resistance state) of the non volatile memory cell can be given data states (in embodiments the low resistance state is given a “0” and the high resistance state is given a “1”).
- the upper reference layer 549 is pinned, it (as well as the reference layer 530 of the MTJ stack) can be used to read the resistance state of the non volatile memory cell.
- the magnetic orientation of the upper reference layer 549 , and whether the SAF structure is ferromagnetically or antiferromagnetically coupled to the MTJ stack will dictate whether or not the resistance state (either high if the upper reference layer 549 is parallel to the second ferromagnetic layer 545 of the SAF structure; or low if the upper reference layer 549 is anti-parallel to the second ferromagnetic layer 545 of the SAF structure) of this type of read is the same or the opposite to that of the resistance state of the MTJ stack.
- the resistance state was read using the reference layer 530 of the MTJ stack, it would show a high resistance state (because of the opposite alignment of the reference layer 530 and the recording layer 510 ), which is generally given a value of “1”. If this same non volatile memory cell was read using the upper reference layer 549 of the stabilizing structure, it would also show a high resistance state (because of the opposite alignment of the upper reference layer 549 and the second ferromagnetic layer 545 of the SAF structure).
- the particular configuration of the non volatile memory cell (upper reference layer 549 and reference layer 530 of the MTJ stack having the same pinned direction; and the SAF structure and the recording layer 510 being antiferromagnetically coupled) provides two reading schemes where the resistance states are the same regardless of which way the cell is read.
- the configuration of the non volatile memory cell depicted in FIG. 5D (upper reference layer 549 and reference layer 530 of the MTJ stack having the same pinned direction; and the SAF structure and the recording layer 510 being ferromagnetically coupled) will provide different resistance states depending on which way the cell is read from. Such “opposite reading configurations” can be easily considered and compensated for.
- Embodiments that utilize an upper reference layer 549 and a tunnel barrier spacer layer 547 can enhance the output signal when reading.
- the additional tunnel barrier within the overall structure can serve to increase the signal because of the additional spin polarization of the current.
- the tunnel junction in the MTJ stack can be designed to reduce the switching current for writing, and the tunnel junction in the stabilizing structure can be designed to increase the current based on the resistance for reading. Therefore, with two barrier layers, the non volatile memory cell can be designed to both decrease the switching current and increase the reading signal.
- such a design can further reduce the switching current because of the dual spin-filter effect in embodiments where the coupling between the recording layer and the SAF structure is ferromagnetic, and the upper reference layer and the reference layer within the MTJ stack are parallel.
- the signal may be reduced because the magnetoresistances are opposite and will therefore cancel; in such embodiments, it may be advantageous to have the magnetoresistance and the resistance area (RA) of the MTJ stack smaller than that of the upper stack (the upper reference layer 549 , tunnel barrier spacer layer 547 , and second ferromagnetic layer 545 ).
- FIGS. 6A and 6B show how the magnetoresistance (MR) affects the thermal stability (H) in Oersted for an intermediately coupled recording layer and SAF structure ( FIG. 6A ) and for a strongly coupled recording layer and SAF structure ( FIG. 6B ).
- FIGS. 6C and 6D show how the magnetoresistance (MR) affects the switching current (J) for an intermediately coupled recording layer and SAF structure ( FIG. 6C ) and for a strongly coupled recording layer and SAF structure ( FIG. 6D ).
- the SAF becomes unbalanced, leading to lower thermal stability and higher switching current densities.
- both higher thermal stability and lower switching current densities are achieved.
- FIGS. 7A and 7B show resistance versus current ( FIG. 7A ) and resistance versus coercivity ( FIG. 7B ) curves for a STRAM cell having a 17 Angstrom (A) thick CoFeB recording layer. As seen from FIGS. 7A and 7B , the cell will have a relatively small switching current, but is not very thermally stable because of the super-paramagnetic nature.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
Abstract
An apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer.
Description
- This application is a continuation application of U.S. Ser. No. 12/502,213 filed Jul. 13, 2009 and which claims priority to U.S. Provisional Application No. 61/117660 entitled “ST RAM WITH EXCHANGE COUPLED SAF STABLE LAYER” filed on Nov. 25, 2008, the disclosures of which are incorporated herein by reference.
- New types of memory have demonstrated significant potential to compete with commonly utilized types of memory. For example, non-volatile spin-transfer torque random access memory (referred to herein as “STRAM”) and resistive random access memory (referred to herein as “RRAM”) are both considered good candidates for the next generation of memory.
- In order to reverse a STRAM cell, the spin torque from the writing current has to overcome the in-plane anisotropy (which is equal to 2 πMs, where Ms is the saturation magnetization). The in-plane anisotropic field is about 5000 Oersted (Oe) for a nickel iron (NiFe) layer. The thermal stability and retention characteristics of such a cell is provided by the uni-axial anisotropic field, which is only around 500 Oe. A memory cell that reduces the in-plane anisotropic field, thereby affording a cell that is easier to switch, but increases the uni-axial anisotropic field, thereby affording a cell that is more thermally stable and retains the state written to it.
- A apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer.
- A non volatile memory cell including a spin torque transfer random access memory (STRAM) structure that includes a reference layer; a tunnel barrier; and a recording layer, wherein the tunnel barrier is between the reference layer and the recording layer; an exchange coupling spacer layer; and a stabilizing structure, wherein the exchange coupling spacer layer is between the STRAM structure and the stabilizing structure and exchange couples the recording layer of the STRAM structure to the stabilizing structure.
- A method of determining the state of a non volatile memory cell including the steps of: providing a non volatile memory cell, the non volatile memory cell including a spin torque transfer random access memory (STRAM) structure; an exchange coupling spacer layer; and a stabilizing structure that includes a synthetic antiferromagnetic (SAF) structure that includes a first ferromagnetic layer, a nonmagnetic spacer layer and a second ferromagnetic layer, wherein the nonmagnetic spacer layer is between the first ferromagnetic layer and the second ferromagnetic layer; and an upper reference layer, wherein the upper reference layer is proximate to the second ferromagnetic layer, directing a current across the non volatile memory cell, wherein the current is directed from the stabilizing structure to the STRAM structure; measuring a voltage, wherein the voltage is dependent on the magnetic orientation of the upper reference layer with respect to the second ferromagnetic layer of the SAF structure and the orientation of the upper reference layer with respect to the second ferromagnetic layer can be changed to reflect one of the two states of the non volatile memory cell.
- These and various other features and advantages will be apparent from a reading of the following detailed description.
- The disclosure may be more completely understood in consideration of the following detailed description of various embodiments of the disclosure in connection with the accompanying drawings, in which:
-
FIGS. 1A and 1B are schematic diagrams of non volatile spin-transfer torque random access memory (STRAM) structures, andFIG. 1C is a schematic diagram of a STRAM cell within a system for utilizing the STRAM cell as memory; -
FIGS. 2A , 2B, and 2C are a schematic diagram defining the relevant dimensions of a STRAM structures (FIG. 2A ), a graph showing how the width and height affect the effective size of the STRAM structure (FIG. 2B ), and a graph showing how the driving current is effected by the effective size (FIG. 2C ); -
FIG. 3 is a schematic diagram of a STRAM cell that includes an embodiment of a stabilizing structure; -
FIGS. 4A through 4E are schematic diagrams of embodiments of a stabilizing structure (FIG. 4A ), a STRAM cell including such a stabilizing structure (FIG. 4B ), the STRAM cell ofFIG. 4B with the STRAM structure antiferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction (FIG. 4C ), the STRAM cell ofFIG. 4B with the STRAM structure ferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction (FIG. 4D ), and the STRAM cell ofFIG. 4B with the STRAM structure antiferromagnetically coupled to the stabilizing structure after a second current has been passed through it in a first direction (FIG. 4E ); -
FIGS. 5A through 5D are schematic diagrams of embodiments of a stabilizing structure (FIG. 5A ), a STRAM cell including such a stabilizing structure (FIG. 5B ), the STRAM cell ofFIG. 5B with the STRAM structure antiferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction (FIG. 5C ), and the STRAM cell ofFIG. 5B with the STRAM structure ferromagnetically coupled to the stabilizing structure after a first current has been passed through it in a first direction (FIG. 5D ); -
FIGS. 6A through 6D are graphs showing the magnetoresistance (Mr) versus coercivity (H) for a strongly coupled STRAM stack and stabilizing structure (FIG. 6A ) and an intermediately coupled STRAM stack and stabilizing structure (FIG. 6B ), the magnetoresistance (also referred to as “MR”) (Mr) versus switching current (I) for a strongly coupled STRAM stack and stabilizing structure (FIG. 6C ) and an intermediately coupled STRAM stack and stabilizing structure (FIG. 6D ); and -
FIGS. 7A and 7B are graphs showing the magnetoresistance versus coercivity (FIG. 7A ) and magnetoresistance versus switching current (FIG. 7B ) of thin recording layers. - The figures are not necessarily to scale. Like numbers used in the figures refer to like components. However, it will be understood that the use of a number to refer to a component in a given figure is not intended to limit the component in another figure labeled with the same number.
- In the following description, reference is made to the accompanying set of drawings that form a part hereof and in which are shown by way of illustration several specific embodiments. It is to be understood that other embodiments are contemplated and may be made without departing from the scope or spirit of the present disclosure. The following detailed description, therefore, is not to be taken in a limiting sense.
- Unless otherwise indicated, all numbers expressing feature sizes, amounts, and physical properties used in the specification and claims are to be understood as being modified in all instances by the term “about.” Accordingly, unless indicated to the contrary, the numerical parameters set forth in the foregoing specification and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by those skilled in the art utilizing the teachings disclosed herein.
- The recitation of numerical ranges by endpoints includes all numbers subsumed within that range (e.g. 1 to 5 includes 1, 1.5, 2, 2.75, 3, 3.80, 4, and 5) and any range within that range.
- As used in this specification and the appended claims, the singular forms “a”, “an”, and “the” encompass embodiments having plural referents, unless the content clearly dictates otherwise. As used in this specification and the appended claims, the term “or” is generally employed in its sense including “and/or” unless the content clearly dictates otherwise.
- Non volatile memory cells as disclosed herein include stabilizing structures. The stabilizing structures generally function to increase the thermal stability or other characteristics of the non volatile memory cells while still allowing the non volatile memory cells to have an aspect ratio of close to about 1 (i.e. substantially circular instead of elliptical). The stabilizing structure can utilize different methods and materials to accomplish this improvement.
- A non volatile memory cell utilized herein can include many different types of memory. Exemplary types of memory that can be utilized in devices disclosed herein include, but are not limited to non volatile memory such as, resistive sense memory (RSM). RSM is memory that has changeable resistance that affords data storage using different resistance states of the RSM. Exemplary types of RSM include, but are not limited to, magnetoresistive RAM (MRAM); resistive RAM (RRAM); and spin torque transfer RAM, which is also referred to as STRAM.
- In embodiments, the RSM can include STRAM. STRAM includes a MTJ (magnetic tunnel junction), which generally includes two magnetic electrode layers separated by a thin insulating layer, which is also known as a tunnel barrier. An embodiment of a MTJ is depicted in
FIG. 1A . TheMTJ 100 inFIG. 1A includes a firstmagnetic layer 130,which can also be referred to as a pinned layer or reference layer, and a secondmagnetic layer 110, which can also be referred to as a free layer or a recording layer. Thereference layer 130 and therecording layer 110 are separated by an insulatinglayer 120.FIG. 1B depicts aMTJ 100 in contact with afirst electrode layer 140 and asecond electrode layer 151. Thefirst electrode layer 140 and thesecond electrode layer 151 electrically connect thereference layer 130 and therecording layer 110 respectively to a control circuit (not shown) providing read and write currents through the magnetic layers. The relative orientation of the magnetization vectors of thereference layer 130 and therecording layer 110 can be determined by the resistance across theMTJ 100; and the resistance across theMTJ 100 can be determined by the relative orientation of the magnetization vectors of thereference layer 130 and therecording layer 110. - The
reference layer 130 and therecording layer 110 are generally made of ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys. Pinning of thereference layer 130 may be achieved through, e.g., the use of exchange bias with an antiferromagnetically ordered material such as PtMn, IrMn and others. The insulatinglayer 120 is generally made of an insulating material such as aluminum oxide (Al2O3) or magnesium oxide (MgO). - In embodiments, the
recording layer 110 can be a relatively thin recording layer. In embodiments, therecording layer 110 can be from about 1 nm to about 5 nm thick. In embodiments, therecording layer 110 can be from about 1 nm to about 3 nm thick. In embodiments, therecording layer 110 can have a relatively high spin polarization. In embodiments, therecording layer 110 can have a spin polarization that is equal to or greater than about 0.5. In embodiments, therecording layer 110 can generally be made of ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys. -
FIG. 1C illustrates a memory device that includes amemory element 113 that can include amemory cell 111 and itscorresponding transistor 115.Single memory elements 113 can be configured within larger systems. Thememory element 113 can be operatively coupled between abit line 121 and asource line 125 within a larger system. The read/write circuitry 135 controls theparticular bit line 121 andsource line 125 that current passes through, thereby controlling the particular memory cell that is read from or written to. The read/write circuitry 135 can also control the voltage applied across thebit line 121 ormemory element 113 from the source line 125 (or vice versa). The direction which current flows across amemory cell 111 is determined by the voltage differential across thebit line 121 and thesource line 125. - A
particular memory cell 111 can be read from by activating itscorresponding transistor 115, which when turned on, allows current to flow from thebit line 121 through thememory cell 111 to the source line 125 (or vice versa). Thetransistor 115 is activated and deactivated through theword line 131. Theword line 131 is operatively coupled to and supplies a voltage to thetransistor 115 to turn the transistor on so that current can flow to thememory cell 111. A voltage, dependent on the resistance of thememory cell 111 is then detected by thesense amplifier 141 from the source line 125 (for example). The voltage differential between thebit line 121 and the source line 125 (or vice versa), which is indicative of the resistance of thememory cell 111 is then compared to areference voltage 145 and amplified by thesense amplifier 141 to determine whether thememory cell 111 contains a “1” or a “0”. - In order to affect (either read from or write to) a memory cell, a current is passed through the STRAM stack perpendicular to the stack. By changing the direction of the current, the direction of the recording layer can be set either parallel or anti-parallel to the reference layer. In a STRAM cell with an in-plane recording layer the spin torque needs to overcome the in-plane anisotropy of the recording layer in order to affect the magnetization of the recording layer. The current necessary to do this (Jc0) can be seen in Equation I below.
-
- In Equation I, η is the spin polarization efficiency of the current, 2 e/h is a constant, α is the damping constant, HK and H are the anisotropy field and external field respectively, and Ms is the saturation magnetization of the recording layer. Generally, the
term 2 πM reflects the in-plane anisotropy and the term Hk reflects the anisotropy. For a typical recording layer (for example, NiFe or CoFeB) the in-plane anisotropy (2 πM) is much larger than the anisotropy field (Hk). The switching current in such a STRAM cell is mostly dominated by the in-plane anisotropy (2 πM) while the thermal stability and retention are mostly dominated by (Hk). Therefore, the large 2 πM term makes the switching current high but does not substantially improve the thermal stability and retention. - Since the intrinsic anisotropy of NiFe and CoFeB (exemplary STRAM materials) is low, STRAM cells are commonly manufactured to have an elliptically shaped recording layer in order to induce sufficient thermal stability, by increasing Hk.
FIG. 2A depicts an elliptically shapedrecording layer 110 of a STRAM cell. Therecording layer 110 has a width (also referred to as “w”) and a height (also referred to as “h”).FIG. 2B shows width and height requirements of thermally stable cells. The data inFIG. 2B assumes that the saturation magnetization (Ms) is about 800 emu/cc (typical for NiFe) and the thickness of the recording layer is 3 nm. The effective size is the square root of (width*height).FIG. 2C shows the dependence of the switching current (J(A/m2))on the effective cell size (nm) for cells having different saturation magnetization (Ms) values - From a review of
FIGS. 2B and 2C , it can be seen that for smaller STRAM cell sizes, larger aspect ratios are generally utilized to maintain thermal stability. For STRAM cells having smaller saturation magnetization (Ms), smaller critical switching currents can be achieved. However it is very difficult to meet the requirement of both sufficient thermal stability and low switching currents with a single recording layer with low Ms. - Non volatile memory cells disclosed herein provide increased thermal stability while maintaining small cell sizes and more importantly small aspect ratios. Non volatile memory cells disclosed herein generally include a stabilizing structure that is exchange coupled with the recording layer of the MTJ stack. The materials of the stabilizing structure afford increased thermal stability of the MTJ stack even at aspect ratios approaching 1.
-
FIG. 3 illustrates embodiments of non volatile memory cells disclosed herein. Generally, non volatile memory cells disclosed herein include aMTJ stack 300, an exchangecoupling spacer layer 350, and a stabilizingstructure 340. The exchangecoupling spacer layer 350 is generally disposed between theMTJ stack 300 and the stabilizingstructure 340. TheMTJ stack 300 includes layers such as those discussed above, areference layer 330, atunnel barrier structure 320, and arecording layer 310. The properties, functions and materials discussed above are applicable herein. Specifically, therecording layer 310 of theMTJ stack 300 generally has a relatively low saturation magnetization and can create a relatively large spin polarization in the electrical current used to switch the MTJ. - [33] The exchange
coupling spacer layer 350 generally functions to magnetically couple (either ferromagnetically or antiferromagnetically) therecording layer 310 and the stabilizingstructure 340. The exchangecoupling spacer layer 350 can be made of various materials, including but not limited to, conductive metals such as copper (Cu), tantalum (Ta), ruthenium (Ru), palladium (Pd), platinum (Pt), chromium (Cr), gold (Au), and the like; thin layers of oxide materials such as magnesium oxide (MgO), alumina (AlO), titanium oxide (TiO), tantalum oxide (TaO), and the like; or combinations thereof. Generally, the exchangecoupling spacer layer 350 can be about 5 nanometers (nm) thick if it is made of a conductive metal and about 1 nm thick if made of an oxide material. - Generally, the magnitude of the exchange coupling between the
recording layer 310 and the stabilizingstructure 340 can be at least partially controlled by the materials and thickness of the exchangecoupling spacer layer 350. In embodiments, the coupling field between therecording layer 310 and the stabilizingstructure 340 will not significantly affect the critical current density for switching. In embodiments, the coupling field can reverse the stabilizing structure with or without the aid of the static field from therecording layer 310. In embodiments, the magnitude of the coupling between therecording layer 310 and the stabilizingstructure 340 can be in the range of about 50 to about 500 Oe. - Generally, exchange coupling can be considered to be strong exchange coupling if the exchange field (Hex) is equal to or greater than about 1000 Oe. An exchange coupling can be considered to be an intermediate exchange coupling if the exchange field (Hex) is from about 100 Oe to about 1000 Oe.
- Embodiments can include a
recording layer 310 that creates a relatively large spin polarization in the electrical current and also has a relatively low net magnetic moment (Ms*t). Therecording layer 310 is exchange coupled (either ferromagnetically or antiferromagnetically) to the stabilizinglayer 340. The exchange coupling can be intermediate, in an embodiment from about 50 to 500 Oe. Therefore, the switching current will not be detrimentally affected. The exchange coupling can serve to increase the total thermal barrier (KuV/kT). In embodiments, the thermal barrier factor can be increased from about 20 to 30 (without the stabilizing layer) to about 40 or more (with the stabilizing layer). In embodiments where the thermal barrier factor is increased, for example to 40 or more, the recording layer will be more stable (i.e., not super-paramagnetic) at room temperature. Because the net moment of the recording layer is small, a substantial reduction in switching current can be achieved. - The stabilizing
structure 340 generally has a high thermal stability, even when formed in a circular shape (e.g. aspect ratio equals 1). The stabilizingstructure 340 is generally exchange coupled to therecording layer 310. The stabilizingstructure 340 can include a single layer or more than one layer. In embodiments, the stabilizing layer can include ferromagnetic layers having acceptable anisotropy. In embodiments, an acceptable anisotropy (Hk) for the stabilizing layer can be greater than or equal to about 300 Oe. In embodiments, the stabilizing structure 740 can generally be made of ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys, including but not limited to CoCr, CoPt, FePt, CoCrPt, and the like. In embodiments, the stabilizing structure can have a thickness from about 2 nm to about 20 nm. - In embodiments, the stabilizing
structure 340 can include synthetic antiferromagnetic (SAF) materials or a SAF structure. SAF structures generally include two or more ferromagnetic layers separated by a nonmagnetic layer (or more than one nonmagnetic layer in the case of more than two ferromagnetic layers). The ferromagnetic layers are antiferromagnetically coupled, which provides the SAF structures with a relatively high thermal stability. SAF structures also generally have large intrinsic anisotropy and do not require any shape induced anisotropy. -
FIG. 4A shows an example of a stabilizingstructure 440 that includes a SAF structure. The stabilizingstructure 440 includes a firstferromagnetic layer 442, anonmagnetic spacer layer 444 and a secondferromagnetic layer 446. As seen by the arrows on the firstferromagnetic layer 442 and the secondferromagnetic layer 446, the two layers are antiferromagnetically coupled. The magnetic orientation of the SAF structure (i.e. the three layer structure seen inFIG. 4A ) can be affected by an external magnetic field. For example, a magnetic field can affect the firstferromagnetic layer 442 thereby reorienting the magnetic field to the left (the opposite of that seen inFIG. 4A ), this will then switch the magnetic orientation of the secondferromagnetic layer 446 so that it is oriented to the right (the opposite of that seen inFIG. 4A ). The switch of the firstferromagnetic layer 442 can happen before, simultaneous with, or substantially simultaneously with the switch of the secondferromagnetic layer 446. - The
SAF structure 440 can be made of any materials that will exhibit the above discussed characteristics. Exemplary materials for the first and secondferromagnetic layers ferromagnetic layers nonmagnetic spacer layer 444 include, but are not limited to, ruthenium (Ru), copper (Cu), rhodium (Rh), iridium (Ir), palladium (Pd), chromium (Cr), and the like, or combinations thereof. In embodiments, thenonmagnetic spacer layer 444 can include Ru or Cu. Thenonmagnetic spacer layer 444 can generally have a thickness from about 0.3 nm to about 3 nm. -
FIG. 4B shows a non volatile memory cell that includes a stabilizingstructure 440 as illustrated in the embodiment ofFIG. 4A . The exemplary non volatile memory cell includes aMTJ stack 400 having areference layer 430, atunnel barrier structure 420 and arecording layer 410. TheMTJ stack 400 is separated from the stabilizingstructure 440 by an exchangecoupling spacer layer 450. This embodiment of a stabilizingstructure 440 includes a firstferromagnetic layer 442 and a secondferromagnetic layer 446 separated by anonmagnetic spacer layer 444. Exemplary characteristics and materials for the various layers of the non volatile memory cell can be as discussed above. -
FIG. 4C depicts the non volatile memory cell after application of a current (J inFIG. 4C ) that is sufficient to write to the MTJ stack. The current is directed from the bottom of the MTJ stack to the top of the MTJ stack (i.e. in the direction from the transistor to the MTJ) in order to write a “1” (i.e. the high resistance state, wherein therecording layer 410 and thereference layer 430 have opposite polarities). As seen inFIG. 4C , the current will set therecording layer 410 to a magnetization (indicated by the left pointing arrow in the recording layer 410) that is opposite to that of the reference layer 430 (which is pinned). The magnetic orientation of therecording layer 410 will affect the firstferromagnetic layer 442 of the stabilizingstructure 440 because of the exchange coupling of therecording layer 410 and the stabilizingstructure 440. The firstferromagnetic layer 442 will then affect the secondferromagnetic layer 446 because of its coupling so that the secondferromagnetic layer 446 is changed (if the firstferromagnetic layer 442 was changed) to be anti-parallel to the firstferromagnetic layer 442. The timing of the switching of therecording layer 410, the firstferromagnetic layer 442, and the secondferromagnetic layer 446 are not necessarily sequential, and may indeed occur at substantially the same time. - Upon application of the current, the first
ferromagnetic layer 442 will either remain antiferromagnetically coupled with therecording layer 410 or will switch its magnetization direction so that it becomes antiferromagnetically coupled with therecording layer 410. As seen inFIG. 4C , the firstferromagnetic layer 442 had its magnetization direction switched (or was already) so that it is opposite to that of therecording layer 410. The stabilizingstructure 440 in the non volatile memory cell depicted inFIG. 4C is antiferromagnetically coupled with therecording layer 410. - It will also be understood that the stabilizing
structure 440 could be ferromagnetically coupled to therecording layer 410. The non volatile memory cell depicted inFIG. 4D illustrates the effect of writing a “1” to a non volatile memory cell that contains a stabilizing structure that is ferromagnetically coupled to the recording layer. As seen inFIG. 4D , therecording layer 410 will affect the firstferromagnetic layer 442 of the stabilizingstructure 440 because of the exchange coupling of therecording layer 410 and the stabilizingstructure 440. Upon application of the current (from the bottom to the top of the MTJ stack), theferromagnetic layer 442 will either remain ferromagnetically coupled with therecording layer 410 or will switch its magnetization direction so that it becomes ferromagnetically coupled with therecording layer 410. As seen inFIG. 4D , the firstferromagnetic layer 442 had its magnetization direction switched (or was already) so that it is ferromagnetically aligned with that of therecording layer 410. -
FIG. 4E illustrates the application of a current to write a “0”. The current is directed from the top to the bottom of the MTJ stack (i.e. in the direction from the MTJ to the transistor) in order to write a “0” (i.e. the low resistance state, wherein therecording layer 410 and thereference layer 430 have aligned polarities). As seen inFIG. 4E , the current will set therecording layer 410 to a magnetization (indicated by the right pointing arrow in the recording layer 410) that is aligned with that of thereference layer 430. The magnetic orientation of therecording layer 410 will affect the firstferromagnetic layer 442 of the stabilizingstructure 440 because of the exchange coupling of therecording layer 410 and the stabilizingstructure 440. The embodiment inFIG. 4E is antiferromagnetically coupled so that the firstferromagnetic layer 442 will either remain antiferromagnetically coupled with therecording layer 410 or will switch its magnetization direction so that it becomes antiferromagnetically coupled with therecording layer 410. As seen inFIG. 4E , the firstferromagnetic layer 442 had its magnetization direction switched (or was already) so that it is opposite to that of therecording layer 410. An embodiment that is ferromagnetically coupled (not illustrated herein) would switch the first ferromagnetic layer so that its magnetization direction is aligned with the magnetization direction of the recording layer. - Such an embodiment of a non volatile memory cell can have the exchange coupling (whether ferromagnetic or antiferromagnetic) between the recording layer and the SAF structure that is mediate, or generally in the range of from about 50 to 500 Oe (which is much less than half of the demagnetizing field of about 5000 Oe). Such an embodiment will not have a significant effect on the switching current. In embodiments, the saturation magnetization of the recording layer is relatively low so that a reduction in switching current can be seen. In embodiments, a relatively low saturation magnetization is generally one that is from about 400 emu/cc to about 1300 emu/cc.
- Another embodiment of a stabilizing
structure 540 is depicted inFIG. 5A . This embodiment of a stabilizingstructure 540 includes aSAF structure 542. TheSAF structure 542 generally includes two or more ferromagnetic layers (firstferromagnetic layer 541 and second ferromagnetic layer 545) separated by a nonmagnetic layer 543 (or more than one nonmagnetic layer in the case of more than two ferromagnetic layers). Theferromagnetic layers nonmagnetic layer 543. This embodiment of a stabilizingstructure 540 also includes a tunnelbarrier spacer layer 547 disposed between theSAF structure 542 and anupper reference layer 549. - The layers of the
SAF structure 542 can include similar materials and have similar properties to those discussed above with respect to the stabilizingstructure 440 inFIG. 4A . The tunnelbarrier spacer layer 547 is generally a material that transmits a spin polarization across it from theupper reference layer 549 to the SAF structure 542 (or vice versa). In embodiments, the tunnelbarrier spacer layer 547 can be a material that transmits a high spin polarization across it from theupper reference layer 549 to the SAF structure 542 (or vice versa). Examples of such materials include interfaces between conventional ferromagnets (such as Co, Fe, CoFeB, and their alloys) and insulators such as magnesium oxide (MgO), magnesium nitride (MgxNy), and magnesium oxynitride. Any other materials or combination of materials having a relatively high spin polarization may also be used in the tunnelbarrier spacer layer 547. - The
upper reference layer 549 is generally a layer whose magnetization orientation is or can be pinned to a particular orientation. Materials for theupper reference layer 549 can include, but are not limited to ferromagnetic alloys such as iron (Fe), cobalt (Co), and nickel (Ni) alloys. Theupper reference layer 549 can be pinned to a particular orientation as is known to those of skill in the art, including the use of exchange bias with an antiferromagnetically ordered material such as PtMn, IrMn and others. In such embodiments, theupper reference layer 549 can therefore include more than one layer. -
FIG. 5B depicts a stabilizingstructure 540 as exemplified with respect toFIG. 5A in combination with aMTJ stack 500 to form an embodiment of a non volatile memory cell. This exemplary non volatile memory cell includes aMTJ stack 500, an exchangecoupling spacer layer 550, and a stabilizingstructure 540. TheMTJ stack 500 is exchange coupled to theSAF structure 542 of the stabilizingstructure 540 through the exchangecoupling spacer layer 550. The exchange coupling of theSAF structure 542 to therecording layer 510 of theMTJ stack 500 can be either ferromagnetic or antiferromagnetic. -
FIG. 5C depicts the non volatile memory cell after application of a current (J inFIG. 5C ) that is sufficient to write to the MTJ stack. In this embodiment, the current is directed from the bottom of the MTJ stack to the top of the MTJ stack (i.e. in the direction from the transistor to the MTJ) in order to write a “1” (i.e. the high resistance state, wherein therecording layer 510 and thereference layer 530 have opposite polarities). As seen inFIG. 5C , the current will set therecording layer 510 to a magnetization (indicated by the left pointing arrow in the recording layer 510) that is opposite to that of thereference layer 530. The magnetic orientation of therecording layer 510 will affect the firstferromagnetic layer 541 of the stabilizingstructure 540 because of the exchange coupling (in this case antiferromagnetically coupled) of therecording layer 510 and the stabilizingstructure 540. The firstferromagnetic layer 541 will then affect the secondferromagnetic layer 545 because of its coupling so that the secondferromagnetic layer 545 is changed (if the firstferromagnetic layer 541 was changed) to be anti-parallel to the firstferromagnetic layer 541. The timing of the switching of therecording layer 510, the firstferromagnetic layer 541, and the secondferromagnetic layer 545 are not necessarily sequential, and may indeed occur at substantially the same time. - The non volatile memory cell depicted in
FIG. 5D illustrates the effect of writing a “1” to a non volatile memory cell that contains a stabilizing structure that is ferromagnetically coupled to the recording layer. As seen inFIG. 5D , therecording layer 510 will affect the firstferromagnetic layer 541 of the stabilizingstructure 540 because of the ferromagnetic exchange coupling of therecording layer 510 and the stabilizingstructure 540. Upon application of the current (from the bottom to the top of the MTJ stack), the firstferromagnetic layer 541 will either remain ferromagnetically coupled with therecording layer 510 or will switch its magnetization direction so that it becomes ferromagnetically coupled with therecording layer 510. As seen inFIG. 5D , the firstferromagnetic layer 541 had its magnetization direction switched (or was already) so that it is aligned with that of therecording layer 510. The secondferromagnetic layer 545 will then switch to be antiferromagnetically coupled with the firstferromagnetic layer 541. - Switching the non volatile memory cells depicted in
FIGS. 5C and 5D to “0” can be accomplished by directing a current in the opposite direction (not depicted herein). It should be noted that in both the embodiments depicted inFIG. 5C andFIG. 5D (as well as that not depicted—switching the cells to “0”), theupper reference layer 549 does not switch because it is pinned in a single direction. The magnetization direction of theupper reference layer 549 can be the same or different than the magnetization of thereference layer 530 of the MTJ stack. - Methods of reading a non volatile memory cell, which can also be referred to as determining the resistance state of the non volatile memory cell can generally include directing a current across the non volatile memory cell (in either direction) and then measuring a voltage, which is indicative of the resistance of the non volatile memory cell. The resistance states (in embodiments two, a low resistance state and a high resistance state) of the non volatile memory cell can be given data states (in embodiments the low resistance state is given a “0” and the high resistance state is given a “1”).
- Because the
upper reference layer 549 is pinned, it (as well as thereference layer 530 of the MTJ stack) can be used to read the resistance state of the non volatile memory cell. The magnetic orientation of theupper reference layer 549, and whether the SAF structure is ferromagnetically or antiferromagnetically coupled to the MTJ stack will dictate whether or not the resistance state (either high if theupper reference layer 549 is parallel to the secondferromagnetic layer 545 of the SAF structure; or low if theupper reference layer 549 is anti-parallel to the secondferromagnetic layer 545 of the SAF structure) of this type of read is the same or the opposite to that of the resistance state of the MTJ stack. For example, as seen in the embodiment depicted inFIG. 5C , if the resistance state was read using thereference layer 530 of the MTJ stack, it would show a high resistance state (because of the opposite alignment of thereference layer 530 and the recording layer 510), which is generally given a value of “1”. If this same non volatile memory cell was read using theupper reference layer 549 of the stabilizing structure, it would also show a high resistance state (because of the opposite alignment of theupper reference layer 549 and the secondferromagnetic layer 545 of the SAF structure). Therefore, in this embodiment, the particular configuration of the non volatile memory cell (upper reference layer 549 andreference layer 530 of the MTJ stack having the same pinned direction; and the SAF structure and therecording layer 510 being antiferromagnetically coupled) provides two reading schemes where the resistance states are the same regardless of which way the cell is read. - For purposes of comparison, the configuration of the non volatile memory cell depicted in
FIG. 5D (upper reference layer 549 andreference layer 530 of the MTJ stack having the same pinned direction; and the SAF structure and therecording layer 510 being ferromagnetically coupled) will provide different resistance states depending on which way the cell is read from. Such “opposite reading configurations” can be easily considered and compensated for. - Embodiments that utilize an
upper reference layer 549 and a tunnelbarrier spacer layer 547 can enhance the output signal when reading. The additional tunnel barrier within the overall structure can serve to increase the signal because of the additional spin polarization of the current. In such an embodiment, the tunnel junction in the MTJ stack can be designed to reduce the switching current for writing, and the tunnel junction in the stabilizing structure can be designed to increase the current based on the resistance for reading. Therefore, with two barrier layers, the non volatile memory cell can be designed to both decrease the switching current and increase the reading signal. Furthermore, such a design can further reduce the switching current because of the dual spin-filter effect in embodiments where the coupling between the recording layer and the SAF structure is ferromagnetic, and the upper reference layer and the reference layer within the MTJ stack are parallel. In embodiments where the coupling between the recording layer and the SAF structure is antiferromagnetic, the signal may be reduced because the magnetoresistances are opposite and will therefore cancel; in such embodiments, it may be advantageous to have the magnetoresistance and the resistance area (RA) of the MTJ stack smaller than that of the upper stack (theupper reference layer 549, tunnelbarrier spacer layer 547, and second ferromagnetic layer 545). -
FIGS. 6A and 6B show how the magnetoresistance (MR) affects the thermal stability (H) in Oersted for an intermediately coupled recording layer and SAF structure (FIG. 6A ) and for a strongly coupled recording layer and SAF structure (FIG. 6B ).FIGS. 6C and 6D show how the magnetoresistance (MR) affects the switching current (J) for an intermediately coupled recording layer and SAF structure (FIG. 6C ) and for a strongly coupled recording layer and SAF structure (FIG. 6D ). In the strongly coupled pair, the SAF becomes unbalanced, leading to lower thermal stability and higher switching current densities. When the coupling is intermediate, both higher thermal stability and lower switching current densities are achieved. - One method of reducing the switching current of a MTJ stack is to reduce the thickness of the recording layer; however, thinner recording layers can create detrimental properties, including lower thermal energy barriers. If the thermal energy barrier (KuV/kT) is less than about 30, the recording layer can become super-paramagnetic at room temperature.
FIGS. 7A and 7B show resistance versus current (FIG. 7A ) and resistance versus coercivity (FIG. 7B ) curves for a STRAM cell having a 17 Angstrom (A) thick CoFeB recording layer. As seen fromFIGS. 7A and 7B , the cell will have a relatively small switching current, but is not very thermally stable because of the super-paramagnetic nature. - Thus, embodiments of NON VOLATILE MEMORY INCLUDING STABILIZING STRUCTURES disclosed. The implementations described above and other implementations are within the scope of the following claims. One skilled in the art will appreciate that the present disclosure can be practiced with embodiments other than those disclosed. The disclosed embodiments are presented for purposes of illustration and not limitation, and the present disclosure is limited only by the claims that follow.
Claims (20)
1. A non volatile memory cell comprising:
a magnetic tunnel junction (MTJ) stack comprising:
a reference layer;
a tunnel barrier; and
a recording layer having a thermal stability,
wherein the tunnel barrier is between the reference layer and the recording layer;
an exchange coupling spacer layer; and
a stabilizing structure,
wherein the exchange coupling spacer layer is between the STRAM structure and the stabilizing structure and exchange couples the recording layer of the STRAM structure to the stabilizing structure, thereby increasing the thermal stability of the recording layer relative to a recording layer not exchange coupled to a stabilizing structure.
2. The non volatile memory cell according to claim 1 , wherein the MTJ stack has an aspect ratio of about 1.
3. The non volatile memory cell according to claim 1 , wherein the total thermal barrier factor (KuV/kT) of the recording layer is about 40 or more.
4. The non volatile memory cell according to claim 3 , wherein the recording layer is more stable at room temperature than a recording layer not exchange coupled to a stabilizing structure.
5. The non volatile memory cell according to claim 1 , wherein the exchange coupling between the recording layer of the STRAM cell and the stabilizing structure has a strength from about 50 to about 500 Oe.
6. The non volatile memory cell according to claim 1 , wherein the exchange coupling spacer layer comprises copper, tantalum, ruthenium, magnesium oxide, or combinations thereof
7. The non volatile memory cell according to claim 1 , wherein the stabilizing structure comprises a synthetic antiferromagnetic (SAF) structure.
8. The non volatile memory cell according to claim 7 , wherein the SAF structure comprises a first ferromagnetic layer, a second ferromagnetic layer and a nonmagnetic spacer layer between the first ferromagnetic layer and the second ferromagnetic layer.
9. The non volatile memory cell according to claim 8 , wherein the first ferromagnetic layer of the SAF structure is antiferromagnetically coupled to the recording layer of the MTJ stack.
10. The non volatile memory cell according to claim 8 , wherein the first ferromagnetic layer of the SAF structure is ferromagnetically coupled to the recording layer of the MTJ stack.
11. The non volatile memory cell according to claim 1 , wherein the recording layer comprises a material having a saturation magnetization of about 400 emu/cc to about 1300 emu/cc.
12. The non volatile memory cell according to claim 1 , wherein the stabilizing structure further comprises an upper reference layer, wherein the upper reference layer is positioned opposite the MTJ stack.
13. The non volatile memory cell according to claim 12 further comprising a tunnel barrier spacer layer, wherein the tunnel barrier spacer layer is positioned between the SAF structure and the upper reference layer.
14. The non volatile memory cell according to claim 13 , wherein the tunnel barrier spacer layer comprises magnesium oxide, magnesium nitride, magnesium oxynitride, alumina, tantalum oxide, titanium oxide, or combinations thereof
15. The non volatile memory cell according to claim 12 wherein the upper reference layer and the reference layer of the MTJ stack have parallel magnetic orientations.
16. A non volatile memory cell comprising:
a magnetic tunnel junction (MTJ) stack comprising:
a reference layer;
a tunnel barrier; and
a recording layer having a thermal stability and comprising a material having a saturation magnetization of about 400 emu/cc to about 1300 emu/cc,
wherein the tunnel barrier is between the reference layer and the recording layer;
an exchange coupling spacer layer; and
a stabilizing structure,
wherein the exchange coupling spacer layer is between the STRAM structure and the stabilizing structure and exchange couples the recording layer of the STRAM structure to the stabilizing structure with a strength from about 50 to about 500 Oe, thereby increasing the thermal stability of the recording layer relative to a recording layer not exchange coupled to a stabilizing structure.
17. The non volatile memory cell according to claim 16 , wherein the MTJ stack has an aspect ratio of about 1.
18. The non volatile memory cell according to claim 16 , wherein the total thermal barrier factor (KuV/kT) of the recording layer is about 40 or more.
19. A non volatile memory cell comprising:
a magnetic tunnel junction (MTJ) stack comprising:
a reference layer;
a tunnel barrier; and
a recording layer having a thermal stability and comprising a material having a saturation magnetization of about 400 emu/cc to about 1300 emu/cc,
wherein the tunnel barrier is between the reference layer and the recording layer;
an exchange coupling spacer layer comprising copper, tantalum, ruthenium, magnesium oxide, or combinations thereof; and
a stabilizing structure comprising a synthetic antiferromagnetic (SAF) structure,
wherein the exchange coupling spacer layer is between the STRAM structure and the stabilizing structure and exchange couples the recording layer of the STRAM structure to the stabilizing structure with a strength from about 50 to about 500 Oe, thereby increasing the thermal stability of the recording layer relative to a recording layer not exchange coupled to a stabilizing structure.
20. The non volatile memory cell according to claim 19 , wherein the MTJ stack has an aspect ratio of about 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/568,409 US20120299135A1 (en) | 2008-11-25 | 2012-08-07 | Non volatile memory including stabilizing structures |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11766008P | 2008-11-25 | 2008-11-25 | |
US12/502,213 US8289756B2 (en) | 2008-11-25 | 2009-07-13 | Non volatile memory including stabilizing structures |
US13/568,409 US20120299135A1 (en) | 2008-11-25 | 2012-08-07 | Non volatile memory including stabilizing structures |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/502,213 Continuation US8289756B2 (en) | 2008-11-25 | 2009-07-13 | Non volatile memory including stabilizing structures |
Publications (1)
Publication Number | Publication Date |
---|---|
US20120299135A1 true US20120299135A1 (en) | 2012-11-29 |
Family
ID=42196105
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/502,213 Active 2030-06-22 US8289756B2 (en) | 2008-11-25 | 2009-07-13 | Non volatile memory including stabilizing structures |
US13/568,409 Abandoned US20120299135A1 (en) | 2008-11-25 | 2012-08-07 | Non volatile memory including stabilizing structures |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/502,213 Active 2030-06-22 US8289756B2 (en) | 2008-11-25 | 2009-07-13 | Non volatile memory including stabilizing structures |
Country Status (1)
Country | Link |
---|---|
US (2) | US8289756B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10325639B2 (en) | 2017-11-20 | 2019-06-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Initialization process for magnetic random access memory (MRAM) production |
US10522746B1 (en) | 2018-08-07 | 2019-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual magnetic tunnel junction devices for magnetic random access memory (MRAM) |
US10797225B2 (en) | 2018-09-18 | 2020-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual magnetic tunnel junction (DMTJ) stack design |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7880209B2 (en) * | 2008-10-09 | 2011-02-01 | Seagate Technology Llc | MRAM cells including coupled free ferromagnetic layers for stabilization |
US7829964B2 (en) * | 2008-10-31 | 2010-11-09 | Industrial Technology Research Institute | Magnetic memory element utilizing spin transfer switching |
JP2011233206A (en) * | 2010-04-28 | 2011-11-17 | Toshiba Corp | Shift register type memory device and data storage method |
US8921962B2 (en) * | 2011-04-19 | 2014-12-30 | Virginia Commonwealth University | Planar multiferroic/magnetostrictive nanostructures as memory elements, two-stage logic gates and four-state logic elements for information processing |
CN102747353A (en) * | 2011-04-22 | 2012-10-24 | 鸿富锦精密工业(深圳)有限公司 | Magnesium alloy casing and its manufacturing method |
EP2575135B1 (en) * | 2011-09-28 | 2015-08-05 | Crocus Technology S.A. | Magnetic random access memory (MRAM) cell and method for reading the MRAM cell using a self-referenced read operation |
EP2608208B1 (en) * | 2011-12-22 | 2015-02-11 | Crocus Technology S.A. | Self-referenced MRAM cell and method for writing the cell using a spin transfer torque write operation |
US9941469B2 (en) | 2015-10-06 | 2018-04-10 | International Business Machines Corporation | Double spin filter tunnel junction |
US9779812B1 (en) * | 2016-03-17 | 2017-10-03 | Toshiba Memory Corporation | Semiconductor memory device |
US11631465B2 (en) * | 2018-07-03 | 2023-04-18 | Samsung Electronics Co., Ltd. | Non-volatile memory device |
US10788547B2 (en) | 2019-01-17 | 2020-09-29 | Sandisk Technologies Llc | Voltage-controlled interlayer exchange coupling magnetoresistive memory device and method of operating thereof |
US11049538B2 (en) | 2019-01-17 | 2021-06-29 | Western Digital Technologies, Inc. | Voltage-controlled interlayer exchange coupling magnetoresistive memory device and method of operating thereof |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070096229A1 (en) * | 2005-10-28 | 2007-05-03 | Masatoshi Yoshikawa | Magnetoresistive element and magnetic memory device |
Family Cites Families (186)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6252797A (en) | 1985-08-30 | 1987-03-07 | Mitsubishi Electric Corp | Semiconductor memory device |
US5191223A (en) | 1991-07-03 | 1993-03-02 | International Business Machines Corporation | Device for selective magnetization and method |
KR0158485B1 (en) | 1995-03-31 | 1999-02-01 | 김광호 | Word line voltage boost circuit |
US5646419A (en) | 1995-04-07 | 1997-07-08 | California Institute Of Technology | n-type wide bandgap semiconductors grown on a p-type layer to form hole injection pn heterojunctions and methods of fabricating the same |
US5761115A (en) | 1996-05-30 | 1998-06-02 | Axon Technologies Corporation | Programmable metallization cell structure and method of making same |
US6602677B1 (en) | 1997-09-19 | 2003-08-05 | Promega Corporation | Thermostable luciferases and methods of production |
US5920446A (en) | 1998-01-06 | 1999-07-06 | International Business Machines Corporation | Ultra high density GMR sensor |
US6072718A (en) | 1998-02-10 | 2000-06-06 | International Business Machines Corporation | Magnetic memory devices having multiple magnetic tunnel junctions therein |
JP3672435B2 (en) | 1998-04-22 | 2005-07-20 | 富士通株式会社 | Nonvolatile memory device |
US6252796B1 (en) | 1998-08-14 | 2001-06-26 | U.S. Philips Corporation | Device comprising a first and a second ferromagnetic layer separated by a non-magnetic spacer layer |
US6178136B1 (en) | 1998-09-28 | 2001-01-23 | Texas Instruments Incorporated | Semiconductor memory device having Y-select gate voltage that varies according to memory cell access operation |
JP2000132961A (en) | 1998-10-23 | 2000-05-12 | Canon Inc | Magnetic thin film memory, method for reading out magnetic thin film memory, and method for writing to magnetic thin film memory |
US6542000B1 (en) | 1999-07-30 | 2003-04-01 | Iowa State University Research Foundation, Inc. | Nonvolatile programmable logic devices |
GB9925213D0 (en) | 1999-10-25 | 1999-12-22 | Univ Cambridge Tech | Magnetic logic elements |
US6469926B1 (en) | 2000-03-22 | 2002-10-22 | Motorola, Inc. | Magnetic element with an improved magnetoresistance ratio and fabricating method thereof |
US6381106B1 (en) | 2000-04-12 | 2002-04-30 | International Business Machines Corporation | Top spin valve sensor that has a free layer structure with a cobalt iron boron (cofeb) layer |
US6700753B2 (en) | 2000-04-12 | 2004-03-02 | Seagate Technology Llc | Spin valve structures with specular reflection layers |
TW504713B (en) | 2000-04-28 | 2002-10-01 | Motorola Inc | Magnetic element with insulating veils and fabricating method thereof |
US6979586B2 (en) | 2000-10-06 | 2005-12-27 | Headway Technologies, Inc. | Magnetic random access memory array with coupled soft adjacent magnetic layer |
FR2817998B1 (en) | 2000-12-07 | 2003-01-10 | Commissariat Energie Atomique | SPIN POLARIZATION MAGNETIC DEVICE WITH MAGNIFICATION ROTATION, MEMORY AND WRITING METHOD USING THE DEVICE |
US6473279B2 (en) * | 2001-01-04 | 2002-10-29 | International Business Machines Corporation | In-stack single-domain stabilization of free layers for CIP and CPP spin-valve or tunnel-valve read heads |
US6584016B2 (en) | 2001-01-08 | 2003-06-24 | Azalea Microelectronics Corporation | Non-volatile memory architecture and method of operation |
JP3677455B2 (en) | 2001-02-13 | 2005-08-03 | Necエレクトロニクス株式会社 | Nonvolatile magnetic storage device and method of manufacturing the same |
KR100878281B1 (en) | 2001-03-14 | 2009-01-12 | 유니버시티 오브 매사츄세츠 | Nanofabrication |
US6744086B2 (en) | 2001-05-15 | 2004-06-01 | Nve Corporation | Current switched magnetoresistive memory cell |
JP3565268B2 (en) | 2001-06-22 | 2004-09-15 | 株式会社東芝 | Magnetoresistive element, magnetic head, and magnetic reproducing device |
US6569745B2 (en) | 2001-06-28 | 2003-05-27 | Sharp Laboratories Of America, Inc. | Shared bit line cross point memory array |
US6809909B2 (en) | 2001-07-16 | 2004-10-26 | Seagate Technology Llc | Giant magnetoresistive sensor with high-resistivity magnetic layers |
AU2002362662A1 (en) | 2001-10-09 | 2003-04-22 | Axon Technologies Corporation | Programmable microelectronic device, structure, and system, and method of forming the same |
JP3834616B2 (en) | 2001-11-13 | 2006-10-18 | 国立大学法人東北大学 | Spin filter |
FR2832542B1 (en) | 2001-11-16 | 2005-05-06 | Commissariat Energie Atomique | MAGNETIC DEVICE WITH MAGNETIC TUNNEL JUNCTION, MEMORY AND METHODS OF WRITING AND READING USING THE DEVICE |
KR100450794B1 (en) | 2001-12-13 | 2004-10-01 | 삼성전자주식회사 | Magnetic random access memory and operating method thereof |
US6650562B2 (en) | 2002-01-23 | 2003-11-18 | Hewlett-Packard Development Company, L.P. | System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device |
US6778421B2 (en) | 2002-03-14 | 2004-08-17 | Hewlett-Packard Development Company, Lp. | Memory device array having a pair of magnetic bits sharing a common conductor line |
JP4073691B2 (en) | 2002-03-19 | 2008-04-09 | 株式会社ルネサステクノロジ | Semiconductor memory device |
TWI222763B (en) | 2002-03-29 | 2004-10-21 | Toshiba Corp | Magnetic logic element and magnetic logic element array |
KR100476889B1 (en) | 2002-04-04 | 2005-03-17 | 삼성전자주식회사 | Wordline decoder of split-gate flash memory |
US6888709B2 (en) | 2002-05-03 | 2005-05-03 | Applied Energy Llc | Electromagnetic transient voltage surge suppression system |
US6711067B1 (en) | 2002-05-08 | 2004-03-23 | Virage Logic Corporation | System and method for bit line sharing |
KR20030089078A (en) | 2002-05-16 | 2003-11-21 | 주식회사 하이닉스반도체 | Magnetic Ramdom access memory cell using magnetic tunnel junction devices |
US6633498B1 (en) | 2002-06-18 | 2003-10-14 | Motorola, Inc. | Magnetoresistive random access memory with reduced switching field |
US6781867B2 (en) | 2002-07-11 | 2004-08-24 | Micron Technology, Inc. | Embedded ROM device using substrate leakage |
US6850433B2 (en) | 2002-07-15 | 2005-02-01 | Hewlett-Packard Development Company, Lp. | Magnetic memory device and method |
US7196882B2 (en) | 2002-07-23 | 2007-03-27 | Micron Technology, Inc. | Magnetic tunnel junction device and its method of fabrication |
US6765819B1 (en) | 2002-07-25 | 2004-07-20 | Hewlett-Packard Development Company, Lp. | Magnetic memory device having improved switching characteristics |
US6714444B2 (en) | 2002-08-06 | 2004-03-30 | Grandis, Inc. | Magnetic element utilizing spin transfer and an MRAM device using the magnetic element |
US6888742B1 (en) | 2002-08-28 | 2005-05-03 | Grandis, Inc. | Off-axis pinned layer magnetic element utilizing spin transfer and an MRAM device using the magnetic element |
US6759263B2 (en) | 2002-08-29 | 2004-07-06 | Chentsau Ying | Method of patterning a layer of magnetic material |
US6801415B2 (en) | 2002-08-30 | 2004-10-05 | Freescale Semiconductor, Inc. | Nanocrystalline layers for improved MRAM tunnel junctions |
US6831312B2 (en) | 2002-08-30 | 2004-12-14 | Freescale Semiconductor, Inc. | Amorphous alloys for magnetic devices |
US6711051B1 (en) | 2002-09-05 | 2004-03-23 | National Semiconductor Corporation | Static RAM architecture with bit line partitioning |
US6838740B2 (en) | 2002-09-27 | 2005-01-04 | Grandis, Inc. | Thermally stable magnetic elements utilizing spin transfer and an MRAM device using the magnetic element |
US6958927B1 (en) | 2002-10-09 | 2005-10-25 | Grandis Inc. | Magnetic element utilizing spin-transfer and half-metals and an MRAM device using the magnetic element |
US6639830B1 (en) | 2002-10-22 | 2003-10-28 | Btg International Ltd. | Magnetic memory device |
KR100536592B1 (en) | 2002-11-01 | 2005-12-14 | 삼성전자주식회사 | Magnetic Memory And Method Of Fabricating The Same |
JP2004179483A (en) | 2002-11-28 | 2004-06-24 | Hitachi Ltd | Nonvolatile magnetic memory |
US6909633B2 (en) | 2002-12-09 | 2005-06-21 | Applied Spintronics Technology, Inc. | MRAM architecture with a flux closed data storage layer |
US7190611B2 (en) | 2003-01-07 | 2007-03-13 | Grandis, Inc. | Spin-transfer multilayer stack containing magnetic layers with resettable magnetization |
US6829161B2 (en) | 2003-01-10 | 2004-12-07 | Grandis, Inc. | Magnetostatically coupled magnetic elements utilizing spin transfer and an MRAM device using the magnetic element |
US6845038B1 (en) | 2003-02-01 | 2005-01-18 | Alla Mikhailovna Shukh | Magnetic tunnel junction memory device |
US6864551B2 (en) | 2003-02-05 | 2005-03-08 | Applied Spintronics Technology, Inc. | High density and high programming efficiency MRAM design |
US7126200B2 (en) | 2003-02-18 | 2006-10-24 | Micron Technology, Inc. | Integrated circuits with contemporaneously formed array electrodes and logic interconnects |
US6847547B2 (en) | 2003-02-28 | 2005-01-25 | Grandis, Inc. | Magnetostatically coupled magnetic elements utilizing spin transfer and an MRAM device using the magnetic element |
JP3906212B2 (en) | 2003-03-11 | 2007-04-18 | 株式会社東芝 | Magnetic random access memory |
US6998150B2 (en) | 2003-03-12 | 2006-02-14 | Headway Technologies, Inc. | Method of adjusting CoFe free layer magnetostriction |
US6963500B2 (en) | 2003-03-14 | 2005-11-08 | Applied Spintronics Technology, Inc. | Magnetic tunneling junction cell array with shared reference layer for MRAM applications |
US7092279B1 (en) | 2003-03-24 | 2006-08-15 | Sheppard Douglas P | Shared bit line memory device and method |
JP4008857B2 (en) | 2003-03-24 | 2007-11-14 | 株式会社東芝 | Semiconductor memory device and manufacturing method thereof |
US7067866B2 (en) | 2003-03-31 | 2006-06-27 | Applied Spintronics Technology, Inc. | MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture |
US6933155B2 (en) | 2003-05-21 | 2005-08-23 | Grandis, Inc. | Methods for providing a sub .15 micron magnetic memory structure |
US6834005B1 (en) | 2003-06-10 | 2004-12-21 | International Business Machines Corporation | Shiftable magnetic shift register and method of using the same |
US6885582B2 (en) | 2003-06-12 | 2005-04-26 | Hewlett-Packard Development Company, L.P. | Magnetic memory storage device |
US6818961B1 (en) | 2003-06-30 | 2004-11-16 | Freescale Semiconductor, Inc. | Oblique deposition to induce magnetic anisotropy for MRAM cells |
US7088624B2 (en) | 2003-07-18 | 2006-08-08 | Infineon Technologies, A.G. | System of multiplexed data lines in a dynamic random access memory |
US7245462B2 (en) | 2003-08-21 | 2007-07-17 | Grandis, Inc. | Magnetoresistive element having reduced spin transfer induced noise |
US6985385B2 (en) | 2003-08-26 | 2006-01-10 | Grandis, Inc. | Magnetic memory element utilizing spin transfer switching and storing multiple bits |
US6943040B2 (en) | 2003-08-28 | 2005-09-13 | Headway Technologes, Inc. | Magnetic random access memory designs with controlled magnetic switching mechanism by magnetostatic coupling |
US7009266B2 (en) | 2003-08-29 | 2006-03-07 | Applied Spintronics Technology, Inc. | Method and system for providing a magnetic element including passivation structures |
US7161829B2 (en) | 2003-09-19 | 2007-01-09 | Grandis, Inc. | Current confined pass layer for magnetic elements utilizing spin-transfer and an MRAM device using such magnetic elements |
US7116530B2 (en) | 2003-09-30 | 2006-10-03 | Hitachi Global Storage Technologies Netherlands B.V. | Thin differential spin valve sensor having both pinned and self pinned structures for reduced difficulty in AFM layer polarity setting |
JP2005116923A (en) | 2003-10-10 | 2005-04-28 | Hitachi Ltd | Nonvolatile magnetic memory cell using spin torque and magnetic random access memory using same |
US7009877B1 (en) | 2003-11-14 | 2006-03-07 | Grandis, Inc. | Three-terminal magnetostatically coupled spin transfer-based MRAM cell |
US7282755B2 (en) | 2003-11-14 | 2007-10-16 | Grandis, Inc. | Stress assisted current driven switching for magnetic memory applications |
US7093347B2 (en) | 2003-12-05 | 2006-08-22 | Seagate Technology Llc | Method of making a current-perpendicular to the plane (CPP) magnetoresistive (MR) sensor |
US7138648B2 (en) | 2003-12-17 | 2006-11-21 | Palo Alto Research Center Incorporated | Ultraviolet group III-nitride-based quantum well laser diodes |
US20050136600A1 (en) | 2003-12-22 | 2005-06-23 | Yiming Huai | Magnetic elements with ballistic magnetoresistance utilizing spin-transfer and an MRAM device using such magnetic elements |
US7072209B2 (en) | 2003-12-29 | 2006-07-04 | Micron Technology, Inc. | Magnetic memory having synthetic antiferromagnetic pinned layer |
US20050150537A1 (en) | 2004-01-13 | 2005-07-14 | Nanocoolers Inc. | Thermoelectric devices |
US20050150535A1 (en) | 2004-01-13 | 2005-07-14 | Nanocoolers, Inc. | Method for forming a thin-film thermoelectric device including a phonon-blocking thermal conductor |
US7105372B2 (en) | 2004-01-20 | 2006-09-12 | Headway Technologies, Inc. | Magnetic tunneling junction film structure with process determined in-plane magnetic anisotropy |
US7110287B2 (en) | 2004-02-13 | 2006-09-19 | Grandis, Inc. | Method and system for providing heat assisted switching of a magnetic element utilizing spin transfer |
US7242045B2 (en) | 2004-02-19 | 2007-07-10 | Grandis, Inc. | Spin transfer magnetic element having low saturation magnetization free layers |
US6967863B2 (en) | 2004-02-25 | 2005-11-22 | Grandis, Inc. | Perpendicular magnetization magnetic element utilizing spin transfer |
US6992359B2 (en) | 2004-02-26 | 2006-01-31 | Grandis, Inc. | Spin transfer magnetic element with free layers having high perpendicular anisotropy and in-plane equilibrium magnetization |
US6965522B2 (en) | 2004-03-17 | 2005-11-15 | Macronix International Co., Ltd. | Tunneling diode magnetic junction memory |
WO2005101378A1 (en) | 2004-04-02 | 2005-10-27 | Tdk Corporation | Composite free layer for stabilizing magnetoresistive head |
US20070035890A1 (en) | 2004-04-02 | 2007-02-15 | Tdk Corporation | Composed free layer for stabilizing magnetoresistive head having low magnetostriction |
US7233039B2 (en) | 2004-04-21 | 2007-06-19 | Grandis, Inc. | Spin transfer magnetic elements with spin depolarization layers |
US7274057B2 (en) | 2004-04-26 | 2007-09-25 | International Business Machines Corporation | Techniques for spin-flop switching with offset field |
US7872837B2 (en) * | 2004-04-30 | 2011-01-18 | Hitachi Global Storage Technologies Netherlands B.V. | Method and apparatus for providing a magnetic read sensor having a thin pinning layer and improved magnetoreistive coefficient |
US7057921B2 (en) | 2004-05-11 | 2006-06-06 | Grandis, Inc. | Spin barrier enhanced dual magnetoresistance effect element and magnetic memory using the same |
US20050269612A1 (en) | 2004-05-11 | 2005-12-08 | Integrated Magnetoelectronics | Solid-state component based on current-induced magnetization reversal |
US7088609B2 (en) | 2004-05-11 | 2006-08-08 | Grandis, Inc. | Spin barrier enhanced magnetoresistance effect element and magnetic memory using the same |
JP4377751B2 (en) | 2004-06-10 | 2009-12-02 | シャープ株式会社 | Cross-point structure semiconductor memory device and manufacturing method thereof |
US7098494B2 (en) | 2004-06-16 | 2006-08-29 | Grandis, Inc. | Re-configurable logic elements using heat assisted magnetic tunneling elements |
US7411235B2 (en) | 2004-06-16 | 2008-08-12 | Kabushiki Kaisha Toshiba | Spin transistor, programmable logic circuit, and magnetic memory |
US7067330B2 (en) | 2004-07-16 | 2006-06-27 | Headway Technologies, Inc. | Magnetic random access memory array with thin conduction electrical read and write lines |
US7576956B2 (en) | 2004-07-26 | 2009-08-18 | Grandis Inc. | Magnetic tunnel junction having diffusion stop layer |
US7098495B2 (en) | 2004-07-26 | 2006-08-29 | Freescale Semiconducor, Inc. | Magnetic tunnel junction element structures and methods for fabricating the same |
DE102004041894B3 (en) | 2004-08-30 | 2006-03-09 | Infineon Technologies Ag | A memory device (CBRAM) having memory cells based on a resistance variable active solid electrolyte material and method of manufacturing the same |
US7369427B2 (en) | 2004-09-09 | 2008-05-06 | Grandis, Inc. | Magnetic elements with spin engineered insertion layers and MRAM devices using the magnetic elements |
US7336525B2 (en) | 2004-10-18 | 2008-02-26 | Kabushiki Kaisha Toshiba | Nonvolatile memory for logic circuits |
US7126202B2 (en) | 2004-11-16 | 2006-10-24 | Grandis, Inc. | Spin scattering and heat assisted switching of a magnetic element |
US7241631B2 (en) | 2004-12-29 | 2007-07-10 | Grandis, Inc. | MTJ elements with high spin polarization layers configured for spin-transfer switching and spintronics devices using the magnetic elements |
US20060171197A1 (en) | 2005-01-31 | 2006-08-03 | Ulrich Klostermann | Magnetoresistive memory element having a stacked structure |
US7173848B2 (en) | 2005-02-01 | 2007-02-06 | Meglabs, Inc. | Magnetic random access memory with memory cell stacks having more than two magnetic states |
US7099186B1 (en) | 2005-02-10 | 2006-08-29 | Infineon Technologies Ag | Double-decker MRAM cells with scissor-state angled reference layer magnetic anisotropy and method for fabricating |
KR100632953B1 (en) | 2005-03-07 | 2006-10-12 | 삼성전자주식회사 | Memory device, memory array architecture for the memory device and operation of the memory array architecture |
US7285836B2 (en) | 2005-03-09 | 2007-10-23 | Maglabs, Inc. | Magnetic random access memory with stacked memory cells having oppositely-directed hard-axis biasing |
US7241632B2 (en) | 2005-04-14 | 2007-07-10 | Headway Technologies, Inc. | MTJ read head with sidewall spacers |
JP2006294191A (en) | 2005-04-14 | 2006-10-26 | Toshiba Corp | Method for reading data from magnetic random access memory |
US7230265B2 (en) | 2005-05-16 | 2007-06-12 | International Business Machines Corporation | Spin-polarization devices using rare earth-transition metal alloys |
US7289356B2 (en) | 2005-06-08 | 2007-10-30 | Grandis, Inc. | Fast magnetic memory devices utilizing spin transfer and magnetic elements used therein |
US7518835B2 (en) | 2005-07-01 | 2009-04-14 | Grandis, Inc. | Magnetic elements having a bias field and magnetic memory devices using the magnetic elements |
JP4504273B2 (en) | 2005-07-06 | 2010-07-14 | 株式会社東芝 | Magnetoresistive element and magnetic memory |
US7411765B2 (en) | 2005-07-18 | 2008-08-12 | Hitachi Global Storage Technologies Netherlands B.V. | CPP-GMR sensor with non-orthogonal free and reference layer magnetization orientation |
KR100725380B1 (en) | 2005-07-28 | 2007-06-07 | 삼성전자주식회사 | Voltage generating circiut for semiconductor memory device, semiconductor memory device comprising the same and voltage generating method for semiconductor memory devices |
US7230845B1 (en) | 2005-07-29 | 2007-06-12 | Grandis, Inc. | Magnetic devices having a hard bias field and magnetic memory devices using the magnetic devices |
US7489541B2 (en) | 2005-08-23 | 2009-02-10 | Grandis, Inc. | Spin-transfer switching magnetic elements using ferrimagnets and magnetic memories using the magnetic elements |
US7224601B2 (en) | 2005-08-25 | 2007-05-29 | Grandis Inc. | Oscillating-field assisted spin torque switching of a magnetic tunnel junction memory element |
US7272035B1 (en) | 2005-08-31 | 2007-09-18 | Grandis, Inc. | Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells |
US7272034B1 (en) | 2005-08-31 | 2007-09-18 | Grandis, Inc. | Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells |
US20070054450A1 (en) | 2005-09-07 | 2007-03-08 | Magic Technologies, Inc. | Structure and fabrication of an MRAM cell |
US7532442B2 (en) | 2005-09-19 | 2009-05-12 | Hitachi Global Storage Technologies Netherlands B.V. | Magnetoresistive (MR) elements having pinning layers formed from permanent magnetic material |
US7973349B2 (en) | 2005-09-20 | 2011-07-05 | Grandis Inc. | Magnetic device having multilayered free ferromagnetic layer |
US7807492B2 (en) | 2005-09-28 | 2010-10-05 | Northern Lights Semiconductor Corp. | Magnetoresistive random access memory with improved layout design and process thereof |
US7403418B2 (en) | 2005-09-30 | 2008-07-22 | Silicon Storage Technology, Inc. | Word line voltage boosting circuit and a memory array incorporating same |
US20070085068A1 (en) | 2005-10-14 | 2007-04-19 | Dmytro Apalkov | Spin transfer based magnetic storage cells utilizing granular free layers and magnetic memories using such cells |
JP4444241B2 (en) | 2005-10-19 | 2010-03-31 | 株式会社東芝 | Magnetoresistive element, magnetic random access memory, electronic card and electronic device |
US7286395B2 (en) | 2005-10-27 | 2007-10-23 | Grandis, Inc. | Current driven switched magnetic storage cells having improved read and write margins and magnetic memories using such cells |
US7411815B2 (en) | 2005-11-14 | 2008-08-12 | Infineon Technologies Ag | Memory write circuit |
US7187577B1 (en) | 2005-11-23 | 2007-03-06 | Grandis, Inc. | Method and system for providing current balanced writing for memory cells and magnetic devices |
US7485503B2 (en) | 2005-11-30 | 2009-02-03 | Intel Corporation | Dielectric interface for group III-V semiconductor device |
US7880249B2 (en) | 2005-11-30 | 2011-02-01 | Magic Technologies, Inc. | Spacer structure in MRAM cell and method of its fabrication |
US20070132049A1 (en) | 2005-12-12 | 2007-06-14 | Stipe Barry C | Unipolar resistance random access memory (RRAM) device and vertically stacked architecture |
US7430135B2 (en) | 2005-12-23 | 2008-09-30 | Grandis Inc. | Current-switched spin-transfer magnetic devices with reduced spin-transfer switching current density |
US7466583B2 (en) | 2006-01-13 | 2008-12-16 | Magic Technologies, Inc. | MRAM with split read-write cell structures |
US7515457B2 (en) | 2006-02-24 | 2009-04-07 | Grandis, Inc. | Current driven memory cells having enhanced current and enhanced current symmetry |
US8183652B2 (en) | 2007-02-12 | 2012-05-22 | Avalanche Technology, Inc. | Non-volatile magnetic memory with low switching current and high thermal stability |
US7732881B2 (en) | 2006-11-01 | 2010-06-08 | Avalanche Technology, Inc. | Current-confined effect of magnetic nano-current-channel (NCC) for magnetic random access memory (MRAM) |
US20080055792A1 (en) | 2006-03-07 | 2008-03-06 | Agency For Science, Technology And Research | Memory cells and devices having magnetoresistive tunnel junction with guided magnetic moment switching and method |
US20070246787A1 (en) | 2006-03-29 | 2007-10-25 | Lien-Chang Wang | On-plug magnetic tunnel junction devices based on spin torque transfer switching |
US7826174B2 (en) | 2006-03-31 | 2010-11-02 | Ricoh Company, Ltd. | Information recording method and apparatus using plasmonic transmission along line of ferromagnetic nano-particles with reproducing method using fade-in memory |
US20070241392A1 (en) | 2006-04-14 | 2007-10-18 | Hsin-Chang Lin | Non-volatile flash memory structure and method for operating the same |
US7345912B2 (en) | 2006-06-01 | 2008-03-18 | Grandis, Inc. | Method and system for providing a magnetic memory structure utilizing spin transfer |
US20070297220A1 (en) | 2006-06-22 | 2007-12-27 | Masatoshi Yoshikawa | Magnetoresistive element and magnetic memory |
US7379327B2 (en) | 2006-06-26 | 2008-05-27 | Grandis, Inc. | Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells having enhanced read and write margins |
US7502249B1 (en) | 2006-07-17 | 2009-03-10 | Grandis, Inc. | Method and system for using a pulsed field to assist spin transfer induced switching of magnetic memory elements |
JP4385156B2 (en) | 2006-07-27 | 2009-12-16 | 独立行政法人産業技術総合研究所 | CCP-CPP type giant magnetoresistive element |
US7851840B2 (en) | 2006-09-13 | 2010-12-14 | Grandis Inc. | Devices and circuits based on magnetic tunnel junctions utilizing a multilayer barrier |
WO2008047536A1 (en) | 2006-10-16 | 2008-04-24 | Nec Corporation | Magnetic memory cell and magnetic random access memory |
US7572645B2 (en) | 2006-11-15 | 2009-08-11 | Everspin Technologies, Inc. | Magnetic tunnel junction structure and method |
US7864569B2 (en) | 2006-12-01 | 2011-01-04 | Macronix International Co., Ltd. | Structure of magnetic random access memory using spin-torque transfer writing |
US7598579B2 (en) | 2007-01-30 | 2009-10-06 | Magic Technologies, Inc. | Magnetic tunnel junction (MTJ) to reduce spin transfer magnetization switching current |
US20090218645A1 (en) | 2007-02-12 | 2009-09-03 | Yadav Technology Inc. | multi-state spin-torque transfer magnetic random access memory |
US7480173B2 (en) | 2007-03-13 | 2009-01-20 | Magic Technologies, Inc. | Spin transfer MRAM device with novel magnetic free layer |
US7738287B2 (en) | 2007-03-27 | 2010-06-15 | Grandis, Inc. | Method and system for providing field biased magnetic memory devices |
US7728622B2 (en) | 2007-03-29 | 2010-06-01 | Qualcomm Incorporated | Software programmable logic using spin transfer torque magnetoresistive random access memory |
US7486551B1 (en) | 2007-04-03 | 2009-02-03 | Grandis, Inc. | Method and system for providing domain wall assisted switching of magnetic elements and magnetic memories using such magnetic elements |
US7605437B2 (en) | 2007-04-18 | 2009-10-20 | Everspin Technologies, Inc. | Spin-transfer MRAM structure and methods |
US7782661B2 (en) | 2007-04-24 | 2010-08-24 | Magic Technologies, Inc. | Boosted gate voltage programming for spin-torque MRAM array |
US7919826B2 (en) | 2007-04-24 | 2011-04-05 | Kabushiki Kaisha Toshiba | Magnetoresistive element and manufacturing method thereof |
JP2008277542A (en) | 2007-04-27 | 2008-11-13 | Toshiba Corp | Magnetic random access memory and method of manufacturing the same |
US7539047B2 (en) | 2007-05-08 | 2009-05-26 | Honeywell International, Inc. | MRAM cell with multiple storage elements |
US7486552B2 (en) | 2007-05-21 | 2009-02-03 | Grandis, Inc. | Method and system for providing a spin transfer device with improved switching characteristics |
US7573736B2 (en) | 2007-05-22 | 2009-08-11 | Taiwan Semiconductor Manufacturing Company | Spin torque transfer MRAM device |
WO2008154519A1 (en) | 2007-06-12 | 2008-12-18 | Grandis, Inc. | Method and system for providing a magnetic element and magnetic memory being unidirectional writing enabled |
US7742328B2 (en) | 2007-06-15 | 2010-06-22 | Grandis, Inc. | Method and system for providing spin transfer tunneling magnetic memories utilizing non-planar transistors |
US7750421B2 (en) | 2007-07-23 | 2010-07-06 | Magic Technologies, Inc. | High performance MTJ element for STT-RAM and method for making the same |
US7764536B2 (en) | 2007-08-07 | 2010-07-27 | Grandis, Inc. | Method and system for providing a sense amplifier and drive circuit for spin transfer torque magnetic random access memory |
US7982275B2 (en) | 2007-08-22 | 2011-07-19 | Grandis Inc. | Magnetic element having low saturation magnetization |
US20090185410A1 (en) | 2008-01-22 | 2009-07-23 | Grandis, Inc. | Method and system for providing spin transfer tunneling magnetic memories utilizing unidirectional polarity selection devices |
US8233247B2 (en) | 2008-04-11 | 2012-07-31 | Hitachi Global Storage Technologies Netherlands B.V. | Scissoring-type current-perpendicular-to-the-plane giant magnetoresistance (CPP-GMR) sensors with damped free layer structures |
US20090302403A1 (en) | 2008-06-05 | 2009-12-10 | Nguyen Paul P | Spin torque transfer magnetic memory cell |
US7881095B2 (en) | 2008-08-08 | 2011-02-01 | Seagate Technology Llc | Asymmetric write current compensation using gate overdrive for resistive sense memory cells |
US8536669B2 (en) | 2009-01-13 | 2013-09-17 | Qualcomm Incorporated | Magnetic element with storage layer materials |
-
2009
- 2009-07-13 US US12/502,213 patent/US8289756B2/en active Active
-
2012
- 2012-08-07 US US13/568,409 patent/US20120299135A1/en not_active Abandoned
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070096229A1 (en) * | 2005-10-28 | 2007-05-03 | Masatoshi Yoshikawa | Magnetoresistive element and magnetic memory device |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10325639B2 (en) | 2017-11-20 | 2019-06-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Initialization process for magnetic random access memory (MRAM) production |
US10867651B2 (en) | 2017-11-20 | 2020-12-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Initialization process for magnetic random access memory (MRAM) production |
US10522746B1 (en) | 2018-08-07 | 2019-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual magnetic tunnel junction devices for magnetic random access memory (MRAM) |
US10797225B2 (en) | 2018-09-18 | 2020-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual magnetic tunnel junction (DMTJ) stack design |
US12082509B2 (en) | 2018-09-18 | 2024-09-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual magnetic tunnel junction (DMTJ) stack design |
Also Published As
Publication number | Publication date |
---|---|
US20100128520A1 (en) | 2010-05-27 |
US8289756B2 (en) | 2012-10-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8289756B2 (en) | Non volatile memory including stabilizing structures | |
USRE47975E1 (en) | Perpendicular magnetic tunnel junction (pMTJ) with in-plane magneto-static switching-enhancing layer | |
US8331141B2 (en) | Multibit cell of magnetic random access memory with perpendicular magnetization | |
US8988934B2 (en) | Multibit cell of magnetic random access memory with perpendicular magnetization | |
US7372116B2 (en) | Heat assisted switching in an MRAM cell utilizing the antiferromagnetic to ferromagnetic transition in FeRh | |
EP1970911B1 (en) | Spin-polarised current driven magnetic memory device and memory | |
US7860351B2 (en) | Spin-injection magnetoresistance effect element | |
JP3863536B2 (en) | Magnetic random access memory and data writing method of the magnetic random access memory | |
US7929370B2 (en) | Spin momentum transfer MRAM design | |
US9171601B2 (en) | Scalable magnetic memory cell with reduced write current | |
US8406041B2 (en) | Scalable magnetic memory cell with reduced write current | |
JP4277870B2 (en) | Storage element and memory | |
JP3699954B2 (en) | Magnetic memory | |
US20080055792A1 (en) | Memory cells and devices having magnetoresistive tunnel junction with guided magnetic moment switching and method | |
US11316099B2 (en) | Skyrmion stack memory device | |
JP2006303159A (en) | Spin injection magnetic domain moving element and device using this | |
JP2002520873A (en) | Low switching magnetic field magnetic tunnel junction | |
WO2014050379A1 (en) | Storage element, storage device, and magnetic head | |
WO2013080436A1 (en) | Storage element, and storage device | |
US11049538B2 (en) | Voltage-controlled interlayer exchange coupling magnetoresistive memory device and method of operating thereof | |
JP2006295001A (en) | Storage element and memory | |
JP4187021B2 (en) | Memory element and memory | |
JP5034317B2 (en) | Memory element and memory | |
WO2021188134A1 (en) | Voltage-controlled interlayer exchange coupling magnetoresistive memory device and method of operating thereof | |
CN117480619A (en) | Magnetic laminated film and magneto-resistance effect element |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |