US20120043215A1 - Method and apparatus for electrodepositing large area cadmium telluride thin films for solar module manufacturing - Google Patents

Method and apparatus for electrodepositing large area cadmium telluride thin films for solar module manufacturing Download PDF

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US20120043215A1
US20120043215A1 US13/211,619 US201113211619A US2012043215A1 US 20120043215 A1 US20120043215 A1 US 20120043215A1 US 201113211619 A US201113211619 A US 201113211619A US 2012043215 A1 US2012043215 A1 US 2012043215A1
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cdte
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Bulent M. Basol
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EncoreSolar Inc
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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/001Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/02562Tellurides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02568Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02581Transition metal or rare earth elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02623Liquid deposition
    • H01L21/02628Liquid deposition using solutions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/073Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising only AIIBVI compound semiconductors, e.g. CdS/CdTe solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1828Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIBVI compounds, e.g. CdS, ZnS, CdTe
    • H01L31/1836Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIBVI compounds, e.g. CdS, ZnS, CdTe comprising a growth substrate not being an AIIBVI compound
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/543Solar cells from Group II-VI materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present inventions relate to methods and apparatus for preparing thin films of Group IIB-VIA compound semiconductor films, specifically CdTe films, for radiation detector and photovoltaic applications. Inventions are applicable to large scale deposition of thin films on large substrates for manufacturing thin film solar module.
  • PV cells and modules are photovoltaic (PV) devices that convert sunlight into electrical power.
  • the most common solar cell material is silicon (Si).
  • Si silicon
  • lower cost PV cells may be fabricated using thin film growth techniques that can deposit solar-cell-quality polycrystalline compound absorber materials on large area substrates using low-cost methods.
  • Group IIB-VIA compound semiconductors comprising some of the Group IIB (Cd, Zn, Hg) and Group VIA (O, S, Se, Te, Po) materials of the periodic table are excellent absorber materials for thin film solar cell structures.
  • CdTe has proved to be a material that can be used in manufacturing high efficiency solar panels at a cost below $1/W.
  • FIGS. 1A and 1B show the two different device structures employed in CdTe based solar cells.
  • FIG. 1A shows a “super-strate” structure, wherein light enters the device through a transparent sheet 11 that it is fabricated on. The transparent sheet 11 serves as the support on which the active layers are deposited.
  • FIG. 1B depicts a “sub-strate” structure, wherein the light enters the device through a transparent conductive layer 12 deposited over a CdTe absorber film 14 which is grown over a sheet substrate 16 .
  • the transparent conductive layer (TCL) 12 is first deposited on the transparent sheet 11 . Then a junction partner layer 13 is deposited over the TCL 12 . The CdTe absorber film 14 is next formed on the junction partner layer 13 . Then an ohmic contact layer 15 is deposited on the CdTe absorber film 14 , completing the solar cell. As shown by arrows 18 in FIG. 1A , light enters this device through the transparent sheet 11 .
  • the transparent sheet 11 may be glass or a material (e.g.
  • the TCL 12 is usually a transparent conductive oxide (TCO) layer comprising any one of; tin-oxide, cadmium-tin-oxide, indium-tin-oxide, indium-zinc-oxide, and zinc-oxide, which may be doped to increase their conductivity. Multi layers of these TCO materials as well as their alloys or mixtures may also be utilized in the TCL 12 .
  • the junction partner layer 13 is typically a CdS layer but may alternately be a CdZnS layer or a selenide layer comprising Zn.
  • the ohmic contact 15 is made of a highly conductive metal such as Mo, Ni, Cr, or a doped transparent conductive oxide such as the TCOs mentioned above. Nitrides of refractory metals (such as Mo, Ta, W and Cr) and Al may also be used in multilayer ohmic contact structures.
  • the rectifying junction which is the heart of this device, is located near an interface 19 between the CdTe absorber film 14 and the junction partner layer 13 .
  • the ohmic contact layer 15 is first deposited on the sheet substrate 16 , and then the CdTe absorber film 14 is formed on the ohmic contact layer 15 . This is then followed by the deposition of the junction partner layer 13 and the transparent conductive layer (TCL) 12 over the CdTe absorber film 14 . As shown by arrows 18 in FIG. 1B , light enters this device through the TCL 12 . There may also be finger patterns (not shown) on the TCL 12 to lower the series resistance of the solar cell.
  • the sheet substrate 16 does not have to be transparent in this case. Therefore, the sheet substrate 16 may comprise a sheet or foil of metal, a sheet of glass or a foil of a high temperature polymeric material such as polyimide.
  • the CdTe absorber film 14 of FIGS. 1A and 1B may be formed using a variety of methods.
  • U.S. Pat. No. 4,388,483 granted to B. M. Basol et al. describes the fabrication of a CdS/CdTe solar cell wherein the thin CdTe film is obtained by a cathodic compound electrodeposition technique at low electrolyte temperatures, and then the as-deposited n-type CdTe film is type-converted to p-type through a high temperature annealing step to form the rectifying junction with the underlying CdS layer.
  • the compound electrodeposition or electroplating technique typically uses acidic aqueous electrolytes and forms high quality rectifying junctions after the type-conversion step yielding high quality solar cells and modules with conversion efficiencies exceeding 10% (D. Cunningham et al, “CdTe PV module manufacturing at BP solar”, Progress in Photovoltaics, vol. 10, p. 159 (2002)).
  • this electroplating technique is slow, yielding 1-2 micron thick CdTe layers in 2-5 hours depending upon the plating conditions and the size of the substrate.
  • Electroplating technique is slow, yielding 1-2 micron thick CdTe layers in 2-5 hours depending upon the plating conditions and the size of the substrate.
  • D. Lincot Thin Solid Films, vol. 487, p.
  • CdTe can be cathodically electrodeposited out of an acidic electrolyte containing Cd and Te, at a potential which is more negative than the Te plating potential but more positive than the Cd plating potential.
  • the reason for this is the fact that the free energy formation of CdTe, which is ⁇ 98.8 kJ/mol, drives the reaction of the Cd species in the solution with Te, forming CdTe, once Te is electrodeposited on the cathode. Kinetics of this reaction is slow and the Te concentration in the acidic solution is low.
  • Other prior art information regarding CdTe electrodeposition may be found in U.S. Pat. No. 4,261,802 by Fulop et al., U.S. Pat. No.
  • the electroplating current flows; i) through an electrical contact made to the transparent conductive layer, ii) through the transparent conductive layer (such as a transparent conductive oxide layer) flowing parallel to its surface, iii) through the junction partner layer (such as a CdS layer) flowing perpendicular to its surface, and iv) through an already deposited portion of the CdTe film, flowing perpendicular to its surface.
  • FIG. 2 depicts a prior art electrodeposition system 100 .
  • the electrodeposition system 100 comprises a container 101 holding a plating solution 102 comprising Cd and Te species.
  • the stack comprising the transparent sheet 11 , the transparent conductive layer 12 , and the junction partner layer 13 is used as the cathode 107 , which at the same time is the workpiece.
  • Both the anode 103 and the cathode 107 are immersed in the plating solution 102 .
  • a voltage “V” is applied between the anode 103 and the cathode 107 through an electrical contact 105 made to the transparent conductive layer 12 , using a power supply 104 , such that the cathode 107 is made more negative with respect to the anode 103 .
  • the electrical contact 105 is protected from the plating solution 102 by a protective seal 106 which may be made of a non-conductive polymeric material.
  • a plating current “I” starts to flow through the conductive wires connecting the power supply 104 to the anode 103 and the cathode 107 .
  • the plating current “I” flows from the anode 103 to the cathode 107 through the plating solution 102 while depositing a CdTe film over the junction partner layer 13 .
  • the plating current “I” flows through the conductive portions of the cathode 107 in a distributed manner.
  • the plating current flows through an already deposited portion 14 A of the CdTe film, and then it flows through the junction partner layer 13 and into the transparent conductive layer 12 . Then it flows horizontally to the electrical contact 105 as shown by arrow 108 .
  • the current flow path within the transparent conductive layer 12 between the location “B” and the electrical contact 105 is much longer corresponding to a larger voltage drop.
  • the surface potential of the CdTe film 14 A at the location “B” is expected to be different (more positive) than it is at the location “A” if the plating current distribution over the surface of the cathode 107 is uniform.
  • the sheet resistance of a typical transparent conductive oxide used in solar cell structure may be in the range of 5-20 ohms per square.
  • FIG. 1A is a cross-sectional view of a prior-art CdTe solar cell with a “super-strate structure”.
  • FIG. 1B is a cross-sectional view of a prior-art CdTe solar cell with a “sub-strate structure”.
  • FIG. 2 is a prior-art plating system.
  • FIG. 3 shows the different process zones yielding films with different Te/Cd molar ratios.
  • FIG. 4A shows a workpiece over which a CdTe film would be electrodeposited.
  • FIG. 4B shows a cross sectional view of the workpiece depicted in FIG. 4A .
  • FIG. 5A is a top view of an electroplating tool processing multiple workpieces.
  • FIG. 5B is a side view of the multi-workpiece electroplating tool shown in FIG. 5A .
  • FIG. 6 is a top view of another multi-workpiece electroplating tool.
  • the chemical composition of an electrodeposited CdTe film is a function of its surface potential during the electrodeposition period. Potentials close to or more negative than the deposition potential of Cd yield Cd-rich deposits, whereas potentials close to the deposition potential of Te yield Te-rich compositions. What is required for high efficiency solar cell fabrication is a stoichiometric CdTe layer with a Cd/Te molar ratio of near 1.0, which can be obtained only within a specific voltage range between the deposition potentials of Te and Cd.
  • the CdTe layer deposited at or around location “B” may be more Te-rich than the CdTe layer deposited at or around location “A”. Composition of the CdTe film also depends on current density and the solution flow. These are challenges for large area deposition of CdTe films.
  • the present invention forms high quality CdTe thin films on multiple large area substrates using one plating system and one power supply. This is achieved by defining the geometry of the electroplating tool and by carefully selecting the process conditions as will be described below.
  • FIG. 3 schematically shows a general relationship between the plating potential (E), plating current density (J), and the plated species when a film is electrodeposited on a conductive cathode out of an acidic plating bath containing Cd and Te species.
  • the compound CdTe is electroplated on the cathode surface in its stoichiometric form, i.e. in a form where Cd/Te molar ratio is near 1.0.
  • a deposit comprising the compound CdTe or CdTex (where x>1) may be electrodeposited with or without excess elemental Te.
  • Zone III corresponds to electrodeposition potentials that are very close to or more negative than the deposition potential of Cd, which is shown as “V 1 ” in FIG. 3 . That means elemental Cd can be electroplated in zone III possibly along with some CdTe phase.
  • Zone IV is close to the Te deposition potential, shown as V 2 , and therefore elemental Te may be electroplated in region IV, possibly along with a Te-rich CdTex phase.
  • the values of the deposition potentials V 1 and V 2 may be about ⁇ 1.1 V and ⁇ 0.7V, respectively, with respect to a Mercurous Sulfate Electrode, respectively.
  • FIG. 3 demonstrates the fact that the region or the process window to electrodeposit stoichiometric CdTe compound with a Te/Cd molar ratio of 1.0 (Zone I) is relatively small and it gets narrower as the current density increases.
  • a current density value of “JA” stoichiometric CdTe compound can be electroplated at a deposition voltage range between “VA” and “V 1 ”, it can only be deposited at a voltage range between “VB” and “V 1 ” once the current density is increased to “JB”.
  • “JA” may be in the range of 0.05-0.5 mA/cm2 while “JB” may be in the range of 0.7-5.0 mA/cm2.
  • electrodeposited Group IIB-VIA compound layers such as CdTe layers
  • CdTe layers have high electrical resistivities.
  • CdTe layers may have resistivity values in a range of 104-107 ohm-cm, compared to metal resistivities, which may be in the range of 10-4-10-6 ohm-cm.
  • a CdTe layer is electrodeposited on a junction partner layer, such as a CdS layer, the voltage drop across the deposited CdTe film increases as the thickness of the CdTe layer increases.
  • Present inventions utilize this fact in a beneficial way to deposit CdTe layers over many workpieces in a single electrodeposition tool.
  • the workpieces over which CdTe films are electrodeposited have a first dimension which is larger than 50 cm.
  • a second dimension of the workpieces may be larger than or equal to the first dimension, preferably larger than the first dimension.
  • FIG. 4A A sketch of an exemplary workpiece 39 comprising a transparent sheet 40 , a transparent conductive layer 45 and a junction partner layer 48 is shown in FIG. 4A .
  • FIG. 4B shows a cross sectional view of the workpiece 39 taken along the Z-Z direction.
  • the transparent sheet 40 has two short edges 41 A and 41 B with a first dimension, and two long edges 42 A and 42 B or contacting edges, with a second dimension.
  • a first contact strip 43 and a second contact strip 44 are placed along the two long edges 42 A and 42 B, respectively, such that these contact strips, which are conductive, make good physical and electrical contact to the transparent conductive layer 45 disposed on the transparent sheet 40 .
  • the contact strips 43 , 44 are protected from the plating solution by a non-conductive protective layer 46 .
  • the first contact strip 43 and the second contact strip 44 are electrically shorted to each other by wire 49 , which in turn is connected to a terminal wire 49 A.
  • the junction partner layer 48 (such as a CdS layer) is disposed over the transparent conductive layer 45 .
  • the workpiece 39 has a front surface 39 A and a back surface 39 B.
  • the CdTe film is electrodeposited over the front surface 39 A, which comprises the junction partner layer 48 , during the electrodeposition process.
  • FIGS. 5A and 5B schematically show a top view and a side view, respectively, of an exemplary plating tool 300 that processes 20 workpieces at the same time.
  • Such tools may be used to process at least 20, preferably at least 40 and most preferably more than 50 large size workpieces at the same time.
  • Each workpiece may be similar to the workpiece 39 shown in FIGS. 4A and 4B .
  • the smallest dimension of the workpieces is preferably more than 50 cm, most preferably at least 60 cm. Electrical contact is made to each workpiece using two contact strips disposed over the two long edges of the workpiece as shown in FIG. 4A .
  • the plating tool 300 has a container 301 that holds a plating solution 302 comprising Cd and Te species.
  • Each workpiece 304 has a front surface 305 A and a back surface 305 B, which are similar to the surfaces 39 A and 39 B described in relation with FIG. 4B . Accordingly, CdTe electrodeposition is carried out over the front surface 305 A of each workpiece 304 at the same time.
  • Multiple anodes 303 are placed in the plating solution 302 and each anode 303 faces two front surfaces 305 A of two workpieces 304 . All the anodes are electrically shorted to an anode busbar 309 through wires 308 . All the workpieces 304 are also electrically connected to a single cathode busbar 307 through wires 306 . It should be noted that each wire 306 is equivalent to the terminal wire 49 A of FIG. 4A and therefore they have electrical connection to contact strips (not shown in FIGS. 5A and 5B ) employed for each workpiece 304 .
  • the anode busbar 309 and the cathode busbar 307 initiating cathodic CdTe deposition over the front surfaces of all workpieces at the same time.
  • Power may be applied through application of a controlled voltage or controlled current by a single power supply because the deposition process is self correcting. If for example, the current density increases for a specific workpiece in the group for any reason (such as non-uniformity of solution flow), the thickness of the CdTe film deposited over that workpiece would also increase.
  • the resistivity for deposited CdTe layers is at least about 104 ohm-cm, and typically falls in the range of about 104-107 ohm-cm.
  • Increased CdTe thickness would increase the resistance of the electrical circuit for that specific workpiece. Increased resistance would, in turn, lower the deposition current, therefore self adjusting the process back to normal where all the workpieces receive substantially the same current density, and therefore substantially the same stoichiometric CdTe layer (e.g., same thickness and same compositional constituents).
  • the above mentioned self adjustment mechanism allows use of a single power supply and eliminates the need for employing one power supply for each workpiece and continually monitoring the voltage-current values. It should be noted that if the plated material was a low resistivity metallic film, a thickness change of the deposited film over one specific substrate would not introduce any significant change in resistance and therefore, the self adjustment mechanism would not work.
  • FIG. 6 schematically shows a top view of another exemplary electroplating tool 600 that processes eight workpieces at the same time.
  • the electroplating tool 600 has a near cylindrical container 601 that holds a plating solution 602 comprising Cd and Te species.
  • Each workpiece 605 has a front surface 605 A and a back surface 605 B, which are similar to the surfaces described in relation with FIG. 4B . Accordingly, CdTe deposition is carried out over the front surface 605 A of each workpiece 605 .
  • a single anode 603 is placed in the plating solution 602 facing the front surface 605 A of the workpieces 605 . All the workpieces 605 are electrically connected to a single cathode busbar (not shown). During process, power is applied between the anode 603 and the cathode busbar, initiating cathodic CdTe deposition on all of the workpieces at the same time.
  • a plating current density of less than about 1000/W2 is preferred, wherein W is given in units of centimeters and the current density is given in the units of milliamps per square centimeter (mA/cm2).
  • the plating current density should be more than about 300/W2 to avoid excessive time loss during deposition.
  • the total current applied would be less than (0.16 ⁇ 20 ⁇ 80 ⁇ L), where L is the dimension of the longer edge of each workpiece.
  • the techniques described above are also applicable to the formation of Group IIB-VIA absorber layers that include other elements, such as films comprising alloys of CdTe with materials such as Zn, Hg, Mn and Mg.
  • the technique are also applicable for absorber layers containing Te wherein the electroplating solution comprises Te.

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Abstract

Embodiments of the inventions provide methods and apparatus to electroplate films of tellurides such as CdTe, or its alloys on multiple large area workpieces. In one embodiment a method of forming a solar cell absorber film on multiple work pieces uses a self adjusting mechanism taking advantage of the high resistivity of the solar cell absorber film. Larger deposits of the plating material onto one workpiece, due for example, to non-uniformity of solution flow, results in larger resistance thus decreasing the current flowing through that workpiece. The decreased current then deposits less material over that workpiece. In another embodiment multiple workpieces can be electroplated using a single power supply in a single plating bath.

Description

    CROSS REFERENCE TO RELATED APPLICATION
  • This application claims benefit of U.S. Provisional Application No. 61/401,632 filed on Aug. 17, 2010, the contents of which are hereby incorporated by reference in their entirety for all purposes.
  • FIELD OF THE INVENTION
  • The present inventions relate to methods and apparatus for preparing thin films of Group IIB-VIA compound semiconductor films, specifically CdTe films, for radiation detector and photovoltaic applications. Inventions are applicable to large scale deposition of thin films on large substrates for manufacturing thin film solar module.
  • BACKGROUND OF THE INVENTION
  • Solar cells and modules are photovoltaic (PV) devices that convert sunlight into electrical power. The most common solar cell material is silicon (Si). However, lower cost PV cells may be fabricated using thin film growth techniques that can deposit solar-cell-quality polycrystalline compound absorber materials on large area substrates using low-cost methods.
  • Group IIB-VIA compound semiconductors comprising some of the Group IIB (Cd, Zn, Hg) and Group VIA (O, S, Se, Te, Po) materials of the periodic table are excellent absorber materials for thin film solar cell structures. Especially CdTe has proved to be a material that can be used in manufacturing high efficiency solar panels at a cost below $1/W.
  • FIGS. 1A and 1B show the two different device structures employed in CdTe based solar cells. FIG. 1A shows a “super-strate” structure, wherein light enters the device through a transparent sheet 11 that it is fabricated on. The transparent sheet 11 serves as the support on which the active layers are deposited. FIG. 1B depicts a “sub-strate” structure, wherein the light enters the device through a transparent conductive layer 12 deposited over a CdTe absorber film 14 which is grown over a sheet substrate 16.
  • In fabricating the “super-strate” structure 10 of FIG. 1A, the transparent conductive layer (TCL) 12 is first deposited on the transparent sheet 11. Then a junction partner layer 13 is deposited over the TCL 12. The CdTe absorber film 14 is next formed on the junction partner layer 13. Then an ohmic contact layer 15 is deposited on the CdTe absorber film 14, completing the solar cell. As shown by arrows 18 in FIG. 1A, light enters this device through the transparent sheet 11. In the “super-strate” structure 10 of FIG. 1A, the transparent sheet 11 may be glass or a material (e.g. a high temperature polymer such as polyimide) that has high optical transmission (such as higher than 80%) in the visible spectra of the sun light. The TCL 12 is usually a transparent conductive oxide (TCO) layer comprising any one of; tin-oxide, cadmium-tin-oxide, indium-tin-oxide, indium-zinc-oxide, and zinc-oxide, which may be doped to increase their conductivity. Multi layers of these TCO materials as well as their alloys or mixtures may also be utilized in the TCL 12. The junction partner layer 13 is typically a CdS layer but may alternately be a CdZnS layer or a selenide layer comprising Zn. The ohmic contact 15 is made of a highly conductive metal such as Mo, Ni, Cr, or a doped transparent conductive oxide such as the TCOs mentioned above. Nitrides of refractory metals (such as Mo, Ta, W and Cr) and Al may also be used in multilayer ohmic contact structures. The rectifying junction, which is the heart of this device, is located near an interface 19 between the CdTe absorber film 14 and the junction partner layer 13.
  • In the “sub-strate” structure 17 of FIG. 1B, the ohmic contact layer 15 is first deposited on the sheet substrate 16, and then the CdTe absorber film 14 is formed on the ohmic contact layer 15. This is then followed by the deposition of the junction partner layer 13 and the transparent conductive layer (TCL) 12 over the CdTe absorber film 14. As shown by arrows 18 in FIG. 1B, light enters this device through the TCL 12. There may also be finger patterns (not shown) on the TCL 12 to lower the series resistance of the solar cell. The sheet substrate 16 does not have to be transparent in this case. Therefore, the sheet substrate 16 may comprise a sheet or foil of metal, a sheet of glass or a foil of a high temperature polymeric material such as polyimide.
  • The CdTe absorber film 14 of FIGS. 1A and 1B may be formed using a variety of methods. For example, U.S. Pat. No. 4,388,483 granted to B. M. Basol et al., describes the fabrication of a CdS/CdTe solar cell wherein the thin CdTe film is obtained by a cathodic compound electrodeposition technique at low electrolyte temperatures, and then the as-deposited n-type CdTe film is type-converted to p-type through a high temperature annealing step to form the rectifying junction with the underlying CdS layer. The compound electrodeposition or electroplating technique typically uses acidic aqueous electrolytes and forms high quality rectifying junctions after the type-conversion step yielding high quality solar cells and modules with conversion efficiencies exceeding 10% (D. Cunningham et al, “CdTe PV module manufacturing at BP solar”, Progress in Photovoltaics, vol. 10, p. 159 (2002)). However, this electroplating technique is slow, yielding 1-2 micron thick CdTe layers in 2-5 hours depending upon the plating conditions and the size of the substrate. As explained in a review titled “Electrodeposition of Semiconductors” (D. Lincot, Thin Solid Films, vol. 487, p. 40 (2005)), CdTe can be cathodically electrodeposited out of an acidic electrolyte containing Cd and Te, at a potential which is more negative than the Te plating potential but more positive than the Cd plating potential. The reason for this is the fact that the free energy formation of CdTe, which is −98.8 kJ/mol, drives the reaction of the Cd species in the solution with Te, forming CdTe, once Te is electrodeposited on the cathode. Kinetics of this reaction is slow and the Te concentration in the acidic solution is low. Other prior art information regarding CdTe electrodeposition may be found in U.S. Pat. No. 4,261,802 by Fulop et al., U.S. Pat. No. 4,425,194 by Kroger et al., U.S. Pat. No. 4,400,244 by Kroger et al., and U.S. Pat. No. 4,345,107 by Fulop et al. There is no in-depth teaching on depositing CdTe films on large area workpieces in these prior art documents. Depositing CdTe films on large workpieces has its challenges both in terms of cost and technology.
  • While electrodepositing a CdTe film over a large workpiece, such as a large transparent sheet (such as a glass substrate with dimensions of 60 cm×60 cm or larger) comprising a transparent conductive layer and a junction partner layer, there are voltage drops that need to be taken into consideration. During deposition, the electroplating current flows; i) through an electrical contact made to the transparent conductive layer, ii) through the transparent conductive layer (such as a transparent conductive oxide layer) flowing parallel to its surface, iii) through the junction partner layer (such as a CdS layer) flowing perpendicular to its surface, and iv) through an already deposited portion of the CdTe film, flowing perpendicular to its surface. This is schematically shown in FIG. 2, which depicts a prior art electrodeposition system 100.
  • The electrodeposition system 100 comprises a container 101 holding a plating solution 102 comprising Cd and Te species. The stack comprising the transparent sheet 11, the transparent conductive layer 12, and the junction partner layer 13 is used as the cathode 107, which at the same time is the workpiece. There is a conductive anode 103 across from the cathode 107. Both the anode 103 and the cathode 107 are immersed in the plating solution 102. A voltage “V” is applied between the anode 103 and the cathode 107 through an electrical contact 105 made to the transparent conductive layer 12, using a power supply 104, such that the cathode 107 is made more negative with respect to the anode 103. The electrical contact 105 is protected from the plating solution 102 by a protective seal 106 which may be made of a non-conductive polymeric material. Upon application of the voltage “V” a plating current “I” starts to flow through the conductive wires connecting the power supply 104 to the anode 103 and the cathode 107. The plating current “I” flows from the anode 103 to the cathode 107 through the plating solution 102 while depositing a CdTe film over the junction partner layer 13. The plating current “I” flows through the conductive portions of the cathode 107 in a distributed manner. For example, at or around a location “A” on the cathode 107, the plating current flows through an already deposited portion 14A of the CdTe film, and then it flows through the junction partner layer 13 and into the transparent conductive layer 12. Then it flows horizontally to the electrical contact 105 as shown by arrow 108. On the other hand, at or around a location “B”, which may be farther away from the electrical contact 105, the current flow path within the transparent conductive layer 12 between the location “B” and the electrical contact 105 is much longer corresponding to a larger voltage drop. As a result, the surface potential of the CdTe film 14A at the location “B” is expected to be different (more positive) than it is at the location “A” if the plating current distribution over the surface of the cathode 107 is uniform. It should be noted that the sheet resistance of a typical transparent conductive oxide used in solar cell structure may be in the range of 5-20 ohms per square.
  • In experimental deposition systems employing small area substrates (such as 10 cm×10 cm substrates) the voltage drops across the substrate do not constitute a big problem and the plating voltage and current values are closely controlled by a power supply, typically employing a reference electrode, assuring that the deposition conditions fall within the region where stoichiometric CdTe is deposited over the whole substrate. In a manufacturing environment, however, where hundreds of large area substrates need to be processed, it may become very expensive to build hundreds of plating systems such as the one shown in FIG. 2, each plating system processing one large area substrate at a time. It also may become expensive to use one power supply per substrate because processing of hundreds of substrates at the same time, in batch mode, requires use of hundreds of power supplies.
  • As the above review demonstrates, there is a need to develop methods and apparatus to deposit high quality stoichiometric CdTe layers on multiple large substrates in a cost effective way.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1A is a cross-sectional view of a prior-art CdTe solar cell with a “super-strate structure”.
  • FIG. 1B is a cross-sectional view of a prior-art CdTe solar cell with a “sub-strate structure”.
  • FIG. 2 is a prior-art plating system.
  • FIG. 3 shows the different process zones yielding films with different Te/Cd molar ratios.
  • FIG. 4A shows a workpiece over which a CdTe film would be electrodeposited.
  • FIG. 4B shows a cross sectional view of the workpiece depicted in FIG. 4A.
  • FIG. 5A is a top view of an electroplating tool processing multiple workpieces.
  • FIG. 5B is a side view of the multi-workpiece electroplating tool shown in FIG. 5A.
  • FIG. 6 is a top view of another multi-workpiece electroplating tool.
  • DETAILED DESCRIPTION OF THE INVENTION
  • The chemical composition of an electrodeposited CdTe film is a function of its surface potential during the electrodeposition period. Potentials close to or more negative than the deposition potential of Cd yield Cd-rich deposits, whereas potentials close to the deposition potential of Te yield Te-rich compositions. What is required for high efficiency solar cell fabrication is a stoichiometric CdTe layer with a Cd/Te molar ratio of near 1.0, which can be obtained only within a specific voltage range between the deposition potentials of Te and Cd.
  • In the example of FIG. 2, because of the different voltage drops between the location “A” and the location “B”, the CdTe layer deposited at or around location “B” may be more Te-rich than the CdTe layer deposited at or around location “A”. Composition of the CdTe film also depends on current density and the solution flow. These are challenges for large area deposition of CdTe films.
  • In general, the present invention forms high quality CdTe thin films on multiple large area substrates using one plating system and one power supply. This is achieved by defining the geometry of the electroplating tool and by carefully selecting the process conditions as will be described below.
  • FIG. 3 schematically shows a general relationship between the plating potential (E), plating current density (J), and the plated species when a film is electrodeposited on a conductive cathode out of an acidic plating bath containing Cd and Te species. As can be seen from this figure, there are four different zones or regions in this process. For process conditions that fall within Zone I, the compound CdTe is electroplated on the cathode surface in its stoichiometric form, i.e. in a form where Cd/Te molar ratio is near 1.0. In Zone II, a deposit comprising the compound CdTe or CdTex (where x>1) may be electrodeposited with or without excess elemental Te. Alternately, it is also possible to have the compound CdTex in the form of CdTe2 in the deposited film in zone II. Zone III corresponds to electrodeposition potentials that are very close to or more negative than the deposition potential of Cd, which is shown as “V1” in FIG. 3. That means elemental Cd can be electroplated in zone III possibly along with some CdTe phase. Zone IV is close to the Te deposition potential, shown as V2, and therefore elemental Te may be electroplated in region IV, possibly along with a Te-rich CdTex phase. It should be noted that the values of the deposition potentials V1 and V2 may be about −1.1 V and −0.7V, respectively, with respect to a Mercurous Sulfate Electrode, respectively.
  • FIG. 3 demonstrates the fact that the region or the process window to electrodeposit stoichiometric CdTe compound with a Te/Cd molar ratio of 1.0 (Zone I) is relatively small and it gets narrower as the current density increases. For example, while at a current density value of “JA” stoichiometric CdTe compound can be electroplated at a deposition voltage range between “VA” and “V1”, it can only be deposited at a voltage range between “VB” and “V1” once the current density is increased to “JB”. As an example, “JA” may be in the range of 0.05-0.5 mA/cm2 while “JB” may be in the range of 0.7-5.0 mA/cm2. This means that for electrodepositing on large area workpieces, the voltage drop present on the surface of the large workpiece between areas near the electrical contacts and areas away from the contacts would not allow use of high current densities if the goal is to electrodeposit a stoichiometric CdTe compound over the whole surface of the workpiece. Therefore, to achieve uniformly stoichiometric CdTe over large area, low current densities would be used reducing the throughput of the process. With lower throughput, one needs to process many substrates at a time, e.g. hundreds of substrates at a time. As discussed before, if each substrate has its own power supply and its own plating system, processing hundreds of substrates in a batch mode may be expensive and complex.
  • Unlike electrodeposited metals, electrodeposited Group IIB-VIA compound layers, such as CdTe layers, have high electrical resistivities. In their as deposited forms CdTe layers may have resistivity values in a range of 104-107 ohm-cm, compared to metal resistivities, which may be in the range of 10-4-10-6 ohm-cm. This means that as a CdTe layer is electrodeposited on a junction partner layer, such as a CdS layer, the voltage drop across the deposited CdTe film increases as the thickness of the CdTe layer increases. Present inventions utilize this fact in a beneficial way to deposit CdTe layers over many workpieces in a single electrodeposition tool.
  • The workpieces over which CdTe films are electrodeposited have a first dimension which is larger than 50 cm. A second dimension of the workpieces may be larger than or equal to the first dimension, preferably larger than the first dimension. A sketch of an exemplary workpiece 39 comprising a transparent sheet 40, a transparent conductive layer 45 and a junction partner layer 48 is shown in FIG. 4A. FIG. 4B shows a cross sectional view of the workpiece 39 taken along the Z-Z direction. The transparent sheet 40 has two short edges 41A and 41B with a first dimension, and two long edges 42A and 42B or contacting edges, with a second dimension. A first contact strip 43 and a second contact strip 44 are placed along the two long edges 42A and 42B, respectively, such that these contact strips, which are conductive, make good physical and electrical contact to the transparent conductive layer 45 disposed on the transparent sheet 40. The contact strips 43, 44 are protected from the plating solution by a non-conductive protective layer 46. The first contact strip 43 and the second contact strip 44 are electrically shorted to each other by wire 49, which in turn is connected to a terminal wire 49A. The junction partner layer 48 (such as a CdS layer) is disposed over the transparent conductive layer 45. The workpiece 39 has a front surface 39A and a back surface 39B. The CdTe film is electrodeposited over the front surface 39A, which comprises the junction partner layer 48, during the electrodeposition process.
  • FIGS. 5A and 5B schematically show a top view and a side view, respectively, of an exemplary plating tool 300 that processes 20 workpieces at the same time. Such tools may be used to process at least 20, preferably at least 40 and most preferably more than 50 large size workpieces at the same time. Each workpiece may be similar to the workpiece 39 shown in FIGS. 4A and 4B. The smallest dimension of the workpieces is preferably more than 50 cm, most preferably at least 60 cm. Electrical contact is made to each workpiece using two contact strips disposed over the two long edges of the workpiece as shown in FIG. 4A. The plating tool 300 has a container 301 that holds a plating solution 302 comprising Cd and Te species. Each workpiece 304 has a front surface 305A and a back surface 305B, which are similar to the surfaces 39A and 39B described in relation with FIG. 4B. Accordingly, CdTe electrodeposition is carried out over the front surface 305A of each workpiece 304 at the same time. Multiple anodes 303 are placed in the plating solution 302 and each anode 303 faces two front surfaces 305A of two workpieces 304. All the anodes are electrically shorted to an anode busbar 309 through wires 308. All the workpieces 304 are also electrically connected to a single cathode busbar 307 through wires 306. It should be noted that each wire 306 is equivalent to the terminal wire 49A of FIG. 4A and therefore they have electrical connection to contact strips (not shown in FIGS. 5A and 5B) employed for each workpiece 304.
  • During process, power is applied between the anode busbar 309 and the cathode busbar 307, initiating cathodic CdTe deposition over the front surfaces of all workpieces at the same time. Power may be applied through application of a controlled voltage or controlled current by a single power supply because the deposition process is self correcting. If for example, the current density increases for a specific workpiece in the group for any reason (such as non-uniformity of solution flow), the thickness of the CdTe film deposited over that workpiece would also increase. As indicated above, the resistivity for deposited CdTe layers is at least about 104 ohm-cm, and typically falls in the range of about 104-107 ohm-cm. Increased CdTe thickness would increase the resistance of the electrical circuit for that specific workpiece. Increased resistance would, in turn, lower the deposition current, therefore self adjusting the process back to normal where all the workpieces receive substantially the same current density, and therefore substantially the same stoichiometric CdTe layer (e.g., same thickness and same compositional constituents). The above mentioned self adjustment mechanism allows use of a single power supply and eliminates the need for employing one power supply for each workpiece and continually monitoring the voltage-current values. It should be noted that if the plated material was a low resistivity metallic film, a thickness change of the deposited film over one specific substrate would not introduce any significant change in resistance and therefore, the self adjustment mechanism would not work.
  • FIG. 6 schematically shows a top view of another exemplary electroplating tool 600 that processes eight workpieces at the same time. The electroplating tool 600 has a near cylindrical container 601 that holds a plating solution 602 comprising Cd and Te species. Each workpiece 605 has a front surface 605A and a back surface 605B, which are similar to the surfaces described in relation with FIG. 4B. Accordingly, CdTe deposition is carried out over the front surface 605A of each workpiece 605. A single anode 603 is placed in the plating solution 602 facing the front surface 605A of the workpieces 605. All the workpieces 605 are electrically connected to a single cathode busbar (not shown). During process, power is applied between the anode 603 and the cathode busbar, initiating cathodic CdTe deposition on all of the workpieces at the same time.
  • The preferred conditions of running the process of the present inventions are as follows: If the number of large area workpieces is given by “N”, the length of the short edges of each workpiece (41A and 41B in FIG. 4A) is “W”, the length of the long edges of each workpiece (42A and 42B in FIG. 4A) is “L”, then the preferred plating current applied to the plating system is preferably less than or equal to a value given by the formula, I=4NL/5W, where I is in Amperes. For example, if 50 workpieces of 60 cm by 120 cm size are processed at the same time, the current applied would be (4×50×120)/(5×60)=80 amperes. This corresponds to a current density of 80000/(50×60×120)=0.22 mA/cm2 on each workpiece. By selecting such a current density value, it is assured that the voltage drop across the transparent conductive layer of each workpiece is within an acceptable range to yield compositionally uniform CdTe layers.
  • In general, electrodepositing CdTe films over multiple large size workpieces, each with a short edge dimension of “W”, a plating current density of less than about 1000/W2 is preferred, wherein W is given in units of centimeters and the current density is given in the units of milliamps per square centimeter (mA/cm2). However, the plating current density should be more than about 300/W2 to avoid excessive time loss during deposition. Accordingly, the preferred current density for processing 20 workpieces, each with a short edge dimension of 80 cm would be less than 1000/6400=0.16 mA/cm2, and more than about 0.05 mA/cm2. The total current applied would be less than (0.16×20×80×L), where L is the dimension of the longer edge of each workpiece.
  • The techniques described above are also applicable to the formation of Group IIB-VIA absorber layers that include other elements, such as films comprising alloys of CdTe with materials such as Zn, Hg, Mn and Mg. The technique are also applicable for absorber layers containing Te wherein the electroplating solution comprises Te.
      • Although the present invention is described with respect to certain preferred embodiments, modifications thereto will be apparent to those skilled in the art.

Claims (10)

1. A method of forming a solar cell absorber film on multiple work pieces in a self-adjusting manner, each workpiece having a conductive surface, two short edges substantially parallel to each other and two contacting edges substantially parallel to each other, the length of the contacting edges being longer than or equal to the length of the short edges, the method comprising;
making electrical contacts to the conductive surface of each workpiece along the two contacting edges,
connecting the electrical contacts of each workpiece to a cathode busbar,
immersing each workpiece into a solution comprising Te,
immersing at least one anode into the solution,
applying a potential difference between the at least one anode and the cathode busbar making the cathode busbar more negatively charged compared to the at least one anode thereby causing a current density to flow through each of the multiple workpieces, wherein
the solar cell absorber film has a resistivity of at least 104 ohm-cm such that the current density received by each workpiece is self-adjusted by the resistivity, to be substantially the same.
2. The method of claim 1 wherein the conductive surface of each workpiece comprises a transparent conductive layer and a junction partner layer and the solar cell absorber film is formed on the junction partner layer.
3. The method of claim 2 wherein the junction partner layer comprises cadmium sulfide and the solution further comprises Cd.
4. The method of claim 1 wherein the current density is less than about 1000/W2, wherein the current density is given in units of mA/cm2 and W is the length of the short edge of the multiple workpieces given in units of centimeters.
5. The method of claim 4 wherein the number of workpieces is at least 20 and the current density is more than about 300/W2.
6. The method of claim 4 wherein the value of W is at least 50 cm.
7. The method of claim 1 wherein the solution further comprises at least one of Zn, Hg, Mn and Mg.
8. The method of claim 3 wherein the solution further comprises at least one of Zn, Hg, Mn and Mg.
9. The method of claim 1 wherein the size of a plurality of the workpieces is such that their length and width are each greater than or equal to 60 cm.
10. An electrodeposition system to form a CdTe containing film over multiple workpieces, each workpiece having a conductive surface, two short edges substantially parallel to each other and two contacting edges substantially parallel to each other, the system comprising;
a tank for holding a solution comprising Cd and Te,
electrical contact strips configured to make contact to the conductive surface of each workpiece along the two contacting edges,
a cathode busbar for connecting to the electrical contact strips,
at least one anode configured for immersion into the tank, and
a single power supply configured to apply a potential difference between the at least one anode and the cathode busbar.
US13/211,619 2010-08-17 2011-08-17 Method and apparatus for electrodepositing large area cadmium telluride thin films for solar module manufacturing Abandoned US20120043215A1 (en)

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