US20120012365A1 - Thermal flex contact carriers #2 - Google Patents

Thermal flex contact carriers #2 Download PDF

Info

Publication number
US20120012365A1
US20120012365A1 US13/107,911 US201113107911A US2012012365A1 US 20120012365 A1 US20120012365 A1 US 20120012365A1 US 201113107911 A US201113107911 A US 201113107911A US 2012012365 A1 US2012012365 A1 US 2012012365A1
Authority
US
United States
Prior art keywords
contact
tfcc1
contacts
shows
carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/107,911
Inventor
Gabe Cherian
Don Ellison Saunders
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/075,060 external-priority patent/US6884707B1/en
Application filed by Individual filed Critical Individual
Priority to US13/107,911 priority Critical patent/US20120012365A1/en
Publication of US20120012365A1 publication Critical patent/US20120012365A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • H05K3/3426Leaded components characterised by the leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • H01L23/49555Cross section geometry characterised by bent parts the bent parts being the outer leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/742Apparatus for manufacturing bump connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H05K3/308Adaptations of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1182Applying permanent coating, e.g. in-situ coating
    • H01L2224/11822Applying permanent coating, e.g. in-situ coating by dipping, e.g. in a solder bath
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13075Plural core members
    • H01L2224/1308Plural core members being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13075Plural core members
    • H01L2224/1308Plural core members being stacked
    • H01L2224/13083Three-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/13124Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13184Tungsten [W] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/13575Plural coating layers
    • H01L2224/1358Plural coating layers being stacked
    • H01L2224/13582Two-layer coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/13599Material
    • H01L2224/136Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/13599Material
    • H01L2224/136Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13655Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1401Structure
    • H01L2224/1403Bump connectors having different sizes, e.g. different diameters, heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/1601Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/4556Disposition, e.g. coating on a part of the core
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45599Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73257Bump and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/819Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
    • H01L2224/81901Pressing the bump connector against the bonding areas by means of another connector
    • H01L2224/81903Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/71Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01011Sodium [Na]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01043Technetium [Tc]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01075Rhenium [Re]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09418Special orientation of pads, lands or terminals of component, e.g. radial or polygonal orientation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/1031Surface mounted metallic connector elements
    • H05K2201/10318Surface mounted metallic pins
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10424Frame holders
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10689Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10704Pin grid array [PGA]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10719Land grid array [LGA]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742Details of leads
    • H05K2201/1075Shape details
    • H05K2201/10818Flat leads
    • H05K2201/10825Distorted or twisted flat leads, i.e. deformed by torque
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742Details of leads
    • H05K2201/1075Shape details
    • H05K2201/10871Leads having an integral insert stop
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742Details of leads
    • H05K2201/10886Other details
    • H05K2201/10946Leads attached onto leadless component after manufacturing the component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10977Encapsulated connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0769Dissolving insulating materials, e.g. coatings, not used for developing resist after exposure
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention generally relates to high-density interconnections between electronic devices and components.
  • the invention relates more specifically to what is referred to as “permanent” interconnections, which include solderable interconnections, and/or mounting of electronic components on boards or on substrates, or on other electronic components and the like.
  • the present invention covers in particular interconnections between “lead-less” electronic components and boards and/or substrates, or between similar lead-less components.
  • soldering such components directly to substrates or to PCBs can create certain problems. It can lead to premature failure of the interconnecting joints. This is especially true, when the component is relatively large, i.e. approx. 1 ⁇ 2 inch or larger on the side, and when the material of the component is different than that of the substrate, e.g. when the component is silicon or ceramic, while the substrate is FR4, and when the temperature can vary considerably during the operating life of the assembly.
  • the problem results mostly from exposing electronic assemblies to varying temperatures, such as thermal cycling or power cycling, or simply from being exposed to harsh environment, including hot and cold temperature environment. This is especially true, when the component is relatively large, when the material of the component is different than that of the substrate, and with different TCEs, i.e. where TCE Mismatch exists between the assembled devices, and when the temperature fluctuates considerably and frequently during the life of the assembly.
  • the additional problem nowadays is the fact that many of the components are being miniaturized.
  • the center distances between contact pads are getting smaller and smaller, and some of the old inventions can no longer keep up with such miniaturization.
  • BGAs have center distances down to 0.020′′ (approx. 0.5 mm) or less, and when we consider Chip Scale Packaging, the center distances can be even smaller.
  • the Cherian Solder Columns were originally designed and built to work with 0.050′′ (approx. 1.25 mm) center distances. Cherian Solder Columns cannot readily be simply scaled down to size. For this reason, Cherian created the No-WickTM concept mentioned in the Refs.
  • TFCC2 The purpose of this present invention, TFCC2, is to improve on some of the features of the mother invention, TFCC1, while keeping many of the original features of TFCC1. This will be done by adding a few new features, for the purpose of improving and enhancing the usefulness of the inventions.
  • TFCC1 and TFCC2 are to solve the problems resulting from exposing electronic assemblies to varying temperatures, such as thermal cycling or power cycling, or simply from being exposed to harsh environment, including hot and cold temperature environment and especially if there is a TCE mismatch between the joined components.
  • the general object of the two inventions is to introduce certain changes and/or improvements in the way Integrated Circuit (IC) Packages known as BGAs, Ball Grid Array Packages and other similar leadless devices and chips, and assemblies that incorporate such packages and/or chips, so that assemblies made out of such devices would become more reliable and can better withstand the above mentioned undesirable effects of thermal cycling and power cycling and thermal fluctuations.
  • IC Integrated Circuit
  • Another object of the two inventions is to provide means to reliably mount leadless electronic packages or components, such as a BGA on Printed Circuit Boards (PCBs), or chips on substrates, especially to withstand any undesirable effect of TCE Mismatch and the effects of Thermal Cycling and/or Power Cycling.
  • PCBs Printed Circuit Boards
  • a further object of the two inventions is to provide improved interconnections and mounting means for Integrated Circuit Chips and Packages, to make such assemblies more reliable and to better withstand stresses induced by thermal effects and/or by shock and vibrations.
  • These mounting means include providing “contacts or legs or leads or columns” between the chip or the package and their carrying base, i.e. a PCB or the like, to provide a “buffer” zone, where the columns would act as flexible joints, to absorb these undesirable effect of TCE Mismatch, and/or effects of Thermal Cycling and/or Power Cycling.
  • Another object of both inventions is to accomplish all the above, especially for High-Density devices, i.e. devices with small center distances between their contact points.
  • a corollary result is that we can convert any “leadless” package or device to become a “leaded” one. So for example, a leadless BGA would become similar to a Pin Grid Array Package.
  • Yet another object is to reinforce the assembly against severe shock and vibrations, by providing an “anchor” between the components of the assembly.
  • TFCC2 One last, but not least, special object of the present invention, is to improve on the TFCC1, by providing new designs and methods of construction, so as to attain longer, taller, higher leads between the devices to be attached and assembled together, and consequently to further improve the reliability and the thermal cycling life of such assemblies.
  • TFCC2 The summary of the main goals and the advantages of the proposed changes and improvements of this present invention, TFCC2, is to provide leads, that are taller, and more slender and flexible than can be provided by TFCC1, and to make these leads more yielding, thus requiring less force to hold them in place at their anchor points in the body of the package.
  • This translates itself into a situation, where the solder joints/interconnections between the devices would be less stressed, thus less apt to crack or break, so as to reduce the occurrence of those undesirable solder joint failures, thus prolonging the life of the electronic systems which contain these chips, packages and the like. In short, this translates into improving the reliability of the electronic assemblies and systems.
  • a corollary resulting advantage is that the interconnections between the package and the substrates would last longer and the whole system would be more reliable and last longer as well.
  • TFCC2 's main purpose is to provide new construction designs, which will result in obtaining leads, which are taller, larger, higher than the leads that can generally be obtained by TFCC1, and hence the TFCC2 leads will be more flexible than the TFCC1 leads, and hence they would provide a longer thermal Cycle life and more reliable assemblies than with TFCC1.
  • the resonance of the device will be different, depending on the direction of the shock and/or vibration, applied on it. So, if the direction of the shock and vibration is in a generally favorable direction with respect to the direction of the leads, then the package will withstand the stresses well. On the other hand, if the stresses are in an unfavorable direction, then the package may fail.
  • the stiffness of the leads would be more evenly distributed, and the package may fare better regardless of which direction the shock and vibrations are coming from.
  • FIG. 1 which is the Prior Art-TFCC1-FIG. 2-A, explains the basics of the whole TFCC concept.
  • FIG. 2 which is the Prior Art-TFCC1-FIG. 20-B, shows a view of the TFCC, by itself and making it clear that the contact are created out of one single sheet of conductive metal.
  • FIG. 3 which is Prior Art-TFCC1-FIG. 45, shows a pattern of contacts, showing some details of the contact blanks and their pattern of distribution and orientation for a device that has ten concentric rows of contact pads, and it shows also the moats and the etching around the “pads”, where the legs length “L” is 0.635 mm.
  • FIG. 4 which is Prior Art-TFCC1-FIG. 48, shows a close up view of the top three rows of contacts shown in FIG. 3 , and the “angles” of the oriented contacts, A 9 , B 9 , C 9 , D 9 , and E 9 , from Row 9 of FIG. 3 and highlights the areas where the contact blanks do interfere with each other.
  • FIG. 5 which is Prior Art-TFCC1-FIG. 49, also shows a close up view of the top three rows of contacts and the arrangement with a new angle, which prevents the interference between the contact blanks, which was present in FIG. 4 .
  • FIG. 6 which is Prior Art-TFCC1-FIG. 43, shows a view of half the profile of two adjacent contacts arranged in a row and in line, one after the other and their relative dimensions.
  • FIGS. 7 and 8 which are Prior Art-TFCC1-FIG. 44-A and 44-B, show a study of the relation between the pitch, the pad diameter, the width of the moat, and the left-over length of the leg.
  • FIG. 9 which is Prior Art-TFCC1-FIG. 50, shows a configuration of contacts for a device, which has only one peripheral row of contact pads.
  • the leg dimension L is 0.635 mm for a pitch of 0.80 mm. Similar to L 1 in the previous FIG. 6 .
  • FIG. 10 which is Prior Art-TFCC1-FIG. 51, shows an example, where the leg length was increased from 0.635 mm to 1.00 mm, just for illustration purposes.
  • FIG. 11 which is Prior Art-TFCC1-FIG. 52, shows the case where the device has two peripheral rows of contact pads. Again, the leg dimension L is the same, i.e. 0.635 mm for a pitch of 0.80 mm.
  • FIG. 12 which is Prior Art-TFCC1-FIG. 53, shows an almost similar arrangement of two peripheral rows, as in FIG. 11 , which is Prior Art-TFCC1-FIG. 52.
  • the only difference is that the length of the contacts was also increased, as in FIG. 10 , from 0.635 mm to 1.00 mm, just for illustration purposes, to gain more flexibility.
  • FIG. 13 shows the germ of the idea that created TFCC2.
  • FIGS. 14 through 18 show details about examples of TFCC2s, based on the concept shown in FIG. 13 .
  • FIG. 19 shows a strip of carrier, where single contacts are being inserted in it.
  • the contacts are all in the same direction (orthogonal), while in FIG. 19-B , the contacts are “oriented”.
  • FIG. 20 shows how strips like the ones shown in FIG. 19 can be stacked one next to the other, to create a slab, as in FIG. 20-C , with the contact leads arranged in a matrix, to match the corresponding device to be attached to.
  • the strips can be made as a one single row arrangement each, as in FIG. 20-A , or can be made as a double row arrangement each, as in FIG. 20-B . Again, more rows can be accommodated in one single strip, as desired.
  • FIG. 21 shows details of how the “foot” of the contact can be formed.
  • FIG. 22 shows details of how the contacts can be “blanked” out of a continuous Leadframe and stitched into a carrier wafer.
  • the contacts can be stitched to be “orthogonal” or “oriented”.
  • FIG. 23-A shows an ISO view of a contact, which has “barbs”, to ensure that it will be more securely retained into the carrier wafer.
  • FIG. 23-B shows a bottom view of the contact, highlighting the fact that the foot could be made slightly narrower than the stem.
  • FIG. 24 shows an ISO view and an end view of a contact that is being formed into a ZEE or an ESS shape, so as to impart to it the capability of flexing in the Z-direction, in addition to flexing in the X- and Y-directions.
  • FIG. 25 shows another contact being formed into a “CEE” shape, also to impart to it, the capability of flexing in the Z-direction.
  • FIGS. 26 and 27 show a few slightly different variations of the embodiments shown in FIGS. 19 through 23 .
  • FIG. 28 shows some different details as to how we can form the wire contacts shown in FIGS. 26 and 27 .
  • FIG. 29 shows three different ways we can make and form the contact elements, especially if we want the stem to flex more at the middle of the height of the stem.
  • FIG. 30 shows how the contacts shown in FIG. 28 could be attached to a BGA. It highlights at least two important points. One, that the contacts are oriented as per present invention. Two, that the “belly” of the contact is pointing inwards, which makes it easier to form.
  • FIGS. 31-A and 31 -B show a carrier wafer, as per Prior Art TFCC1, which could be used in this TFCC2 invention.
  • TFCC1 The problem or weakness with the mother invention, TFCC1, is the result of the way it is manufactured.
  • One of the TFCC1 goals and objectives was to make the device as economically as possible. So in one of the major embodiments of TFCC1, we decided to carve out all the contacts out of one single sheet of conductive metal. But as a result, we became limited or rather restricted as to how tall or high we can make the contacts/legs/leads/columns.
  • TFCC1 introduced the concept of the thermal flex contacts as shown in FIG. 1 , which is the Prior Art-TFCC1-FIG. 2-A. TFCC1 allows for attaching each one of such contact to the leadless device, such as a BGA, although the preference would most probably be to try to attach more than one contact at the same time. So, this is why TFCC1 went also in the direction of the embodiment shown in FIG. 2 , which is the Prior Art-TFCC1-FIG. 20-B.
  • FIG. 2 shows how one of the major embodiments of the TFCC1 is made.
  • the main feature is that a large number of the contacts/legs/leads/columns are produced out of one “blank” sheet of conductive metal, and the individual contacts stay attached to that sheet until they are attached to the devices that they are intended to work with ultimately. This makes it easier and more economical to create and to handle the contacts and to go through the manufacturing and the final assembly processes.
  • An additional feature is that we can “orient” the leads in a way to reduce their resistance to bending, thus improving even further their effectiveness in reducing the stresses on the solder joints and prolonging the operating life of the assemblies and the electronic systems.
  • the third feature of the invention is to “CONTROL” the solder flow along the column, so as to ensure that there will still be some amount of flexibility in the column, after all the soldering/joining operations have been completed.
  • FIG. 2 which is Prior Art-TFCC1-FIG. 20-B, shows that the individual contacts are carved out from one flat sheet of metal, which we will to as the base metal sheet.
  • FIG. 4 which is Prior Art-TFCC1-FIG. 48, shows the same view as in FIG. 3 , which is Prior Art-TFCC1-FIG. 45, but it also shows the “angles” of the oriented contacts, A 9 , B 9 , C 9 , D 9 , and E 9 , which are the contact blanks in the row #9 of the matrix.
  • the angle A 1 of the A 9 contact is “zero”, because the contact is in line with the center line.
  • the angle E 1 of the E 9 contact makes it such that the E 9 contact does not interfere with the E 10 contact. So, if we could re-orient all the contacts that are interfering, so they would be oriented at a similar angle like that of E 9 contact, then we would be home free!
  • FIG. 5 which is Prior Art-TFCC1-FIG. 49, shows the arrangement with the new angle. All the 4 contacts, which were interfering with the contacts above them, have been re-oriented to have a same angle like the angle E 1 in FIG. 4 . Now, we see that there is no interference any more.
  • This angle would control the orientation angle of the contact after it has been fully formed.
  • FIG. 6 which is Prior Art-TFCC1-FIG. 43, shows a study of the essential dimensions of the contact blanks, along one of the central axes, where the space available for the contact blanks is at a minimum.
  • P the pitch between the contact pads of the devices to be assembled, controls the space available for the contact blanks.
  • M is the width of the moat and it is controlled by the manufacturing process, which is used to create the moat. The rest of the dimensions are clearly illustrated in the figure.
  • FIG. 6 which is Prior Art-TFCC1-FIG. 43, shows a view of half the profile of two adjacent contacts arranged in a row and in line, one after the other. This arrangement would give us the “tightest” or “smallest” room/space to create the contacts. This will also give us the dimensions of all the other contact blanks in the whole matrix, because the contacts should all have the same length. The dimensions were selected to accommodate a BGA with a pitch of 0.8 mm for this example. Since the moat width, M, is governed by the manufacturing process, and assuming that we will remove metal, say by chemically milling the moat or by a laser or stamping operation, then we have opted to make the moat approximately about 0.1 mm wide.
  • the contact ref # 4301 on the left hand side of the figure shows a moat 4311 all around it.
  • the remaining material inside the moat can be visualized to make the three major portions of the contact.
  • First is the “Head” 4321 with a length H, which would provide the area to be joined to the BGA pad.
  • the “Stem” 4325 with a length S 1 , which will be the “column” between the Head and the Foot.
  • the grooves 4327 and 4329 are optional features, to facilitate the bending process.
  • the pitch “P”, which is the distance between the centers of the contact pads governs and controls the space available to provide the three major portions of the leg.
  • the length L 1 of the “leg” measured from the center of the “pad” turned out to be 0.533 mm, for a pitch of 0.8 mm and using a BGA contact pad diameter of 0.33 mm.
  • FIGS. 7 and 8 which are Prior Art-TFCC1-FIGS. 44-A and 44-B, show a study of the relation between the pitch, ref # 4411 , the pad diameter, ref # 4413 , the width, ref # 4415 , of the moat, ref # 4437 , and the left-over length, ref # 4417 , of the leg.
  • the total length, ref # 4431 , of the leg, ref # 4433 will provide the pad, ref # 4435 , the two necks, ref # 4421 and ref # 4423 , the stem, ref # 4425 , and the flat bottom, ref # 4427 .
  • FIG. 9 which is Prior Art-TFCC1-FIG. 50, shows a configuration of contacts for a device, which has only one peripheral row of contact pads.
  • the contacts are shown to be oriented, as best desired for stress reduction. Attaching the TFCC would basically convert a leadless device to a leaded device.
  • the length of the contact legs can be increased without any restrictions, other than the question of space or the height of the device on top of the PCB, for example.
  • FIG. 10 which is Prior Art-TFCC1-FIG. 51, shows such an example, where the leg length was increased from 0.635 mm to 1.00 mm, just for illustration purposes. Of course, it can be made longer.
  • FIG. 11 which is Prior Art-TFCC1-FIG. 52, shows the case where the device has two peripheral rows of contact pads.
  • the contacts were arranged so that the outer row of contacts would start pointing outwards, while the contacts of the inside row would start pointing inwards.
  • the legs would align properly and their ends, which will be soldered to the PCB, will be located properly at their correct respective positions.
  • FIG. 12 which is Prior Art-TFCC1-FIG. 53, shows an almost similar arrangement of two peripheral rows, as FIG. 11 , which is Prior Art-TFCC1-FIG. 52.
  • the only difference is that the length of the contacts was increased, to gain more flexibility. Again, in such a case, there is hardly any limit as to how much you can increase the length of the leg, as explained above.
  • FIG. 9 which is Prior Art-TFCC1-FIG. 50, through FIG. 12 , which is Prior Art-TFCC1-FIG. 53. This will be the starting point for the TFCC2 concepts described in this present invention.
  • TFCC Flexible Leads
  • PCB Printed Circuit Boards
  • the mother invention the TFCC1
  • the TFCC1 has one major weakness or shortcoming.
  • the length or height of the leads that the TFCC1 can provide is limited and restricted and may not give us as much flexibility as we may need or as we may like to have.
  • TFCC2 The purpose of this present invention, TFCC2, is to provide solutions, which will allow us to do just that, i.e. to provide longer taller higher leads.
  • TFCC1 also adopted the original basic concept of the No-WickTM, Ref xxx, which is to control the flow of solder, so that the solder stays at and/or near the joints between the column ends and the electronic components.
  • the solder should not flow away from the column ends, and should not migrate and stick to the stem of the column. If it does, then the column will become thicker and less flexible. If this happens, then we would reduce the benefits of having slender and flexible columns as the connecting element, and we could go back and have premature failures of such assemblies. So, this No-WickTM concept has been incorporated in the above TFCC1 invention and will be retained and included in the present TFCC2 inventions as well.
  • An additional feature is to have the columns curvilinear.
  • FIGS. 13 through 29 or XXX was given already earlier above. Please review them at that location.
  • FIGS. 1 through 12 were also included in the above Brief Description of the Drawings, but they covered the features of the mother invention, TFCC1, which we are trying to solve here now.
  • FIGS. 13 through 18 are views of FIGS. 13 through 18 .
  • FIG. 13 shows a rough concept of the basic idea of the first embodiment. It shows two concentric parts, part 1 and part 2 , one “interposed” inside one other. Each one of these two parts can be extracted or excised from a TFCC1, such as those described in FIGS. 9 through 12 . We could refer to either of them as a TFCC2 Contact Annular. And depending on it size, we can give a size number as well.
  • FIG. 14 shows a TFCC2 Contact Annular, which was extracted from the TFCC1 shown in FIG. 12 . If we take the TFCC1 of FIG. 12 and fold the contact blanks so that the stems will be generally perpendicular to the generally flat body of the TFCC1, and if we cut out excessive portions of the flat base sheet, or the carrier, from the inside area and from the outside area which included the registration tabs etc, then we would end up with a TFCC2 Contact Annular, that would look like the one shown in FIG. 14 .
  • FIG. 12 Let's look at FIG. 12 again.
  • the rows are identified by numbers that run from number 1 at the central horizontal axis, and going out to number 2, 3, etc.
  • the two rows of contacts in this FIG. 14 are rows number 9 and 10. So, we can refer to this TFCC1, in FIG. 12 , as a TFCC1 “9-10”. Consequently, we will refer to the TFCC2 Contact Annular, which was derived from it, and which is shown in FIG. 14 , as the TFCC2 Contact Annular “9-10” or simply TFCC2 “9-10”.
  • TFCC2 Contact Annular with only one row, by excising it from a TFCC1 like in FIG. 10 , for example.
  • this temporary common base can be made of a sheet of solder mask material, and can be place on the stem side of the contacts, leaving the side of the contacts that will adjacent to the BGA unencumbered.
  • the annulars can be held together by a removable/dissolvable or stay-in-place skin, either above or below the shown surfaces, or in between the annulars.
  • FIGS. 19 through 21 show the main concepts of the Second Embodiment, with some variations thereof.
  • FIG. 19 shows a strip of carrier wafer 192 , which carries one single row of contact “pins”.
  • the individual contact pins can be prepared in advance and then inserted into the strip, one at a time, or several contacts at a time. Again, a person skilled in this art can come up with more that one way to accomplish this insertion task.
  • FIG. 19-A shows that the contacts have been lined up, so that all of them will be in the same direction or orientation. I refer to this arrangement as “orthogonal”. The pitch would match the pitch of the respective devices that will use these contacts, and the length of the stem can be whatever we want it to be.
  • FIG. 19-B the lower view in this figure, shows a similar arrangement, except that now, we have oriented the contact lances, according to the mother and the present invention, i.e. “so that they present the least resistance to bending/flexing in the expected respective direction of the thermal deformation of the respective devices to be attached by these contact pins.”
  • the degree of orientation, or rather the angle of each individual contact will be based on the respective position or location of that individual contact, with respect to the whole matrix of contacts of the receiving device, such as a BGA for example.
  • the strip shown in FIG. 19-B is intended to create the row #9 in a device like the one of FIG. 14 , then the orientation angles of the individual contact would match the orientation angles shown for the contacts in row #9 of that device in FIG. 14 .
  • the strip shown in FIG. 19-B will create the row #10 of that device of FIG. 14
  • the orientation angles of the individual contact would be slightly different. The angles will be selected to match the angles of the contacts in row #10 of that device in FIG.
  • each strip will be identified as to which location it belongs to in the specific matrix. This will be repeated as necessary, so that when the individual strips will be joined side by side, as in FIG. 20-C , then all the contacts will be oriented properly.
  • each one of the contact leads will be oriented in its individual respective direction, which will coincide with the ray from the thermal center, or fixation point, of the device, going to the face of the individual respective contact lance, so that every such individual lance will be oriented as per present invention, i.e. “so that it would present the least resistance to bending/flexing in the expected respective direction of the thermal deformation of the respective devices to be attached by these pins.”
  • solder foot which will be attached to the second device, e.g. a PCB.
  • FIG. 20-A shows a similar strip, similar to the one in FIG. 19-A , with the contact lances all oriented in one direction, i.e. orthogonal, but where the PCB end of the contacts have been bent/folded, so as to create a foot, to facilitate the soldering of the lead to the PCB pads, for example.
  • FIG. 20-B shows two such strips, side by side, or a “dual row” strip.
  • the feet of the individual contacts can be bent/folded first and then the strips would be placed side by side, or the feet can be folded afterwards. Also, you can notice that the feet in FIG. 20-B are pointing towards each other, i.e. the folds are in opposite directions. This is an option.
  • the second option is to bend all the feet to point in the same similar direction, which could be easier to manufacture and to handle.
  • the third option is to “orient” the feet as per present invention. In this case, it would make sense to orient the whole contact, including the lance of the contact, as per present invention, and simply fold the feet so they become oriented automatically.
  • FIG. 20-C shows several such strips placed side by side, to create a TFCC, i.e. a slab of TFCs.
  • the individual strips will be joined together to create a matrix of contacts, which would correspond and match the matrix of contact pads of the devices to be assembled.
  • FIG. 21 shows one possible method for fabricating and forming the solder feet of the contact elements, to create the feet which will be soldered to a PCB or a substrate. Shown are the clamps, which can act such that one clamp would apply pressure or simply acts as a mechanical stop, while the other clamp at the opposite side of the lance would act as the anvil. Then a third movable member can act as the pusher slide to fold the foot as desired.
  • the pusher can have a smooth rounded front corner to facilitate the folding operation.
  • FIG. 21-A shows an isometric view of a strip 211 , with a number of contacts 221 inserted in it. The lower tip of the contact at the left hand end of the strip is being folded to create the foot of the lead which will be soldered to the PCB or the substrate.
  • FIG. 21-B shows an end view of the parts involved.
  • Press 214 and Anvil 215 can be shaped, as in FIG. 10-C , such that they can “trap” the contact lance and have a better control on its position during the folding operation.
  • the contacts can be folded one at a time, or more than one contact can be folded at the same time. Again, a person skilled in the art can figure out how to do all that.
  • FIGS. 22 through 25 show the main concepts of the Third Embodiment, with some variations thereof.
  • FIG. 22 shows a carrier wafer that can be populated with TFCC contact elements, by stitching, i.e. by inserting the contact elements/lances into the wafer. It is a different way of creating the interconnection device.
  • contact elements similar to those used in the TFCCs, but we will have them prepared individually and then insert them into a carrier, to end up looking as shown in FIG. 22 .
  • the individual contacts, contact elements can be prepared in advance and/or can be made out of a strip of conductive metal 221 as shown, which I will call the leadframe.
  • the contacts 223 can be etched or stamped out of the leadframe, and can be held on to the leadframe by appropriate tabs, basically in a way like many other contact spring or contact elements are made which are used for sockets and connectors.
  • the contact elements can be shaped on the fly, i.e. during the stitching operation, e.g. stamped out of the full strip of conductive material.
  • the leadframe strip can be prepared so as to have a certain area of it, already coated by a layer of solder mask 222 , along a “band”, which ultimately would create the stem portion of the contact elements.
  • Individual contact elements 225 will be cut out from the leadframe and the stem will bent at 90 degrees wrt the head and then inserted into the carrier.
  • a by-product of this approach is that the contact will end up with an elongated cross section, where the thickness of the base metal of the strip is much smaller than the width of the contacts. This will make the contact leads more flexible when bent on their flat, more so than if they would be bent on edge.
  • a stitching machine almost like a sewing machine or a stapling gun, can take the contact element and insert its lance/stem in the carrier wafer.
  • the contact lances can be arranged on/in the carrier wafer in a matrix that would match the matrix of the BGA/device, in pitch and distribution.
  • the stitching operation can be done by several methods.
  • Stitching method #1 One is to keep hold of the carrier wafer in one position and move the stitching head from one point to the next to fill the whole matrix of pins in the carrier wafer.
  • the leadframe providing the individual contact elements can be located at a steady/fixed location and the stitching head can go to the leadframe and grab one contact element at a time and then move to the proper location at the carrier wafer and insert the lance/lead there, and then go back to the leadframe and grab the second contact element and repeat the process.
  • Stitching method #2 Another method is to provide the leadframe/strip as an attachment to the stitching head and would move with the stitching head from one insertion point to the next.
  • Stitching method #3 A third option is to keep the stitching head in one location and move the carrier wafer back and forth and from side to side. This would look more and more like a sewing machine, where the thread and the stitching head/needle are in one location and where the cloth is moved right and left and to and fro, with respect to the stitching head, to accomplish the sewing operation.
  • FIG. 22 Please notice that we can see in FIG. 22 that the contacts in the carrier, carrier [wafer] wafers 226 and 228 , are shown in two different groups.
  • the [left hand side of the] carrier 226 is populated by contacts that are placed all in the same direction, which I will refer to as an “orthogonal” matrix, while the 228 [right hand side] shows that the contacts are “oriented each one in a special direction”.
  • the pin directions 227 and 229 are all parallel to each other, which means that the cross section of the pins lances or stems are all parallel to each other and in the same direction. This is an example of the ORTHOGONAL arrangement.
  • the pin directions 229 are different. Each one of the direction of the various pins is pointing in a different direction. But they all are oriented in a way, such that they will all converge, generally, at one single predetermined point, which generally is the thermal center of the device and/or of the assembly of the device attached together. The point of convergence can also be a fixation point related to the device or the assembly. This is an example of the ORIENTED arrangement.
  • the oriented contacts will be oriented as per the present invention, i.e. such that the more flexible section of each leads column would be in the direction of the largest expected thermal expansion or contraction. This translates into orienting the faces, so that the flat wide surfaces of each individual column will be facing towards the respective expected thermal center or the fixation point of the assembled components or the assembly, so as to minimize the stresses during the expected thermal cycling or thermal fluctuations.
  • the contact elements could be arranged in an orthogonal fashion, as in the carrier 226 [left hand side half of the matrix] shown in FIG. 22 , or in an “oriented” fashion, as in the [the RHS half of] the carrier 228 .
  • FIG. 23 shows a couple of additional enhancements.
  • Enhancement #1 A pre-coined contact, which that snaps into
  • Enhancement #1 a molded or excised carrier of various thicknesses.
  • the preformed or pre-coined contact looks similar to what is shown in FIGS. 19 and 21 , but shows a few variations. It has two staked barbs 235 just below the round head 231 , at a distance from the pad head which depends on the thickness of the isolative carrier.
  • the carrier like 192 or 194 in FIG. 19 , can be molded and can also have a rectangular opening for the foot of the contact to enable a straight-in insertion of the contact.
  • the orientation is defined by the molding and the leg slot keeps the contact held vertical and locked in the molding.
  • Automated contact tooling and insertion can be enabled to fabricate both the contact and the carrier to defined lengths and orientations and pitches.
  • An excised carrier can also be used, which can be made by a simple laser cutting out of a plastic material, like sheeting or thicker substrates.
  • FIG. 23 shows that the Pad Head 231 is round, so as to more closely match the size of the solder ball on a BGA and to provide a good solder joint at this end of the contact.
  • the contact lead or stem 233 or lance has an elongated/rectangular cross section.
  • some “barbs” 235 are staked into the sides of the stem, to act as detents, to hold/retain the contact element more securely into the carrier (not shown) in this FIG. 23 , but similar to the carriers in previous figures).
  • Another way to ensure that the contacts will stay in place, especially when using a carrier wafer that is receptive to this proposed method, is to apply some heat and/or pressure to the head of the contact element, so that it sticks to the material of the carrier wafer.
  • Foot The foot, which is the Contact bottom flap, which would be soldered to the PCB for example. As mentioned in TFCC1, the foot may be optional. We may have instances where the foot is eliminated, and the contact side view will look like an inverted letter “ELL”.
  • FIGS. 24 and 25 show two examples of contacts that would provide some flexibility in the Z-direction.
  • FIG. [ 24 ] 24 -A shows an isometric view of a contact, with a curvilinear profile, as seen in the end view.
  • FIG. 24-B which could be referred to as a ZEE-shape or an ESS-shape.
  • FIG. 24-B also shows the tooling that could be used to create such a profile.
  • FIG. 25 shows another variation on the profile. We could call this a CEE-profile. The tooling is slightly different that the one in FIG. 24 . I am sure any person skilled in this art can find various other ways to accomplish the desired end result.
  • FIGS. 26 and 27 show another variation as to how to make and prepare and present the contact elements to the “stitching machine”, if you will, which will insert them into the carrier.
  • FIG. 26 shows that the contacts can be made out of regular wire, made of a conductive material, say copper.
  • the most economical way is to use a “round” wire, but wires with other cross-sections could be considered as well.
  • FIG. 26 shows that the wires are carried by two paper strips 261 or could be double strips. This could be similar to the way some resistors or circuit protection devices that are carried on a bandolier, for example. Then the portion of the wire which will create the stem portion of the contact can be treated to become non-wettable to the joining material. If it is solder, then we could apply a solder masking coating. Then we could use a “spanking” or “coining” operation, at various locations along the wire, to create the flat/round pad head 262 , which we call the BGA flap, and to create a certain bulging portion, as 271 in FIG. 27 , to act as the detent, to simulate the “barbs” 235 of FIG. 23 .
  • FIG. 27 shows an enlarged view of the contact of FIG. 26 , sitting in the carrier.
  • the foot 273 is shown before and after it is bent. The bending can be done after the insertion, in a similar way as was mentioned earlier above in connection with FIGS. 20 through 25 .
  • FIG. 28 shows some different details as to how we can form the wire contacts shown in FIGS. 26 and 27 .
  • Configuration 7 in FIG. 28 shows an additional bend, near the middle of the stem height, to simulate the effect of the curvilinear shapes in FIGS. 24 and 25 , i.e. to increase the flexibility in the vertical Z-direction. It is also the shape of the contacts, that are shown in FIG. 30 .
  • FIG. 29 actually the three figures in FIGS. 29-1 , 29 -B and 29 -C, show [shows] three different ways we can make and form the contact elements, especially if we want the stem to flex more at the middle of the height of the stem.
  • the [LHS] contact in FIG. 29-A shows an hour glass stem
  • the [middle] contact in FIG. 29-B shows a notch near the center of the stem height
  • the [RHS] contact in FIG. 29-C shows a “Necking” near the middle of its stem height.
  • FIG. 30 shows how the contacts shown in FIG. 28 could be attached to a BGA. It highlights at least two important points. One, that the contacts are oriented as per present invention. Two, that the “belly” of the contact is pointing inwards, which makes it easier to form.
  • the carrier wafer can be made of a material that can be removed, or dissolved or disintegrated, after the assembly operation is completed, i.e. after attaching the BGA to the PCB for example.
  • FIGS. 31-A and 31-B which are Prior Art-TFCC1-FIGS. 68-A and 68-B, show a carrier that was made completely out of a solder masking material, and then the contacts were inserted in it.
  • FIGS. 19 through 21 We could use a similar material to make the carrier of FIG. 22 , or any of the other carrier wafers or carrier strips, described by FIGS. 19 through 21 . In such a case, we would not need to prepare the contact elements with solder masking, because the wafer material would perform the solder masking function.
  • What I propose to achieve is basically to create a “composite” wafer material, made of a) the materials mentioned in the prior art, and b) some material that can act as a solder masking material, that would be combined inside the a-materials; so that the composite carrier wafer would act as “solder masking” as well.
  • solder Masking Wong Material or simply the SMW Material. With such a Solder Masking Wong Material”, we would not need to prepare the contact elements with solder masking of the stem in advance.
  • Embodiment #7-B This will be similar to the material of Embodiment #7-B, but would most probably be easier and faster to dissolve and/or remove.
  • This can be in the form of a liquid that would get applied to the outside surface of the Wong material, or in the form of a sheet material that can be laminated to it.
  • This wafer material will have, in addition to the “standard” elements, or part of these standard elements that make the material, some ingredients or additives which will control the Effective Thermal Coefficient of Expansion (TCE) of the material.
  • TCE Effective Thermal Coefficient of Expansion
  • additives could be a set of “threads” which are embedded in the wafer material.
  • the wafer has a TCE that is larger than the TCE of the ceramic packages. I think its TCE is even larger than that of FR4 boards.
  • the wafer expands more than the package, and consequently the contact elements follow the wafer and could get a bit out of alignment with their resp contact pads.
  • the contact elements attach to the BGA and to the substrate at the expanded position.
  • the wafer shrinks more and the end result is some distortion in the shape and position of the solder and/or the contact elements.
  • One way to achieve this goal is to “implant” in the wafer something to force it to behave as if is has the desirable TCE or find a substitute material that has the desired TCE.
  • What I propose to achieve this goal is basically to create a “composite” wafer material made of a) the materials mentioned in the prior art, and/or b) some additives, for example some other polymer or powder or fibers, that would be compounded or dispersed or crisscrossed inside the a-materials; so that the effective TCE of the resulting material would have a new TCE, which has a value close to the desired one, or again find a substitute material that has the desired TCE.
  • Such fibers could be made out of fiberglass, or out of any other materials that have a small TCE or even a negative TCE. Ideally, these fibers would have a “rough” outside surface so as to “grab” the surrounding material and restrain it from sliding along the surfaces of the fibers.
  • these fibers may be desirable to place these fibers, in the form of “threads”, as opposed to loose, bulk fibers or powder or granules.
  • a yet further improvement would be to lay the threads in separate independent layers, whereby all the treads going in one direction, say, would lay in one level, while the threads perpendicular to the first group would be laying in another layer, not over and under, i.e. not as a woven material, but simply be oriented and laying in one plane, separate from the other plane. I will call this the “Overlay Pattern.”
  • Non-Woven/Overlay pattern but Oriented thread arrangement, is that we would be able to more easily pull the threads out, after the reflow operation, if we wanted to. We would soak the assembly in an appropriate liquid to loosen up the thread, and then pull these threads out.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The present invention relates generally to permanent interconnections between electronic devices, such as integrated circuit packages, chips, wafers and printed circuit boards or substrates, or similar electronic devices. More particularly it relates to high-density electronic devices. The invention describes means and methods that can be used to counteract the undesirable effects of thermal cycling and thermal fluctuations. The invention more specifically shows certain improvements related to its mother patent application, called Thermal Flex Contact Carrier (TFCC), where the improvements allow the height of the contact elements to be now not restricted anymore by the size of the spaces or distances between the contact pads of the devices to be attached together. Certain improvements to the carrier wafer are also shown.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application is a NON-PROVISIONAL UTILITY patent application, and should be considered as a DIVISIONAL or a CONTINUATION or a CONTINUATION-IN-PART patent application, based on patent application Ser. No. 12/154,753, FILED May 27, 2008, TITLE “TFCC™ & SWCC™ THERMAL FLEX CONTACT CARRIERS”, which is a CONTINUATION patent application, based on patent application Ser. No. 11/689,558, filed Mar. 22, 2007, title “NO-WICK 2 INTERCONNECTIONS”, now U.S. Pat. No. 7,901,995 issued Mar. 8, 2011, title “Interconnections Resistant To Wicking”, which is a Divisional patent application based on patent application Ser. No. 10/937,647, filed Sep. 8, 2004, title “INTERCONNECTIONS”, now U.S. Pat. No. 7,196,402 issued Mar. 27, 2007, which in turn is a DIVISIONAL patent application, based on patent application Ser. No. 10/075,060, filed Mar. 17, 2003, title “INTERCONNECTIONS”, now U.S. Pat. No. 6,884,707, issued Apr. 26, 2005.
  • This application is claiming the priority and benefits of the following prior applications, which include the same references, which were claimed by the mother applications. These prior applications are the following eight patent applications, where three are provisional patent applications and four non-provisional utility patent applications, all of which are incorporated herein in their entirety by reference:
  • 1) Provisional Patent Application Ser. No. 60/231,387, filed Sep. 8, 2000, entitled “Probers”, which will be referred to as Ref1, and
  • 2) Provisional Patent Application Ser. No. 60/257,673, filed Dec. 22, 2000, entitled “Probes and Sockets”, which will be referred to as Ref2, and
  • 3) Provisional Patent Application Ser. No. 60/268,467, filed Feb. 12, 2001, entitled “Probes, Sockets, Packages & Columns”, which will be referred to as Ref3, and
  • 4) Non-Provisional Utility patent application Ser. No. 09/947,240, filed Sep. 5, 2001, entitled “Interconnection Devices”, which will be referred to as Ref4.
  • 5) Non-Provisional Utility patent application Ser. No. 10/075,060, filed Mar. 17, 2003, entitled “Interconnections”, which will be referred to as Ref5. This application has been granted the U.S. Pat. No. 6,884,707 B1, issued Apr. 26, 2005.
  • 6) Non-Provisional Utility Patent Application Ser. No. 10/937,647, filed Sep. 8, 2004, title “Interconnections”, now U.S. Pat. No. 7,196,402 issued Mar. 27, 2007, which will be referred to as Ref6.
  • 7) Non-Provisional Utility patent application Ser. No. 11/689,558, filed on Mar. 22, 2007, entitled “NO-WICK™ 2 INTERCONNECTIONS”, now U.S. Pat. No. 7,901,995 issued Mar. 8, 2011, title “Interconnections Resistant To Wicking” , which will be referred to as Ref7.
  • 8) Non-Provisional Utility patent application Ser. No. 12/154,753, FILED May 27, 2008, TITLE “TFCC™ & SWCC™ THERMAL FLEX CONTACT CARRIERS”, which will be referred to as Ref8, or simply as TFCC1.
  • STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
  • Not Applicable
  • REFERENCE TO A MICROFICHE APPENDIX
  • Not Applicable
  • PREFACE OR EXECUTIVE SUMMARY
  • In the following specification, I will do something which may be considered non-traditional.
  • First, I will refer to the mother application, Ref8, as TFCC1, for short, for ease of referencing it. And, I will refer to the present application, as TFCC2, for short.
  • Then, I will copy and/or paraphrase a good amount of the specification of the mother application, TFCC1, and will even use some of the figures of TFCC1. I will use this portion of the present specification to highlight the weaknesses of TFCC1 and where it needs certain improvements.
  • Then, I will concentrate on TFCC2 and will describe the new concepts, which are being introduced by this present application, TFCC2, to overcome these TFCC1 weaknesses
  • This way, it will be easier for the reader, to understand the basis or starting points from TFCC1, and to appreciate the value of the improvements offered by TFCC2.
  • I hope that this approach will be acceptable.
  • DEFINITIONS
  • For the purpose of the following invention description, I will use certain words or terms that may be peculiar to this application. They will be explained in the following definitions, or as I go along during the application.
    • Barb=Detent
    • Carrier=Carrier Wafer
    • Contact=Contact Element, which usually comprises a head, a stem and sometimes, a foot.
    • Foot=Contact bottom flap, which would be soldered to the PCB for example. As mentioned in TFCC1, the foot may be optional. We may have instances where the foot is eliminated, and the contact side view will look like an inverted letter “ELL”.
    • Head=Contact top flap, which would be soldered to the BGA for example
    • Lance=Contact Stem, Leg, Column, Lead
    • Solder Mask Any coating or surface treatment, which would render the material, to which it is applied, non-solderable or non-wettable to the joining material being used in the attachment process.
    • TFC Thermal Flex Contact
    • TFCC Thermal Flex Contact Carrier
    • wrt=with respect to
    • Warp As per Webster: (Weaving) the threads running lengthwise in the loom.
    • Weft or Woof As per Webster: (Weaving) the yarns carried back and forth across the warp. From Wikipedia: In weaving, weft or woof is the yarn which is drawn through the warp yarns to create a fabric. In North America, it is sometimes referred to as the “fill” or the “filling yarn”.
    • Standard Integrated Circuit Packages:
    • LCCC: Leadless Ceramic Chip Carrier
    • BGA: Ball Grid Array Package
    • PCB: Printed Circuit Board
    • PGAP: Pin Grid Array Package
    • SIP: Single In-Line Package
  • Please refer to other definitions in Ref5 and Ref6 and Ref8, the latter being referred to also as TFCC1.
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The invention generally relates to high-density interconnections between electronic devices and components.
  • The invention relates more specifically to what is referred to as “permanent” interconnections, which include solderable interconnections, and/or mounting of electronic components on boards or on substrates, or on other electronic components and the like.
  • It provides interconnection elements, called contacts or legs or lead or columns, to such components and it covers the shapes and orientation of these leads, to enhance the performance and reliability of such components, especially when these components are part of electronic systems that are exposed to harsh environment, such as temperature cycling and fluctuation.
  • The present invention covers in particular interconnections between “lead-less” electronic components and boards and/or substrates, or between similar lead-less components.
  • The specification utilizes many of the definitions and items described in the referenced earlier patent applications.
  • 2. General Background and Prior Art
  • In the case of leadless electronic components, like the BGAs and the LCCCs, it has been known that soldering such components directly to substrates or to PCBs can create certain problems. It can lead to premature failure of the interconnecting joints. This is especially true, when the component is relatively large, i.e. approx. ½ inch or larger on the side, and when the material of the component is different than that of the substrate, e.g. when the component is silicon or ceramic, while the substrate is FR4, and when the temperature can vary considerably during the operating life of the assembly.
  • The problem results mostly from exposing electronic assemblies to varying temperatures, such as thermal cycling or power cycling, or simply from being exposed to harsh environment, including hot and cold temperature environment. This is especially true, when the component is relatively large, when the material of the component is different than that of the substrate, and with different TCEs, i.e. where TCE Mismatch exists between the assembled devices, and when the temperature fluctuates considerably and frequently during the life of the assembly.
  • For this reason, several designs have been proposed in the past to counteract the unfavorable effect of such conditions. For example, the inventor, Gabe Cherian, together with other co-inventors, had invented, back around 1982, what was called “CCMD”, Chip Carrier Mounting Device, which was later called “Solder Quick” or “Solder Columns” or “Cherian Columns”. This is covered by U.S. Pat. Nos. 4,664,309, 4,705,205 and 4,712,721. Other attempts have been made by other inventors, which were more or less successful. And finally, the inventor came up with the No-Wick™ concept mentioned in the Refs.
  • The additional problem nowadays is the fact that many of the components are being miniaturized. The center distances between contact pads are getting smaller and smaller, and some of the old inventions can no longer keep up with such miniaturization. For example, BGAs have center distances down to 0.020″ (approx. 0.5 mm) or less, and when we consider Chip Scale Packaging, the center distances can be even smaller. The Cherian Solder Columns were originally designed and built to work with 0.050″ (approx. 1.25 mm) center distances. Cherian Solder Columns cannot readily be simply scaled down to size. For this reason, Cherian created the No-Wick™ concept mentioned in the Refs. Then, both Don Saunders and Gabe Cherian created the TFCC and the SWCC inventions described in Ref8, the TFCC1. Now, again, both Don Saunders and Gabe Cherian created this present invention, the TFCC2, as a Continuation to TFCC1, which will be described in the present patent application here below.
  • PRIOR ART
  • There is a lot of prior art in this field. Several designs have been proposed in the past to counteract the unfavorable effect of the above mentioned conditions.
  • In the “mother” patent applications, which are referenced above, I have listed a few important prior art documents. Please refer to them.
  • OBJECT & PURPOSE OF THE INVENTION
  • The purpose of this present invention, TFCC2, is to improve on some of the features of the mother invention, TFCC1, while keeping many of the original features of TFCC1. This will be done by adding a few new features, for the purpose of improving and enhancing the usefulness of the inventions.
  • So for now, I will repeat and paraphrase the text of the purpose of the mother invention, TFCC1, and consider it to be the purpose of both inventions, i.e. of both TFCC1 and TFCC2, and then at the end, I will add and describe the special purpose of TFCC2.
  • The purpose of both inventions, TFCC1 and TFCC2, is to solve the problems resulting from exposing electronic assemblies to varying temperatures, such as thermal cycling or power cycling, or simply from being exposed to harsh environment, including hot and cold temperature environment and especially if there is a TCE mismatch between the joined components.
  • The general object of the two inventions is to introduce certain changes and/or improvements in the way Integrated Circuit (IC) Packages known as BGAs, Ball Grid Array Packages and other similar leadless devices and chips, and assemblies that incorporate such packages and/or chips, so that assemblies made out of such devices would become more reliable and can better withstand the above mentioned undesirable effects of thermal cycling and power cycling and thermal fluctuations.
  • Another object of the two inventions is to provide means to reliably mount leadless electronic packages or components, such as a BGA on Printed Circuit Boards (PCBs), or chips on substrates, especially to withstand any undesirable effect of TCE Mismatch and the effects of Thermal Cycling and/or Power Cycling.
  • A further object of the two inventions is to provide improved interconnections and mounting means for Integrated Circuit Chips and Packages, to make such assemblies more reliable and to better withstand stresses induced by thermal effects and/or by shock and vibrations.
  • These mounting means include providing “contacts or legs or leads or columns” between the chip or the package and their carrying base, i.e. a PCB or the like, to provide a “buffer” zone, where the columns would act as flexible joints, to absorb these undesirable effect of TCE Mismatch, and/or effects of Thermal Cycling and/or Power Cycling.
  • Another object of both inventions is to accomplish all the above, especially for High-Density devices, i.e. devices with small center distances between their contact points.
  • A corollary result is that we can convert any “leadless” package or device to become a “leaded” one. So for example, a leadless BGA would become similar to a Pin Grid Array Package.
  • In addition to all that, is the fact that we do all this in a way, such as to control the flow of solder along the stem of the columns, so as to maintain the flexibility of the columns.
  • Yet another object is to reinforce the assembly against severe shock and vibrations, by providing an “anchor” between the components of the assembly.
  • Now, One last, but not least, special object of the present invention, TFCC2, is to improve on the TFCC1, by providing new designs and methods of construction, so as to attain longer, taller, higher leads between the devices to be attached and assembled together, and consequently to further improve the reliability and the thermal cycling life of such assemblies.
  • The summary of the main goals and the advantages of the proposed changes and improvements of this present invention, TFCC2, is to provide leads, that are taller, and more slender and flexible than can be provided by TFCC1, and to make these leads more yielding, thus requiring less force to hold them in place at their anchor points in the body of the package. This translates itself into a situation, where the solder joints/interconnections between the devices would be less stressed, thus less apt to crack or break, so as to reduce the occurrence of those undesirable solder joint failures, thus prolonging the life of the electronic systems which contain these chips, packages and the like. In short, this translates into improving the reliability of the electronic assemblies and systems. A corollary resulting advantage is that the interconnections between the package and the substrates would last longer and the whole system would be more reliable and last longer as well.
  • But back to the special purpose of TFCC2. TFCC2's main purpose is to provide new construction designs, which will result in obtaining leads, which are taller, larger, higher than the leads that can generally be obtained by TFCC1, and hence the TFCC2 leads will be more flexible than the TFCC1 leads, and hence they would provide a longer thermal Cycle life and more reliable assemblies than with TFCC1.
  • One Additional Benefit With Shock and Vibrations
  • This was covered in TFCC1, but I am trying to explain it here a little bit better. If we look at a standard DIP package, we notice that the leads are in two rows of leads, where the leads are all oriented orthogonally in the same direction. If the package is subjected to shock or vibrations that are concentrated in a certain direction, then the package will withstand the resulting stresses, depending on the relation between the direction of the shock and vibration and the direction of the leads and the natural resonance frequency of the device, in the direction of the induced/forcing vibration. This is because the stiffness of the leads is high if we stress the device across the edges of the lead, and the stiffness is low across the face of the leads. We can say also that the resonance of the device will be different, depending on the direction of the shock and/or vibration, applied on it. So, if the direction of the shock and vibration is in a generally favorable direction with respect to the direction of the leads, then the package will withstand the stresses well. On the other hand, if the stresses are in an unfavorable direction, then the package may fail.
  • However, if the leads were oriented as per the present invention, where different leads would have different angles with respect to the axes of the package or device, then the stiffness of the leads would be more evenly distributed, and the package may fare better regardless of which direction the shock and vibrations are coming from.
  • This is roughly what I was trying to show by the sketch in Ref3, page PP-D-106.
  • BRIEF DESCRIPTION OF DRAWINGS
  • FIG. 1, which is the Prior Art-TFCC1-FIG. 2-A, explains the basics of the whole TFCC concept.
  • FIG. 2, which is the Prior Art-TFCC1-FIG. 20-B, shows a view of the TFCC, by itself and making it clear that the contact are created out of one single sheet of conductive metal.
  • FIG. 3, which is Prior Art-TFCC1-FIG. 45, shows a pattern of contacts, showing some details of the contact blanks and their pattern of distribution and orientation for a device that has ten concentric rows of contact pads, and it shows also the moats and the etching around the “pads”, where the legs length “L” is 0.635 mm.
  • FIG. 4, which is Prior Art-TFCC1-FIG. 48, shows a close up view of the top three rows of contacts shown in FIG. 3, and the “angles” of the oriented contacts, A9, B9, C9, D9, and E9, from Row 9 of FIG. 3 and highlights the areas where the contact blanks do interfere with each other.
  • FIG. 5, which is Prior Art-TFCC1-FIG. 49, also shows a close up view of the top three rows of contacts and the arrangement with a new angle, which prevents the interference between the contact blanks, which was present in FIG. 4.
  • FIG. 6, which is Prior Art-TFCC1-FIG. 43, shows a view of half the profile of two adjacent contacts arranged in a row and in line, one after the other and their relative dimensions.
  • FIGS. 7 and 8, which are Prior Art-TFCC1-FIG. 44-A and 44-B, show a study of the relation between the pitch, the pad diameter, the width of the moat, and the left-over length of the leg.
  • FIG. 9, which is Prior Art-TFCC1-FIG. 50, shows a configuration of contacts for a device, which has only one peripheral row of contact pads. The leg dimension L is 0.635 mm for a pitch of 0.80 mm. Similar to L1 in the previous FIG. 6.
  • FIG. 10, which is Prior Art-TFCC1-FIG. 51, shows an example, where the leg length was increased from 0.635 mm to 1.00 mm, just for illustration purposes.
  • FIG. 11, which is Prior Art-TFCC1-FIG. 52, shows the case where the device has two peripheral rows of contact pads. Again, the leg dimension L is the same, i.e. 0.635 mm for a pitch of 0.80 mm.
  • FIG. 12, which is Prior Art-TFCC1-FIG. 53, shows an almost similar arrangement of two peripheral rows, as in FIG. 11, which is Prior Art-TFCC1-FIG. 52. The only difference is that the length of the contacts was also increased, as in FIG. 10, from 0.635 mm to 1.00 mm, just for illustration purposes, to gain more flexibility.
  • FIG. 13 shows the germ of the idea that created TFCC2. We put two portions of devices like the ones shown in FIG. 10 or 12, concentrically one inside the other, to create TFCC2s, which could have much longer taller leads than with TFCC1.
  • FIGS. 14 through 18 show details about examples of TFCC2s, based on the concept shown in FIG. 13.
  • FIG. 19 shows a strip of carrier, where single contacts are being inserted in it. In FIG. 19-A the contacts are all in the same direction (orthogonal), while in FIG. 19-B, the contacts are “oriented”.
  • FIG. 20 shows how strips like the ones shown in FIG. 19 can be stacked one next to the other, to create a slab, as in FIG. 20-C, with the contact leads arranged in a matrix, to match the corresponding device to be attached to. The strips can be made as a one single row arrangement each, as in FIG. 20-A, or can be made as a double row arrangement each, as in FIG. 20-B. Again, more rows can be accommodated in one single strip, as desired.
  • FIG. 21 shows details of how the “foot” of the contact can be formed.
  • FIG. 22 shows details of how the contacts can be “blanked” out of a continuous Leadframe and stitched into a carrier wafer. The contacts can be stitched to be “orthogonal” or “oriented”.
  • FIG. 23-A shows an ISO view of a contact, which has “barbs”, to ensure that it will be more securely retained into the carrier wafer. FIG. 23-B shows a bottom view of the contact, highlighting the fact that the foot could be made slightly narrower than the stem.
  • FIG. 24 shows an ISO view and an end view of a contact that is being formed into a ZEE or an ESS shape, so as to impart to it the capability of flexing in the Z-direction, in addition to flexing in the X- and Y-directions.
  • FIG. 25 shows another contact being formed into a “CEE” shape, also to impart to it, the capability of flexing in the Z-direction.
  • FIGS. 26 and 27 show a few slightly different variations of the embodiments shown in FIGS. 19 through 23.
  • FIG. 28 shows some different details as to how we can form the wire contacts shown in FIGS. 26 and 27.
  • FIG. 29 shows three different ways we can make and form the contact elements, especially if we want the stem to flex more at the middle of the height of the stem.
  • FIG. 30 shows how the contacts shown in FIG. 28 could be attached to a BGA. It highlights at least two important points. One, that the contacts are oriented as per present invention. Two, that the “belly” of the contact is pointing inwards, which makes it easier to form.
  • FIGS. 31-A and 31-B show a carrier wafer, as per Prior Art TFCC1, which could be used in this TFCC2 invention.
  • THE PROBLEMS OF TFCC1, THAT WE WANT TO SOLVE BY INTRODUCING TFCC2
  • The problem or weakness with the mother invention, TFCC1, is the result of the way it is manufactured. One of the TFCC1 goals and objectives was to make the device as economically as possible. So in one of the major embodiments of TFCC1, we decided to carve out all the contacts out of one single sheet of conductive metal. But as a result, we became limited or rather restricted as to how tall or high we can make the contacts/legs/leads/columns.
  • I will first describe the original TFCC1 and how it is made, to clarify the reason why it is limiting or restrictive, and then will describe the improvement, which will be introduced and provided by TFCC2. This sequence in the description will make it easier to understand and appreciate what the improvements are.
  • Description of the Features and Method of Manufacturing of the Mother Invention, TFCC1
  • TFCC1 introduced the concept of the thermal flex contacts as shown in FIG. 1, which is the Prior Art-TFCC1-FIG. 2-A. TFCC1 allows for attaching each one of such contact to the leadless device, such as a BGA, although the preference would most probably be to try to attach more than one contact at the same time. So, this is why TFCC1 went also in the direction of the embodiment shown in FIG. 2, which is the Prior Art-TFCC1-FIG. 20-B.
  • This FIG. 2 shows how one of the major embodiments of the TFCC1 is made. The main feature is that a large number of the contacts/legs/leads/columns are produced out of one “blank” sheet of conductive metal, and the individual contacts stay attached to that sheet until they are attached to the devices that they are intended to work with ultimately. This makes it easier and more economical to create and to handle the contacts and to go through the manufacturing and the final assembly processes.
  • An additional feature is that we can “orient” the leads in a way to reduce their resistance to bending, thus improving even further their effectiveness in reducing the stresses on the solder joints and prolonging the operating life of the assemblies and the electronic systems.
  • The third feature of the invention is to “CONTROL” the solder flow along the column, so as to ensure that there will still be some amount of flexibility in the column, after all the soldering/joining operations have been completed.
  • Specific Features of TFCC1, Which Will Relate To TFCC2
  • I will now describe the features of TFCC1, which will be improved by TFCC2 FIG. 2, which is Prior Art-TFCC1-FIG. 20-B, shows that the individual contacts are carved out from one flat sheet of metal, which we will to as the base metal sheet.
  • FIG. 3, which is Prior Art-TFCC1-FIG. 45, shows a pattern of contacts, where the legs length “L” has been chosen to be increased by 0.1 mm, so that L became 0.635 mm as per FIG. 6, for a standard pitch of 0.8 mm and a BGA pad diameter of 0.33 mm, i.e. R1=0.165 mm in This is the longest contact blank that we can attain for this pitch, as described below in FIG. 6, which is Prior Art-TFCC1-FIG. 43.
  • We see that there is interference between some of the contacts, as explained below.
  • I will skip the description of TFCC1-FIGS. 46 and 47 of FTCC1, because basically they lead to what is shown in FTCC1-48 and 49, which are TFCC2-FIGS. 9 and 10 in this application.
  • FIG. 4, which is Prior Art-TFCC1-FIG. 48, shows the same view as in FIG. 3, which is Prior Art-TFCC1-FIG. 45, but it also shows the “angles” of the oriented contacts, A9, B9, C9, D9, and E9, which are the contact blanks in the row #9 of the matrix. Obviously, the angle A1 of the A9 contact is “zero”, because the contact is in line with the center line. We can see that the angle E1 of the E9 contact makes it such that the E9 contact does not interfere with the E10 contact. So, if we could re-orient all the contacts that are interfering, so they would be oriented at a similar angle like that of E9 contact, then we would be home free!
  • FIG. 5, which is Prior Art-TFCC1-FIG. 49, shows the arrangement with the new angle. All the 4 contacts, which were interfering with the contacts above them, have been re-oriented to have a same angle like the angle E1 in FIG. 4. Now, we see that there is no interference any more.
  • This angle applies only to this row of contacts. For the other rows, a more appropriate angle can be found, using a similar approach as we have used for the row just described.
  • This angle would control the orientation angle of the contact after it has been fully formed.
  • Of course, ideally we would like to have each and every contact oriented with the ideal/theoretical ray, which start at the thermal center, usually the geometric center of the device and ends at the center of the respective contact pad. This would provide the least resistance to bending from the contact body. However, if we deviate from this ideal orientation by a small amount, we may still be OK. It is a trade-off between the orientation of the leg and the length of the leg. We can actually calculate the stresses on the leg and the solder joints, or even do a Finite Element Analysis (FEA), and determine the effect of the angle or the length of the leg on the stresses in the whole picture, i.e. on the individual elements of the joints. This way, we can evaluate the benefits or the downfall of re-orienting the contacts, or not to re-orient them.
  • FIG. 6, which is Prior Art-TFCC1-FIG. 43, shows a study of the essential dimensions of the contact blanks, along one of the central axes, where the space available for the contact blanks is at a minimum. P, the pitch between the contact pads of the devices to be assembled, controls the space available for the contact blanks. M is the width of the moat and it is controlled by the manufacturing process, which is used to create the moat. The rest of the dimensions are clearly illustrated in the figure.
  • The best scenario is if we let the contact blanks run into each other as shown in the right hand side blank. Its tip, F, is running into the solder ball pad, H, of the left hand blank. Here, I will copy or paraphrase the TFCC1 description of FIG. 43 through.
  • FIG. 6, which is Prior Art-TFCC1-FIG. 43, shows a view of half the profile of two adjacent contacts arranged in a row and in line, one after the other. This arrangement would give us the “tightest” or “smallest” room/space to create the contacts. This will also give us the dimensions of all the other contact blanks in the whole matrix, because the contacts should all have the same length. The dimensions were selected to accommodate a BGA with a pitch of 0.8 mm for this example. Since the moat width, M, is governed by the manufacturing process, and assuming that we will remove metal, say by chemically milling the moat or by a laser or stamping operation, then we have opted to make the moat approximately about 0.1 mm wide.
  • The contact ref # 4301 on the left hand side of the figure shows a moat 4311 all around it. The remaining material inside the moat can be visualized to make the three major portions of the contact. First is the “Head” 4321 with a length H, which would provide the area to be joined to the BGA pad. Second, the “Foot” 4323, with a length F, provides the area to be joined to the substrate pad. Lastly, the “Stem” 4325, with a length S1, which will be the “column” between the Head and the Foot. The grooves 4327 and 4329 are optional features, to facilitate the bending process. The pitch “P”, which is the distance between the centers of the contact pads governs and controls the space available to provide the three major portions of the leg.
  • As can be seen from left hand side contact in the drawing and from the configuration of the contacts, the length L1 of the “leg” measured from the center of the “pad” turned out to be 0.533 mm, for a pitch of 0.8 mm and using a BGA contact pad diameter of 0.33 mm.
  • If we try to make L any longer, then either the moat need to be narrower or the leg would push the moat to encroach on the space of the pad.
  • If we use a “lancing” operation, where no metal is removed, as illustrated in the right hand side contact 4303 of FIG. 6, which is Prior Art-TFCC1-FIG. 43, then we would not need a moat, which was 0.10 mm wide, at the end 4331 of the contact. This way, we could increase the length “L” of the contact by that same distance, namely by 0.1 mm.
  • Hence the length “L2” will become 0.6350 mm.
  • FIGS. 7 and 8, which are Prior Art-TFCC1-FIGS. 44-A and 44-B, show a study of the relation between the pitch, ref # 4411, the pad diameter, ref # 4413, the width, ref # 4415, of the moat, ref # 4437, and the left-over length, ref # 4417, of the leg. The total length, ref # 4431, of the leg, ref # 4433, will provide the pad, ref # 4435, the two necks, ref # 4421 and ref # 4423, the stem, ref #4425, and the flat bottom, ref # 4427.
  • Ideally, we want the stem, ref #4425, to be as long as possible.
  • Also, ideally, we want to have a sizeable flat bottom, ref # 4427,
  • But, if the dimensions are not cooperating, we can think of at least two alternatives, used either separately or together.
  • First, we could eliminate the “flat bottom”, ref # 4427, of the leg. Not very desirable, but conceivable/doable. It could work OK, but it could create some problems.
  • The second alternative is explained below, and it is to force the length “L”, or S1 or S2 in FIG. 6, which is Prior Art-TFCC1-FIG. 43, to be larger, but how? This is not easy with the general TFCC1 approach.
  • Now, we will get to four embodiments which will lead the way to our TFCC2 invention.
  • FIG. 9, which is Prior Art-TFCC1-FIG. 50, shows a configuration of contacts for a device, which has only one peripheral row of contact pads. Here, the contacts are shown to be oriented, as best desired for stress reduction. Attaching the TFCC would basically convert a leadless device to a leaded device.
  • Obviously in this case, the length of the contact legs can be increased without any restrictions, other than the question of space or the height of the device on top of the PCB, for example. FIG. 10, which is Prior Art-TFCC1-FIG. 51, shows such an example, where the leg length was increased from 0.635 mm to 1.00 mm, just for illustration purposes. Of course, it can be made longer.
  • FIG. 11, which is Prior Art-TFCC1-FIG. 52, shows the case where the device has two peripheral rows of contact pads. Here, the contacts were arranged so that the outer row of contacts would start pointing outwards, while the contacts of the inside row would start pointing inwards. Of course, after they get bent to have their legs perpendicular to the body of the TFCC, the legs would align properly and their ends, which will be soldered to the PCB, will be located properly at their correct respective positions.
  • FIG. 12, which is Prior Art-TFCC1-FIG. 53, shows an almost similar arrangement of two peripheral rows, as FIG. 11, which is Prior Art-TFCC1-FIG. 52. The only difference is that the length of the contacts was increased, to gain more flexibility. Again, in such a case, there is hardly any limit as to how much you can increase the length of the leg, as explained above.
  • Please keep in mind what was just said about the four embodiments shown in FIG. 9, which is Prior Art-TFCC1-FIG. 50, through FIG. 12, which is Prior Art-TFCC1-FIG. 53. This will be the starting point for the TFCC2 concepts described in this present invention.
  • Summary of the Present TFCC2 Invention Concepts and Objectives A—Inventions Concepts and Objectives, Common to Both TFCC1 and TFCC2
  • Provide a “Flexible Leads” device, to interconnect electronic devices together. We call this device, TFCC, Thermal Flex Contact Carrier, and it would provide flex contacts, or legs or leads or columns if you will, to leadless IC devices, such as BGAs or chips or the like, at one end of the TFCC leads, and to Printed Circuit Boards (PCBs) or substrates or the like, at the other end. These TFCC leads would in essence convert leadless devices into leaded ones.
  • Make the contacts as long, tall, slender columns, instead of short stubby solder joints.
  • Make the contact with an elongated or rectangular cross section. This will make the leads more flexible when bent on their flat, more so than if they would be bent on edge.
  • Place the contacts/leads with elongated or rectangular cross-sections, in an orientation or direction, such that the more flexible section of each leads column would be in the direction of the largest expected thermal expansion or contraction. This translates into orienting the faces, so that the flat wide surfaces of each individual column will be facing towards its respective expected thermal center or the fixation point of the assembled components or the assembly, so as to minimize the stresses during the expected thermal cycling or thermal fluctuations.
  • B—Inventions Concepts and Objectives, Specific to TFCC1
  • Create all the contacts out of one sheet of conductive material, so as to make the end product as economical as possible.
  • C—Inventions Concepts and Objectives, Specific to TFCC2
  • Find ways to increase the length/height of the contacts, so that they will provide more flexibility to the joints between the attached devices, and consequently increase/improve the reliability and thermal cycling life of the assemblies.
  • Use Carrier Wafers, which can double up as solder mask as well.
  • Shape the contact leads, so that they would have “weaker” bending portion(s), to facilitate bending and/or flexing.
  • Make the contact elements out of plain wires or flat sheet metal, and shape them in a special way, to have a “weaker” bending resistance at certain locations along the length of the leads.
  • Description of the Present Invention, TFCC2, and Its Embodiments and Drawings Summary and Purpose of the Present TFCC2 Invention
  • As explained above, the mother invention, the TFCC1, has one major weakness or shortcoming. Basically, the length or height of the leads that the TFCC1 can provide is limited and restricted and may not give us as much flexibility as we may need or as we may like to have. We are constrained by the layout of the contact pads of the devices to be assembled, by the distance between these pads, whether in the direction of the orthogonal axes or in the direction of the expected thermal deformations. This was explained in more details, earlier above.
  • It is desirable to extend the length or height of these leads, so as to increase their flexibility, and to consequently improve/enhance the reliability and thermal cycling life of the assembled devices and of the assemblies in general.
  • The purpose of this present invention, TFCC2, is to provide solutions, which will allow us to do just that, i.e. to provide longer taller higher leads.
  • Several solutions will be presented, all of which basically solve the problem of the length or height of the leads, in one way or another.
  • In addition, I am re-introducing some features of the wafer carrier, such as using it to double up as a solder mask element, and adding one or two new features to it as well.
  • Some TFCC1 Features that We Would Like to Preserve
  • TFCC1 also adopted the original basic concept of the No-Wick™, Ref xxx, which is to control the flow of solder, so that the solder stays at and/or near the joints between the column ends and the electronic components. The solder should not flow away from the column ends, and should not migrate and stick to the stem of the column. If it does, then the column will become thicker and less flexible. If this happens, then we would reduce the benefits of having slender and flexible columns as the connecting element, and we could go back and have premature failures of such assemblies. So, this No-Wick™ concept has been incorporated in the above TFCC1 invention and will be retained and included in the present TFCC2 inventions as well.
  • An additional feature is to have the columns curvilinear.
  • Usually most columns are straight and generally perpendicular to the devices. We will refer to the general direction of the columns as the Z-direction or the Z-axis. We will refer to the general direction (plane) of the devices as the X- and Y-directions. This would include the whole plane of the devices, which is usually generally flat. The columns Z-direction is generally perpendicular to the device's X- and Y-directions. The straight columns will provide relief and flexibility in the direction that is perpendicular to their axis, which in this case is in the X-direction or the Y-direction or both; but not in the vertical direction, i.e. not the Z-direction. As a result, relatively large assemblies may have the tendency to warp out of flat under severe thermal conditions. This condition could be compared to that of a bi-metal strip that would bend or curl, under varying temperature conditions.
  • But if the columns are curvilinear, ever so slightly, they may provide some flexibility along their general Z-axis as well, which would be generally perpendicular to the components. This would reduce this tendency of the devices and/or the assembly to warp out of flat.
  • However, since the center distances are small, and space is tight, we cannot have the columns curved haphazardly. They would either take too much space, or if we try to place them closer to each other, they may touch and short. So, the suggested solution is to have the columns “parallel nested” and to have their curves and shapes such that they would allow such parallel nesting. (See Ref4 for more details on the subject of parallel nesting).
  • One more feature to preserve is the concept of the “anchor”, which reinforces the assembly and protects it against severe shock and vibrations.
  • Description of the Preferred Embodiments of the Present Invention, TFCC2
  • While the invention is susceptible of various modifications and alternative constructions, certain illustrative embodiments thereof have been shown in the drawings and will be described below in detail. It should be understood, however, that there is no intention to limit the invention to the specific form disclosed, but, on the contrary, the invention is to cover all modifications, alternative constructions and equivalents, falling within the spirit and scope of the invention as defined in the claims.
  • While I am describing the drawing in more details, I will at the same time explain the technology basis of the invention. I will also include a number of examples in this section, which should be considered as part of the embodiments for the purpose of this application as well.
  • This description covers more than one invention. The inventions are based partly on the same technology platform, but then each of the inventions embodiments has some additional features of its own. Not being an expert in handling patents, I would like to leave it to the patent examiner to decide on the number of the inventions contained and how to split one invention from the other. Also, to decide which can be considered as Divisional application, or a Continuation-In-Part, or rather as regular Continuation.
  • BRIEF DESCRIPTION OF DRAWINGS
  • A brief description of the TFCC2 drawings,
  • FIGS. 13 through 29 or XXX, was given already earlier above. Please review them at that location. FIGS. 1 through 12 were also included in the above Brief Description of the Drawings, but they covered the features of the mother invention, TFCC1, which we are trying to solve here now.
  • DETAILED DESCRIPTION OF THE DRAWINGS AND OF THE PREFERRED EMBODIMENTS First Preferred Embodiment Interposed Sets of Double or Single Peripheral Contacts
  • FIGS. 13 through 18.
  • FIG. 13 shows a rough concept of the basic idea of the first embodiment. It shows two concentric parts, part 1 and part 2, one “interposed” inside one other. Each one of these two parts can be extracted or excised from a TFCC1, such as those described in FIGS. 9 through 12. We could refer to either of them as a TFCC2 Contact Annular. And depending on it size, we can give a size number as well.
  • Because the length of the leads in these special TFCC1s is not restricted by the pitch, i.e. by the spaces between the contact pads of the devices to be attached together, whether the orthogonal distances or otherwise, then we can make the leads as long as we want. This was explained also earlier above, when FIGS. 9 through 12 were described. Of course, we should increase the leads' length, within reason. I mean, we do not want to make the leads so long as to have an excessive height between the attached devices, because this may make the assemblies too high, too large for the available spaces.
  • I will explain this basic concept in more details in the following FIGS. 14 through 18.
  • FIG. 14 shows a TFCC2 Contact Annular, which was extracted from the TFCC1 shown in FIG. 12. If we take the TFCC1 of FIG. 12 and fold the contact blanks so that the stems will be generally perpendicular to the generally flat body of the TFCC1, and if we cut out excessive portions of the flat base sheet, or the carrier, from the inside area and from the outside area which included the registration tabs etc, then we would end up with a TFCC2 Contact Annular, that would look like the one shown in FIG. 14.
  • Let's look at FIG. 12 again. The rows are identified by numbers that run from number 1 at the central horizontal axis, and going out to number 2, 3, etc. The two rows of contacts in this FIG. 14 are rows number 9 and 10. So, we can refer to this TFCC1, in FIG. 12, as a TFCC1 “9-10”. Consequently, we will refer to the TFCC2 Contact Annular, which was derived from it, and which is shown in FIG. 14, as the TFCC2 Contact Annular “9-10” or simply TFCC2 “9-10”.
  • Now, let us visualize that we make another TFCC1, like the one in FIG. 12, again with two concentric rows of contacts, but for a device that has only two concentric rows of contact pads, for only the two rows number 7 and 8. We would refer to this TFCC1, as a TFCC1 “7-8”. Now, if we extract from it a new TFCC2 Contact Annular, it would look like the one shown in FIG. 15. Logically, we would refer to this one as a TFCC2 “7-8”.
  • Now, we can repeat the process and create a TFCC2 Contact Annular with only the two rows number 5 and 6, like the one shown in FIG. 16. We would refer to this one as the TFCC2 “5-6”.
  • And so on.
  • Now, let's visualize that we have a BGA, which has only four rows of contact pads, which are located at rows number 5, 6, 9 and 10, skipping rows number 7 and 8. We could take one TFCC2 “5-6” as in FIG. 16, and take one TFCC2 “9-10” as in FIG. 14, and join them by some means, to combine them and to create one that looks as in FIG. 17. We would refer to this one as a TFCC2 “5-6-9-10”.
  • We can go on and create all kinds of combinations of TFCC2, by simply creating TFCC1s, as needed and by combining them in a similar fashion.
  • For example, we can create the TFCC2 “5 6 7 8 9 10”, as shown in FIG. 18, by simply repeating the process described above.
  • If necessary, we can create a TFCC2 Contact Annular with only one row, by excising it from a TFCC1 like in FIG. 10, for example.
  • Now, as to how we would join these various segments of TFCC2s together.
  • We can visualize a number of ways to do that. For example, we can mount all the various excised segments on a temporary common base, either at the BGA end or at the PCB end, then we “glue” the segments together, and then once the segments are joined together, then the temporary common base can be removed if so desired or if necessary, or otherwise that temporary common base can stay in place as part of the TFCC2 end product. For example, this temporary common base can be made of a sheet of solder mask material, and can be place on the stem side of the contacts, leaving the side of the contacts that will adjacent to the BGA unencumbered. Another way is that the annulars can be held together by a removable/dissolvable or stay-in-place skin, either above or below the shown surfaces, or in between the annulars.
  • I am sure that a person skilled in this art can find other ways, as well, to hold the various excised segments together.
  • Second Preferred Embodiment Individual Strips With Contact Elements
  • FIGS. 19 through 21 show the main concepts of the Second Embodiment, with some variations thereof.
  • FIG. 19 shows a strip of carrier wafer 192, which carries one single row of contact “pins”. The individual contact pins can be prepared in advance and then inserted into the strip, one at a time, or several contacts at a time. Again, a person skilled in this art can come up with more that one way to accomplish this insertion task.
  • FIG. 19-A shows that the contacts have been lined up, so that all of them will be in the same direction or orientation. I refer to this arrangement as “orthogonal”. The pitch would match the pitch of the respective devices that will use these contacts, and the length of the stem can be whatever we want it to be.
  • Then we can lay several such strips, side by side, as in FIG. 20-C, to create the desired matrix to match the BGA or any such device.
  • FIG. 19-B, the lower view in this figure, shows a similar arrangement, except that now, we have oriented the contact lances, according to the mother and the present invention, i.e. “so that they present the least resistance to bending/flexing in the expected respective direction of the thermal deformation of the respective devices to be attached by these contact pins.”
  • Of course, in this case, the degree of orientation, or rather the angle of each individual contact will be based on the respective position or location of that individual contact, with respect to the whole matrix of contacts of the receiving device, such as a BGA for example. In other words, if the strip shown in FIG. 19-B is intended to create the row #9 in a device like the one of FIG. 14, then the orientation angles of the individual contact would match the orientation angles shown for the contacts in row #9 of that device in FIG. 14. But if the strip shown in FIG. 19-B will create the row #10 of that device of FIG. 14, then the orientation angles of the individual contact would be slightly different. The angles will be selected to match the angles of the contacts in row #10 of that device in FIG. 14, and the strip will be identified as such, i.e. each strip will be identified as to which location it belongs to in the specific matrix. This will be repeated as necessary, so that when the individual strips will be joined side by side, as in FIG. 20-C, then all the contacts will be oriented properly.
  • Let me repeat. We can prepare individual strips, which will ultimately be arranged side by side, as in FIG. 20-C, to form a matrix as needed for the respective device to be assembled, similar to the arrangement mentioned above, but with an important difference. Here the individual contact lances will be oriented , such that each one of the contact leads will be oriented in its individual respective direction, which will coincide with the ray from the thermal center, or fixation point, of the device, going to the face of the individual respective contact lance, so that every such individual lance will be oriented as per present invention, i.e. “so that it would present the least resistance to bending/flexing in the expected respective direction of the thermal deformation of the respective devices to be attached by these pins.”
  • Another feature shown in FIG. 20 is the solder foot, which will be attached to the second device, e.g. a PCB.
  • FIG. 20-A shows a similar strip, similar to the one in FIG. 19-A, with the contact lances all oriented in one direction, i.e. orthogonal, but where the PCB end of the contacts have been bent/folded, so as to create a foot, to facilitate the soldering of the lead to the PCB pads, for example.
  • FIG. 20-B shows two such strips, side by side, or a “dual row” strip. The feet of the individual contacts can be bent/folded first and then the strips would be placed side by side, or the feet can be folded afterwards. Also, you can notice that the feet in FIG. 20-B are pointing towards each other, i.e. the folds are in opposite directions. This is an option. The second option is to bend all the feet to point in the same similar direction, which could be easier to manufacture and to handle. The third option is to “orient” the feet as per present invention. In this case, it would make sense to orient the whole contact, including the lance of the contact, as per present invention, and simply fold the feet so they become oriented automatically.
  • FIG. 20-C shows several such strips placed side by side, to create a TFCC, i.e. a slab of TFCs. The individual strips will be joined together to create a matrix of contacts, which would correspond and match the matrix of contact pads of the devices to be assembled.
  • FIG. 21 shows one possible method for fabricating and forming the solder feet of the contact elements, to create the feet which will be soldered to a PCB or a substrate. Shown are the clamps, which can act such that one clamp would apply pressure or simply acts as a mechanical stop, while the other clamp at the opposite side of the lance would act as the anvil. Then a third movable member can act as the pusher slide to fold the foot as desired. The pusher can have a smooth rounded front corner to facilitate the folding operation.
  • FIG. 21-A shows an isometric view of a strip 211, with a number of contacts 221 inserted in it. The lower tip of the contact at the left hand end of the strip is being folded to create the foot of the lead which will be soldered to the PCB or the substrate.
  • FIG. 21-B shows an end view of the parts involved.
  • Also the Press 214 and Anvil 215 can be shaped, as in FIG. 10-C, such that they can “trap” the contact lance and have a better control on its position during the folding operation.
  • The contacts can be folded one at a time, or more than one contact can be folded at the same time. Again, a person skilled in the art can figure out how to do all that.
  • Third Preferred Embodiment Carrier Wafer With Contact Elements
  • FIGS. 22 through 25 show the main concepts of the Third Embodiment, with some variations thereof.
  • FIG. 22 shows a carrier wafer that can be populated with TFCC contact elements, by stitching, i.e. by inserting the contact elements/lances into the wafer. It is a different way of creating the interconnection device. Here, we will be using contact elements, similar to those used in the TFCCs, but we will have them prepared individually and then insert them into a carrier, to end up looking as shown in FIG. 22.
  • The individual contacts, contact elements, can be prepared in advance and/or can be made out of a strip of conductive metal 221 as shown, which I will call the leadframe. The contacts 223 can be etched or stamped out of the leadframe, and can be held on to the leadframe by appropriate tabs, basically in a way like many other contact spring or contact elements are made which are used for sockets and connectors. Or the contact elements can be shaped on the fly, i.e. during the stitching operation, e.g. stamped out of the full strip of conductive material. The leadframe strip can be prepared so as to have a certain area of it, already coated by a layer of solder mask 222, along a “band”, which ultimately would create the stem portion of the contact elements. Individual contact elements 225 will be cut out from the leadframe and the stem will bent at 90 degrees wrt the head and then inserted into the carrier.
  • A by-product of this approach is that the contact will end up with an elongated cross section, where the thickness of the base metal of the strip is much smaller than the width of the contacts. This will make the contact leads more flexible when bent on their flat, more so than if they would be bent on edge.
  • A stitching machine, almost like a sewing machine or a stapling gun, can take the contact element and insert its lance/stem in the carrier wafer. The contact lances can be arranged on/in the carrier wafer in a matrix that would match the matrix of the BGA/device, in pitch and distribution.
  • In a way, this could be the same procedure that could be used to create the strips shown in FIGS. 19, 20 and 21. Also the feet of the leads in FIG. 22 could be bent in a similar way as shown in FIG. 21.
  • The stitching operation can be done by several methods.
  • Stitching method #1: One is to keep hold of the carrier wafer in one position and move the stitching head from one point to the next to fill the whole matrix of pins in the carrier wafer. The leadframe providing the individual contact elements can be located at a steady/fixed location and the stitching head can go to the leadframe and grab one contact element at a time and then move to the proper location at the carrier wafer and insert the lance/lead there, and then go back to the leadframe and grab the second contact element and repeat the process.
  • Stitching method #2: Another method is to provide the leadframe/strip as an attachment to the stitching head and would move with the stitching head from one insertion point to the next.
  • Stitching method #3: A third option is to keep the stitching head in one location and move the carrier wafer back and forth and from side to side. This would look more and more like a sewing machine, where the thread and the stitching head/needle are in one location and where the cloth is moved right and left and to and fro, with respect to the stitching head, to accomplish the sewing operation.
  • Please notice that we can see in FIG. 22 that the contacts in the carrier, carrier [wafer] wafers 226 and 228, are shown in two different groups. The [left hand side of the] carrier 226 is populated by contacts that are placed all in the same direction, which I will refer to as an “orthogonal” matrix, while the 228 [right hand side] shows that the contacts are “oriented each one in a special direction”.
  • This can be seen more clearly, if we look at the pin directions 227 and 229. The pin directions 227 are all parallel to each other, which means that the cross section of the pins lances or stems are all parallel to each other and in the same direction. This is an example of the ORTHOGONAL arrangement. On the other hand, the pin directions 229 are different. Each one of the direction of the various pins is pointing in a different direction. But they all are oriented in a way, such that they will all converge, generally, at one single predetermined point, which generally is the thermal center of the device and/or of the assembly of the device attached together. The point of convergence can also be a fixation point related to the device or the assembly. This is an example of the ORIENTED arrangement.
  • The oriented contacts will be oriented as per the present invention, i.e. such that the more flexible section of each leads column would be in the direction of the largest expected thermal expansion or contraction. This translates into orienting the faces, so that the flat wide surfaces of each individual column will be facing towards the respective expected thermal center or the fixation point of the assembled components or the assembly, so as to minimize the stresses during the expected thermal cycling or thermal fluctuations.
  • So, the contact elements could be arranged in an orthogonal fashion, as in the carrier 226 [left hand side half of the matrix] shown in FIG. 22, or in an “oriented” fashion, as in the [the RHS half of] the carrier 228.
  • In order to accomplish the arrangement [of the RHS of the FIG. 11] shown in the lower figure of FIG. 22, i.e. as in the carrier 228, with the pins oriented as per pin directions 229, again we can consider the following few options.
  • Stitching Method #4:
  • We keep the stitching head and the contact leadframe all in one “permanent” location and “orientation” as in Stitching Method #3, and move the carrier wafer in the X- and Y-directions and at the same time, rotate it in an angle “A”, as shown in the lower figure of FIG. 22, so that the contact lances will ultimately be oriented as needed as per present invention.
  • Stitching Method #5:
  • We can keep the carrier wafer stationary and move the stitching head in the x and y direction and at the same time, rotate it in a specific angle, to position the respective lance at the appropriate respective angle, as per present invention.
  • Preferred Embodiment #4
  • FIG. 23 shows a couple of additional enhancements. (1) Enhancement #1: A pre-coined contact, which that snaps into (2) Enhancement #1; a molded or excised carrier of various thicknesses.
  • The preformed or pre-coined contact looks similar to what is shown in FIGS. 19 and 21, but shows a few variations. It has two staked barbs 235 just below the round head 231, at a distance from the pad head which depends on the thickness of the isolative carrier. The carrier, like 192 or 194 in FIG. 19, can be molded and can also have a rectangular opening for the foot of the contact to enable a straight-in insertion of the contact. The orientation is defined by the molding and the leg slot keeps the contact held vertical and locked in the molding. Automated contact tooling and insertion can be enabled to fabricate both the contact and the carrier to defined lengths and orientations and pitches.
  • An excised carrier can also be used, which can be made by a simple laser cutting out of a plastic material, like sheeting or thicker substrates.
  • Few additional explanatory details. First, FIG. 23 shows that the Pad Head 231 is round, so as to more closely match the size of the solder ball on a BGA and to provide a good solder joint at this end of the contact. Second, it does highlight the fact that the contact lead or stem 233 or lance has an elongated/rectangular cross section. Third, it shows some “barbs” 235 are staked into the sides of the stem, to act as detents, to hold/retain the contact element more securely into the carrier (not shown) in this FIG. 23, but similar to the carriers in previous figures). Fourth, it shows [in FIG. 23 B,] that the foot 237 of the contact element is slightly narrower [that] than the width of the stem. This makes it that the carrier opening would allow the contact to be pushed through the carrier and then the leg or stem will snap in place and the barbs will retain the contact in place.
  • Notes:
  • 1—Use of Adhesives:
  • Please refer to FIGS. 26 and 27. In all the above embodiments, if we find it necessary and beneficial, we could also apply some adhesive material 275 between the top of the carrier 261 and the bottom of the pad head, or between the carrier and portion of the stem that will be retained inside in the carrier, to ensure a better retention.
  • Another way to ensure that the contacts will stay in place, especially when using a carrier wafer that is receptive to this proposed method, is to apply some heat and/or pressure to the head of the contact element, so that it sticks to the material of the carrier wafer.
  • 2. Foot: The foot, which is the Contact bottom flap, which would be soldered to the PCB for example. As mentioned in TFCC1, the foot may be optional. We may have instances where the foot is eliminated, and the contact side view will look like an inverted letter “ELL”.
  • 3. Anchor: We should keep in mind that we can still incorporate the “anchor” in any of the present invention's embodiments.
  • Embodiment #5
  • We talked earlier about the flexibility of the contacts in the Z-direction. In some cases, this could be a beneficial/desirable feature. FIGS. 24 and 25 show two examples of contacts that would provide some flexibility in the Z-direction. FIG. [24] 24-A shows an isometric view of a contact, with a curvilinear profile, as seen in the end view. FIG. 24-B, which could be referred to as a ZEE-shape or an ESS-shape. [[It]] FIG. 24-B also shows the tooling that could be used to create such a profile. FIG. 25 shows another variation on the profile. We could call this a CEE-profile. The tooling is slightly different that the one in FIG. 24. I am sure any person skilled in this art can find various other ways to accomplish the desired end result.
  • Embodiment #6
  • FIGS. 26 and 27 show another variation as to how to make and prepare and present the contact elements to the “stitching machine”, if you will, which will insert them into the carrier. First of all, FIG. 26 shows that the contacts can be made out of regular wire, made of a conductive material, say copper. The most economical way is to use a “round” wire, but wires with other cross-sections could be considered as well. We could also use wires made out of a springy material, such as Beryllium Copper, if we feel that it would enhance the performance. But the material needs to be solderable, if we want to use solder as the joining material.
  • FIG. 26 shows that the wires are carried by two paper strips 261 or could be double strips. This could be similar to the way some resistors or circuit protection devices that are carried on a bandolier, for example. Then the portion of the wire which will create the stem portion of the contact can be treated to become non-wettable to the joining material. If it is solder, then we could apply a solder masking coating. Then we could use a “spanking” or “coining” operation, at various locations along the wire, to create the flat/round pad head 262, which we call the BGA flap, and to create a certain bulging portion, as 271 in FIG. 27, to act as the detent, to simulate the “barbs” 235 of FIG. 23. We could even create another flat portion, to simulate the foot 263 and 273 in FIG. 27 of the contact, which we call the PCB flap or the PCB foot. Then the individual wires, which by now would look pretty much like the etched or stamped leadframe leads, would be [picket] picked out of the bandolier and inserted into the carrier 265, by a method similar to the ones mentioned earlier above or any equivalent method.
  • FIG. 27 shows an enlarged view of the contact of FIG. 26, sitting in the carrier. The foot 273 is shown before and after it is bent. The bending can be done after the insertion, in a similar way as was mentioned earlier above in connection with FIGS. 20 through 25.
  • FIG. 28 shows some different details as to how we can form the wire contacts shown in FIGS. 26 and 27. Configuration 7 in FIG. 28 shows an additional bend, near the middle of the stem height, to simulate the effect of the curvilinear shapes in FIGS. 24 and 25, i.e. to increase the flexibility in the vertical Z-direction. It is also the shape of the contacts, that are shown in FIG. 30.
  • FIG. 29, actually the three figures in FIGS. 29-1, 29-B and 29-C, show [shows] three different ways we can make and form the contact elements, especially if we want the stem to flex more at the middle of the height of the stem. The [LHS] contact in FIG. 29-A shows an hour glass stem, the [middle] contact in FIG. 29-B shows a notch near the center of the stem height, and the [RHS] contact in FIG. 29-C shows a “Necking” near the middle of its stem height.
  • FIG. 30 shows how the contacts shown in FIG. 28 could be attached to a BGA. It highlights at least two important points. One, that the contacts are oriented as per present invention. Two, that the “belly” of the contact is pointing inwards, which makes it easier to form.
  • The Carrier Wafer
  • The carrier wafer can be made of a material that can be removed, or dissolved or disintegrated, after the assembly operation is completed, i.e. after attaching the BGA to the PCB for example.
  • Embodiment #7-A
  • We can use a material similar to the carrier material invented by Geoff Wong et al, as in U.S. Pat. No. 4,655,382, Wong et al, “MATERIALS FOR USE IN FORMING ELECTRONIC INTERCONNECT”, which I refer to also as a “DISSOLVABLE CARRIES WAFER MATERIAL”. It is made out of a layered construction, comprising layers of polymers and layers of paper. The wafer is water soluble.
  • Once the reflow process is completed, we can remove the carrier wafer material, by putting it in a regular household kind of dishwasher and the material will be simply washed away.
  • Embodiment #7-B Solder Masking Wafer Material
  • Here is another portion of TFCC1, which is important for this present invention TFCC2. FIGS. 31-A and 31-B, which are Prior Art-TFCC1-FIGS. 68-A and 68-B, show a carrier that was made completely out of a solder masking material, and then the contacts were inserted in it. We could use a similar material to make the carrier of FIG. 22, or any of the other carrier wafers or carrier strips, described by FIGS. 19 through 21. In such a case, we would not need to prepare the contact elements with solder masking, because the wafer material would perform the solder masking function.
  • Embodiment #7-C Solder Masking Wong Carrier Wafer Material
  • I propose a new wafer material, in addition to those mentioned above and to those that are already in the prior art domain.
  • What I propose to achieve is basically to create a “composite” wafer material, made of a) the materials mentioned in the prior art, and b) some material that can act as a solder masking material, that would be combined inside the a-materials; so that the composite carrier wafer would act as “solder masking” as well.
  • We can visualize that if we combine the material of Geoff Wong together with some of the material used in Embodiment #7-B, i.e. with a solder masking material, then we would create an interesting new carrier wafer material.
  • I would call such a material, the “Solder Masking Wong Material” or simply the SMW Material. With such a Solder Masking Wong Material”, we would not need to prepare the contact elements with solder masking of the stem in advance.
  • This will be similar to the material of Embodiment #7-B, but would most probably be easier and faster to dissolve and/or remove.
  • We can combine the two materials in at least two different ways. One, we can impregnate the compound used for the various layers with the masking material, or two, we can create a “layered carrier”, by simply apply the masking material on one or both sides of the standard Wong material. This can be in the form of a liquid that would get applied to the outside surface of the Wong material, or in the form of a sheet material that can be laminated to it.
  • Embodiment #7-D TCE Controlled Carrier Wafer
  • This wafer material will have, in addition to the “standard” elements, or part of these standard elements that make the material, some ingredients or additives which will control the Effective Thermal Coefficient of Expansion (TCE) of the material.
  • An example of such additives could be a set of “threads” which are embedded in the wafer material.
  • Note: This concept was already mentioned in Refxxx, towards the end of the specification. I am reviving the concept at this point, because it can be very important, especially if the devices to be attached together are relatively large in the X- and Y-directions, in which case, the difference between the Wafer TCE and the TCE of the devices can create problems.
  • The purpose of the additives, whether they are in the forms of threads or otherwise, would be to impart to the wafer a “Controlled TCE”. Controlled Thermal Coefficient of Expansion.
  • You see, with the Wong wafer material, the wafer has a TCE that is larger than the TCE of the ceramic packages. I think its TCE is even larger than that of FR4 boards. During the reflow process, the wafer expands more than the package, and consequently the contact elements follow the wafer and could get a bit out of alignment with their resp contact pads. When the solder is molten, the contact elements attach to the BGA and to the substrate at the expanded position. When the total assembly cools down and the solder starts to freeze, the wafer shrinks more and the end result is some distortion in the shape and position of the solder and/or the contact elements.
  • In order to minimize this potentially undesirable effect, we need to find a material for the wafer, which either has an inherent TCE that matches, as close as possible, the TCE of the package and/or the chip; or we need to “doctor” the “Actual/Effective/Apparent” TCE of the wafer, so that it does more closely match that TCE of the devices that will be attached together.
  • One way to achieve this goal is to “implant” in the wafer something to force it to behave as if is has the desirable TCE or find a substitute material that has the desired TCE.
  • What I propose to achieve this goal is basically to create a “composite” wafer material made of a) the materials mentioned in the prior art, and/or b) some additives, for example some other polymer or powder or fibers, that would be compounded or dispersed or crisscrossed inside the a-materials; so that the effective TCE of the resulting material would have a new TCE, which has a value close to the desired one, or again find a substitute material that has the desired TCE.
  • Such fibers could be made out of fiberglass, or out of any other materials that have a small TCE or even a negative TCE. Ideally, these fibers would have a “rough” outside surface so as to “grab” the surrounding material and restrain it from sliding along the surfaces of the fibers.
  • Furthermore, it may be desirable to place these fibers, in the form of “threads”, as opposed to loose, bulk fibers or powder or granules.
  • A further improvement would be to place these threads in a crisscrossing pattern, pretty close to the way threads are woven together to make a cloth, with the thread interwoven over and under the intersecting threads. I believe they call this the Warp and the Weft. I will call this the “Woven Pattern”.
  • A yet further improvement would be to lay the threads in separate independent layers, whereby all the treads going in one direction, say, would lay in one level, while the threads perpendicular to the first group would be laying in another layer, not over and under, i.e. not as a woven material, but simply be oriented and laying in one plane, separate from the other plane. I will call this the “Overlay Pattern.”
  • The purpose of the Non-Woven/Overlay pattern, but Oriented thread arrangement, is that we would be able to more easily pull the threads out, after the reflow operation, if we wanted to. We would soak the assembly in an appropriate liquid to loosen up the thread, and then pull these threads out.
  • If the threads are interlaced as in the Woven Pattern, it would be more difficult to pull them out, even after soaking them and loosening them.

Claims (2)

1. An improved TFCC, wherein
the length of the stem of the contact elements is not restricted anymore by the spaces or distances between the contact pads of the devices to be attached.
2. A carrier wafer wherein
the body of the wafer which carries the contact elements can double up as a solder mask as well.
US13/107,911 2002-02-11 2011-05-14 Thermal flex contact carriers #2 Abandoned US20120012365A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/107,911 US20120012365A1 (en) 2002-02-11 2011-05-14 Thermal flex contact carriers #2

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US10/075,060 US6884707B1 (en) 2000-09-08 2002-02-11 Interconnections
US10/937,647 US7196402B2 (en) 2000-09-08 2004-09-08 Interconnections
US11/689,558 US7901995B2 (en) 2002-02-11 2007-03-22 Interconnections resistant to wicking
US12/154,753 US7944028B2 (en) 2002-02-11 2008-05-27 TFCC (TM) and SWCC (TM) thermal flex contact carriers
US13/107,911 US20120012365A1 (en) 2002-02-11 2011-05-14 Thermal flex contact carriers #2

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US12/154,753 Division US7944028B2 (en) 2002-02-11 2008-05-27 TFCC (TM) and SWCC (TM) thermal flex contact carriers

Publications (1)

Publication Number Publication Date
US20120012365A1 true US20120012365A1 (en) 2012-01-19

Family

ID=41132735

Family Applications (3)

Application Number Title Priority Date Filing Date
US11/689,558 Expired - Fee Related US7901995B2 (en) 2002-02-11 2007-03-22 Interconnections resistant to wicking
US12/154,753 Expired - Fee Related US7944028B2 (en) 2002-02-11 2008-05-27 TFCC (TM) and SWCC (TM) thermal flex contact carriers
US13/107,911 Abandoned US20120012365A1 (en) 2002-02-11 2011-05-14 Thermal flex contact carriers #2

Family Applications Before (2)

Application Number Title Priority Date Filing Date
US11/689,558 Expired - Fee Related US7901995B2 (en) 2002-02-11 2007-03-22 Interconnections resistant to wicking
US12/154,753 Expired - Fee Related US7944028B2 (en) 2002-02-11 2008-05-27 TFCC (TM) and SWCC (TM) thermal flex contact carriers

Country Status (1)

Country Link
US (3) US7901995B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9138191B1 (en) * 2014-07-09 2015-09-22 Qualcomm Incorporated Integrated circuit module with lead frame micro-needles
CN106067455A (en) * 2015-04-23 2016-11-02 爱思开海力士有限公司 There is the semiconductor packages of interconnecting member

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8283756B2 (en) * 2007-08-20 2012-10-09 Infineon Technologies Ag Electronic component with buffer layer
JP2009176947A (en) * 2008-01-24 2009-08-06 Olympus Corp Three-dimensional module
US8076587B2 (en) * 2008-09-26 2011-12-13 Siemens Energy, Inc. Printed circuit board for harsh environments
US20100300743A1 (en) * 2009-06-02 2010-12-02 Qualcomm Incorporated Modified Pillar Design for Improved Flip Chip Packaging
US8841766B2 (en) 2009-07-30 2014-09-23 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall protection structure
WO2011088164A2 (en) 2010-01-14 2011-07-21 Laird Technologies, Inc. Electrical contacts with laser defined geometries
US10833033B2 (en) * 2011-07-27 2020-11-10 Taiwan Semiconductor Manufacturing Co., Ltd. Bump structure having a side recess and semiconductor structure including the same
US8637352B2 (en) * 2011-11-22 2014-01-28 Stmicroelectronics Pte Ltd. Ball grid array to pin grid array conversion
US8970034B2 (en) 2012-05-09 2015-03-03 Micron Technology, Inc. Semiconductor assemblies and structures
US8723323B2 (en) * 2012-07-12 2014-05-13 Bae Systems Information And Electronic Systems Integration Inc. Method for fabricating solder columns for a column grid array package
JP2014120657A (en) * 2012-12-18 2014-06-30 Toshiba Corp Semiconductor device
US9269642B2 (en) * 2013-06-12 2016-02-23 Globalfoundries Inc. Methods for testing integrated circuits of wafer and testing structures for integrated circuits
US9287200B2 (en) * 2013-06-27 2016-03-15 Freescale Semiconductor, Inc. Packaged semiconductor device
FR3013147B1 (en) * 2013-11-08 2017-05-12 Commissariat Energie Atomique PROCESS FOR PRODUCING AN ELECTRICALLY CONDUCTIVE MEMBER FOR AN ELECTRONIC COMPONENT HAVING AN EXTREMITY PROVIDED WITH A CAVITY
US9647363B2 (en) * 2014-09-19 2017-05-09 Intel Corporation Techniques and configurations to control movement and position of surface mounted electrical devices
JP6407433B2 (en) * 2015-07-15 2018-10-17 ヤマハ発動機株式会社 Model data creation device, model data creation method, mounting reference point determination device, mounting reference point determination method
TWI644598B (en) * 2017-04-21 2018-12-11 南亞電路板股份有限公司 Circuit board structure and method for forming the same
US10064275B1 (en) 2017-07-18 2018-08-28 Mellanox Technologies, Ltd. Extending the lifetime of a leadless SMT solder joint using pads comprising spring-shaped traces
DE102018204408B4 (en) * 2018-03-22 2022-05-05 Danfoss Silicon Power Gmbh BUSBAR, METHOD OF MAKING SAME, AND POWER MODULE HAVING SUCH
CN110116252A (en) * 2019-06-19 2019-08-13 西安微电子技术研究所 A kind of LCCC device is planted column welding tooling and is planted method of column to LCCC device using its

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4647126A (en) * 1985-06-17 1987-03-03 Sperry Corporation Compliant lead clip
US4736520A (en) * 1983-11-04 1988-04-12 Control Data Corporation Process for assembling integrated circuit packages
US4827611A (en) * 1988-03-28 1989-05-09 Control Data Corporation Compliant S-leads for chip carriers
US6764313B2 (en) * 2002-01-03 2004-07-20 International Business Machines Corporation High density interconnects

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3930115A (en) * 1971-05-19 1975-12-30 Philips Corp Electric component assembly comprising insulating foil bearing conductor tracks
US5367124A (en) * 1993-06-28 1994-11-22 International Business Machines Corporation Compliant lead for surface mounting a chip package to a substrate
JP2891665B2 (en) * 1996-03-22 1999-05-17 株式会社日立製作所 Semiconductor integrated circuit device and method of manufacturing the same
JP3476442B2 (en) * 2001-05-15 2003-12-10 沖電気工業株式会社 Semiconductor device and manufacturing method thereof
JP3497847B2 (en) * 2001-08-23 2004-02-16 沖電気工業株式会社 Semiconductor device and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4736520A (en) * 1983-11-04 1988-04-12 Control Data Corporation Process for assembling integrated circuit packages
US4647126A (en) * 1985-06-17 1987-03-03 Sperry Corporation Compliant lead clip
US4827611A (en) * 1988-03-28 1989-05-09 Control Data Corporation Compliant S-leads for chip carriers
US6764313B2 (en) * 2002-01-03 2004-07-20 International Business Machines Corporation High density interconnects

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9138191B1 (en) * 2014-07-09 2015-09-22 Qualcomm Incorporated Integrated circuit module with lead frame micro-needles
US9202705B1 (en) 2014-07-09 2015-12-01 Qualcomm Incorporated Integrated circuit module with lead frame micro-needles
CN106067455A (en) * 2015-04-23 2016-11-02 爱思开海力士有限公司 There is the semiconductor packages of interconnecting member

Also Published As

Publication number Publication date
US7944028B2 (en) 2011-05-17
US20090032915A1 (en) 2009-02-05
US7901995B2 (en) 2011-03-08
US20070284706A1 (en) 2007-12-13

Similar Documents

Publication Publication Date Title
US20120012365A1 (en) Thermal flex contact carriers #2
US7159312B2 (en) Connector having improved contacts with fusible members
US5910885A (en) Electronic stack module
US7695287B2 (en) Ball grid array (BGA) connection system and related method and ball socket
US5602422A (en) Flexible leads for tape ball grid array circuit
KR20040068169A (en) Ball grid array package
US5610436A (en) Surface mount device with compensation for thermal expansion effects
JP4031709B2 (en) connector
JP7257445B2 (en) board module
EP2048924B1 (en) Method of forming an electronic assembly comprising an electronic component with high density, low cost attachment
JP2018174018A (en) socket
US6990733B2 (en) Method of making stitched LGA connector
US6924556B2 (en) Stack package and manufacturing method thereof
CN2415468Y (en) Array connector
KR100730273B1 (en) Electrical connector
US7029292B2 (en) Electrical connector and contact
US20040251527A1 (en) Intermediate support for electronic components and method for solder contacting such an intermediate support
JP4168346B2 (en) Mounting structure of surface mount components
CN110767990A (en) PCB antenna and preparation method thereof
EP0429664A1 (en) Printed circuit board and method of mounting circuit parts
JP2002353372A (en) Joining part and mounting substrate
JP2024021558A (en) Contact and connector
JPH11288755A (en) Jumper element and its manufacture
JPH0666063U (en) Hybrid integrated circuit device
US20080113566A1 (en) Surface mount board-stacking connector

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO PAY ISSUE FEE