US20110256671A1 - Semiconductor memory module with reverse mounted chip resistor - Google Patents

Semiconductor memory module with reverse mounted chip resistor Download PDF

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Publication number
US20110256671A1
US20110256671A1 US13/169,663 US201113169663A US2011256671A1 US 20110256671 A1 US20110256671 A1 US 20110256671A1 US 201113169663 A US201113169663 A US 201113169663A US 2011256671 A1 US2011256671 A1 US 2011256671A1
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Prior art keywords
chip
resistor
connection pads
module substrate
chip resistor
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Abandoned
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US13/169,663
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Hyun-Seok Choi
Hyung-Mo HWANG
Yong-Hyun Kim
Hyo-Jae Bang
Su-Yong AN
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Individual
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Individual
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Priority to US13/169,663 priority Critical patent/US20110256671A1/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09736Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10439Position of a single component
    • H05K2201/10477Inverted
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0369Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133Assembling to base an electrical component, e.g., capacitor, etc. with component orienting

Definitions

  • the present invention relates to a semiconductor memory module, and more particularly to a semiconductor memory module with a reverse mounted chip resistor, and a method of fabricating the same.
  • Semiconductor memory modules include not only semiconductor memory chips, but also passive devices such as capacitors and resistors, which are all generally mounted on a module substrate.
  • the resistor of a memory module is mounted in the form of a chip resistor beside an external connection port of a module substrate. The chip resistor helps control the current within the circuit and typically drops the voltage.
  • FIG. 1 illustrates the structure of a typical chip resistor.
  • the chip resistor includes a thin-film resistive material 2 , such as TaN or RuO 2 , on an insulating substrate I composed of a material such as alumina.
  • a thin-film internal electrode 3 contacts both ends of the resistive material 2 and a plated electrode 4 is formed on the internal electrode 3 .
  • a protection layer 5 such as a glass layer, is formed over the resistive material 2 to protect the resistive material 2 .
  • the chip resistor may be mounted with either the surface with the resistive material facing upward, or the surface with the protective layer 5 .
  • the resistive material faces upward the resistive material is exposed and both the resistive material and the electrode are susceptible to physical damage during assembly or handling by a user. Accordingly, the electrode can peel off or the resistive material can break, causing an open circuit.
  • the vacuum nozzle must grip the uneven surface of the resistive material and the protection layer, which can cause pickup errors and misalignment.
  • the chip resistor may be slanted because the resistive material and protection layer are higher than the plated electrodes.
  • Embodiments of the present invention provide a reliable semiconductor memory module that prevents open circuits due to damage to a resistive material within a chip resistor and a defective connection caused by slanting of the chip resistor.
  • Embodiments of the present invention also provide a method of fabricating a reliable semiconductor memory module that prevents open circuits due to damage to a resistive material within a chip resistor and a defective connection caused by slanting of the chip resistor.
  • a semiconductor memory module includes a module substrate having a chip-resistor pad and a chip resistor reverse mounted onto the chip-resistor connection pad of the module substrate.
  • the chip resistor includes an insulating substrate, a resistive material portion on the insulating substrate, and a metal electrode electrically connected to the resistor material portion and located on the insulating substrate.
  • the chip-resistor connection pad is higher than other connection pads of the module substrate, to prevent the resistive material portion of the chip resistor from contacting the module substrate.
  • FIG. 1 is an exploded perspective view of a typical chip resistor
  • FIG. 2 is a sectional view of a semiconductor memory module according to an embodiment of the present invention.
  • FIG. 3 is a sectional view of a semiconductor memory module according to another embodiment of the present invention.
  • FIGS. 4A through 4F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according an embodiment of the present invention.
  • FIGS. 5A through 5F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according to another embodiment of the present invention.
  • FIG. 2 is a sectional view of a semiconductor memory module according to an embodiment of the present invention.
  • the semiconductor memory module includes a chip resistor 20 that is reverse mounted on a module substrate 10 such that a thin film resistor material 24 of the chip resistor 20 faces the module substrate 10 .
  • the chip resistor 20 may be mounted on at least one chip-resistor pad 12 a, which is formed on the module substrate 10 using a solder paste 18 .
  • the chip resistor 20 includes the thin-film resistor material 24 on an insulating substrate 22 , and further includes a metal electrode 26 electrically connected to the resistive material 24 and formed on each side of the insulating substrate 22 . Although, the metal electrode 26 is shown to extend to the rear of the chip resistor 20 in FIG.
  • the metal electrode 26 may have an internal electrode covered by a plated layer.
  • a polymer protection layer (not shown) may be formed to protect the surface of the chip resistor 20 that is opposite to that on which the resistive material 24 is formed.
  • the resistive material 24 of FIG. 2 includes a protection layer (not shown), where the protective layer extends further from the insulating substrate 22 than the metal electrode 26 connected to the chip-resistor control pad 12 a.
  • the chip-resistor connection pad 12 a of the module substrate 10 may be formed to extend further above the module substrate 10 than other connection pads 12 to prevent the resistive material 24 of the chip resistor 20 from contacting the module substrate 10 and slanting of the chip resistor 20 .
  • FIG. 3 is a sectional view of a semiconductor memory module according to another embodiment of the present invention.
  • the semiconductor memory module according to the embodiment shown in FIG. 3 is substantially similar in construction to the semiconductor memory module illustrated in FIG. 2 .
  • the semiconductor memory module illustrated in FIG. 3 further includes an insulating dam 16 to prevent a short between the chip-resistor connection pads 12 a.
  • the chip-resistor connection pad 12 a may again extend further from the surface of the module substrate 10 than other connection pads 12 in order to prevent the resistive material 24 of the chip resistor 20 from contacting the insulating dam 16 .
  • FIGS. 4A through 4F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according an embodiment of the present invention.
  • connection pads 12 are patterned on a module substrate 10 .
  • the module substrate 10 may include a copper clad laminate (CCL) having thin copper layers on both sides of an epoxy plate.
  • the connection pads 12 may be connected to various elements including a chip resistor, and may be formed by patterning the outermost thin copper layer of the CCL by photolithography.
  • a photoresist 14 is coated on the module substrate 10 to cover the connection pads.
  • the photoresist 14 may then be patterned to expose one or more connection pads 12 that are configured to be connected to a chip resistor.
  • a copper (Cu) layer is added onto the one or more connection pads 12 exposed by the photoresist 14 , thereby forming a chip-resistor connection pad 12 a that may extend further from the surface of the module substrate 10 than the other connection pads 12 that are shielded by the photoresist 14 .
  • the copper layer may be formed by electroplating, for example, and the chip-resistor connection pad 12 a may have a thickness of about 70 to about 80 ⁇ m depending on the height of the resistive material of the chip resistor 20 .
  • the photoresist pattern 14 is removed. As illustrated in FIG. 4D , the chip-resistor connection pad 12 a extends higher above the surface of the module substrate 10 than the other connection pads 12 .
  • the chip resistor 20 is then reverse mounted onto the one or more chip-resistor connection pads 12 a.
  • the solder paste 18 may be printed onto the chip-resistor connection pad 12 a.
  • the chip resistor 20 is then aligned with the one or more chip-resistor connection pads 12 a and disposed thereon.
  • the module substrate 10 holding the chip resistor 20 may then be thermally treated to melt the paste 18 and secure the chip resistor 20 onto the chip-resistor connection pad 12 a (i.e., solder the chip resistor 20 onto the chip-resistor connection pad 12 a ). Since the chip-resistor connection pad 12 a is high enough to prevent the resistive material from contacting the module substrate 10 , the problem of having the chip resistor slanted can be prevented.
  • the insulating dam 16 illustrated in FIG. 3 may be formed on the module substrate 10 to prevent a short between the chip-resistor connection pads 12 a after removing the photoresist 14 and before mounting the chip resistor 20 . Additionally, the height of the chip-resistor connection pad 12 a can be adjusted to insure that the resistive material 24 of the chip resistor 20 does not contact the insulating dam 16 .
  • FIGS. 5A through 5F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according to another embodiment of the present invention.
  • the outermost thin copper layer of a CCL layer of a module substrate 10 is patterned to form connection pads 12 similar to those in the embodiment illustrated in FIG. 4A .
  • the outermost thin copper layer of the CCL layer of the module substrate 10 may have a thickness of about 70 to about 80 um.
  • a photoresist 14 is formed on the module substrate 10 to cover the connection pads 12 . Then, the photoresist 14 is patterned to cover only the connection pads 12 corresponding to where a chip resistor will be connected.
  • connection pads 12 exposed by the photoresist 14 are etched to decrease their height.
  • the connection pads 12 may be wet etched using a mixed solution of a fluorine-based compound, for example.
  • the connection pads 12 that remain covered by the photoresist 14 are not etched during this process and become chip-resistor connection pads 12 a that can extend above the surface of the module substrate 10 more than the remaining etched connection pads 12 .
  • connection pads 12 after etching the connection pads 12 , the photoresist pattern 14 is removed. As illustrated in FIG. 5E , the chip-resistor connection pads 12 a extend higher above the surface of the module substrate 10 than the other connection pads 12 .
  • a chip resistor 20 is reverse mounted onto the chip-resistor connection pad 12 a of the substrate module in a substantially similar process that is described above with reference to FIG. 4F .
  • the chip resistors mounted according to embodiments of the present invention displayed positive results with very few or substantially no defects of external appearance, passed an electrical test, and did not fail heat cycling (about - 25 to about 125 ° C.).
  • a chip resistor is reverse mounted onto a module substrate to protect and prevent damage to the resistive material and avoid open circuits. Furthermore, connection pads connected to the chip resistor are formed to extend higher from the module substrate than other connection pads to prevent a defective connection of the chip resistor that could occur if the resistive material of the chip resistor were to contact the module substrate or the insulating dam.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

A semiconductor memory module having a reverse mounted chip resistor, and a method of fabricating the same are provided. By reverse mounting the chip resistor on the semiconductor memory module, the resistive material is protected, thereby preventing open circuits caused by damage to the resistive material. Also, a chip-resistor connection pad of a module substrate is formed to extend higher from the module substrate than other connection pads connected to other elements. Thus, the resistive material of the chip resistor does not contact the module substrate, thereby preventing poor alignment and defective connections.

Description

    CROSS-REFERENCE TO RELATED PATENT APPLICATION
  • This application claims the benefit of Korean Patent Application No. 10-2006-0109070, filed on Nov. 6, 2006, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
  • BACKGROUND
  • 1. Field of the Invention
  • The present invention relates to a semiconductor memory module, and more particularly to a semiconductor memory module with a reverse mounted chip resistor, and a method of fabricating the same.
  • 2. Description of the Related Art
  • Semiconductor memory modules include not only semiconductor memory chips, but also passive devices such as capacitors and resistors, which are all generally mounted on a module substrate. Generally, the resistor of a memory module is mounted in the form of a chip resistor beside an external connection port of a module substrate. The chip resistor helps control the current within the circuit and typically drops the voltage.
  • FIG. 1 illustrates the structure of a typical chip resistor. The chip resistor includes a thin-film resistive material 2, such as TaN or RuO2, on an insulating substrate I composed of a material such as alumina. A thin-film internal electrode 3 contacts both ends of the resistive material 2 and a plated electrode 4 is formed on the internal electrode 3. A protection layer 5, such as a glass layer, is formed over the resistive material 2 to protect the resistive material 2.
  • Because of substantially similar ends of the chip resistor, which are used when mounting the chip resistor to the module substrate, the chip resistor may be mounted with either the surface with the resistive material facing upward, or the surface with the protective layer 5.
  • However, when the resistive material faces upward the resistive material is exposed and both the resistive material and the electrode are susceptible to physical damage during assembly or handling by a user. Accordingly, the electrode can peel off or the resistive material can break, causing an open circuit. Moreover, when a mounting facility grips the chip resistor with a vacuum nozzle to place the chip resistor onto the module substrate, the vacuum nozzle must grip the uneven surface of the resistive material and the protection layer, which can cause pickup errors and misalignment.
  • These problems may be partially solved when the resistive material faces downward during mounting. However, even in this case, the chip resistor may be slanted because the resistive material and protection layer are higher than the plated electrodes.
  • SUMMARY
  • Embodiments of the present invention provide a reliable semiconductor memory module that prevents open circuits due to damage to a resistive material within a chip resistor and a defective connection caused by slanting of the chip resistor.
  • Embodiments of the present invention also provide a method of fabricating a reliable semiconductor memory module that prevents open circuits due to damage to a resistive material within a chip resistor and a defective connection caused by slanting of the chip resistor. According to an embodiment of the present invention, a semiconductor memory module includes a module substrate having a chip-resistor pad and a chip resistor reverse mounted onto the chip-resistor connection pad of the module substrate. The chip resistor includes an insulating substrate, a resistive material portion on the insulating substrate, and a metal electrode electrically connected to the resistor material portion and located on the insulating substrate. The chip-resistor connection pad is higher than other connection pads of the module substrate, to prevent the resistive material portion of the chip resistor from contacting the module substrate.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:
  • FIG. 1 is an exploded perspective view of a typical chip resistor;
  • FIG. 2 is a sectional view of a semiconductor memory module according to an embodiment of the present invention;
  • FIG. 3 is a sectional view of a semiconductor memory module according to another embodiment of the present invention;
  • FIGS. 4A through 4F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according an embodiment of the present invention; and
  • FIGS. 5A through 5F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according to another embodiment of the present invention.
  • DETAILED DESCRIPTION
  • The present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. The invention may, however, be embodied in many different forms, and should not be construed as being limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. In the drawings, the thicknesses of layers and regions are exaggerated for clarity.
  • FIG. 2 is a sectional view of a semiconductor memory module according to an embodiment of the present invention. Referring to FIG. 2, the semiconductor memory module includes a chip resistor 20 that is reverse mounted on a module substrate 10 such that a thin film resistor material 24 of the chip resistor 20 faces the module substrate 10. The chip resistor 20 may be mounted on at least one chip-resistor pad 12 a, which is formed on the module substrate 10 using a solder paste 18. The chip resistor 20 includes the thin-film resistor material 24 on an insulating substrate 22, and further includes a metal electrode 26 electrically connected to the resistive material 24 and formed on each side of the insulating substrate 22. Although, the metal electrode 26 is shown to extend to the rear of the chip resistor 20 in FIG. 2, it may reach just to the side of the chip resistor 20. The metal electrode 26 may have an internal electrode covered by a plated layer. Also, a polymer protection layer (not shown) may be formed to protect the surface of the chip resistor 20 that is opposite to that on which the resistive material 24 is formed. The resistive material 24 of FIG. 2 includes a protection layer (not shown), where the protective layer extends further from the insulating substrate 22 than the metal electrode 26 connected to the chip-resistor control pad 12 a. According to this configuration of the present embodiment, the chip-resistor connection pad 12 a of the module substrate 10 may be formed to extend further above the module substrate 10 than other connection pads 12 to prevent the resistive material 24 of the chip resistor 20 from contacting the module substrate 10 and slanting of the chip resistor 20.
  • FIG. 3 is a sectional view of a semiconductor memory module according to another embodiment of the present invention. The semiconductor memory module according to the embodiment shown in FIG. 3 is substantially similar in construction to the semiconductor memory module illustrated in FIG. 2. However, the semiconductor memory module illustrated in FIG. 3 further includes an insulating dam 16 to prevent a short between the chip-resistor connection pads 12 a. The chip-resistor connection pad 12 a may again extend further from the surface of the module substrate 10 than other connection pads 12 in order to prevent the resistive material 24 of the chip resistor 20 from contacting the insulating dam 16.
  • FIGS. 4A through 4F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according an embodiment of the present invention.
  • Referring to FIG. 4A, connection pads 12 are patterned on a module substrate 10. The module substrate 10 may include a copper clad laminate (CCL) having thin copper layers on both sides of an epoxy plate. The connection pads 12 may be connected to various elements including a chip resistor, and may be formed by patterning the outermost thin copper layer of the CCL by photolithography.
  • Referring to FIGS. 4B and 4C, a photoresist 14 is coated on the module substrate 10 to cover the connection pads. The photoresist 14 may then be patterned to expose one or more connection pads 12 that are configured to be connected to a chip resistor.
  • Referring to FIG. 4D, a copper (Cu) layer is added onto the one or more connection pads 12 exposed by the photoresist 14, thereby forming a chip-resistor connection pad 12 a that may extend further from the surface of the module substrate 10 than the other connection pads 12 that are shielded by the photoresist 14. The copper layer may be formed by electroplating, for example, and the chip-resistor connection pad 12 a may have a thickness of about 70 to about 80 μm depending on the height of the resistive material of the chip resistor 20.
  • Referring to FIG. 4E, after forming the chip-resistor connection pad 12 a by copper plating, the photoresist pattern 14 is removed. As illustrated in FIG. 4D, the chip-resistor connection pad 12 a extends higher above the surface of the module substrate 10 than the other connection pads 12.
  • Referring to FIG. 4F, the chip resistor 20 is then reverse mounted onto the one or more chip-resistor connection pads 12 a. To accomplish this mounting process, the solder paste 18 may be printed onto the chip-resistor connection pad 12 a. The chip resistor 20 is then aligned with the one or more chip-resistor connection pads 12 a and disposed thereon. The module substrate 10 holding the chip resistor 20 may then be thermally treated to melt the paste 18 and secure the chip resistor 20 onto the chip-resistor connection pad 12 a (i.e., solder the chip resistor 20 onto the chip-resistor connection pad 12 a). Since the chip-resistor connection pad 12 a is high enough to prevent the resistive material from contacting the module substrate 10, the problem of having the chip resistor slanted can be prevented.
  • Although not shown in FIGS. 4A-4F, the insulating dam 16 illustrated in FIG. 3 may be formed on the module substrate 10 to prevent a short between the chip-resistor connection pads 12 a after removing the photoresist 14 and before mounting the chip resistor 20. Additionally, the height of the chip-resistor connection pad 12 a can be adjusted to insure that the resistive material 24 of the chip resistor 20 does not contact the insulating dam 16.
  • FIGS. 5A through 5F are sectional views sequentially illustrating a method of fabricating a semiconductor memory module according to another embodiment of the present invention.
  • Referring to FIG. 5A, the outermost thin copper layer of a CCL layer of a module substrate 10 is patterned to form connection pads 12 similar to those in the embodiment illustrated in FIG. 4A. Here, the outermost thin copper layer of the CCL layer of the module substrate 10 may have a thickness of about 70 to about 80 um.
  • Referring to FIGS. 5B and 5C, a photoresist 14 is formed on the module substrate 10 to cover the connection pads 12. Then, the photoresist 14 is patterned to cover only the connection pads 12 corresponding to where a chip resistor will be connected.
  • Referring to FIG. 5D, the connection pads 12 exposed by the photoresist 14 are etched to decrease their height. The connection pads 12 may be wet etched using a mixed solution of a fluorine-based compound, for example. The connection pads 12 that remain covered by the photoresist 14 are not etched during this process and become chip-resistor connection pads 12 a that can extend above the surface of the module substrate 10 more than the remaining etched connection pads 12.
  • Referring to FIG. 5E, after etching the connection pads 12, the photoresist pattern 14 is removed. As illustrated in FIG. 5E, the chip-resistor connection pads 12 a extend higher above the surface of the module substrate 10 than the other connection pads 12.
  • Referring to FIG. 5F, a chip resistor 20 is reverse mounted onto the chip-resistor connection pad 12 a of the substrate module in a substantially similar process that is described above with reference to FIG. 4F.
  • In experiments, the chip resistors mounted according to embodiments of the present invention displayed positive results with very few or substantially no defects of external appearance, passed an electrical test, and did not fail heat cycling (about -25 to about 125 ° C.).
  • According to some embodiments of the present invention, a chip resistor is reverse mounted onto a module substrate to protect and prevent damage to the resistive material and avoid open circuits. Furthermore, connection pads connected to the chip resistor are formed to extend higher from the module substrate than other connection pads to prevent a defective connection of the chip resistor that could occur if the resistive material of the chip resistor were to contact the module substrate or the insulating dam.
  • While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.

Claims (13)

1-7. (canceled)
8. A method of fabricating a semiconductor memory module, comprising:
patterning a copper layer on a surface of a module substrate to form connection pads;
coating a photoresist on the module substrate including the connection pads;
patterning the photoresist to expose a part of the connection pads on which a chip resistor having a resistive material will be mounted;
forming a copper layer on the part of the connection pads exposed by the photoresist pattern, to form chip-resistor connection pads;
removing the photoresist from the module substrate; and
mounting the chip resistor onto the chip-resistor connection pads.
9. The method of claim 8, wherein the module substrate is formed by stacking a plurality of copper clad laminates formed of thin copper layers on both sides of an epoxy plate.
10. The method of claim 8, wherein the forming of the copper layer is performed such that the resistive material of the chip resistor does not contact the module substrate.
11. The method of claim 8, further comprising forming an insulating dam to prevent a short between the chip-resistor connection pads after removing the photoresist and before mounting the chip resistor.
12. The method of claim 8, wherein forming the copper layer on the connection pad includes forming the copper layer of the connection pad by electroplating.
13. The method of claim 8, wherein the mounting of the chip resistor on the chip-resistor connection pad comprises:
printing solder paste on the chip-resistor connection pad;
aligning and placing the chip resistor onto the solder paste; and
thermally treating the module substrate, chip resistor, and solder paste to solder the chip-resistor onto the connection pad.
14. A method of fabricating a semiconductor memory module, comprising:
patterning a copper layer on a surface of a module substrate to form connection pads including chip-resistor connection pads;
coating a photoresist on the module substrate including the connection pads;
patterning the photoresist to expose a part of the connection pads excluding the chip-resistor connection pads on which a chip resistor will be mounted;
decreasing the height of the exposed connection pads;
thereafter, removing the photoresist from the module substrate; and
mounting a chip resistor onto the chip-resistor connection pads.
15. The method of claim 14, wherein the module substrate is formed by stacking a plural of copper clad laminates formed of thin copper layers on both sides of an epoxy plate.
16. The method of claim 14, wherein the copper layer formed on the module substrate is high enough to prevent the resistor material portion of the chip resistor from contacting the module substrate.
17. The method of claim 14, further comprising forming an insulating dam on the module substrate to prevent a short between the chip-resistor connection pads after removing the photoresist and before mounting the chip resistor.
18. The method of claim 14, wherein the mounting of the chip resistor on the chip-resistor connection pad comprises:
printing solder paste on the chip-resistor connection pads;
aligning and placing the chip resistor onto the solder paste; and
thermally treating the module substrate, the chip resistor, and the solder paste to solder the chip resistor onto the chip-resistor connection pads.
19-31. (canceled)
US13/169,663 2006-11-06 2011-06-27 Semiconductor memory module with reverse mounted chip resistor Abandoned US20110256671A1 (en)

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KR10-2006-0109070 2006-11-06
KR1020060109070A KR100809711B1 (en) 2006-11-06 2006-11-06 Semiconductor memory module with chip resistor reversely mounted
US11/934,616 US7990734B2 (en) 2006-11-06 2007-11-02 Semiconductor memory module with reverse mounted chip resistor
US13/169,663 US20110256671A1 (en) 2006-11-06 2011-06-27 Semiconductor memory module with reverse mounted chip resistor

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CN106132085A (en) * 2016-06-28 2016-11-16 广东欧珀移动通信有限公司 Pcb board assembly and the mobile terminal with it

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JPH05152101A (en) 1991-11-26 1993-06-18 Matsushita Electric Ind Co Ltd Rectangular chip resistor and manufacture thereof and a series of taping parts thereof
JP2000261123A (en) 1999-03-10 2000-09-22 Denso Corp Mounting structure of chip resistor and mounting method thereof
JP2002208668A (en) * 2001-01-10 2002-07-26 Hitachi Ltd Semiconductor device and method for manufacturing the same
JP2002231502A (en) 2001-02-06 2002-08-16 Koa Corp Fillet-less chip resistor and method for manufacturing the same
JP2003282303A (en) 2002-03-25 2003-10-03 Koa Corp Chip resistor
JP4135565B2 (en) * 2003-06-06 2008-08-20 松下電器産業株式会社 Electronic circuit device and manufacturing method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106132085A (en) * 2016-06-28 2016-11-16 广东欧珀移动通信有限公司 Pcb board assembly and the mobile terminal with it

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US20080106876A1 (en) 2008-05-08
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