US20110041135A1 - Data processor and data processing method - Google Patents

Data processor and data processing method Download PDF

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Publication number
US20110041135A1
US20110041135A1 US12/826,093 US82609310A US2011041135A1 US 20110041135 A1 US20110041135 A1 US 20110041135A1 US 82609310 A US82609310 A US 82609310A US 2011041135 A1 US2011041135 A1 US 2011041135A1
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thread
processing
threads
control
control thread
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Yasushi Nagai
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Faurecia Clarion Electronics Co Ltd
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Clarion Co Ltd
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Publication of US20110041135A1 publication Critical patent/US20110041135A1/en
Priority to US13/781,578 priority Critical patent/US9176771B2/en
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Definitions

  • the present invention relates to a data processor and a data processing method, and more specifically to data processing with a plurality of devices.
  • a CPU of the car navigation system is connected with various high-function peripheral devices such as a TV tuner, a codec circuit for moving images, a hard disk IF circuit, an optical disk IF circuit of DVD, etc., a display device IF circuit, and a portable music player IF circuit.
  • various high-function peripheral devices such as a TV tuner, a codec circuit for moving images, a hard disk IF circuit, an optical disk IF circuit of DVD, etc., a display device IF circuit, and a portable music player IF circuit.
  • Japanese patent application JP-Hei 11-272627 discloses a technology of increasing the throughput by connecting the devices according to FIFO and making the devices process data in a pipe-line manner from a dependent relation of the data processed by the respective devices.
  • Japanese patent application JP-Hei 5-250188 discloses a technology of simultaneously executing the plurality of application programs by deciding priorities of the application programs and performing a priority control. For example, a thread of a priority of level 1 is executed ahead of threads with level 2 and level 3.
  • the priority of a thread for an input device is set to 3 and the priority of the thread for an output device is set to 1.
  • the thread for an output device will start to operate by an occasion of an input to the thread for the input device of a low priority, it is impossible to increase the priority of the thread for the input device. For this reason, processing of the application that uses input/output devices will be kept waiting by another application performing with a thread of level 2.
  • the first problem that is intended to be solved is a point that the use sequence of the devices cannot be switched in realizing the application program whose response speed and throughput are high and that shares the plurality of devices. This problem makes it impossible for applications each of whose use sequences of the devices is different to be performed simultaneously.
  • the second problem is that a thread of a high priority is made to wait by a thread of a low priority in the priority control.
  • a disclosed data processor fixes operation instruction timings of peripheral devices from a dependence relationship of processed data and realizes a pipeline processing.
  • a more concrete mode of the data processor that is disclosed is of the following configuration.
  • the data processor has: device control threads corresponding to respective peripheral devices each capable of an independent operation; CPU processing threads corresponding to respective predetermined data processing that are performed by a CPU; a control thread equipped with a plurality of processing parts for constructing an application using the device control threads and the CPU processing threads; and an application management table for defining the application by a combination of the plurality of processing parts and managing its performance; wherein the control thread checks output data from each thread of the device control threads and the CPU processing threads that are associated with each of the plurality of processing parts, performs with a higher priority from the processing part near termination of the processing of the application defined by the application management table among the plurality of processing parts corresponding to the device control threads and the CPU processing threads in each of which the output data exists, and instructs execution of the device control threads and the CPU processing threads and input/output of the data; each of the device control threads control the corresponding peripheral devices according to the instructions, and in
  • Another mode of the data processor has: an application management table for defining an application that makes a plurality of peripheral devices operate according to an operation sequence; a device control thread for controlling the peripheral devices correspondingly to the plurality of respective peripheral devices; and a control thread that selects a device control thread such that the operation sequence defined by the application management table is later among device control threads each of which has a higher priority than those of the device control threads and has input data to be processed by the peripheral devices and makes it execute.
  • Yet another mode of the data processor that is disclosed is such that the device control thread is provided correspondingly to each operation type of the peripheral devices having a plurality of operation types among the plurality of peripheral devices.
  • FIG. 1 is a block diagram of a data processor
  • FIG. 2 is a configuration example of an application management table of the data processor
  • FIG. 3 is an operation timing chart of a CPU and peripheral devices of the data processor.
  • FIG. 4 is another configuration example of the application management table of the data processor.
  • FIG. 1 is a block diagram of a data processor of a first embodiment.
  • FIG. 2 is a configuration example of an application management table.
  • FIG. 3 is a timing chart of a CPU and peripheral devices.
  • the data processor is of a configuration where peripheral devices of a CPU 101 , a memory 102 , input devices 103 , a TV tuner 104 , a decoder 105 , a network interface 106 , a DVD/CD 107 , an encryption circuit 108 , an HDD/nonvolatile memory 109 , and a display 110 are connected by a bus.
  • the CPU 101 performs each processing that will be described later.
  • the memory 102 stores a program that the CPU 101 executes and input/output data of the CPU 101 and the peripheral devices 103 to 110 .
  • the input devices 103 as peripheral devices are a switch, a button, a touch panel, a mouse, etc.
  • the decoder 105 decodes contents data of images, music, etc. sent from a TV tuner, a network, a DVD, and an HDD.
  • the network interface 106 is network interface circuits, such as of a cellular phone and CAN.
  • the DVD/CD 107 is a DVD/CD medium in which an updated map, an image, music, a photograph, etc. are stored and a DVD/CD interface circuit.
  • the encryption circuit 108 performs decipherment of encrypted data and encryption of data.
  • the HDD/nonvolatile memory 109 is an interface circuit with a storage such as HDD/nonvolatile memory, and the HDD/nonvolatile memory.
  • the display 110 displays a processing result of this data processor.
  • the CPU 101 will perform the application by executing a combination of programs (processing parts and threads). Although the processing parts and threads may be called processing parts or threads, two kinds of names are used here in order to make the explanation easy to understand. The processing part will be described later.
  • the threads include device control threads 112 , 113 , 115 , and 117 each for controlling an operation of the each peripheral device, CPU processing threads 114 and 116 each for performing a predetermined function with the CPU 101 , and a control thread 111 .
  • the control thread 111 controls parallel executions of the device control threads 112 , 113 , 115 , and 117 and the CPU processing threads 114 and 116 through the processing parts corresponding to the respective threads. That is, each processing part is included in the control thread 111 .
  • the device control threads 112 , 113 , 115 , and 117 make the respective peripheral devices operate in parallel under a control by the control thread 111 . As described above, in order to realize the control by the control thread 111 , the priority of the control thread 111 is set higher than those of the other threads.
  • the device control threads 112 , 113 , 115 , and 117 and the CPU processing threads 114 and 116 of this embodiment are as follows: the DVD control thread 112 performs control of the DVD/CD 107 and management of input/output data according to instructions of the control thread 111 .
  • the encryption circuit control thread 113 performs control of the encryption circuit 108 and management of input/output data according to the instructions of the control thread 111 .
  • the decompression thread 114 performs decompression processing of compressed data as processing of the CPU 101 according to the instructions of the control thread 111 .
  • the HDD control thread 115 performs control of the HDD/nonvolatile memory 109 and management of input/output data according to the instructions of the control thread 111 .
  • the map display data origination thread 116 converts map data into data in a form that can be displayed on the display 110 as processing of the CPU 101 .
  • the display control thread 117 performs control of the display 110 and management of input data.
  • FIG. 2 shows a configuration example of an application management table 118 .
  • the application management table 118 defines the application by a configuration and an operation sequence of a combination of the threads of the device control threads 112 , 113 , 115 , and 117 and the CPU processing threads 114 and 116 , and the control thread 111 manages parallel operation control of the CPU 101 and the peripheral devices referring to the application management table 118 .
  • the application management table 118 has items of application ID, processing part ID, processing part related thread ID, preprocessing part ID, and a preprocessing part output buffer flag.
  • FIG. 2 although the name of the application is shown as an application ID, an ID of each processing part and a thread ID related to the each processing part are shown by symbols of each processing part and the each thread shown in FIG. 1 in order to avoid complication of the drawing.
  • application ID fields an ID of a map updating application 201 and an ID of a route guidance application 202 are illustrated.
  • Each line of the map updating application 201 and the route guidance application 202 of the application management table 118 shows a configuration of the each application.
  • the processing part IDs of the line of the map updating application 201 are respective processing parts of a DVD read part 143 , a decryption part 144 , a decompression part 145 , and an HDD write part 146 that construct the map updating application 201 .
  • the processing part related thread ID shows the thread used by the each processing part that constitutes the map updating application 201 .
  • FIG. 2 shows that the DVD read part 143 uses the DVD control thread 112 , the decryption part 144 uses the encryption circuit control thread 113 , the decompression part 145 uses the decompression thread 114 , and the HDD write part 146 uses the HDD control thread 115 , respectively.
  • the preprocessing part ID expresses a dependence relationship of the processing parts that constitute the application.
  • the dependence relationship of the processing part of the map updating application 201 it expresses that the execution sequence of the DVD read part 143 is a head of the processing of the map updating application 201 , the decryption part 144 uses a processing result of the DVD read part 143 , the decompression part 145 uses an output of the decryption part 144 , and the HDD write part 146 uses an output of the decompression part 145 .
  • the application is an application in which the decryption part 144 decrypts data that the DVD read part 143 read from the DVD/CD 107 in the DVD read part 143 through the DVD control thread 112 , using the encryption circuit 108 through the encryption circuit control thread 113 , the decompression part 145 decompresses the decrypted data using the decompression thread 114 , and the HDD write part 146 writes decompressed data in the HDD/nonvolatile memory 109 through the HDD control thread 115 . That is, the data is processed in the order of the DVD read part 143 , the decryption part 144 , the decompression part 145 , and the HDD write part 146 .
  • the processing part near termination of the processing is operated with a higher priority. For this reason, in performing the map updating application 201 , the priorities of the processing parts become higher in the order of the DVD read part 143 , the decryption part 144 , the decompression part 145 , and the HDD write part 146 , the priority of the HDD write part 146 being the highest.
  • the preprocessing part output buffer flag shows Existence/Non-existence of output data of the preprocessing part. That is, the preprocessing part output buffer flag in a line of the encryption circuit control thread 113 of the map updating application 201 shows whether the data that should be processed by the encryption circuit control thread 113 exists, and “Non-existence” of FIG. 2 shows that the data to be processed does not exist. If this flag is “Existence,” the encryption circuit control thread 113 is executed according to the priority of the processing part.
  • a DVD control thread control queue 119 the control thread 111 stores control information to the DVD control thread 112 .
  • a DVD control thread input buffer queue 120 an input buffer that the control thread 111 gives to the DVD control thread 112 is set.
  • the output data of the DVD control thread 112 is stored in a DVD control thread output buffer queue 121 .
  • a DVD control thread notification 122 is a signal line (a flag on the memory 102 ) through which the DVD control thread 112 notifies the control thread 111 of processing completion, etc.
  • a reference numeral 123 represents an encryption circuit control thread control queue 123 in which the control thread 111 stores control information to the encryption circuit control thread 113 .
  • an encryption circuit control thread input buffer queue 124 a buffer that stores input data given by the control thread 111 to the encryption circuit control thread 113 is set.
  • an encryption circuit control thread output buffer queue 125 output data of a result obtained by the encryption circuit control thread 113 performing encryption/decryption using the encryption circuit 108 is stored.
  • Encryption circuit control thread notification 126 is a signal line through which the encryption circuit control thread 113 notifies the control thread 111 of processing completion, etc.
  • a decompression thread control queue 127 the control thread 111 stores control information to the decompression thread 114 .
  • a decompression thread input buffer queue 128 a buffer in which input data that the control thread 111 gives to the decompression thread 114 and is an object of decompression is stored is set.
  • a decompression thread output buffer queue 129 output data of a result that the decompression thread 114 decompressed is stored.
  • a decompression thread notification 130 is a signal line through which the decompression thread 114 notifies the control thread 111 of processing completion, etc.
  • an HDD control thread control queue 131 the control thread 111 stores control information to the HDD control thread 115 .
  • a buffer that stores data that the control thread 111 writes in the HDD/nonvolatile memory 109 is set.
  • an HDD control thread output buffer queue 133 data that the HDD control thread 115 read from the HDD/nonvolatile memory 109 is stored.
  • An HDD control thread notification 134 is a signal line through which the HDD control thread 115 notifies the control thread 111 of processing completion, etc.
  • a map display data origination thread control queue 135 the control thread 111 stores control information to the map display data origination thread 116 .
  • a map display data origination thread input buffer queue 136 an input buffer in which the control thread 111 stores the map data in the map display data origination thread 116 is set.
  • a map display data origination thread output buffer queue 137 data for display that the map display data origination thread 116 made based on the inputted map data is stored.
  • a map display data origination notification 138 is a signal line through which the map display data origination thread 116 notifies the control thread 111 of processing completion, etc.
  • a display control thread control queue 139 the control thread 111 stores control information to the display control thread 117 .
  • a display control thread input buffer queue 140 a buffer in which the control thread 111 stores display data that is displayed on the display 110 is set.
  • a display control thread output buffer queue 141 data that the display control thread 117 sends to the control thread 111 is stored.
  • Display control thread notification 142 is a signal line through which the display control thread 117 notifies the control thread 111 of processing completion, etc.
  • the processing part that is controlled by a control part 150 that is one of the processing parts in the control thread 111 , and controls the device control threads 112 , 113 , 115 , and 117 and the CPU processing threads 114 and 116 will be explained.
  • the DVD read part 143 reads data of a map, an image, a piece of music, etc. stored in the DVD/CD 107 through the DVD control thread 112 .
  • the decryption part 144 controls the encryption circuit 108 , and decrypts the encrypted data through the encryption circuit control thread 113 .
  • the decompression part 145 decompresses the compressed data by executing the decompression thread 114 with the CPU 101 .
  • the HDD write part 146 controls the HDD/nonvolatile memory 109 through the HDD control thread 115 , and writes data of an update map, update map related information, an image, a piece of music, an operation record, etc. in the HDD/nonvolatile memory 109 .
  • An HDD read part 147 controls the HDD/nonvolatile memory 109 through the HDD control thread 115 , and reads data of a map, map related information, the image, the piece of music, the operation record, etc. from the HDD/nonvolatile memory 109 .
  • a map display data origination part 148 converts a map and map related information into a data row that the display control thread 117 can display on the display 110 .
  • the display part 149 controls the display 110 and displays inputted display data through the display control thread 117 .
  • the control part 150 controls respective threads related to the processing parts 143 to 149 sequentially according to a configuration of the application defined by the application management table 118 .
  • An instruction ID 151 indicates one of the processing parts 143 to 149 that the control part 150 is controlling, which is updated by the control part 150 .
  • FIG. 3 shows operations of the DVD/CD 107 , the encryption circuit 108 , the CPU 101 , and the HDD/nonvolatile memory 109 with a horizontal axis denoting time.
  • T 1 time Tn is represented simply by Tn
  • the control part 150 of the control thread 111 checks an output from a thread associated with each processing part. That is, it checks the preprocessing part output buffer flags in lines of the map updating application 201 of the application management table 118 .
  • the DVD read part 143 gives a read instruction to the DVD control thread control queue 119 , gives a buffer in which read result data is stored to the DVD control thread input buffer queue 120 , checks that the data has not arrived at the DVD control thread output buffer queue 121 , and completes the processing.
  • the DVD control thread 112 controls the DVD/CD 107 so that the data may be stored in a buffer designated by the DVD control thread input buffer queue 120 , and waits without using the CPU 101 until the processing of the DVD/CD 107 is completed.
  • the DVD/CD 107 starts reading by control from the DVD read part 143 , and completes the reading at T 3 .
  • a reference numeral 301 shown in FIG. 3 shows a period (from T 2 to T 3 ) during which the DVD/CD 107 is operating by the control at T 2 .
  • the DVD control thread 112 returns a preprocessing output buffer flag in a line of the decryption part 144 that is the processing part ID of the application management table 118 to “Non-existence,” stores read result data in the DVD control thread output buffer queue 121 , and notifies the DVD read part 143 of it via the DVD control thread notification 122 .
  • the DVD read part 143 changes the preprocessing output buffer flag in a line of the DVD read part 143 that is the preprocessing ID of the map updating application 201 of the application management table 118 to Existence, and transfers the processing to the control part 150 .
  • the control content at T 3 has been explained. Next, transition of a control entity, such as the DVD control thread 112 , the DVD read part 143 of the control thread, will be explained.
  • a completion interrupt is generated to the CPU 101 in accompany with operation completion.
  • the interrupt to the CPU 101 is analyzed by an interrupt processing routine of the OS whose explanation is omitted, and predetermined processing is performed. Here, it analyzes that it is an interrupt from the DVD/CD 107 , and executes the DVD control thread 112 as the predetermined processing.
  • the DVD control thread notification 122 of the DVD control thread 112 is also an interrupt (software interrupt) to the CPU.
  • the interrupt processing routine of the OS analyzes that it is an interrupt of the DVD control thread notification 122 , and executes the control thread 111 as the predetermined processing using a fact of being the DVD control thread notification 122 as a parameter.
  • the control thread 111 makes the DVD read part 143 perform execution referring to the parameter. Transition of the control entity from the DVD read part 143 to the control part 150 is fixed by a processing sequence of the control thread 111 . For example, when the parameter is not set, the control part 150 is made to perform execution.
  • the control part 150 checks the preprocessing output buffer flag like the processing at T 1 .
  • the preprocessing output buffer flag in a line of the decryption part 144 that is the processing part ID has been set to “Existence,” and therefore the decryption part 144 and the DVD read part 143 can perform executions.
  • the control part 150 gives a higher priority to the decryption part 144 and performs the processing thereof.
  • the decryption part 144 instructs encryption to the encryption circuit control thread control queue 123 like the DVD read part 143 , and stores the data received from the DVD control thread output buffer queue 121 in the encryption circuit control thread input buffer queue 124 .
  • the DVD read part 143 does the same operation as in the period of times T 1 to T 2 .
  • the DVD/CD 107 and the encryption circuit 108 operate in parallel, and at T 5 processing of the DVD/CD 107 and the encryption circuit 108 is completed (see 305 and 302 of FIG. 3 ). Moreover, at T 5 , processing of the DVD control thread 112 and the encryption circuit control thread 113 is resumed.
  • the preprocessing part output buffer flags in lines of the decryption part 144 and the decompression part 145 of the processing part ID of the application management table 118 turn to be “Existence,” read data is stored in the DVD control thread output buffer queue 121 , a read completion notification 122 is outputted to the DVD control thread output buffer queue 121 , decrypted data is stored in the encryption circuit control thread output buffer queue 125 , and a decryption completion notification is outputted to the encryption circuit control thread notification 126 .
  • the control part 150 checks the application management table 118 , and performs the DVD read part 143 , the decryption part 144 , and the decompression part 145 . From a dependence relationship of the processing parts shown by the application management table 118 , the decompression part 145 will be of a highest priority and the DVD read part 143 will be of a lowest priority.
  • the DVD control thread 112 the encryption circuit control thread 113 , and the decompression thread 114 are executed, the DVD/CD 107 , the encryption circuit 108 , and the CPU 101 start to operate in parallel from T 6 , and at T 7 processing of these devices is completed (see 309 , 306 , and 303 of FIG. 3 ).
  • the preprocessing part output buffer flags in lines of the decryption part 144 , the decompression part 145 , and the HDD write part 146 that are the processing IDs of the map updating application 201 of the application management table 118 turn to be “Existence.” Since the control part 150 performs control referring to this flag, from T 8 , the DVD/CD 107 , the encryption circuit 108 , the CPU 101 , and the HDD/nonvolatile memory 109 operate in parallel, and at T 9 , processing of these devices is completed (see 313 , 310 , 307 , and 304 of FIG. 3 ).
  • the data processed by the HDD/nonvolatile memory 109 in period 304 from T 8 is data that is read from the DVD/CD 107 in period 301 , is decrypted by the encryption circuit 108 in period 302 , and is decompressed in period 303 .
  • the priorities of the device control threads 112 , 113 , 115 , and 117 are set higher than those of the CPU processing threads 114 and 116 .
  • the priority of the control thread 111 is set higher than those of the CPU processing threads 114 and 116 and the device control threads 112 , 113 , 115 , and 117 .
  • a trigger of execution start for a thread other than that being executed occurs when any one of the device control threads 112 , 113 , 115 , and 117 and the CPU processing threads 114 and 116 is being executed.
  • This trigger is an interrupt from the peripheral devices, such as the DVD/CD 107 , and an interrupt from the device control threads 112 , 113 , 115 , and 117 .
  • the interrupt from the peripheral device is a trigger to any one of the corresponding device control threads 112 , 113 , 115 , and 117 . Its execution sequence is controlled according to the priorities of the device control thread to be started for execution by this trigger and of the thread being executed both of which are defined in the application management table 118 (a thread on the downstream side that performs sequential processing of the same data is high in priority). Since the interrupts from the device control threads 112 , 113 , 115 , and 117 are completion notifications from the device control threads 112 , 113 , 115 , and 117 , respectively, as described above, the control is done so that the control thread 111 may be executed because the priority of the control thread 111 is higher than those of other threads.
  • the route guidance application 202 can be defined as shown in the application management table 118 .
  • the route guidance application 202 it is possible to make the HDD/nonvolatile memory 109 , the CPU 101 , and the display 110 operate in parallel.
  • the HDD/nonvolatile memory 109 is made to operate with a higher priority
  • the HDD/nonvolatile memory 109 is made to operate with a lower priority.
  • the map retrieval application reads data from the HDD/nonvolatile memory 109 , converts data that coincides with the condition selected from the data read by the CPU 101 into data for display, and displays it on the display 110 .
  • the HDD/nonvolatile memory 109 , the CPU 101 , and the display 110 are made to operate in parallel.
  • the control part 150 records an application ID controlled last by the instruction ID 151 .
  • the control is returned to the control part 150 , by lowering the priority of the application ID recorded in the instruction ID 151 , it is possible to prevent a situation where one of the map updating application 201 and the route guidance application 202 exclusively uses the HDD/nonvolatile memory 109 and the CPU 101 that are shared by the both applications, which interrupts the operation of the other application.
  • An HDD is a device that has a large fluctuation in processing throughput.
  • the fluctuation that affects all the applications being in a parallel operation may cause a problem.
  • the route guidance is prioritized over updating of the map updating application 201 and the route guidance application 202 .
  • it is possible to maintain a timing of route guidance by adding an application priority in the application management table 118 and managing it.
  • a device that is associated with the processing part ID of an application ID line of a high priority is made to process data prepared by the preprocessing part.
  • the data processor manages a processing sequence of the peripheral devices that are used from the input to the output both of which are used in the application program with software.
  • processing in which data waiting for the processing exists and that is near the termination of the output device, etc. is performed with a higher priority. For this reason, each peripheral device becomes capable of being controlled smoothly at a timing of being able to operate in parallel, so that it becomes possible to change the use sequence of the peripheral devices flexibly while realizing the fast response speed and the high throughput.
  • a priority is not given to it. Accordingly, even if there is inversion of the priority, other processing is not kept waiting as long as the processing does not include data having any dependent relation. Thereby, it becomes possible to execute in parallel the application programs each with a different use sequence of the peripheral devices. For example, it becomes possible to execute in parallel a route guidance application program that must keep a route guidance timing and a recording application program of a TV broadcast that is not allowed to partially fail to record data.
  • each processing group has a priority.
  • By setting high the priority of processing whose throughput is intended to be assured it is possible to make processing at a low throughput wait.
  • It is possible to make processing of a low priority operate at the greatest executable throughput while realizing assurance of a throughput of important processing. For example, it becomes possible to execute in parallel the route guidance application program that must keep a timing of route guidance and a download application program of a new map, etc. that is intended to be executed in as short a time as possible. In a period when a route guidance processing load is low, a download processing throughput is increased to shorten the download time. In a period when the load is high, the download processing throughput is decreased, so that it is possible to assure the route guidance processing timing.

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